1/* 2 * linux/drivers/char/pcmcia/synclink_cs.c 3 * 4 * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $ 5 * 6 * Device driver for Microgate SyncLink PC Card 7 * multiprotocol serial adapter. 8 * 9 * written by Paul Fulghum for Microgate Corporation 10 * paulkf@microgate.com 11 * 12 * Microgate and SyncLink are trademarks of Microgate Corporation 13 * 14 * This code is released under the GNU General Public License (GPL) 15 * 16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 26 * OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq)) 30#if defined(__i386__) 31# define BREAKPOINT() asm(" int $3"); 32#else 33# define BREAKPOINT() { } 34#endif 35 36#define MAX_DEVICE_COUNT 4 37 38#include <linux/module.h> 39#include <linux/errno.h> 40#include <linux/signal.h> 41#include <linux/sched.h> 42#include <linux/timer.h> 43#include <linux/time.h> 44#include <linux/interrupt.h> 45#include <linux/tty.h> 46#include <linux/tty_flip.h> 47#include <linux/serial.h> 48#include <linux/major.h> 49#include <linux/string.h> 50#include <linux/fcntl.h> 51#include <linux/ptrace.h> 52#include <linux/ioport.h> 53#include <linux/mm.h> 54#include <linux/seq_file.h> 55#include <linux/slab.h> 56#include <linux/netdevice.h> 57#include <linux/vmalloc.h> 58#include <linux/init.h> 59#include <linux/delay.h> 60#include <linux/ioctl.h> 61#include <linux/synclink.h> 62 63#include <asm/io.h> 64#include <asm/irq.h> 65#include <asm/dma.h> 66#include <linux/bitops.h> 67#include <asm/types.h> 68#include <linux/termios.h> 69#include <linux/workqueue.h> 70#include <linux/hdlc.h> 71 72#include <pcmcia/cistpl.h> 73#include <pcmcia/cisreg.h> 74#include <pcmcia/ds.h> 75 76#if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE)) 77#define SYNCLINK_GENERIC_HDLC 1 78#else 79#define SYNCLINK_GENERIC_HDLC 0 80#endif 81 82#define GET_USER(error,value,addr) error = get_user(value,addr) 83#define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0 84#define PUT_USER(error,value,addr) error = put_user(value,addr) 85#define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0 86 87#include <asm/uaccess.h> 88 89static MGSL_PARAMS default_params = { 90 MGSL_MODE_HDLC, /* unsigned long mode */ 91 0, /* unsigned char loopback; */ 92 HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */ 93 HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */ 94 0, /* unsigned long clock_speed; */ 95 0xff, /* unsigned char addr_filter; */ 96 HDLC_CRC_16_CCITT, /* unsigned short crc_type; */ 97 HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */ 98 HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */ 99 9600, /* unsigned long data_rate; */ 100 8, /* unsigned char data_bits; */ 101 1, /* unsigned char stop_bits; */ 102 ASYNC_PARITY_NONE /* unsigned char parity; */ 103}; 104 105typedef struct { 106 int count; 107 unsigned char status; 108 char data[1]; 109} RXBUF; 110 111/* The queue of BH actions to be performed */ 112 113#define BH_RECEIVE 1 114#define BH_TRANSMIT 2 115#define BH_STATUS 4 116 117#define IO_PIN_SHUTDOWN_LIMIT 100 118 119#define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK)) 120 121struct _input_signal_events { 122 int ri_up; 123 int ri_down; 124 int dsr_up; 125 int dsr_down; 126 int dcd_up; 127 int dcd_down; 128 int cts_up; 129 int cts_down; 130}; 131 132 133/* 134 * Device instance data structure 135 */ 136 137typedef struct _mgslpc_info { 138 struct tty_port port; 139 void *if_ptr; /* General purpose pointer (used by SPPP) */ 140 int magic; 141 int line; 142 143 struct mgsl_icount icount; 144 145 int timeout; 146 int x_char; /* xon/xoff character */ 147 unsigned char read_status_mask; 148 unsigned char ignore_status_mask; 149 150 unsigned char *tx_buf; 151 int tx_put; 152 int tx_get; 153 int tx_count; 154 155 /* circular list of fixed length rx buffers */ 156 157 unsigned char *rx_buf; /* memory allocated for all rx buffers */ 158 int rx_buf_total_size; /* size of memory allocated for rx buffers */ 159 int rx_put; /* index of next empty rx buffer */ 160 int rx_get; /* index of next full rx buffer */ 161 int rx_buf_size; /* size in bytes of single rx buffer */ 162 int rx_buf_count; /* total number of rx buffers */ 163 int rx_frame_count; /* number of full rx buffers */ 164 165 wait_queue_head_t status_event_wait_q; 166 wait_queue_head_t event_wait_q; 167 struct timer_list tx_timer; /* HDLC transmit timeout timer */ 168 struct _mgslpc_info *next_device; /* device list link */ 169 170 unsigned short imra_value; 171 unsigned short imrb_value; 172 unsigned char pim_value; 173 174 spinlock_t lock; 175 struct work_struct task; /* task structure for scheduling bh */ 176 177 u32 max_frame_size; 178 179 u32 pending_bh; 180 181 bool bh_running; 182 bool bh_requested; 183 184 int dcd_chkcount; /* check counts to prevent */ 185 int cts_chkcount; /* too many IRQs if a signal */ 186 int dsr_chkcount; /* is floating */ 187 int ri_chkcount; 188 189 bool rx_enabled; 190 bool rx_overflow; 191 192 bool tx_enabled; 193 bool tx_active; 194 bool tx_aborting; 195 u32 idle_mode; 196 197 int if_mode; /* serial interface selection (RS-232, v.35 etc) */ 198 199 char device_name[25]; /* device instance name */ 200 201 unsigned int io_base; /* base I/O address of adapter */ 202 unsigned int irq_level; 203 204 MGSL_PARAMS params; /* communications parameters */ 205 206 unsigned char serial_signals; /* current serial signal states */ 207 208 bool irq_occurred; /* for diagnostics use */ 209 char testing_irq; 210 unsigned int init_error; /* startup error (DIAGS) */ 211 212 char *flag_buf; 213 bool drop_rts_on_tx_done; 214 215 struct _input_signal_events input_signal_events; 216 217 /* PCMCIA support */ 218 struct pcmcia_device *p_dev; 219 int stop; 220 221 /* SPPP/Cisco HDLC device parts */ 222 int netcount; 223 spinlock_t netlock; 224 225#if SYNCLINK_GENERIC_HDLC 226 struct net_device *netdev; 227#endif 228 229} MGSLPC_INFO; 230 231#define MGSLPC_MAGIC 0x5402 232 233/* 234 * The size of the serial xmit buffer is 1 page, or 4096 bytes 235 */ 236#define TXBUFSIZE 4096 237 238 239#define CHA 0x00 /* channel A offset */ 240#define CHB 0x40 /* channel B offset */ 241 242/* 243 * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it. 244 */ 245#undef PVR 246 247#define RXFIFO 0 248#define TXFIFO 0 249#define STAR 0x20 250#define CMDR 0x20 251#define RSTA 0x21 252#define PRE 0x21 253#define MODE 0x22 254#define TIMR 0x23 255#define XAD1 0x24 256#define XAD2 0x25 257#define RAH1 0x26 258#define RAH2 0x27 259#define DAFO 0x27 260#define RAL1 0x28 261#define RFC 0x28 262#define RHCR 0x29 263#define RAL2 0x29 264#define RBCL 0x2a 265#define XBCL 0x2a 266#define RBCH 0x2b 267#define XBCH 0x2b 268#define CCR0 0x2c 269#define CCR1 0x2d 270#define CCR2 0x2e 271#define CCR3 0x2f 272#define VSTR 0x34 273#define BGR 0x34 274#define RLCR 0x35 275#define AML 0x36 276#define AMH 0x37 277#define GIS 0x38 278#define IVA 0x38 279#define IPC 0x39 280#define ISR 0x3a 281#define IMR 0x3a 282#define PVR 0x3c 283#define PIS 0x3d 284#define PIM 0x3d 285#define PCR 0x3e 286#define CCR4 0x3f 287 288// IMR/ISR 289 290#define IRQ_BREAK_ON BIT15 // rx break detected 291#define IRQ_DATAOVERRUN BIT14 // receive data overflow 292#define IRQ_ALLSENT BIT13 // all sent 293#define IRQ_UNDERRUN BIT12 // transmit data underrun 294#define IRQ_TIMER BIT11 // timer interrupt 295#define IRQ_CTS BIT10 // CTS status change 296#define IRQ_TXREPEAT BIT9 // tx message repeat 297#define IRQ_TXFIFO BIT8 // transmit pool ready 298#define IRQ_RXEOM BIT7 // receive message end 299#define IRQ_EXITHUNT BIT6 // receive frame start 300#define IRQ_RXTIME BIT6 // rx char timeout 301#define IRQ_DCD BIT2 // carrier detect status change 302#define IRQ_OVERRUN BIT1 // receive frame overflow 303#define IRQ_RXFIFO BIT0 // receive pool full 304 305// STAR 306 307#define XFW BIT6 // transmit FIFO write enable 308#define CEC BIT2 // command executing 309#define CTS BIT1 // CTS state 310 311#define PVR_DTR BIT0 312#define PVR_DSR BIT1 313#define PVR_RI BIT2 314#define PVR_AUTOCTS BIT3 315#define PVR_RS232 0x20 /* 0010b */ 316#define PVR_V35 0xe0 /* 1110b */ 317#define PVR_RS422 0x40 /* 0100b */ 318 319/* Register access functions */ 320 321#define write_reg(info, reg, val) outb((val),(info)->io_base + (reg)) 322#define read_reg(info, reg) inb((info)->io_base + (reg)) 323 324#define read_reg16(info, reg) inw((info)->io_base + (reg)) 325#define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg)) 326 327#define set_reg_bits(info, reg, mask) \ 328 write_reg(info, (reg), \ 329 (unsigned char) (read_reg(info, (reg)) | (mask))) 330#define clear_reg_bits(info, reg, mask) \ 331 write_reg(info, (reg), \ 332 (unsigned char) (read_reg(info, (reg)) & ~(mask))) 333/* 334 * interrupt enable/disable routines 335 */ 336static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask) 337{ 338 if (channel == CHA) { 339 info->imra_value |= mask; 340 write_reg16(info, CHA + IMR, info->imra_value); 341 } else { 342 info->imrb_value |= mask; 343 write_reg16(info, CHB + IMR, info->imrb_value); 344 } 345} 346static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask) 347{ 348 if (channel == CHA) { 349 info->imra_value &= ~mask; 350 write_reg16(info, CHA + IMR, info->imra_value); 351 } else { 352 info->imrb_value &= ~mask; 353 write_reg16(info, CHB + IMR, info->imrb_value); 354 } 355} 356 357#define port_irq_disable(info, mask) \ 358 { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); } 359 360#define port_irq_enable(info, mask) \ 361 { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); } 362 363static void rx_start(MGSLPC_INFO *info); 364static void rx_stop(MGSLPC_INFO *info); 365 366static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty); 367static void tx_stop(MGSLPC_INFO *info); 368static void tx_set_idle(MGSLPC_INFO *info); 369 370static void get_signals(MGSLPC_INFO *info); 371static void set_signals(MGSLPC_INFO *info); 372 373static void reset_device(MGSLPC_INFO *info); 374 375static void hdlc_mode(MGSLPC_INFO *info); 376static void async_mode(MGSLPC_INFO *info); 377 378static void tx_timeout(unsigned long context); 379 380static int carrier_raised(struct tty_port *port); 381static void dtr_rts(struct tty_port *port, int onoff); 382 383#if SYNCLINK_GENERIC_HDLC 384#define dev_to_port(D) (dev_to_hdlc(D)->priv) 385static void hdlcdev_tx_done(MGSLPC_INFO *info); 386static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size); 387static int hdlcdev_init(MGSLPC_INFO *info); 388static void hdlcdev_exit(MGSLPC_INFO *info); 389#endif 390 391static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit); 392 393static bool register_test(MGSLPC_INFO *info); 394static bool irq_test(MGSLPC_INFO *info); 395static int adapter_test(MGSLPC_INFO *info); 396 397static int claim_resources(MGSLPC_INFO *info); 398static void release_resources(MGSLPC_INFO *info); 399static int mgslpc_add_device(MGSLPC_INFO *info); 400static void mgslpc_remove_device(MGSLPC_INFO *info); 401 402static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty); 403static void rx_reset_buffers(MGSLPC_INFO *info); 404static int rx_alloc_buffers(MGSLPC_INFO *info); 405static void rx_free_buffers(MGSLPC_INFO *info); 406 407static irqreturn_t mgslpc_isr(int irq, void *dev_id); 408 409/* 410 * Bottom half interrupt handlers 411 */ 412static void bh_handler(struct work_struct *work); 413static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty); 414static void bh_status(MGSLPC_INFO *info); 415 416/* 417 * ioctl handlers 418 */ 419static int tiocmget(struct tty_struct *tty); 420static int tiocmset(struct tty_struct *tty, 421 unsigned int set, unsigned int clear); 422static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount); 423static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params); 424static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params, struct tty_struct *tty); 425static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode); 426static int set_txidle(MGSLPC_INFO *info, int idle_mode); 427static int set_txenable(MGSLPC_INFO *info, int enable, struct tty_struct *tty); 428static int tx_abort(MGSLPC_INFO *info); 429static int set_rxenable(MGSLPC_INFO *info, int enable); 430static int wait_events(MGSLPC_INFO *info, int __user *mask); 431 432static MGSLPC_INFO *mgslpc_device_list = NULL; 433static int mgslpc_device_count = 0; 434 435/* 436 * Set this param to non-zero to load eax with the 437 * .text section address and breakpoint on module load. 438 * This is useful for use with gdb and add-symbol-file command. 439 */ 440static bool break_on_load=0; 441 442/* 443 * Driver major number, defaults to zero to get auto 444 * assigned major number. May be forced as module parameter. 445 */ 446static int ttymajor=0; 447 448static int debug_level = 0; 449static int maxframe[MAX_DEVICE_COUNT] = {0,}; 450 451module_param(break_on_load, bool, 0); 452module_param(ttymajor, int, 0); 453module_param(debug_level, int, 0); 454module_param_array(maxframe, int, NULL, 0); 455 456MODULE_LICENSE("GPL"); 457 458static char *driver_name = "SyncLink PC Card driver"; 459static char *driver_version = "$Revision: 4.34 $"; 460 461static struct tty_driver *serial_driver; 462 463/* number of characters left in xmit buffer before we ask for more */ 464#define WAKEUP_CHARS 256 465 466static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty); 467static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout); 468 469/* PCMCIA prototypes */ 470 471static int mgslpc_config(struct pcmcia_device *link); 472static void mgslpc_release(u_long arg); 473static void mgslpc_detach(struct pcmcia_device *p_dev); 474 475/* 476 * 1st function defined in .text section. Calling this function in 477 * init_module() followed by a breakpoint allows a remote debugger 478 * (gdb) to get the .text address for the add-symbol-file command. 479 * This allows remote debugging of dynamically loadable modules. 480 */ 481static void* mgslpc_get_text_ptr(void) 482{ 483 return mgslpc_get_text_ptr; 484} 485 486/** 487 * line discipline callback wrappers 488 * 489 * The wrappers maintain line discipline references 490 * while calling into the line discipline. 491 * 492 * ldisc_receive_buf - pass receive data to line discipline 493 */ 494 495static void ldisc_receive_buf(struct tty_struct *tty, 496 const __u8 *data, char *flags, int count) 497{ 498 struct tty_ldisc *ld; 499 if (!tty) 500 return; 501 ld = tty_ldisc_ref(tty); 502 if (ld) { 503 if (ld->ops->receive_buf) 504 ld->ops->receive_buf(tty, data, flags, count); 505 tty_ldisc_deref(ld); 506 } 507} 508 509static const struct tty_port_operations mgslpc_port_ops = { 510 .carrier_raised = carrier_raised, 511 .dtr_rts = dtr_rts 512}; 513 514static int mgslpc_probe(struct pcmcia_device *link) 515{ 516 MGSLPC_INFO *info; 517 int ret; 518 519 if (debug_level >= DEBUG_LEVEL_INFO) 520 printk("mgslpc_attach\n"); 521 522 info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL); 523 if (!info) { 524 printk("Error can't allocate device instance data\n"); 525 return -ENOMEM; 526 } 527 528 info->magic = MGSLPC_MAGIC; 529 tty_port_init(&info->port); 530 info->port.ops = &mgslpc_port_ops; 531 INIT_WORK(&info->task, bh_handler); 532 info->max_frame_size = 4096; 533 info->port.close_delay = 5*HZ/10; 534 info->port.closing_wait = 30*HZ; 535 init_waitqueue_head(&info->status_event_wait_q); 536 init_waitqueue_head(&info->event_wait_q); 537 spin_lock_init(&info->lock); 538 spin_lock_init(&info->netlock); 539 memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS)); 540 info->idle_mode = HDLC_TXIDLE_FLAGS; 541 info->imra_value = 0xffff; 542 info->imrb_value = 0xffff; 543 info->pim_value = 0xff; 544 545 info->p_dev = link; 546 link->priv = info; 547 548 /* Initialize the struct pcmcia_device structure */ 549 550 ret = mgslpc_config(link); 551 if (ret != 0) 552 goto failed; 553 554 ret = mgslpc_add_device(info); 555 if (ret != 0) 556 goto failed_release; 557 558 return 0; 559 560failed_release: 561 mgslpc_release((u_long)link); 562failed: 563 tty_port_destroy(&info->port); 564 kfree(info); 565 return ret; 566} 567 568/* Card has been inserted. 569 */ 570 571static int mgslpc_ioprobe(struct pcmcia_device *p_dev, void *priv_data) 572{ 573 return pcmcia_request_io(p_dev); 574} 575 576static int mgslpc_config(struct pcmcia_device *link) 577{ 578 MGSLPC_INFO *info = link->priv; 579 int ret; 580 581 if (debug_level >= DEBUG_LEVEL_INFO) 582 printk("mgslpc_config(0x%p)\n", link); 583 584 link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO; 585 586 ret = pcmcia_loop_config(link, mgslpc_ioprobe, NULL); 587 if (ret != 0) 588 goto failed; 589 590 link->config_index = 8; 591 link->config_regs = PRESENT_OPTION; 592 593 ret = pcmcia_request_irq(link, mgslpc_isr); 594 if (ret) 595 goto failed; 596 ret = pcmcia_enable_device(link); 597 if (ret) 598 goto failed; 599 600 info->io_base = link->resource[0]->start; 601 info->irq_level = link->irq; 602 return 0; 603 604failed: 605 mgslpc_release((u_long)link); 606 return -ENODEV; 607} 608 609/* Card has been removed. 610 * Unregister device and release PCMCIA configuration. 611 * If device is open, postpone until it is closed. 612 */ 613static void mgslpc_release(u_long arg) 614{ 615 struct pcmcia_device *link = (struct pcmcia_device *)arg; 616 617 if (debug_level >= DEBUG_LEVEL_INFO) 618 printk("mgslpc_release(0x%p)\n", link); 619 620 pcmcia_disable_device(link); 621} 622 623static void mgslpc_detach(struct pcmcia_device *link) 624{ 625 if (debug_level >= DEBUG_LEVEL_INFO) 626 printk("mgslpc_detach(0x%p)\n", link); 627 628 ((MGSLPC_INFO *)link->priv)->stop = 1; 629 mgslpc_release((u_long)link); 630 631 mgslpc_remove_device((MGSLPC_INFO *)link->priv); 632} 633 634static int mgslpc_suspend(struct pcmcia_device *link) 635{ 636 MGSLPC_INFO *info = link->priv; 637 638 info->stop = 1; 639 640 return 0; 641} 642 643static int mgslpc_resume(struct pcmcia_device *link) 644{ 645 MGSLPC_INFO *info = link->priv; 646 647 info->stop = 0; 648 649 return 0; 650} 651 652 653static inline bool mgslpc_paranoia_check(MGSLPC_INFO *info, 654 char *name, const char *routine) 655{ 656#ifdef MGSLPC_PARANOIA_CHECK 657 static const char *badmagic = 658 "Warning: bad magic number for mgsl struct (%s) in %s\n"; 659 static const char *badinfo = 660 "Warning: null mgslpc_info for (%s) in %s\n"; 661 662 if (!info) { 663 printk(badinfo, name, routine); 664 return true; 665 } 666 if (info->magic != MGSLPC_MAGIC) { 667 printk(badmagic, name, routine); 668 return true; 669 } 670#else 671 if (!info) 672 return true; 673#endif 674 return false; 675} 676 677 678#define CMD_RXFIFO BIT7 // release current rx FIFO 679#define CMD_RXRESET BIT6 // receiver reset 680#define CMD_RXFIFO_READ BIT5 681#define CMD_START_TIMER BIT4 682#define CMD_TXFIFO BIT3 // release current tx FIFO 683#define CMD_TXEOM BIT1 // transmit end message 684#define CMD_TXRESET BIT0 // transmit reset 685 686static bool wait_command_complete(MGSLPC_INFO *info, unsigned char channel) 687{ 688 int i = 0; 689 /* wait for command completion */ 690 while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) { 691 udelay(1); 692 if (i++ == 1000) 693 return false; 694 } 695 return true; 696} 697 698static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd) 699{ 700 wait_command_complete(info, channel); 701 write_reg(info, (unsigned char) (channel + CMDR), cmd); 702} 703 704static void tx_pause(struct tty_struct *tty) 705{ 706 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; 707 unsigned long flags; 708 709 if (mgslpc_paranoia_check(info, tty->name, "tx_pause")) 710 return; 711 if (debug_level >= DEBUG_LEVEL_INFO) 712 printk("tx_pause(%s)\n", info->device_name); 713 714 spin_lock_irqsave(&info->lock, flags); 715 if (info->tx_enabled) 716 tx_stop(info); 717 spin_unlock_irqrestore(&info->lock, flags); 718} 719 720static void tx_release(struct tty_struct *tty) 721{ 722 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; 723 unsigned long flags; 724 725 if (mgslpc_paranoia_check(info, tty->name, "tx_release")) 726 return; 727 if (debug_level >= DEBUG_LEVEL_INFO) 728 printk("tx_release(%s)\n", info->device_name); 729 730 spin_lock_irqsave(&info->lock, flags); 731 if (!info->tx_enabled) 732 tx_start(info, tty); 733 spin_unlock_irqrestore(&info->lock, flags); 734} 735 736/* Return next bottom half action to perform. 737 * or 0 if nothing to do. 738 */ 739static int bh_action(MGSLPC_INFO *info) 740{ 741 unsigned long flags; 742 int rc = 0; 743 744 spin_lock_irqsave(&info->lock, flags); 745 746 if (info->pending_bh & BH_RECEIVE) { 747 info->pending_bh &= ~BH_RECEIVE; 748 rc = BH_RECEIVE; 749 } else if (info->pending_bh & BH_TRANSMIT) { 750 info->pending_bh &= ~BH_TRANSMIT; 751 rc = BH_TRANSMIT; 752 } else if (info->pending_bh & BH_STATUS) { 753 info->pending_bh &= ~BH_STATUS; 754 rc = BH_STATUS; 755 } 756 757 if (!rc) { 758 /* Mark BH routine as complete */ 759 info->bh_running = false; 760 info->bh_requested = false; 761 } 762 763 spin_unlock_irqrestore(&info->lock, flags); 764 765 return rc; 766} 767 768static void bh_handler(struct work_struct *work) 769{ 770 MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task); 771 struct tty_struct *tty; 772 int action; 773 774 if (debug_level >= DEBUG_LEVEL_BH) 775 printk("%s(%d):bh_handler(%s) entry\n", 776 __FILE__,__LINE__,info->device_name); 777 778 info->bh_running = true; 779 tty = tty_port_tty_get(&info->port); 780 781 while((action = bh_action(info)) != 0) { 782 783 /* Process work item */ 784 if (debug_level >= DEBUG_LEVEL_BH) 785 printk("%s(%d):bh_handler() work item action=%d\n", 786 __FILE__,__LINE__,action); 787 788 switch (action) { 789 790 case BH_RECEIVE: 791 while(rx_get_frame(info, tty)); 792 break; 793 case BH_TRANSMIT: 794 bh_transmit(info, tty); 795 break; 796 case BH_STATUS: 797 bh_status(info); 798 break; 799 default: 800 /* unknown work item ID */ 801 printk("Unknown work item ID=%08X!\n", action); 802 break; 803 } 804 } 805 806 tty_kref_put(tty); 807 if (debug_level >= DEBUG_LEVEL_BH) 808 printk("%s(%d):bh_handler(%s) exit\n", 809 __FILE__,__LINE__,info->device_name); 810} 811 812static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty) 813{ 814 if (debug_level >= DEBUG_LEVEL_BH) 815 printk("bh_transmit() entry on %s\n", info->device_name); 816 817 if (tty) 818 tty_wakeup(tty); 819} 820 821static void bh_status(MGSLPC_INFO *info) 822{ 823 info->ri_chkcount = 0; 824 info->dsr_chkcount = 0; 825 info->dcd_chkcount = 0; 826 info->cts_chkcount = 0; 827} 828 829/* eom: non-zero = end of frame */ 830static void rx_ready_hdlc(MGSLPC_INFO *info, int eom) 831{ 832 unsigned char data[2]; 833 unsigned char fifo_count, read_count, i; 834 RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size)); 835 836 if (debug_level >= DEBUG_LEVEL_ISR) 837 printk("%s(%d):rx_ready_hdlc(eom=%d)\n", __FILE__, __LINE__, eom); 838 839 if (!info->rx_enabled) 840 return; 841 842 if (info->rx_frame_count >= info->rx_buf_count) { 843 /* no more free buffers */ 844 issue_command(info, CHA, CMD_RXRESET); 845 info->pending_bh |= BH_RECEIVE; 846 info->rx_overflow = true; 847 info->icount.buf_overrun++; 848 return; 849 } 850 851 if (eom) { 852 /* end of frame, get FIFO count from RBCL register */ 853 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f); 854 if (fifo_count == 0) 855 fifo_count = 32; 856 } else 857 fifo_count = 32; 858 859 do { 860 if (fifo_count == 1) { 861 read_count = 1; 862 data[0] = read_reg(info, CHA + RXFIFO); 863 } else { 864 read_count = 2; 865 *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO); 866 } 867 fifo_count -= read_count; 868 if (!fifo_count && eom) 869 buf->status = data[--read_count]; 870 871 for (i = 0; i < read_count; i++) { 872 if (buf->count >= info->max_frame_size) { 873 /* frame too large, reset receiver and reset current buffer */ 874 issue_command(info, CHA, CMD_RXRESET); 875 buf->count = 0; 876 return; 877 } 878 *(buf->data + buf->count) = data[i]; 879 buf->count++; 880 } 881 } while (fifo_count); 882 883 if (eom) { 884 info->pending_bh |= BH_RECEIVE; 885 info->rx_frame_count++; 886 info->rx_put++; 887 if (info->rx_put >= info->rx_buf_count) 888 info->rx_put = 0; 889 } 890 issue_command(info, CHA, CMD_RXFIFO); 891} 892 893static void rx_ready_async(MGSLPC_INFO *info, int tcd) 894{ 895 struct tty_port *port = &info->port; 896 unsigned char data, status, flag; 897 int fifo_count; 898 int work = 0; 899 struct mgsl_icount *icount = &info->icount; 900 901 if (tcd) { 902 /* early termination, get FIFO count from RBCL register */ 903 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f); 904 905 /* Zero fifo count could mean 0 or 32 bytes available. 906 * If BIT5 of STAR is set then at least 1 byte is available. 907 */ 908 if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5)) 909 fifo_count = 32; 910 } else 911 fifo_count = 32; 912 913 tty_buffer_request_room(port, fifo_count); 914 /* Flush received async data to receive data buffer. */ 915 while (fifo_count) { 916 data = read_reg(info, CHA + RXFIFO); 917 status = read_reg(info, CHA + RXFIFO); 918 fifo_count -= 2; 919 920 icount->rx++; 921 flag = TTY_NORMAL; 922 923 // if no frameing/crc error then save data 924 // BIT7:parity error 925 // BIT6:framing error 926 927 if (status & (BIT7 + BIT6)) { 928 if (status & BIT7) 929 icount->parity++; 930 else 931 icount->frame++; 932 933 /* discard char if tty control flags say so */ 934 if (status & info->ignore_status_mask) 935 continue; 936 937 status &= info->read_status_mask; 938 939 if (status & BIT7) 940 flag = TTY_PARITY; 941 else if (status & BIT6) 942 flag = TTY_FRAME; 943 } 944 work += tty_insert_flip_char(port, data, flag); 945 } 946 issue_command(info, CHA, CMD_RXFIFO); 947 948 if (debug_level >= DEBUG_LEVEL_ISR) { 949 printk("%s(%d):rx_ready_async", 950 __FILE__,__LINE__); 951 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n", 952 __FILE__,__LINE__,icount->rx,icount->brk, 953 icount->parity,icount->frame,icount->overrun); 954 } 955 956 if (work) 957 tty_flip_buffer_push(port); 958} 959 960 961static void tx_done(MGSLPC_INFO *info, struct tty_struct *tty) 962{ 963 if (!info->tx_active) 964 return; 965 966 info->tx_active = false; 967 info->tx_aborting = false; 968 969 if (info->params.mode == MGSL_MODE_ASYNC) 970 return; 971 972 info->tx_count = info->tx_put = info->tx_get = 0; 973 del_timer(&info->tx_timer); 974 975 if (info->drop_rts_on_tx_done) { 976 get_signals(info); 977 if (info->serial_signals & SerialSignal_RTS) { 978 info->serial_signals &= ~SerialSignal_RTS; 979 set_signals(info); 980 } 981 info->drop_rts_on_tx_done = false; 982 } 983 984#if SYNCLINK_GENERIC_HDLC 985 if (info->netcount) 986 hdlcdev_tx_done(info); 987 else 988#endif 989 { 990 if (tty && (tty->stopped || tty->hw_stopped)) { 991 tx_stop(info); 992 return; 993 } 994 info->pending_bh |= BH_TRANSMIT; 995 } 996} 997 998static void tx_ready(MGSLPC_INFO *info, struct tty_struct *tty) 999{ 1000 unsigned char fifo_count = 32; 1001 int c; 1002 1003 if (debug_level >= DEBUG_LEVEL_ISR) 1004 printk("%s(%d):tx_ready(%s)\n", __FILE__, __LINE__, info->device_name); 1005 1006 if (info->params.mode == MGSL_MODE_HDLC) { 1007 if (!info->tx_active) 1008 return; 1009 } else { 1010 if (tty && (tty->stopped || tty->hw_stopped)) { 1011 tx_stop(info); 1012 return; 1013 } 1014 if (!info->tx_count) 1015 info->tx_active = false; 1016 } 1017 1018 if (!info->tx_count) 1019 return; 1020 1021 while (info->tx_count && fifo_count) { 1022 c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get))); 1023 1024 if (c == 1) { 1025 write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get)); 1026 } else { 1027 write_reg16(info, CHA + TXFIFO, 1028 *((unsigned short*)(info->tx_buf + info->tx_get))); 1029 } 1030 info->tx_count -= c; 1031 info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1); 1032 fifo_count -= c; 1033 } 1034 1035 if (info->params.mode == MGSL_MODE_ASYNC) { 1036 if (info->tx_count < WAKEUP_CHARS) 1037 info->pending_bh |= BH_TRANSMIT; 1038 issue_command(info, CHA, CMD_TXFIFO); 1039 } else { 1040 if (info->tx_count) 1041 issue_command(info, CHA, CMD_TXFIFO); 1042 else 1043 issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM); 1044 } 1045} 1046 1047static void cts_change(MGSLPC_INFO *info, struct tty_struct *tty) 1048{ 1049 get_signals(info); 1050 if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT) 1051 irq_disable(info, CHB, IRQ_CTS); 1052 info->icount.cts++; 1053 if (info->serial_signals & SerialSignal_CTS) 1054 info->input_signal_events.cts_up++; 1055 else 1056 info->input_signal_events.cts_down++; 1057 wake_up_interruptible(&info->status_event_wait_q); 1058 wake_up_interruptible(&info->event_wait_q); 1059 1060 if (tty && tty_port_cts_enabled(&info->port)) { 1061 if (tty->hw_stopped) { 1062 if (info->serial_signals & SerialSignal_CTS) { 1063 if (debug_level >= DEBUG_LEVEL_ISR) 1064 printk("CTS tx start..."); 1065 tty->hw_stopped = 0; 1066 tx_start(info, tty); 1067 info->pending_bh |= BH_TRANSMIT; 1068 return; 1069 } 1070 } else { 1071 if (!(info->serial_signals & SerialSignal_CTS)) { 1072 if (debug_level >= DEBUG_LEVEL_ISR) 1073 printk("CTS tx stop..."); 1074 tty->hw_stopped = 1; 1075 tx_stop(info); 1076 } 1077 } 1078 } 1079 info->pending_bh |= BH_STATUS; 1080} 1081 1082static void dcd_change(MGSLPC_INFO *info, struct tty_struct *tty) 1083{ 1084 get_signals(info); 1085 if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT) 1086 irq_disable(info, CHB, IRQ_DCD); 1087 info->icount.dcd++; 1088 if (info->serial_signals & SerialSignal_DCD) { 1089 info->input_signal_events.dcd_up++; 1090 } 1091 else 1092 info->input_signal_events.dcd_down++; 1093#if SYNCLINK_GENERIC_HDLC 1094 if (info->netcount) { 1095 if (info->serial_signals & SerialSignal_DCD) 1096 netif_carrier_on(info->netdev); 1097 else 1098 netif_carrier_off(info->netdev); 1099 } 1100#endif 1101 wake_up_interruptible(&info->status_event_wait_q); 1102 wake_up_interruptible(&info->event_wait_q); 1103 1104 if (info->port.flags & ASYNC_CHECK_CD) { 1105 if (debug_level >= DEBUG_LEVEL_ISR) 1106 printk("%s CD now %s...", info->device_name, 1107 (info->serial_signals & SerialSignal_DCD) ? "on" : "off"); 1108 if (info->serial_signals & SerialSignal_DCD) 1109 wake_up_interruptible(&info->port.open_wait); 1110 else { 1111 if (debug_level >= DEBUG_LEVEL_ISR) 1112 printk("doing serial hangup..."); 1113 if (tty) 1114 tty_hangup(tty); 1115 } 1116 } 1117 info->pending_bh |= BH_STATUS; 1118} 1119 1120static void dsr_change(MGSLPC_INFO *info) 1121{ 1122 get_signals(info); 1123 if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT) 1124 port_irq_disable(info, PVR_DSR); 1125 info->icount.dsr++; 1126 if (info->serial_signals & SerialSignal_DSR) 1127 info->input_signal_events.dsr_up++; 1128 else 1129 info->input_signal_events.dsr_down++; 1130 wake_up_interruptible(&info->status_event_wait_q); 1131 wake_up_interruptible(&info->event_wait_q); 1132 info->pending_bh |= BH_STATUS; 1133} 1134 1135static void ri_change(MGSLPC_INFO *info) 1136{ 1137 get_signals(info); 1138 if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT) 1139 port_irq_disable(info, PVR_RI); 1140 info->icount.rng++; 1141 if (info->serial_signals & SerialSignal_RI) 1142 info->input_signal_events.ri_up++; 1143 else 1144 info->input_signal_events.ri_down++; 1145 wake_up_interruptible(&info->status_event_wait_q); 1146 wake_up_interruptible(&info->event_wait_q); 1147 info->pending_bh |= BH_STATUS; 1148} 1149 1150/* Interrupt service routine entry point. 1151 * 1152 * Arguments: 1153 * 1154 * irq interrupt number that caused interrupt 1155 * dev_id device ID supplied during interrupt registration 1156 */ 1157static irqreturn_t mgslpc_isr(int dummy, void *dev_id) 1158{ 1159 MGSLPC_INFO *info = dev_id; 1160 struct tty_struct *tty; 1161 unsigned short isr; 1162 unsigned char gis, pis; 1163 int count=0; 1164 1165 if (debug_level >= DEBUG_LEVEL_ISR) 1166 printk("mgslpc_isr(%d) entry.\n", info->irq_level); 1167 1168 if (!(info->p_dev->_locked)) 1169 return IRQ_HANDLED; 1170 1171 tty = tty_port_tty_get(&info->port); 1172 1173 spin_lock(&info->lock); 1174 1175 while ((gis = read_reg(info, CHA + GIS))) { 1176 if (debug_level >= DEBUG_LEVEL_ISR) 1177 printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis); 1178 1179 if ((gis & 0x70) || count > 1000) { 1180 printk("synclink_cs:hardware failed or ejected\n"); 1181 break; 1182 } 1183 count++; 1184 1185 if (gis & (BIT1 | BIT0)) { 1186 isr = read_reg16(info, CHB + ISR); 1187 if (isr & IRQ_DCD) 1188 dcd_change(info, tty); 1189 if (isr & IRQ_CTS) 1190 cts_change(info, tty); 1191 } 1192 if (gis & (BIT3 | BIT2)) 1193 { 1194 isr = read_reg16(info, CHA + ISR); 1195 if (isr & IRQ_TIMER) { 1196 info->irq_occurred = true; 1197 irq_disable(info, CHA, IRQ_TIMER); 1198 } 1199 1200 /* receive IRQs */ 1201 if (isr & IRQ_EXITHUNT) { 1202 info->icount.exithunt++; 1203 wake_up_interruptible(&info->event_wait_q); 1204 } 1205 if (isr & IRQ_BREAK_ON) { 1206 info->icount.brk++; 1207 if (info->port.flags & ASYNC_SAK) 1208 do_SAK(tty); 1209 } 1210 if (isr & IRQ_RXTIME) { 1211 issue_command(info, CHA, CMD_RXFIFO_READ); 1212 } 1213 if (isr & (IRQ_RXEOM | IRQ_RXFIFO)) { 1214 if (info->params.mode == MGSL_MODE_HDLC) 1215 rx_ready_hdlc(info, isr & IRQ_RXEOM); 1216 else 1217 rx_ready_async(info, isr & IRQ_RXEOM); 1218 } 1219 1220 /* transmit IRQs */ 1221 if (isr & IRQ_UNDERRUN) { 1222 if (info->tx_aborting) 1223 info->icount.txabort++; 1224 else 1225 info->icount.txunder++; 1226 tx_done(info, tty); 1227 } 1228 else if (isr & IRQ_ALLSENT) { 1229 info->icount.txok++; 1230 tx_done(info, tty); 1231 } 1232 else if (isr & IRQ_TXFIFO) 1233 tx_ready(info, tty); 1234 } 1235 if (gis & BIT7) { 1236 pis = read_reg(info, CHA + PIS); 1237 if (pis & BIT1) 1238 dsr_change(info); 1239 if (pis & BIT2) 1240 ri_change(info); 1241 } 1242 } 1243 1244 /* Request bottom half processing if there's something 1245 * for it to do and the bh is not already running 1246 */ 1247 1248 if (info->pending_bh && !info->bh_running && !info->bh_requested) { 1249 if (debug_level >= DEBUG_LEVEL_ISR) 1250 printk("%s(%d):%s queueing bh task.\n", 1251 __FILE__,__LINE__,info->device_name); 1252 schedule_work(&info->task); 1253 info->bh_requested = true; 1254 } 1255 1256 spin_unlock(&info->lock); 1257 tty_kref_put(tty); 1258 1259 if (debug_level >= DEBUG_LEVEL_ISR) 1260 printk("%s(%d):mgslpc_isr(%d)exit.\n", 1261 __FILE__, __LINE__, info->irq_level); 1262 1263 return IRQ_HANDLED; 1264} 1265 1266/* Initialize and start device. 1267 */ 1268static int startup(MGSLPC_INFO * info, struct tty_struct *tty) 1269{ 1270 int retval = 0; 1271 1272 if (debug_level >= DEBUG_LEVEL_INFO) 1273 printk("%s(%d):startup(%s)\n", __FILE__, __LINE__, info->device_name); 1274 1275 if (info->port.flags & ASYNC_INITIALIZED) 1276 return 0; 1277 1278 if (!info->tx_buf) { 1279 /* allocate a page of memory for a transmit buffer */ 1280 info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL); 1281 if (!info->tx_buf) { 1282 printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n", 1283 __FILE__, __LINE__, info->device_name); 1284 return -ENOMEM; 1285 } 1286 } 1287 1288 info->pending_bh = 0; 1289 1290 memset(&info->icount, 0, sizeof(info->icount)); 1291 1292 setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info); 1293 1294 /* Allocate and claim adapter resources */ 1295 retval = claim_resources(info); 1296 1297 /* perform existence check and diagnostics */ 1298 if (!retval) 1299 retval = adapter_test(info); 1300 1301 if (retval) { 1302 if (capable(CAP_SYS_ADMIN) && tty) 1303 set_bit(TTY_IO_ERROR, &tty->flags); 1304 release_resources(info); 1305 return retval; 1306 } 1307 1308 /* program hardware for current parameters */ 1309 mgslpc_change_params(info, tty); 1310 1311 if (tty) 1312 clear_bit(TTY_IO_ERROR, &tty->flags); 1313 1314 info->port.flags |= ASYNC_INITIALIZED; 1315 1316 return 0; 1317} 1318 1319/* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware 1320 */ 1321static void shutdown(MGSLPC_INFO * info, struct tty_struct *tty) 1322{ 1323 unsigned long flags; 1324 1325 if (!(info->port.flags & ASYNC_INITIALIZED)) 1326 return; 1327 1328 if (debug_level >= DEBUG_LEVEL_INFO) 1329 printk("%s(%d):mgslpc_shutdown(%s)\n", 1330 __FILE__, __LINE__, info->device_name); 1331 1332 /* clear status wait queue because status changes */ 1333 /* can't happen after shutting down the hardware */ 1334 wake_up_interruptible(&info->status_event_wait_q); 1335 wake_up_interruptible(&info->event_wait_q); 1336 1337 del_timer_sync(&info->tx_timer); 1338 1339 if (info->tx_buf) { 1340 free_page((unsigned long) info->tx_buf); 1341 info->tx_buf = NULL; 1342 } 1343 1344 spin_lock_irqsave(&info->lock, flags); 1345 1346 rx_stop(info); 1347 tx_stop(info); 1348 1349 /* TODO:disable interrupts instead of reset to preserve signal states */ 1350 reset_device(info); 1351 1352 if (!tty || tty->termios.c_cflag & HUPCL) { 1353 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR); 1354 set_signals(info); 1355 } 1356 1357 spin_unlock_irqrestore(&info->lock, flags); 1358 1359 release_resources(info); 1360 1361 if (tty) 1362 set_bit(TTY_IO_ERROR, &tty->flags); 1363 1364 info->port.flags &= ~ASYNC_INITIALIZED; 1365} 1366 1367static void mgslpc_program_hw(MGSLPC_INFO *info, struct tty_struct *tty) 1368{ 1369 unsigned long flags; 1370 1371 spin_lock_irqsave(&info->lock, flags); 1372 1373 rx_stop(info); 1374 tx_stop(info); 1375 info->tx_count = info->tx_put = info->tx_get = 0; 1376 1377 if (info->params.mode == MGSL_MODE_HDLC || info->netcount) 1378 hdlc_mode(info); 1379 else 1380 async_mode(info); 1381 1382 set_signals(info); 1383 1384 info->dcd_chkcount = 0; 1385 info->cts_chkcount = 0; 1386 info->ri_chkcount = 0; 1387 info->dsr_chkcount = 0; 1388 1389 irq_enable(info, CHB, IRQ_DCD | IRQ_CTS); 1390 port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI); 1391 get_signals(info); 1392 1393 if (info->netcount || (tty && (tty->termios.c_cflag & CREAD))) 1394 rx_start(info); 1395 1396 spin_unlock_irqrestore(&info->lock, flags); 1397} 1398 1399/* Reconfigure adapter based on new parameters 1400 */ 1401static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty) 1402{ 1403 unsigned cflag; 1404 int bits_per_char; 1405 1406 if (!tty) 1407 return; 1408 1409 if (debug_level >= DEBUG_LEVEL_INFO) 1410 printk("%s(%d):mgslpc_change_params(%s)\n", 1411 __FILE__, __LINE__, info->device_name); 1412 1413 cflag = tty->termios.c_cflag; 1414 1415 /* if B0 rate (hangup) specified then negate RTS and DTR */ 1416 /* otherwise assert RTS and DTR */ 1417 if (cflag & CBAUD) 1418 info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR; 1419 else 1420 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR); 1421 1422 /* byte size and parity */ 1423 1424 switch (cflag & CSIZE) { 1425 case CS5: info->params.data_bits = 5; break; 1426 case CS6: info->params.data_bits = 6; break; 1427 case CS7: info->params.data_bits = 7; break; 1428 case CS8: info->params.data_bits = 8; break; 1429 default: info->params.data_bits = 7; break; 1430 } 1431 1432 if (cflag & CSTOPB) 1433 info->params.stop_bits = 2; 1434 else 1435 info->params.stop_bits = 1; 1436 1437 info->params.parity = ASYNC_PARITY_NONE; 1438 if (cflag & PARENB) { 1439 if (cflag & PARODD) 1440 info->params.parity = ASYNC_PARITY_ODD; 1441 else 1442 info->params.parity = ASYNC_PARITY_EVEN; 1443#ifdef CMSPAR 1444 if (cflag & CMSPAR) 1445 info->params.parity = ASYNC_PARITY_SPACE; 1446#endif 1447 } 1448 1449 /* calculate number of jiffies to transmit a full 1450 * FIFO (32 bytes) at specified data rate 1451 */ 1452 bits_per_char = info->params.data_bits + 1453 info->params.stop_bits + 1; 1454 1455 /* if port data rate is set to 460800 or less then 1456 * allow tty settings to override, otherwise keep the 1457 * current data rate. 1458 */ 1459 if (info->params.data_rate <= 460800) { 1460 info->params.data_rate = tty_get_baud_rate(tty); 1461 } 1462 1463 if (info->params.data_rate) { 1464 info->timeout = (32*HZ*bits_per_char) / 1465 info->params.data_rate; 1466 } 1467 info->timeout += HZ/50; /* Add .02 seconds of slop */ 1468 1469 if (cflag & CRTSCTS) 1470 info->port.flags |= ASYNC_CTS_FLOW; 1471 else 1472 info->port.flags &= ~ASYNC_CTS_FLOW; 1473 1474 if (cflag & CLOCAL) 1475 info->port.flags &= ~ASYNC_CHECK_CD; 1476 else 1477 info->port.flags |= ASYNC_CHECK_CD; 1478 1479 /* process tty input control flags */ 1480 1481 info->read_status_mask = 0; 1482 if (I_INPCK(tty)) 1483 info->read_status_mask |= BIT7 | BIT6; 1484 if (I_IGNPAR(tty)) 1485 info->ignore_status_mask |= BIT7 | BIT6; 1486 1487 mgslpc_program_hw(info, tty); 1488} 1489 1490/* Add a character to the transmit buffer 1491 */ 1492static int mgslpc_put_char(struct tty_struct *tty, unsigned char ch) 1493{ 1494 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; 1495 unsigned long flags; 1496 1497 if (debug_level >= DEBUG_LEVEL_INFO) { 1498 printk("%s(%d):mgslpc_put_char(%d) on %s\n", 1499 __FILE__, __LINE__, ch, info->device_name); 1500 } 1501 1502 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char")) 1503 return 0; 1504 1505 if (!info->tx_buf) 1506 return 0; 1507 1508 spin_lock_irqsave(&info->lock, flags); 1509 1510 if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) { 1511 if (info->tx_count < TXBUFSIZE - 1) { 1512 info->tx_buf[info->tx_put++] = ch; 1513 info->tx_put &= TXBUFSIZE-1; 1514 info->tx_count++; 1515 } 1516 } 1517 1518 spin_unlock_irqrestore(&info->lock, flags); 1519 return 1; 1520} 1521 1522/* Enable transmitter so remaining characters in the 1523 * transmit buffer are sent. 1524 */ 1525static void mgslpc_flush_chars(struct tty_struct *tty) 1526{ 1527 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; 1528 unsigned long flags; 1529 1530 if (debug_level >= DEBUG_LEVEL_INFO) 1531 printk("%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n", 1532 __FILE__, __LINE__, info->device_name, info->tx_count); 1533 1534 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars")) 1535 return; 1536 1537 if (info->tx_count <= 0 || tty->stopped || 1538 tty->hw_stopped || !info->tx_buf) 1539 return; 1540 1541 if (debug_level >= DEBUG_LEVEL_INFO) 1542 printk("%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n", 1543 __FILE__, __LINE__, info->device_name); 1544 1545 spin_lock_irqsave(&info->lock, flags); 1546 if (!info->tx_active) 1547 tx_start(info, tty); 1548 spin_unlock_irqrestore(&info->lock, flags); 1549} 1550 1551/* Send a block of data 1552 * 1553 * Arguments: 1554 * 1555 * tty pointer to tty information structure 1556 * buf pointer to buffer containing send data 1557 * count size of send data in bytes 1558 * 1559 * Returns: number of characters written 1560 */ 1561static int mgslpc_write(struct tty_struct * tty, 1562 const unsigned char *buf, int count) 1563{ 1564 int c, ret = 0; 1565 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; 1566 unsigned long flags; 1567 1568 if (debug_level >= DEBUG_LEVEL_INFO) 1569 printk("%s(%d):mgslpc_write(%s) count=%d\n", 1570 __FILE__, __LINE__, info->device_name, count); 1571 1572 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") || 1573 !info->tx_buf) 1574 goto cleanup; 1575 1576 if (info->params.mode == MGSL_MODE_HDLC) { 1577 if (count > TXBUFSIZE) { 1578 ret = -EIO; 1579 goto cleanup; 1580 } 1581 if (info->tx_active) 1582 goto cleanup; 1583 else if (info->tx_count) 1584 goto start; 1585 } 1586 1587 for (;;) { 1588 c = min(count, 1589 min(TXBUFSIZE - info->tx_count - 1, 1590 TXBUFSIZE - info->tx_put)); 1591 if (c <= 0) 1592 break; 1593 1594 memcpy(info->tx_buf + info->tx_put, buf, c); 1595 1596 spin_lock_irqsave(&info->lock, flags); 1597 info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1); 1598 info->tx_count += c; 1599 spin_unlock_irqrestore(&info->lock, flags); 1600 1601 buf += c; 1602 count -= c; 1603 ret += c; 1604 } 1605start: 1606 if (info->tx_count && !tty->stopped && !tty->hw_stopped) { 1607 spin_lock_irqsave(&info->lock, flags); 1608 if (!info->tx_active) 1609 tx_start(info, tty); 1610 spin_unlock_irqrestore(&info->lock, flags); 1611 } 1612cleanup: 1613 if (debug_level >= DEBUG_LEVEL_INFO) 1614 printk("%s(%d):mgslpc_write(%s) returning=%d\n", 1615 __FILE__, __LINE__, info->device_name, ret); 1616 return ret; 1617} 1618 1619/* Return the count of free bytes in transmit buffer 1620 */ 1621static int mgslpc_write_room(struct tty_struct *tty) 1622{ 1623 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; 1624 int ret; 1625 1626 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room")) 1627 return 0; 1628 1629 if (info->params.mode == MGSL_MODE_HDLC) { 1630 /* HDLC (frame oriented) mode */ 1631 if (info->tx_active) 1632 return 0; 1633 else 1634 return HDLC_MAX_FRAME_SIZE; 1635 } else { 1636 ret = TXBUFSIZE - info->tx_count - 1; 1637 if (ret < 0) 1638 ret = 0; 1639 } 1640 1641 if (debug_level >= DEBUG_LEVEL_INFO) 1642 printk("%s(%d):mgslpc_write_room(%s)=%d\n", 1643 __FILE__, __LINE__, info->device_name, ret); 1644 return ret; 1645} 1646 1647/* Return the count of bytes in transmit buffer 1648 */ 1649static int mgslpc_chars_in_buffer(struct tty_struct *tty) 1650{ 1651 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; 1652 int rc; 1653 1654 if (debug_level >= DEBUG_LEVEL_INFO) 1655 printk("%s(%d):mgslpc_chars_in_buffer(%s)\n", 1656 __FILE__, __LINE__, info->device_name); 1657 1658 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer")) 1659 return 0; 1660 1661 if (info->params.mode == MGSL_MODE_HDLC) 1662 rc = info->tx_active ? info->max_frame_size : 0; 1663 else 1664 rc = info->tx_count; 1665 1666 if (debug_level >= DEBUG_LEVEL_INFO) 1667 printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n", 1668 __FILE__, __LINE__, info->device_name, rc); 1669 1670 return rc; 1671} 1672 1673/* Discard all data in the send buffer 1674 */ 1675static void mgslpc_flush_buffer(struct tty_struct *tty) 1676{ 1677 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; 1678 unsigned long flags; 1679 1680 if (debug_level >= DEBUG_LEVEL_INFO) 1681 printk("%s(%d):mgslpc_flush_buffer(%s) entry\n", 1682 __FILE__, __LINE__, info->device_name); 1683 1684 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer")) 1685 return; 1686 1687 spin_lock_irqsave(&info->lock, flags); 1688 info->tx_count = info->tx_put = info->tx_get = 0; 1689 del_timer(&info->tx_timer); 1690 spin_unlock_irqrestore(&info->lock, flags); 1691 1692 wake_up_interruptible(&tty->write_wait); 1693 tty_wakeup(tty); 1694} 1695 1696/* Send a high-priority XON/XOFF character 1697 */ 1698static void mgslpc_send_xchar(struct tty_struct *tty, char ch) 1699{ 1700 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; 1701 unsigned long flags; 1702 1703 if (debug_level >= DEBUG_LEVEL_INFO) 1704 printk("%s(%d):mgslpc_send_xchar(%s,%d)\n", 1705 __FILE__, __LINE__, info->device_name, ch); 1706 1707 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar")) 1708 return; 1709 1710 info->x_char = ch; 1711 if (ch) { 1712 spin_lock_irqsave(&info->lock, flags); 1713 if (!info->tx_enabled) 1714 tx_start(info, tty); 1715 spin_unlock_irqrestore(&info->lock, flags); 1716 } 1717} 1718 1719/* Signal remote device to throttle send data (our receive data) 1720 */ 1721static void mgslpc_throttle(struct tty_struct * tty) 1722{ 1723 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; 1724 unsigned long flags; 1725 1726 if (debug_level >= DEBUG_LEVEL_INFO) 1727 printk("%s(%d):mgslpc_throttle(%s) entry\n", 1728 __FILE__, __LINE__, info->device_name); 1729 1730 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle")) 1731 return; 1732 1733 if (I_IXOFF(tty)) 1734 mgslpc_send_xchar(tty, STOP_CHAR(tty)); 1735 1736 if (tty->termios.c_cflag & CRTSCTS) { 1737 spin_lock_irqsave(&info->lock, flags); 1738 info->serial_signals &= ~SerialSignal_RTS; 1739 set_signals(info); 1740 spin_unlock_irqrestore(&info->lock, flags); 1741 } 1742} 1743 1744/* Signal remote device to stop throttling send data (our receive data) 1745 */ 1746static void mgslpc_unthrottle(struct tty_struct * tty) 1747{ 1748 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; 1749 unsigned long flags; 1750 1751 if (debug_level >= DEBUG_LEVEL_INFO) 1752 printk("%s(%d):mgslpc_unthrottle(%s) entry\n", 1753 __FILE__, __LINE__, info->device_name); 1754 1755 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle")) 1756 return; 1757 1758 if (I_IXOFF(tty)) { 1759 if (info->x_char) 1760 info->x_char = 0; 1761 else 1762 mgslpc_send_xchar(tty, START_CHAR(tty)); 1763 } 1764 1765 if (tty->termios.c_cflag & CRTSCTS) { 1766 spin_lock_irqsave(&info->lock, flags); 1767 info->serial_signals |= SerialSignal_RTS; 1768 set_signals(info); 1769 spin_unlock_irqrestore(&info->lock, flags); 1770 } 1771} 1772 1773/* get the current serial statistics 1774 */ 1775static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount) 1776{ 1777 int err; 1778 if (debug_level >= DEBUG_LEVEL_INFO) 1779 printk("get_params(%s)\n", info->device_name); 1780 if (!user_icount) { 1781 memset(&info->icount, 0, sizeof(info->icount)); 1782 } else { 1783 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount)); 1784 if (err) 1785 return -EFAULT; 1786 } 1787 return 0; 1788} 1789 1790/* get the current serial parameters 1791 */ 1792static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params) 1793{ 1794 int err; 1795 if (debug_level >= DEBUG_LEVEL_INFO) 1796 printk("get_params(%s)\n", info->device_name); 1797 COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS)); 1798 if (err) 1799 return -EFAULT; 1800 return 0; 1801} 1802 1803/* set the serial parameters 1804 * 1805 * Arguments: 1806 * 1807 * info pointer to device instance data 1808 * new_params user buffer containing new serial params 1809 * 1810 * Returns: 0 if success, otherwise error code 1811 */ 1812static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params, struct tty_struct *tty) 1813{ 1814 unsigned long flags; 1815 MGSL_PARAMS tmp_params; 1816 int err; 1817 1818 if (debug_level >= DEBUG_LEVEL_INFO) 1819 printk("%s(%d):set_params %s\n", __FILE__,__LINE__, 1820 info->device_name); 1821 COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS)); 1822 if (err) { 1823 if (debug_level >= DEBUG_LEVEL_INFO) 1824 printk("%s(%d):set_params(%s) user buffer copy failed\n", 1825 __FILE__, __LINE__, info->device_name); 1826 return -EFAULT; 1827 } 1828 1829 spin_lock_irqsave(&info->lock, flags); 1830 memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS)); 1831 spin_unlock_irqrestore(&info->lock, flags); 1832 1833 mgslpc_change_params(info, tty); 1834 1835 return 0; 1836} 1837 1838static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode) 1839{ 1840 int err; 1841 if (debug_level >= DEBUG_LEVEL_INFO) 1842 printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode); 1843 COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int)); 1844 if (err) 1845 return -EFAULT; 1846 return 0; 1847} 1848 1849static int set_txidle(MGSLPC_INFO * info, int idle_mode) 1850{ 1851 unsigned long flags; 1852 if (debug_level >= DEBUG_LEVEL_INFO) 1853 printk("set_txidle(%s,%d)\n", info->device_name, idle_mode); 1854 spin_lock_irqsave(&info->lock, flags); 1855 info->idle_mode = idle_mode; 1856 tx_set_idle(info); 1857 spin_unlock_irqrestore(&info->lock, flags); 1858 return 0; 1859} 1860 1861static int get_interface(MGSLPC_INFO * info, int __user *if_mode) 1862{ 1863 int err; 1864 if (debug_level >= DEBUG_LEVEL_INFO) 1865 printk("get_interface(%s)=%d\n", info->device_name, info->if_mode); 1866 COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int)); 1867 if (err) 1868 return -EFAULT; 1869 return 0; 1870} 1871 1872static int set_interface(MGSLPC_INFO * info, int if_mode) 1873{ 1874 unsigned long flags; 1875 unsigned char val; 1876 if (debug_level >= DEBUG_LEVEL_INFO) 1877 printk("set_interface(%s,%d)\n", info->device_name, if_mode); 1878 spin_lock_irqsave(&info->lock, flags); 1879 info->if_mode = if_mode; 1880 1881 val = read_reg(info, PVR) & 0x0f; 1882 switch (info->if_mode) 1883 { 1884 case MGSL_INTERFACE_RS232: val |= PVR_RS232; break; 1885 case MGSL_INTERFACE_V35: val |= PVR_V35; break; 1886 case MGSL_INTERFACE_RS422: val |= PVR_RS422; break; 1887 } 1888 write_reg(info, PVR, val); 1889 1890 spin_unlock_irqrestore(&info->lock, flags); 1891 return 0; 1892} 1893 1894static int set_txenable(MGSLPC_INFO * info, int enable, struct tty_struct *tty) 1895{ 1896 unsigned long flags; 1897 1898 if (debug_level >= DEBUG_LEVEL_INFO) 1899 printk("set_txenable(%s,%d)\n", info->device_name, enable); 1900 1901 spin_lock_irqsave(&info->lock, flags); 1902 if (enable) { 1903 if (!info->tx_enabled) 1904 tx_start(info, tty); 1905 } else { 1906 if (info->tx_enabled) 1907 tx_stop(info); 1908 } 1909 spin_unlock_irqrestore(&info->lock, flags); 1910 return 0; 1911} 1912 1913static int tx_abort(MGSLPC_INFO * info) 1914{ 1915 unsigned long flags; 1916 1917 if (debug_level >= DEBUG_LEVEL_INFO) 1918 printk("tx_abort(%s)\n", info->device_name); 1919 1920 spin_lock_irqsave(&info->lock, flags); 1921 if (info->tx_active && info->tx_count && 1922 info->params.mode == MGSL_MODE_HDLC) { 1923 /* clear data count so FIFO is not filled on next IRQ. 1924 * This results in underrun and abort transmission. 1925 */ 1926 info->tx_count = info->tx_put = info->tx_get = 0; 1927 info->tx_aborting = true; 1928 } 1929 spin_unlock_irqrestore(&info->lock, flags); 1930 return 0; 1931} 1932 1933static int set_rxenable(MGSLPC_INFO * info, int enable) 1934{ 1935 unsigned long flags; 1936 1937 if (debug_level >= DEBUG_LEVEL_INFO) 1938 printk("set_rxenable(%s,%d)\n", info->device_name, enable); 1939 1940 spin_lock_irqsave(&info->lock, flags); 1941 if (enable) { 1942 if (!info->rx_enabled) 1943 rx_start(info); 1944 } else { 1945 if (info->rx_enabled) 1946 rx_stop(info); 1947 } 1948 spin_unlock_irqrestore(&info->lock, flags); 1949 return 0; 1950} 1951 1952/* wait for specified event to occur 1953 * 1954 * Arguments: info pointer to device instance data 1955 * mask pointer to bitmask of events to wait for 1956 * Return Value: 0 if successful and bit mask updated with 1957 * of events triggerred, 1958 * otherwise error code 1959 */ 1960static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr) 1961{ 1962 unsigned long flags; 1963 int s; 1964 int rc=0; 1965 struct mgsl_icount cprev, cnow; 1966 int events; 1967 int mask; 1968 struct _input_signal_events oldsigs, newsigs; 1969 DECLARE_WAITQUEUE(wait, current); 1970 1971 COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int)); 1972 if (rc) 1973 return -EFAULT; 1974 1975 if (debug_level >= DEBUG_LEVEL_INFO) 1976 printk("wait_events(%s,%d)\n", info->device_name, mask); 1977 1978 spin_lock_irqsave(&info->lock, flags); 1979 1980 /* return immediately if state matches requested events */ 1981 get_signals(info); 1982 s = info->serial_signals; 1983 events = mask & 1984 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) + 1985 ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) + 1986 ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) + 1987 ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) ); 1988 if (events) { 1989 spin_unlock_irqrestore(&info->lock, flags); 1990 goto exit; 1991 } 1992 1993 /* save current irq counts */ 1994 cprev = info->icount; 1995 oldsigs = info->input_signal_events; 1996 1997 if ((info->params.mode == MGSL_MODE_HDLC) && 1998 (mask & MgslEvent_ExitHuntMode)) 1999 irq_enable(info, CHA, IRQ_EXITHUNT); 2000 2001 set_current_state(TASK_INTERRUPTIBLE); 2002 add_wait_queue(&info->event_wait_q, &wait); 2003 2004 spin_unlock_irqrestore(&info->lock, flags); 2005 2006 2007 for(;;) { 2008 schedule(); 2009 if (signal_pending(current)) { 2010 rc = -ERESTARTSYS; 2011 break; 2012 } 2013 2014 /* get current irq counts */ 2015 spin_lock_irqsave(&info->lock, flags); 2016 cnow = info->icount; 2017 newsigs = info->input_signal_events; 2018 set_current_state(TASK_INTERRUPTIBLE); 2019 spin_unlock_irqrestore(&info->lock, flags); 2020 2021 /* if no change, wait aborted for some reason */ 2022 if (newsigs.dsr_up == oldsigs.dsr_up && 2023 newsigs.dsr_down == oldsigs.dsr_down && 2024 newsigs.dcd_up == oldsigs.dcd_up && 2025 newsigs.dcd_down == oldsigs.dcd_down && 2026 newsigs.cts_up == oldsigs.cts_up && 2027 newsigs.cts_down == oldsigs.cts_down && 2028 newsigs.ri_up == oldsigs.ri_up && 2029 newsigs.ri_down == oldsigs.ri_down && 2030 cnow.exithunt == cprev.exithunt && 2031 cnow.rxidle == cprev.rxidle) { 2032 rc = -EIO; 2033 break; 2034 } 2035 2036 events = mask & 2037 ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) + 2038 (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) + 2039 (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) + 2040 (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) + 2041 (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) + 2042 (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) + 2043 (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) + 2044 (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) + 2045 (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) + 2046 (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) ); 2047 if (events) 2048 break; 2049 2050 cprev = cnow; 2051 oldsigs = newsigs; 2052 } 2053 2054 remove_wait_queue(&info->event_wait_q, &wait); 2055 set_current_state(TASK_RUNNING); 2056 2057 if (mask & MgslEvent_ExitHuntMode) { 2058 spin_lock_irqsave(&info->lock, flags); 2059 if (!waitqueue_active(&info->event_wait_q)) 2060 irq_disable(info, CHA, IRQ_EXITHUNT); 2061 spin_unlock_irqrestore(&info->lock, flags); 2062 } 2063exit: 2064 if (rc == 0) 2065 PUT_USER(rc, events, mask_ptr); 2066 return rc; 2067} 2068 2069static int modem_input_wait(MGSLPC_INFO *info,int arg) 2070{ 2071 unsigned long flags; 2072 int rc; 2073 struct mgsl_icount cprev, cnow; 2074 DECLARE_WAITQUEUE(wait, current); 2075 2076 /* save current irq counts */ 2077 spin_lock_irqsave(&info->lock, flags); 2078 cprev = info->icount; 2079 add_wait_queue(&info->status_event_wait_q, &wait); 2080 set_current_state(TASK_INTERRUPTIBLE); 2081 spin_unlock_irqrestore(&info->lock, flags); 2082 2083 for(;;) { 2084 schedule(); 2085 if (signal_pending(current)) { 2086 rc = -ERESTARTSYS; 2087 break; 2088 } 2089 2090 /* get new irq counts */ 2091 spin_lock_irqsave(&info->lock, flags); 2092 cnow = info->icount; 2093 set_current_state(TASK_INTERRUPTIBLE); 2094 spin_unlock_irqrestore(&info->lock, flags); 2095 2096 /* if no change, wait aborted for some reason */ 2097 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr && 2098 cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) { 2099 rc = -EIO; 2100 break; 2101 } 2102 2103 /* check for change in caller specified modem input */ 2104 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) || 2105 (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) || 2106 (arg & TIOCM_CD && cnow.dcd != cprev.dcd) || 2107 (arg & TIOCM_CTS && cnow.cts != cprev.cts)) { 2108 rc = 0; 2109 break; 2110 } 2111 2112 cprev = cnow; 2113 } 2114 remove_wait_queue(&info->status_event_wait_q, &wait); 2115 set_current_state(TASK_RUNNING); 2116 return rc; 2117} 2118 2119/* return the state of the serial control and status signals 2120 */ 2121static int tiocmget(struct tty_struct *tty) 2122{ 2123 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; 2124 unsigned int result; 2125 unsigned long flags; 2126 2127 spin_lock_irqsave(&info->lock, flags); 2128 get_signals(info); 2129 spin_unlock_irqrestore(&info->lock, flags); 2130 2131 result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) + 2132 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) + 2133 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) + 2134 ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) + 2135 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) + 2136 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0); 2137 2138 if (debug_level >= DEBUG_LEVEL_INFO) 2139 printk("%s(%d):%s tiocmget() value=%08X\n", 2140 __FILE__, __LINE__, info->device_name, result); 2141 return result; 2142} 2143 2144/* set modem control signals (DTR/RTS) 2145 */ 2146static int tiocmset(struct tty_struct *tty, 2147 unsigned int set, unsigned int clear) 2148{ 2149 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; 2150 unsigned long flags; 2151 2152 if (debug_level >= DEBUG_LEVEL_INFO) 2153 printk("%s(%d):%s tiocmset(%x,%x)\n", 2154 __FILE__, __LINE__, info->device_name, set, clear); 2155 2156 if (set & TIOCM_RTS) 2157 info->serial_signals |= SerialSignal_RTS; 2158 if (set & TIOCM_DTR) 2159 info->serial_signals |= SerialSignal_DTR; 2160 if (clear & TIOCM_RTS) 2161 info->serial_signals &= ~SerialSignal_RTS; 2162 if (clear & TIOCM_DTR) 2163 info->serial_signals &= ~SerialSignal_DTR; 2164 2165 spin_lock_irqsave(&info->lock, flags); 2166 set_signals(info); 2167 spin_unlock_irqrestore(&info->lock, flags); 2168 2169 return 0; 2170} 2171 2172/* Set or clear transmit break condition 2173 * 2174 * Arguments: tty pointer to tty instance data 2175 * break_state -1=set break condition, 0=clear 2176 */ 2177static int mgslpc_break(struct tty_struct *tty, int break_state) 2178{ 2179 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data; 2180 unsigned long flags; 2181 2182 if (debug_level >= DEBUG_LEVEL_INFO) 2183 printk("%s(%d):mgslpc_break(%s,%d)\n", 2184 __FILE__, __LINE__, info->device_name, break_state); 2185 2186 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break")) 2187 return -EINVAL; 2188 2189 spin_lock_irqsave(&info->lock, flags); 2190 if (break_state == -1) 2191 set_reg_bits(info, CHA+DAFO, BIT6); 2192 else 2193 clear_reg_bits(info, CHA+DAFO, BIT6); 2194 spin_unlock_irqrestore(&info->lock, flags); 2195 return 0; 2196} 2197 2198static int mgslpc_get_icount(struct tty_struct *tty, 2199 struct serial_icounter_struct *icount) 2200{ 2201 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data; 2202 struct mgsl_icount cnow; /* kernel counter temps */ 2203 unsigned long flags; 2204 2205 spin_lock_irqsave(&info->lock, flags); 2206 cnow = info->icount; 2207 spin_unlock_irqrestore(&info->lock, flags); 2208 2209 icount->cts = cnow.cts; 2210 icount->dsr = cnow.dsr; 2211 icount->rng = cnow.rng; 2212 icount->dcd = cnow.dcd; 2213 icount->rx = cnow.rx; 2214 icount->tx = cnow.tx; 2215 icount->frame = cnow.frame; 2216 icount->overrun = cnow.overrun; 2217 icount->parity = cnow.parity; 2218 icount->brk = cnow.brk; 2219 icount->buf_overrun = cnow.buf_overrun; 2220 2221 return 0; 2222} 2223 2224/* Service an IOCTL request 2225 * 2226 * Arguments: 2227 * 2228 * tty pointer to tty instance data 2229 * cmd IOCTL command code 2230 * arg command argument/context 2231 * 2232 * Return Value: 0 if success, otherwise error code 2233 */ 2234static int mgslpc_ioctl(struct tty_struct *tty, 2235 unsigned int cmd, unsigned long arg) 2236{ 2237 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data; 2238 void __user *argp = (void __user *)arg; 2239 2240 if (debug_level >= DEBUG_LEVEL_INFO) 2241 printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__, __LINE__, 2242 info->device_name, cmd); 2243 2244 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl")) 2245 return -ENODEV; 2246 2247 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) && 2248 (cmd != TIOCMIWAIT)) { 2249 if (tty->flags & (1 << TTY_IO_ERROR)) 2250 return -EIO; 2251 } 2252 2253 switch (cmd) { 2254 case MGSL_IOCGPARAMS: 2255 return get_params(info, argp); 2256 case MGSL_IOCSPARAMS: 2257 return set_params(info, argp, tty); 2258 case MGSL_IOCGTXIDLE: 2259 return get_txidle(info, argp); 2260 case MGSL_IOCSTXIDLE: 2261 return set_txidle(info, (int)arg); 2262 case MGSL_IOCGIF: 2263 return get_interface(info, argp); 2264 case MGSL_IOCSIF: 2265 return set_interface(info,(int)arg); 2266 case MGSL_IOCTXENABLE: 2267 return set_txenable(info,(int)arg, tty); 2268 case MGSL_IOCRXENABLE: 2269 return set_rxenable(info,(int)arg); 2270 case MGSL_IOCTXABORT: 2271 return tx_abort(info); 2272 case MGSL_IOCGSTATS: 2273 return get_stats(info, argp); 2274 case MGSL_IOCWAITEVENT: 2275 return wait_events(info, argp); 2276 case TIOCMIWAIT: 2277 return modem_input_wait(info,(int)arg); 2278 default: 2279 return -ENOIOCTLCMD; 2280 } 2281 return 0; 2282} 2283 2284/* Set new termios settings 2285 * 2286 * Arguments: 2287 * 2288 * tty pointer to tty structure 2289 * termios pointer to buffer to hold returned old termios 2290 */ 2291static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios) 2292{ 2293 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; 2294 unsigned long flags; 2295 2296 if (debug_level >= DEBUG_LEVEL_INFO) 2297 printk("%s(%d):mgslpc_set_termios %s\n", __FILE__, __LINE__, 2298 tty->driver->name); 2299 2300 /* just return if nothing has changed */ 2301 if ((tty->termios.c_cflag == old_termios->c_cflag) 2302 && (RELEVANT_IFLAG(tty->termios.c_iflag) 2303 == RELEVANT_IFLAG(old_termios->c_iflag))) 2304 return; 2305 2306 mgslpc_change_params(info, tty); 2307 2308 /* Handle transition to B0 status */ 2309 if (old_termios->c_cflag & CBAUD && 2310 !(tty->termios.c_cflag & CBAUD)) { 2311 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR); 2312 spin_lock_irqsave(&info->lock, flags); 2313 set_signals(info); 2314 spin_unlock_irqrestore(&info->lock, flags); 2315 } 2316 2317 /* Handle transition away from B0 status */ 2318 if (!(old_termios->c_cflag & CBAUD) && 2319 tty->termios.c_cflag & CBAUD) { 2320 info->serial_signals |= SerialSignal_DTR; 2321 if (!(tty->termios.c_cflag & CRTSCTS) || 2322 !test_bit(TTY_THROTTLED, &tty->flags)) { 2323 info->serial_signals |= SerialSignal_RTS; 2324 } 2325 spin_lock_irqsave(&info->lock, flags); 2326 set_signals(info); 2327 spin_unlock_irqrestore(&info->lock, flags); 2328 } 2329 2330 /* Handle turning off CRTSCTS */ 2331 if (old_termios->c_cflag & CRTSCTS && 2332 !(tty->termios.c_cflag & CRTSCTS)) { 2333 tty->hw_stopped = 0; 2334 tx_release(tty); 2335 } 2336} 2337 2338static void mgslpc_close(struct tty_struct *tty, struct file * filp) 2339{ 2340 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data; 2341 struct tty_port *port = &info->port; 2342 2343 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close")) 2344 return; 2345 2346 if (debug_level >= DEBUG_LEVEL_INFO) 2347 printk("%s(%d):mgslpc_close(%s) entry, count=%d\n", 2348 __FILE__, __LINE__, info->device_name, port->count); 2349 2350 if (tty_port_close_start(port, tty, filp) == 0) 2351 goto cleanup; 2352 2353 if (port->flags & ASYNC_INITIALIZED) 2354 mgslpc_wait_until_sent(tty, info->timeout); 2355 2356 mgslpc_flush_buffer(tty); 2357 2358 tty_ldisc_flush(tty); 2359 shutdown(info, tty); 2360 2361 tty_port_close_end(port, tty); 2362 tty_port_tty_set(port, NULL); 2363cleanup: 2364 if (debug_level >= DEBUG_LEVEL_INFO) 2365 printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__, __LINE__, 2366 tty->driver->name, port->count); 2367} 2368 2369/* Wait until the transmitter is empty. 2370 */ 2371static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout) 2372{ 2373 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data; 2374 unsigned long orig_jiffies, char_time; 2375 2376 if (!info) 2377 return; 2378 2379 if (debug_level >= DEBUG_LEVEL_INFO) 2380 printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n", 2381 __FILE__, __LINE__, info->device_name); 2382 2383 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent")) 2384 return; 2385 2386 if (!(info->port.flags & ASYNC_INITIALIZED)) 2387 goto exit; 2388 2389 orig_jiffies = jiffies; 2390 2391 /* Set check interval to 1/5 of estimated time to 2392 * send a character, and make it at least 1. The check 2393 * interval should also be less than the timeout. 2394 * Note: use tight timings here to satisfy the NIST-PCTS. 2395 */ 2396 2397 if (info->params.data_rate) { 2398 char_time = info->timeout/(32 * 5); 2399 if (!char_time) 2400 char_time++; 2401 } else 2402 char_time = 1; 2403 2404 if (timeout) 2405 char_time = min_t(unsigned long, char_time, timeout); 2406 2407 if (info->params.mode == MGSL_MODE_HDLC) { 2408 while (info->tx_active) { 2409 msleep_interruptible(jiffies_to_msecs(char_time)); 2410 if (signal_pending(current)) 2411 break; 2412 if (timeout && time_after(jiffies, orig_jiffies + timeout)) 2413 break; 2414 } 2415 } else { 2416 while ((info->tx_count || info->tx_active) && 2417 info->tx_enabled) { 2418 msleep_interruptible(jiffies_to_msecs(char_time)); 2419 if (signal_pending(current)) 2420 break; 2421 if (timeout && time_after(jiffies, orig_jiffies + timeout)) 2422 break; 2423 } 2424 } 2425 2426exit: 2427 if (debug_level >= DEBUG_LEVEL_INFO) 2428 printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n", 2429 __FILE__, __LINE__, info->device_name); 2430} 2431 2432/* Called by tty_hangup() when a hangup is signaled. 2433 * This is the same as closing all open files for the port. 2434 */ 2435static void mgslpc_hangup(struct tty_struct *tty) 2436{ 2437 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data; 2438 2439 if (debug_level >= DEBUG_LEVEL_INFO) 2440 printk("%s(%d):mgslpc_hangup(%s)\n", 2441 __FILE__, __LINE__, info->device_name); 2442 2443 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup")) 2444 return; 2445 2446 mgslpc_flush_buffer(tty); 2447 shutdown(info, tty); 2448 tty_port_hangup(&info->port); 2449} 2450 2451static int carrier_raised(struct tty_port *port) 2452{ 2453 MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port); 2454 unsigned long flags; 2455 2456 spin_lock_irqsave(&info->lock, flags); 2457 get_signals(info); 2458 spin_unlock_irqrestore(&info->lock, flags); 2459 2460 if (info->serial_signals & SerialSignal_DCD) 2461 return 1; 2462 return 0; 2463} 2464 2465static void dtr_rts(struct tty_port *port, int onoff) 2466{ 2467 MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port); 2468 unsigned long flags; 2469 2470 spin_lock_irqsave(&info->lock, flags); 2471 if (onoff) 2472 info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR; 2473 else 2474 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR); 2475 set_signals(info); 2476 spin_unlock_irqrestore(&info->lock, flags); 2477} 2478 2479 2480static int mgslpc_open(struct tty_struct *tty, struct file * filp) 2481{ 2482 MGSLPC_INFO *info; 2483 struct tty_port *port; 2484 int retval, line; 2485 unsigned long flags; 2486 2487 /* verify range of specified line number */ 2488 line = tty->index; 2489 if (line >= mgslpc_device_count) { 2490 printk("%s(%d):mgslpc_open with invalid line #%d.\n", 2491 __FILE__, __LINE__, line); 2492 return -ENODEV; 2493 } 2494 2495 /* find the info structure for the specified line */ 2496 info = mgslpc_device_list; 2497 while(info && info->line != line) 2498 info = info->next_device; 2499 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open")) 2500 return -ENODEV; 2501 2502 port = &info->port; 2503 tty->driver_data = info; 2504 tty_port_tty_set(port, tty); 2505 2506 if (debug_level >= DEBUG_LEVEL_INFO) 2507 printk("%s(%d):mgslpc_open(%s), old ref count = %d\n", 2508 __FILE__, __LINE__, tty->driver->name, port->count); 2509 2510 /* If port is closing, signal caller to try again */ 2511 if (port->flags & ASYNC_CLOSING){ 2512 wait_event_interruptible_tty(tty, port->close_wait, 2513 !(port->flags & ASYNC_CLOSING)); 2514 retval = ((port->flags & ASYNC_HUP_NOTIFY) ? 2515 -EAGAIN : -ERESTARTSYS); 2516 goto cleanup; 2517 } 2518 2519 port->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0; 2520 2521 spin_lock_irqsave(&info->netlock, flags); 2522 if (info->netcount) { 2523 retval = -EBUSY; 2524 spin_unlock_irqrestore(&info->netlock, flags); 2525 goto cleanup; 2526 } 2527 spin_lock(&port->lock); 2528 port->count++; 2529 spin_unlock(&port->lock); 2530 spin_unlock_irqrestore(&info->netlock, flags); 2531 2532 if (port->count == 1) { 2533 /* 1st open on this device, init hardware */ 2534 retval = startup(info, tty); 2535 if (retval < 0) 2536 goto cleanup; 2537 } 2538 2539 retval = tty_port_block_til_ready(&info->port, tty, filp); 2540 if (retval) { 2541 if (debug_level >= DEBUG_LEVEL_INFO) 2542 printk("%s(%d):block_til_ready(%s) returned %d\n", 2543 __FILE__, __LINE__, info->device_name, retval); 2544 goto cleanup; 2545 } 2546 2547 if (debug_level >= DEBUG_LEVEL_INFO) 2548 printk("%s(%d):mgslpc_open(%s) success\n", 2549 __FILE__, __LINE__, info->device_name); 2550 retval = 0; 2551 2552cleanup: 2553 return retval; 2554} 2555 2556/* 2557 * /proc fs routines.... 2558 */ 2559 2560static inline void line_info(struct seq_file *m, MGSLPC_INFO *info) 2561{ 2562 char stat_buf[30]; 2563 unsigned long flags; 2564 2565 seq_printf(m, "%s:io:%04X irq:%d", 2566 info->device_name, info->io_base, info->irq_level); 2567 2568 /* output current serial signal states */ 2569 spin_lock_irqsave(&info->lock, flags); 2570 get_signals(info); 2571 spin_unlock_irqrestore(&info->lock, flags); 2572 2573 stat_buf[0] = 0; 2574 stat_buf[1] = 0; 2575 if (info->serial_signals & SerialSignal_RTS) 2576 strcat(stat_buf, "|RTS"); 2577 if (info->serial_signals & SerialSignal_CTS) 2578 strcat(stat_buf, "|CTS"); 2579 if (info->serial_signals & SerialSignal_DTR) 2580 strcat(stat_buf, "|DTR"); 2581 if (info->serial_signals & SerialSignal_DSR) 2582 strcat(stat_buf, "|DSR"); 2583 if (info->serial_signals & SerialSignal_DCD) 2584 strcat(stat_buf, "|CD"); 2585 if (info->serial_signals & SerialSignal_RI) 2586 strcat(stat_buf, "|RI"); 2587 2588 if (info->params.mode == MGSL_MODE_HDLC) { 2589 seq_printf(m, " HDLC txok:%d rxok:%d", 2590 info->icount.txok, info->icount.rxok); 2591 if (info->icount.txunder) 2592 seq_printf(m, " txunder:%d", info->icount.txunder); 2593 if (info->icount.txabort) 2594 seq_printf(m, " txabort:%d", info->icount.txabort); 2595 if (info->icount.rxshort) 2596 seq_printf(m, " rxshort:%d", info->icount.rxshort); 2597 if (info->icount.rxlong) 2598 seq_printf(m, " rxlong:%d", info->icount.rxlong); 2599 if (info->icount.rxover) 2600 seq_printf(m, " rxover:%d", info->icount.rxover); 2601 if (info->icount.rxcrc) 2602 seq_printf(m, " rxcrc:%d", info->icount.rxcrc); 2603 } else { 2604 seq_printf(m, " ASYNC tx:%d rx:%d", 2605 info->icount.tx, info->icount.rx); 2606 if (info->icount.frame) 2607 seq_printf(m, " fe:%d", info->icount.frame); 2608 if (info->icount.parity) 2609 seq_printf(m, " pe:%d", info->icount.parity); 2610 if (info->icount.brk) 2611 seq_printf(m, " brk:%d", info->icount.brk); 2612 if (info->icount.overrun) 2613 seq_printf(m, " oe:%d", info->icount.overrun); 2614 } 2615 2616 /* Append serial signal status to end */ 2617 seq_printf(m, " %s\n", stat_buf+1); 2618 2619 seq_printf(m, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n", 2620 info->tx_active,info->bh_requested,info->bh_running, 2621 info->pending_bh); 2622} 2623 2624/* Called to print information about devices 2625 */ 2626static int mgslpc_proc_show(struct seq_file *m, void *v) 2627{ 2628 MGSLPC_INFO *info; 2629 2630 seq_printf(m, "synclink driver:%s\n", driver_version); 2631 2632 info = mgslpc_device_list; 2633 while (info) { 2634 line_info(m, info); 2635 info = info->next_device; 2636 } 2637 return 0; 2638} 2639 2640static int mgslpc_proc_open(struct inode *inode, struct file *file) 2641{ 2642 return single_open(file, mgslpc_proc_show, NULL); 2643} 2644 2645static const struct file_operations mgslpc_proc_fops = { 2646 .owner = THIS_MODULE, 2647 .open = mgslpc_proc_open, 2648 .read = seq_read, 2649 .llseek = seq_lseek, 2650 .release = single_release, 2651}; 2652 2653static int rx_alloc_buffers(MGSLPC_INFO *info) 2654{ 2655 /* each buffer has header and data */ 2656 info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size; 2657 2658 /* calculate total allocation size for 8 buffers */ 2659 info->rx_buf_total_size = info->rx_buf_size * 8; 2660 2661 /* limit total allocated memory */ 2662 if (info->rx_buf_total_size > 0x10000) 2663 info->rx_buf_total_size = 0x10000; 2664 2665 /* calculate number of buffers */ 2666 info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size; 2667 2668 info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL); 2669 if (info->rx_buf == NULL) 2670 return -ENOMEM; 2671 2672 /* unused flag buffer to satisfy receive_buf calling interface */ 2673 info->flag_buf = kzalloc(info->max_frame_size, GFP_KERNEL); 2674 if (!info->flag_buf) { 2675 kfree(info->rx_buf); 2676 info->rx_buf = NULL; 2677 return -ENOMEM; 2678 } 2679 2680 rx_reset_buffers(info); 2681 return 0; 2682} 2683 2684static void rx_free_buffers(MGSLPC_INFO *info) 2685{ 2686 kfree(info->rx_buf); 2687 info->rx_buf = NULL; 2688 kfree(info->flag_buf); 2689 info->flag_buf = NULL; 2690} 2691 2692static int claim_resources(MGSLPC_INFO *info) 2693{ 2694 if (rx_alloc_buffers(info) < 0) { 2695 printk("Can't allocate rx buffer %s\n", info->device_name); 2696 release_resources(info); 2697 return -ENODEV; 2698 } 2699 return 0; 2700} 2701 2702static void release_resources(MGSLPC_INFO *info) 2703{ 2704 if (debug_level >= DEBUG_LEVEL_INFO) 2705 printk("release_resources(%s)\n", info->device_name); 2706 rx_free_buffers(info); 2707} 2708 2709/* Add the specified device instance data structure to the 2710 * global linked list of devices and increment the device count. 2711 * 2712 * Arguments: info pointer to device instance data 2713 */ 2714static int mgslpc_add_device(MGSLPC_INFO *info) 2715{ 2716 MGSLPC_INFO *current_dev = NULL; 2717 struct device *tty_dev; 2718 int ret; 2719 2720 info->next_device = NULL; 2721 info->line = mgslpc_device_count; 2722 sprintf(info->device_name,"ttySLP%d",info->line); 2723 2724 if (info->line < MAX_DEVICE_COUNT) { 2725 if (maxframe[info->line]) 2726 info->max_frame_size = maxframe[info->line]; 2727 } 2728 2729 mgslpc_device_count++; 2730 2731 if (!mgslpc_device_list) 2732 mgslpc_device_list = info; 2733 else { 2734 current_dev = mgslpc_device_list; 2735 while (current_dev->next_device) 2736 current_dev = current_dev->next_device; 2737 current_dev->next_device = info; 2738 } 2739 2740 if (info->max_frame_size < 4096) 2741 info->max_frame_size = 4096; 2742 else if (info->max_frame_size > 65535) 2743 info->max_frame_size = 65535; 2744 2745 printk("SyncLink PC Card %s:IO=%04X IRQ=%d\n", 2746 info->device_name, info->io_base, info->irq_level); 2747 2748#if SYNCLINK_GENERIC_HDLC 2749 ret = hdlcdev_init(info); 2750 if (ret != 0) 2751 goto failed; 2752#endif 2753 2754 tty_dev = tty_port_register_device(&info->port, serial_driver, info->line, 2755 &info->p_dev->dev); 2756 if (IS_ERR(tty_dev)) { 2757 ret = PTR_ERR(tty_dev); 2758#if SYNCLINK_GENERIC_HDLC 2759 hdlcdev_exit(info); 2760#endif 2761 goto failed; 2762 } 2763 2764 return 0; 2765 2766failed: 2767 if (current_dev) 2768 current_dev->next_device = NULL; 2769 else 2770 mgslpc_device_list = NULL; 2771 mgslpc_device_count--; 2772 return ret; 2773} 2774 2775static void mgslpc_remove_device(MGSLPC_INFO *remove_info) 2776{ 2777 MGSLPC_INFO *info = mgslpc_device_list; 2778 MGSLPC_INFO *last = NULL; 2779 2780 while(info) { 2781 if (info == remove_info) { 2782 if (last) 2783 last->next_device = info->next_device; 2784 else 2785 mgslpc_device_list = info->next_device; 2786 tty_unregister_device(serial_driver, info->line); 2787#if SYNCLINK_GENERIC_HDLC 2788 hdlcdev_exit(info); 2789#endif 2790 release_resources(info); 2791 tty_port_destroy(&info->port); 2792 kfree(info); 2793 mgslpc_device_count--; 2794 return; 2795 } 2796 last = info; 2797 info = info->next_device; 2798 } 2799} 2800 2801static const struct pcmcia_device_id mgslpc_ids[] = { 2802 PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050), 2803 PCMCIA_DEVICE_NULL 2804}; 2805MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids); 2806 2807static struct pcmcia_driver mgslpc_driver = { 2808 .owner = THIS_MODULE, 2809 .name = "synclink_cs", 2810 .probe = mgslpc_probe, 2811 .remove = mgslpc_detach, 2812 .id_table = mgslpc_ids, 2813 .suspend = mgslpc_suspend, 2814 .resume = mgslpc_resume, 2815}; 2816 2817static const struct tty_operations mgslpc_ops = { 2818 .open = mgslpc_open, 2819 .close = mgslpc_close, 2820 .write = mgslpc_write, 2821 .put_char = mgslpc_put_char, 2822 .flush_chars = mgslpc_flush_chars, 2823 .write_room = mgslpc_write_room, 2824 .chars_in_buffer = mgslpc_chars_in_buffer, 2825 .flush_buffer = mgslpc_flush_buffer, 2826 .ioctl = mgslpc_ioctl, 2827 .throttle = mgslpc_throttle, 2828 .unthrottle = mgslpc_unthrottle, 2829 .send_xchar = mgslpc_send_xchar, 2830 .break_ctl = mgslpc_break, 2831 .wait_until_sent = mgslpc_wait_until_sent, 2832 .set_termios = mgslpc_set_termios, 2833 .stop = tx_pause, 2834 .start = tx_release, 2835 .hangup = mgslpc_hangup, 2836 .tiocmget = tiocmget, 2837 .tiocmset = tiocmset, 2838 .get_icount = mgslpc_get_icount, 2839 .proc_fops = &mgslpc_proc_fops, 2840}; 2841 2842static int __init synclink_cs_init(void) 2843{ 2844 int rc; 2845 2846 if (break_on_load) { 2847 mgslpc_get_text_ptr(); 2848 BREAKPOINT(); 2849 } 2850 2851 serial_driver = tty_alloc_driver(MAX_DEVICE_COUNT, 2852 TTY_DRIVER_REAL_RAW | 2853 TTY_DRIVER_DYNAMIC_DEV); 2854 if (IS_ERR(serial_driver)) { 2855 rc = PTR_ERR(serial_driver); 2856 goto err; 2857 } 2858 2859 /* Initialize the tty_driver structure */ 2860 serial_driver->driver_name = "synclink_cs"; 2861 serial_driver->name = "ttySLP"; 2862 serial_driver->major = ttymajor; 2863 serial_driver->minor_start = 64; 2864 serial_driver->type = TTY_DRIVER_TYPE_SERIAL; 2865 serial_driver->subtype = SERIAL_TYPE_NORMAL; 2866 serial_driver->init_termios = tty_std_termios; 2867 serial_driver->init_termios.c_cflag = 2868 B9600 | CS8 | CREAD | HUPCL | CLOCAL; 2869 tty_set_operations(serial_driver, &mgslpc_ops); 2870 2871 rc = tty_register_driver(serial_driver); 2872 if (rc < 0) { 2873 printk(KERN_ERR "%s(%d):Couldn't register serial driver\n", 2874 __FILE__, __LINE__); 2875 goto err_put_tty; 2876 } 2877 2878 rc = pcmcia_register_driver(&mgslpc_driver); 2879 if (rc < 0) 2880 goto err_unreg_tty; 2881 2882 printk(KERN_INFO "%s %s, tty major#%d\n", driver_name, driver_version, 2883 serial_driver->major); 2884 2885 return 0; 2886err_unreg_tty: 2887 tty_unregister_driver(serial_driver); 2888err_put_tty: 2889 put_tty_driver(serial_driver); 2890err: 2891 return rc; 2892} 2893 2894static void __exit synclink_cs_exit(void) 2895{ 2896 pcmcia_unregister_driver(&mgslpc_driver); 2897 tty_unregister_driver(serial_driver); 2898 put_tty_driver(serial_driver); 2899} 2900 2901module_init(synclink_cs_init); 2902module_exit(synclink_cs_exit); 2903 2904static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate) 2905{ 2906 unsigned int M, N; 2907 unsigned char val; 2908 2909 /* note:standard BRG mode is broken in V3.2 chip 2910 * so enhanced mode is always used 2911 */ 2912 2913 if (rate) { 2914 N = 3686400 / rate; 2915 if (!N) 2916 N = 1; 2917 N >>= 1; 2918 for (M = 1; N > 64 && M < 16; M++) 2919 N >>= 1; 2920 N--; 2921 2922 /* BGR[5..0] = N 2923 * BGR[9..6] = M 2924 * BGR[7..0] contained in BGR register 2925 * BGR[9..8] contained in CCR2[7..6] 2926 * divisor = (N+1)*2^M 2927 * 2928 * Note: M *must* not be zero (causes asymetric duty cycle) 2929 */ 2930 write_reg(info, (unsigned char) (channel + BGR), 2931 (unsigned char) ((M << 6) + N)); 2932 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f; 2933 val |= ((M << 4) & 0xc0); 2934 write_reg(info, (unsigned char) (channel + CCR2), val); 2935 } 2936} 2937 2938/* Enabled the AUX clock output at the specified frequency. 2939 */ 2940static void enable_auxclk(MGSLPC_INFO *info) 2941{ 2942 unsigned char val; 2943 2944 /* MODE 2945 * 2946 * 07..06 MDS[1..0] 10 = transparent HDLC mode 2947 * 05 ADM Address Mode, 0 = no addr recognition 2948 * 04 TMD Timer Mode, 0 = external 2949 * 03 RAC Receiver Active, 0 = inactive 2950 * 02 RTS 0=RTS active during xmit, 1=RTS always active 2951 * 01 TRS Timer Resolution, 1=512 2952 * 00 TLP Test Loop, 0 = no loop 2953 * 2954 * 1000 0010 2955 */ 2956 val = 0x82; 2957 2958 /* channel B RTS is used to enable AUXCLK driver on SP505 */ 2959 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed) 2960 val |= BIT2; 2961 write_reg(info, CHB + MODE, val); 2962 2963 /* CCR0 2964 * 2965 * 07 PU Power Up, 1=active, 0=power down 2966 * 06 MCE Master Clock Enable, 1=enabled 2967 * 05 Reserved, 0 2968 * 04..02 SC[2..0] Encoding 2969 * 01..00 SM[1..0] Serial Mode, 00=HDLC 2970 * 2971 * 11000000 2972 */ 2973 write_reg(info, CHB + CCR0, 0xc0); 2974 2975 /* CCR1 2976 * 2977 * 07 SFLG Shared Flag, 0 = disable shared flags 2978 * 06 GALP Go Active On Loop, 0 = not used 2979 * 05 GLP Go On Loop, 0 = not used 2980 * 04 ODS Output Driver Select, 1=TxD is push-pull output 2981 * 03 ITF Interframe Time Fill, 0=mark, 1=flag 2982 * 02..00 CM[2..0] Clock Mode 2983 * 2984 * 0001 0111 2985 */ 2986 write_reg(info, CHB + CCR1, 0x17); 2987 2988 /* CCR2 (Channel B) 2989 * 2990 * 07..06 BGR[9..8] Baud rate bits 9..8 2991 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value 2992 * 04 SSEL Clock source select, 1=submode b 2993 * 03 TOE 0=TxCLK is input, 1=TxCLK is output 2994 * 02 RWX Read/Write Exchange 0=disabled 2995 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32 2996 * 00 DIV, data inversion 0=disabled, 1=enabled 2997 * 2998 * 0011 1000 2999 */ 3000 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed) 3001 write_reg(info, CHB + CCR2, 0x38); 3002 else 3003 write_reg(info, CHB + CCR2, 0x30); 3004 3005 /* CCR4 3006 * 3007 * 07 MCK4 Master Clock Divide by 4, 1=enabled 3008 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled 3009 * 05 TST1 Test Pin, 0=normal operation 3010 * 04 ICD Ivert Carrier Detect, 1=enabled (active low) 3011 * 03..02 Reserved, must be 0 3012 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes 3013 * 3014 * 0101 0000 3015 */ 3016 write_reg(info, CHB + CCR4, 0x50); 3017 3018 /* if auxclk not enabled, set internal BRG so 3019 * CTS transitions can be detected (requires TxC) 3020 */ 3021 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed) 3022 mgslpc_set_rate(info, CHB, info->params.clock_speed); 3023 else 3024 mgslpc_set_rate(info, CHB, 921600); 3025} 3026 3027static void loopback_enable(MGSLPC_INFO *info) 3028{ 3029 unsigned char val; 3030 3031 /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */ 3032 val = read_reg(info, CHA + CCR1) | (BIT2 | BIT1 | BIT0); 3033 write_reg(info, CHA + CCR1, val); 3034 3035 /* CCR2:04 SSEL Clock source select, 1=submode b */ 3036 val = read_reg(info, CHA + CCR2) | (BIT4 | BIT5); 3037 write_reg(info, CHA + CCR2, val); 3038 3039 /* set LinkSpeed if available, otherwise default to 2Mbps */ 3040 if (info->params.clock_speed) 3041 mgslpc_set_rate(info, CHA, info->params.clock_speed); 3042 else 3043 mgslpc_set_rate(info, CHA, 1843200); 3044 3045 /* MODE:00 TLP Test Loop, 1=loopback enabled */ 3046 val = read_reg(info, CHA + MODE) | BIT0; 3047 write_reg(info, CHA + MODE, val); 3048} 3049 3050static void hdlc_mode(MGSLPC_INFO *info) 3051{ 3052 unsigned char val; 3053 unsigned char clkmode, clksubmode; 3054 3055 /* disable all interrupts */ 3056 irq_disable(info, CHA, 0xffff); 3057 irq_disable(info, CHB, 0xffff); 3058 port_irq_disable(info, 0xff); 3059 3060 /* assume clock mode 0a, rcv=RxC xmt=TxC */ 3061 clkmode = clksubmode = 0; 3062 if (info->params.flags & HDLC_FLAG_RXC_DPLL 3063 && info->params.flags & HDLC_FLAG_TXC_DPLL) { 3064 /* clock mode 7a, rcv = DPLL, xmt = DPLL */ 3065 clkmode = 7; 3066 } else if (info->params.flags & HDLC_FLAG_RXC_BRG 3067 && info->params.flags & HDLC_FLAG_TXC_BRG) { 3068 /* clock mode 7b, rcv = BRG, xmt = BRG */ 3069 clkmode = 7; 3070 clksubmode = 1; 3071 } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) { 3072 if (info->params.flags & HDLC_FLAG_TXC_BRG) { 3073 /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */ 3074 clkmode = 6; 3075 clksubmode = 1; 3076 } else { 3077 /* clock mode 6a, rcv = DPLL, xmt = TxC */ 3078 clkmode = 6; 3079 } 3080 } else if (info->params.flags & HDLC_FLAG_TXC_BRG) { 3081 /* clock mode 0b, rcv = RxC, xmt = BRG */ 3082 clksubmode = 1; 3083 } 3084 3085 /* MODE 3086 * 3087 * 07..06 MDS[1..0] 10 = transparent HDLC mode 3088 * 05 ADM Address Mode, 0 = no addr recognition 3089 * 04 TMD Timer Mode, 0 = external 3090 * 03 RAC Receiver Active, 0 = inactive 3091 * 02 RTS 0=RTS active during xmit, 1=RTS always active 3092 * 01 TRS Timer Resolution, 1=512 3093 * 00 TLP Test Loop, 0 = no loop 3094 * 3095 * 1000 0010 3096 */ 3097 val = 0x82; 3098 if (info->params.loopback) 3099 val |= BIT0; 3100 3101 /* preserve RTS state */ 3102 if (info->serial_signals & SerialSignal_RTS) 3103 val |= BIT2; 3104 write_reg(info, CHA + MODE, val); 3105 3106 /* CCR0 3107 * 3108 * 07 PU Power Up, 1=active, 0=power down 3109 * 06 MCE Master Clock Enable, 1=enabled 3110 * 05 Reserved, 0 3111 * 04..02 SC[2..0] Encoding 3112 * 01..00 SM[1..0] Serial Mode, 00=HDLC 3113 * 3114 * 11000000 3115 */ 3116 val = 0xc0; 3117 switch (info->params.encoding) 3118 { 3119 case HDLC_ENCODING_NRZI: 3120 val |= BIT3; 3121 break; 3122 case HDLC_ENCODING_BIPHASE_SPACE: 3123 val |= BIT4; 3124 break; // FM0 3125 case HDLC_ENCODING_BIPHASE_MARK: 3126 val |= BIT4 | BIT2; 3127 break; // FM1 3128 case HDLC_ENCODING_BIPHASE_LEVEL: 3129 val |= BIT4 | BIT3; 3130 break; // Manchester 3131 } 3132 write_reg(info, CHA + CCR0, val); 3133 3134 /* CCR1 3135 * 3136 * 07 SFLG Shared Flag, 0 = disable shared flags 3137 * 06 GALP Go Active On Loop, 0 = not used 3138 * 05 GLP Go On Loop, 0 = not used 3139 * 04 ODS Output Driver Select, 1=TxD is push-pull output 3140 * 03 ITF Interframe Time Fill, 0=mark, 1=flag 3141 * 02..00 CM[2..0] Clock Mode 3142 * 3143 * 0001 0000 3144 */ 3145 val = 0x10 + clkmode; 3146 write_reg(info, CHA + CCR1, val); 3147 3148 /* CCR2 3149 * 3150 * 07..06 BGR[9..8] Baud rate bits 9..8 3151 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value 3152 * 04 SSEL Clock source select, 1=submode b 3153 * 03 TOE 0=TxCLK is input, 0=TxCLK is input 3154 * 02 RWX Read/Write Exchange 0=disabled 3155 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32 3156 * 00 DIV, data inversion 0=disabled, 1=enabled 3157 * 3158 * 0000 0000 3159 */ 3160 val = 0x00; 3161 if (clkmode == 2 || clkmode == 3 || clkmode == 6 3162 || clkmode == 7 || (clkmode == 0 && clksubmode == 1)) 3163 val |= BIT5; 3164 if (clksubmode) 3165 val |= BIT4; 3166 if (info->params.crc_type == HDLC_CRC_32_CCITT) 3167 val |= BIT1; 3168 if (info->params.encoding == HDLC_ENCODING_NRZB) 3169 val |= BIT0; 3170 write_reg(info, CHA + CCR2, val); 3171 3172 /* CCR3 3173 * 3174 * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8 3175 * 05 EPT Enable preamble transmission, 1=enabled 3176 * 04 RADD Receive address pushed to FIFO, 0=disabled 3177 * 03 CRL CRC Reset Level, 0=FFFF 3178 * 02 RCRC Rx CRC 0=On 1=Off 3179 * 01 TCRC Tx CRC 0=On 1=Off 3180 * 00 PSD DPLL Phase Shift Disable 3181 * 3182 * 0000 0000 3183 */ 3184 val = 0x00; 3185 if (info->params.crc_type == HDLC_CRC_NONE) 3186 val |= BIT2 | BIT1; 3187 if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE) 3188 val |= BIT5; 3189 switch (info->params.preamble_length) 3190 { 3191 case HDLC_PREAMBLE_LENGTH_16BITS: 3192 val |= BIT6; 3193 break; 3194 case HDLC_PREAMBLE_LENGTH_32BITS: 3195 val |= BIT6; 3196 break; 3197 case HDLC_PREAMBLE_LENGTH_64BITS: 3198 val |= BIT7 | BIT6; 3199 break; 3200 } 3201 write_reg(info, CHA + CCR3, val); 3202 3203 /* PRE - Preamble pattern */ 3204 val = 0; 3205 switch (info->params.preamble) 3206 { 3207 case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break; 3208 case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break; 3209 case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break; 3210 case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break; 3211 } 3212 write_reg(info, CHA + PRE, val); 3213 3214 /* CCR4 3215 * 3216 * 07 MCK4 Master Clock Divide by 4, 1=enabled 3217 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled 3218 * 05 TST1 Test Pin, 0=normal operation 3219 * 04 ICD Ivert Carrier Detect, 1=enabled (active low) 3220 * 03..02 Reserved, must be 0 3221 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes 3222 * 3223 * 0101 0000 3224 */ 3225 val = 0x50; 3226 write_reg(info, CHA + CCR4, val); 3227 if (info->params.flags & HDLC_FLAG_RXC_DPLL) 3228 mgslpc_set_rate(info, CHA, info->params.clock_speed * 16); 3229 else 3230 mgslpc_set_rate(info, CHA, info->params.clock_speed); 3231 3232 /* RLCR Receive length check register 3233 * 3234 * 7 1=enable receive length check 3235 * 6..0 Max frame length = (RL + 1) * 32 3236 */ 3237 write_reg(info, CHA + RLCR, 0); 3238 3239 /* XBCH Transmit Byte Count High 3240 * 3241 * 07 DMA mode, 0 = interrupt driven 3242 * 06 NRM, 0=ABM (ignored) 3243 * 05 CAS Carrier Auto Start 3244 * 04 XC Transmit Continuously (ignored) 3245 * 03..00 XBC[10..8] Transmit byte count bits 10..8 3246 * 3247 * 0000 0000 3248 */ 3249 val = 0x00; 3250 if (info->params.flags & HDLC_FLAG_AUTO_DCD) 3251 val |= BIT5; 3252 write_reg(info, CHA + XBCH, val); 3253 enable_auxclk(info); 3254 if (info->params.loopback || info->testing_irq) 3255 loopback_enable(info); 3256 if (info->params.flags & HDLC_FLAG_AUTO_CTS) 3257 { 3258 irq_enable(info, CHB, IRQ_CTS); 3259 /* PVR[3] 1=AUTO CTS active */ 3260 set_reg_bits(info, CHA + PVR, BIT3); 3261 } else 3262 clear_reg_bits(info, CHA + PVR, BIT3); 3263 3264 irq_enable(info, CHA, 3265 IRQ_RXEOM | IRQ_RXFIFO | IRQ_ALLSENT | 3266 IRQ_UNDERRUN | IRQ_TXFIFO); 3267 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET); 3268 wait_command_complete(info, CHA); 3269 read_reg16(info, CHA + ISR); /* clear pending IRQs */ 3270 3271 /* Master clock mode enabled above to allow reset commands 3272 * to complete even if no data clocks are present. 3273 * 3274 * Disable master clock mode for normal communications because 3275 * V3.2 of the ESCC2 has a bug that prevents the transmit all sent 3276 * IRQ when in master clock mode. 3277 * 3278 * Leave master clock mode enabled for IRQ test because the 3279 * timer IRQ used by the test can only happen in master clock mode. 3280 */ 3281 if (!info->testing_irq) 3282 clear_reg_bits(info, CHA + CCR0, BIT6); 3283 3284 tx_set_idle(info); 3285 3286 tx_stop(info); 3287 rx_stop(info); 3288} 3289 3290static void rx_stop(MGSLPC_INFO *info) 3291{ 3292 if (debug_level >= DEBUG_LEVEL_ISR) 3293 printk("%s(%d):rx_stop(%s)\n", 3294 __FILE__, __LINE__, info->device_name); 3295 3296 /* MODE:03 RAC Receiver Active, 0=inactive */ 3297 clear_reg_bits(info, CHA + MODE, BIT3); 3298 3299 info->rx_enabled = false; 3300 info->rx_overflow = false; 3301} 3302 3303static void rx_start(MGSLPC_INFO *info) 3304{ 3305 if (debug_level >= DEBUG_LEVEL_ISR) 3306 printk("%s(%d):rx_start(%s)\n", 3307 __FILE__, __LINE__, info->device_name); 3308 3309 rx_reset_buffers(info); 3310 info->rx_enabled = false; 3311 info->rx_overflow = false; 3312 3313 /* MODE:03 RAC Receiver Active, 1=active */ 3314 set_reg_bits(info, CHA + MODE, BIT3); 3315 3316 info->rx_enabled = true; 3317} 3318 3319static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty) 3320{ 3321 if (debug_level >= DEBUG_LEVEL_ISR) 3322 printk("%s(%d):tx_start(%s)\n", 3323 __FILE__, __LINE__, info->device_name); 3324 3325 if (info->tx_count) { 3326 /* If auto RTS enabled and RTS is inactive, then assert */ 3327 /* RTS and set a flag indicating that the driver should */ 3328 /* negate RTS when the transmission completes. */ 3329 info->drop_rts_on_tx_done = false; 3330 3331 if (info->params.flags & HDLC_FLAG_AUTO_RTS) { 3332 get_signals(info); 3333 if (!(info->serial_signals & SerialSignal_RTS)) { 3334 info->serial_signals |= SerialSignal_RTS; 3335 set_signals(info); 3336 info->drop_rts_on_tx_done = true; 3337 } 3338 } 3339 3340 if (info->params.mode == MGSL_MODE_ASYNC) { 3341 if (!info->tx_active) { 3342 info->tx_active = true; 3343 tx_ready(info, tty); 3344 } 3345 } else { 3346 info->tx_active = true; 3347 tx_ready(info, tty); 3348 mod_timer(&info->tx_timer, jiffies + 3349 msecs_to_jiffies(5000)); 3350 } 3351 } 3352 3353 if (!info->tx_enabled) 3354 info->tx_enabled = true; 3355} 3356 3357static void tx_stop(MGSLPC_INFO *info) 3358{ 3359 if (debug_level >= DEBUG_LEVEL_ISR) 3360 printk("%s(%d):tx_stop(%s)\n", 3361 __FILE__, __LINE__, info->device_name); 3362 3363 del_timer(&info->tx_timer); 3364 3365 info->tx_enabled = false; 3366 info->tx_active = false; 3367} 3368 3369/* Reset the adapter to a known state and prepare it for further use. 3370 */ 3371static void reset_device(MGSLPC_INFO *info) 3372{ 3373 /* power up both channels (set BIT7) */ 3374 write_reg(info, CHA + CCR0, 0x80); 3375 write_reg(info, CHB + CCR0, 0x80); 3376 write_reg(info, CHA + MODE, 0); 3377 write_reg(info, CHB + MODE, 0); 3378 3379 /* disable all interrupts */ 3380 irq_disable(info, CHA, 0xffff); 3381 irq_disable(info, CHB, 0xffff); 3382 port_irq_disable(info, 0xff); 3383 3384 /* PCR Port Configuration Register 3385 * 3386 * 07..04 DEC[3..0] Serial I/F select outputs 3387 * 03 output, 1=AUTO CTS control enabled 3388 * 02 RI Ring Indicator input 0=active 3389 * 01 DSR input 0=active 3390 * 00 DTR output 0=active 3391 * 3392 * 0000 0110 3393 */ 3394 write_reg(info, PCR, 0x06); 3395 3396 /* PVR Port Value Register 3397 * 3398 * 07..04 DEC[3..0] Serial I/F select (0000=disabled) 3399 * 03 AUTO CTS output 1=enabled 3400 * 02 RI Ring Indicator input 3401 * 01 DSR input 3402 * 00 DTR output (1=inactive) 3403 * 3404 * 0000 0001 3405 */ 3406// write_reg(info, PVR, PVR_DTR); 3407 3408 /* IPC Interrupt Port Configuration 3409 * 3410 * 07 VIS 1=Masked interrupts visible 3411 * 06..05 Reserved, 0 3412 * 04..03 SLA Slave address, 00 ignored 3413 * 02 CASM Cascading Mode, 1=daisy chain 3414 * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low 3415 * 3416 * 0000 0101 3417 */ 3418 write_reg(info, IPC, 0x05); 3419} 3420 3421static void async_mode(MGSLPC_INFO *info) 3422{ 3423 unsigned char val; 3424 3425 /* disable all interrupts */ 3426 irq_disable(info, CHA, 0xffff); 3427 irq_disable(info, CHB, 0xffff); 3428 port_irq_disable(info, 0xff); 3429 3430 /* MODE 3431 * 3432 * 07 Reserved, 0 3433 * 06 FRTS RTS State, 0=active 3434 * 05 FCTS Flow Control on CTS 3435 * 04 FLON Flow Control Enable 3436 * 03 RAC Receiver Active, 0 = inactive 3437 * 02 RTS 0=Auto RTS, 1=manual RTS 3438 * 01 TRS Timer Resolution, 1=512 3439 * 00 TLP Test Loop, 0 = no loop 3440 * 3441 * 0000 0110 3442 */ 3443 val = 0x06; 3444 if (info->params.loopback) 3445 val |= BIT0; 3446 3447 /* preserve RTS state */ 3448 if (!(info->serial_signals & SerialSignal_RTS)) 3449 val |= BIT6; 3450 write_reg(info, CHA + MODE, val); 3451 3452 /* CCR0 3453 * 3454 * 07 PU Power Up, 1=active, 0=power down 3455 * 06 MCE Master Clock Enable, 1=enabled 3456 * 05 Reserved, 0 3457 * 04..02 SC[2..0] Encoding, 000=NRZ 3458 * 01..00 SM[1..0] Serial Mode, 11=Async 3459 * 3460 * 1000 0011 3461 */ 3462 write_reg(info, CHA + CCR0, 0x83); 3463 3464 /* CCR1 3465 * 3466 * 07..05 Reserved, 0 3467 * 04 ODS Output Driver Select, 1=TxD is push-pull output 3468 * 03 BCR Bit Clock Rate, 1=16x 3469 * 02..00 CM[2..0] Clock Mode, 111=BRG 3470 * 3471 * 0001 1111 3472 */ 3473 write_reg(info, CHA + CCR1, 0x1f); 3474 3475 /* CCR2 (channel A) 3476 * 3477 * 07..06 BGR[9..8] Baud rate bits 9..8 3478 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value 3479 * 04 SSEL Clock source select, 1=submode b 3480 * 03 TOE 0=TxCLK is input, 0=TxCLK is input 3481 * 02 RWX Read/Write Exchange 0=disabled 3482 * 01 Reserved, 0 3483 * 00 DIV, data inversion 0=disabled, 1=enabled 3484 * 3485 * 0001 0000 3486 */ 3487 write_reg(info, CHA + CCR2, 0x10); 3488 3489 /* CCR3 3490 * 3491 * 07..01 Reserved, 0 3492 * 00 PSD DPLL Phase Shift Disable 3493 * 3494 * 0000 0000 3495 */ 3496 write_reg(info, CHA + CCR3, 0); 3497 3498 /* CCR4 3499 * 3500 * 07 MCK4 Master Clock Divide by 4, 1=enabled 3501 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled 3502 * 05 TST1 Test Pin, 0=normal operation 3503 * 04 ICD Ivert Carrier Detect, 1=enabled (active low) 3504 * 03..00 Reserved, must be 0 3505 * 3506 * 0101 0000 3507 */ 3508 write_reg(info, CHA + CCR4, 0x50); 3509 mgslpc_set_rate(info, CHA, info->params.data_rate * 16); 3510 3511 /* DAFO Data Format 3512 * 3513 * 07 Reserved, 0 3514 * 06 XBRK transmit break, 0=normal operation 3515 * 05 Stop bits (0=1, 1=2) 3516 * 04..03 PAR[1..0] Parity (01=odd, 10=even) 3517 * 02 PAREN Parity Enable 3518 * 01..00 CHL[1..0] Character Length (00=8, 01=7) 3519 * 3520 */ 3521 val = 0x00; 3522 if (info->params.data_bits != 8) 3523 val |= BIT0; /* 7 bits */ 3524 if (info->params.stop_bits != 1) 3525 val |= BIT5; 3526 if (info->params.parity != ASYNC_PARITY_NONE) 3527 { 3528 val |= BIT2; /* Parity enable */ 3529 if (info->params.parity == ASYNC_PARITY_ODD) 3530 val |= BIT3; 3531 else 3532 val |= BIT4; 3533 } 3534 write_reg(info, CHA + DAFO, val); 3535 3536 /* RFC Rx FIFO Control 3537 * 3538 * 07 Reserved, 0 3539 * 06 DPS, 1=parity bit not stored in data byte 3540 * 05 DXS, 0=all data stored in FIFO (including XON/XOFF) 3541 * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO 3542 * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte 3543 * 01 Reserved, 0 3544 * 00 TCDE Terminate Char Detect Enable, 0=disabled 3545 * 3546 * 0101 1100 3547 */ 3548 write_reg(info, CHA + RFC, 0x5c); 3549 3550 /* RLCR Receive length check register 3551 * 3552 * Max frame length = (RL + 1) * 32 3553 */ 3554 write_reg(info, CHA + RLCR, 0); 3555 3556 /* XBCH Transmit Byte Count High 3557 * 3558 * 07 DMA mode, 0 = interrupt driven 3559 * 06 NRM, 0=ABM (ignored) 3560 * 05 CAS Carrier Auto Start 3561 * 04 XC Transmit Continuously (ignored) 3562 * 03..00 XBC[10..8] Transmit byte count bits 10..8 3563 * 3564 * 0000 0000 3565 */ 3566 val = 0x00; 3567 if (info->params.flags & HDLC_FLAG_AUTO_DCD) 3568 val |= BIT5; 3569 write_reg(info, CHA + XBCH, val); 3570 if (info->params.flags & HDLC_FLAG_AUTO_CTS) 3571 irq_enable(info, CHA, IRQ_CTS); 3572 3573 /* MODE:03 RAC Receiver Active, 1=active */ 3574 set_reg_bits(info, CHA + MODE, BIT3); 3575 enable_auxclk(info); 3576 if (info->params.flags & HDLC_FLAG_AUTO_CTS) { 3577 irq_enable(info, CHB, IRQ_CTS); 3578 /* PVR[3] 1=AUTO CTS active */ 3579 set_reg_bits(info, CHA + PVR, BIT3); 3580 } else 3581 clear_reg_bits(info, CHA + PVR, BIT3); 3582 irq_enable(info, CHA, 3583 IRQ_RXEOM | IRQ_RXFIFO | IRQ_BREAK_ON | IRQ_RXTIME | 3584 IRQ_ALLSENT | IRQ_TXFIFO); 3585 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET); 3586 wait_command_complete(info, CHA); 3587 read_reg16(info, CHA + ISR); /* clear pending IRQs */ 3588} 3589 3590/* Set the HDLC idle mode for the transmitter. 3591 */ 3592static void tx_set_idle(MGSLPC_INFO *info) 3593{ 3594 /* Note: ESCC2 only supports flags and one idle modes */ 3595 if (info->idle_mode == HDLC_TXIDLE_FLAGS) 3596 set_reg_bits(info, CHA + CCR1, BIT3); 3597 else 3598 clear_reg_bits(info, CHA + CCR1, BIT3); 3599} 3600 3601/* get state of the V24 status (input) signals. 3602 */ 3603static void get_signals(MGSLPC_INFO *info) 3604{ 3605 unsigned char status = 0; 3606 3607 /* preserve RTS and DTR */ 3608 info->serial_signals &= SerialSignal_RTS | SerialSignal_DTR; 3609 3610 if (read_reg(info, CHB + VSTR) & BIT7) 3611 info->serial_signals |= SerialSignal_DCD; 3612 if (read_reg(info, CHB + STAR) & BIT1) 3613 info->serial_signals |= SerialSignal_CTS; 3614 3615 status = read_reg(info, CHA + PVR); 3616 if (!(status & PVR_RI)) 3617 info->serial_signals |= SerialSignal_RI; 3618 if (!(status & PVR_DSR)) 3619 info->serial_signals |= SerialSignal_DSR; 3620} 3621 3622/* Set the state of RTS and DTR based on contents of 3623 * serial_signals member of device extension. 3624 */ 3625static void set_signals(MGSLPC_INFO *info) 3626{ 3627 unsigned char val; 3628 3629 val = read_reg(info, CHA + MODE); 3630 if (info->params.mode == MGSL_MODE_ASYNC) { 3631 if (info->serial_signals & SerialSignal_RTS) 3632 val &= ~BIT6; 3633 else 3634 val |= BIT6; 3635 } else { 3636 if (info->serial_signals & SerialSignal_RTS) 3637 val |= BIT2; 3638 else 3639 val &= ~BIT2; 3640 } 3641 write_reg(info, CHA + MODE, val); 3642 3643 if (info->serial_signals & SerialSignal_DTR) 3644 clear_reg_bits(info, CHA + PVR, PVR_DTR); 3645 else 3646 set_reg_bits(info, CHA + PVR, PVR_DTR); 3647} 3648 3649static void rx_reset_buffers(MGSLPC_INFO *info) 3650{ 3651 RXBUF *buf; 3652 int i; 3653 3654 info->rx_put = 0; 3655 info->rx_get = 0; 3656 info->rx_frame_count = 0; 3657 for (i=0 ; i < info->rx_buf_count ; i++) { 3658 buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size)); 3659 buf->status = buf->count = 0; 3660 } 3661} 3662 3663/* Attempt to return a received HDLC frame 3664 * Only frames received without errors are returned. 3665 * 3666 * Returns true if frame returned, otherwise false 3667 */ 3668static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty) 3669{ 3670 unsigned short status; 3671 RXBUF *buf; 3672 unsigned int framesize = 0; 3673 unsigned long flags; 3674 bool return_frame = false; 3675 3676 if (info->rx_frame_count == 0) 3677 return false; 3678 3679 buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size)); 3680 3681 status = buf->status; 3682 3683 /* 07 VFR 1=valid frame 3684 * 06 RDO 1=data overrun 3685 * 05 CRC 1=OK, 0=error 3686 * 04 RAB 1=frame aborted 3687 */ 3688 if ((status & 0xf0) != 0xA0) { 3689 if (!(status & BIT7) || (status & BIT4)) 3690 info->icount.rxabort++; 3691 else if (status & BIT6) 3692 info->icount.rxover++; 3693 else if (!(status & BIT5)) { 3694 info->icount.rxcrc++; 3695 if (info->params.crc_type & HDLC_CRC_RETURN_EX) 3696 return_frame = true; 3697 } 3698 framesize = 0; 3699#if SYNCLINK_GENERIC_HDLC 3700 { 3701 info->netdev->stats.rx_errors++; 3702 info->netdev->stats.rx_frame_errors++; 3703 } 3704#endif 3705 } else 3706 return_frame = true; 3707 3708 if (return_frame) 3709 framesize = buf->count; 3710 3711 if (debug_level >= DEBUG_LEVEL_BH) 3712 printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n", 3713 __FILE__, __LINE__, info->device_name, status, framesize); 3714 3715 if (debug_level >= DEBUG_LEVEL_DATA) 3716 trace_block(info, buf->data, framesize, 0); 3717 3718 if (framesize) { 3719 if ((info->params.crc_type & HDLC_CRC_RETURN_EX && 3720 framesize+1 > info->max_frame_size) || 3721 framesize > info->max_frame_size) 3722 info->icount.rxlong++; 3723 else { 3724 if (status & BIT5) 3725 info->icount.rxok++; 3726 3727 if (info->params.crc_type & HDLC_CRC_RETURN_EX) { 3728 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR; 3729 ++framesize; 3730 } 3731 3732#if SYNCLINK_GENERIC_HDLC 3733 if (info->netcount) 3734 hdlcdev_rx(info, buf->data, framesize); 3735 else 3736#endif 3737 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize); 3738 } 3739 } 3740 3741 spin_lock_irqsave(&info->lock, flags); 3742 buf->status = buf->count = 0; 3743 info->rx_frame_count--; 3744 info->rx_get++; 3745 if (info->rx_get >= info->rx_buf_count) 3746 info->rx_get = 0; 3747 spin_unlock_irqrestore(&info->lock, flags); 3748 3749 return true; 3750} 3751 3752static bool register_test(MGSLPC_INFO *info) 3753{ 3754 static unsigned char patterns[] = 3755 { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f }; 3756 static unsigned int count = ARRAY_SIZE(patterns); 3757 unsigned int i; 3758 bool rc = true; 3759 unsigned long flags; 3760 3761 spin_lock_irqsave(&info->lock, flags); 3762 reset_device(info); 3763 3764 for (i = 0; i < count; i++) { 3765 write_reg(info, XAD1, patterns[i]); 3766 write_reg(info, XAD2, patterns[(i + 1) % count]); 3767 if ((read_reg(info, XAD1) != patterns[i]) || 3768 (read_reg(info, XAD2) != patterns[(i + 1) % count])) { 3769 rc = false; 3770 break; 3771 } 3772 } 3773 3774 spin_unlock_irqrestore(&info->lock, flags); 3775 return rc; 3776} 3777 3778static bool irq_test(MGSLPC_INFO *info) 3779{ 3780 unsigned long end_time; 3781 unsigned long flags; 3782 3783 spin_lock_irqsave(&info->lock, flags); 3784 reset_device(info); 3785 3786 info->testing_irq = true; 3787 hdlc_mode(info); 3788 3789 info->irq_occurred = false; 3790 3791 /* init hdlc mode */ 3792 3793 irq_enable(info, CHA, IRQ_TIMER); 3794 write_reg(info, CHA + TIMR, 0); /* 512 cycles */ 3795 issue_command(info, CHA, CMD_START_TIMER); 3796 3797 spin_unlock_irqrestore(&info->lock, flags); 3798 3799 end_time=100; 3800 while(end_time-- && !info->irq_occurred) { 3801 msleep_interruptible(10); 3802 } 3803 3804 info->testing_irq = false; 3805 3806 spin_lock_irqsave(&info->lock, flags); 3807 reset_device(info); 3808 spin_unlock_irqrestore(&info->lock, flags); 3809 3810 return info->irq_occurred; 3811} 3812 3813static int adapter_test(MGSLPC_INFO *info) 3814{ 3815 if (!register_test(info)) { 3816 info->init_error = DiagStatus_AddressFailure; 3817 printk("%s(%d):Register test failure for device %s Addr=%04X\n", 3818 __FILE__, __LINE__, info->device_name, (unsigned short)(info->io_base)); 3819 return -ENODEV; 3820 } 3821 3822 if (!irq_test(info)) { 3823 info->init_error = DiagStatus_IrqFailure; 3824 printk("%s(%d):Interrupt test failure for device %s IRQ=%d\n", 3825 __FILE__, __LINE__, info->device_name, (unsigned short)(info->irq_level)); 3826 return -ENODEV; 3827 } 3828 3829 if (debug_level >= DEBUG_LEVEL_INFO) 3830 printk("%s(%d):device %s passed diagnostics\n", 3831 __FILE__, __LINE__, info->device_name); 3832 return 0; 3833} 3834 3835static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit) 3836{ 3837 int i; 3838 int linecount; 3839 if (xmit) 3840 printk("%s tx data:\n", info->device_name); 3841 else 3842 printk("%s rx data:\n", info->device_name); 3843 3844 while(count) { 3845 if (count > 16) 3846 linecount = 16; 3847 else 3848 linecount = count; 3849 3850 for(i=0;i<linecount;i++) 3851 printk("%02X ", (unsigned char)data[i]); 3852 for(;i<17;i++) 3853 printk(" "); 3854 for(i=0;i<linecount;i++) { 3855 if (data[i]>=040 && data[i]<=0176) 3856 printk("%c", data[i]); 3857 else 3858 printk("."); 3859 } 3860 printk("\n"); 3861 3862 data += linecount; 3863 count -= linecount; 3864 } 3865} 3866 3867/* HDLC frame time out 3868 * update stats and do tx completion processing 3869 */ 3870static void tx_timeout(unsigned long context) 3871{ 3872 MGSLPC_INFO *info = (MGSLPC_INFO*)context; 3873 unsigned long flags; 3874 3875 if (debug_level >= DEBUG_LEVEL_INFO) 3876 printk("%s(%d):tx_timeout(%s)\n", 3877 __FILE__, __LINE__, info->device_name); 3878 if (info->tx_active && 3879 info->params.mode == MGSL_MODE_HDLC) { 3880 info->icount.txtimeout++; 3881 } 3882 spin_lock_irqsave(&info->lock, flags); 3883 info->tx_active = false; 3884 info->tx_count = info->tx_put = info->tx_get = 0; 3885 3886 spin_unlock_irqrestore(&info->lock, flags); 3887 3888#if SYNCLINK_GENERIC_HDLC 3889 if (info->netcount) 3890 hdlcdev_tx_done(info); 3891 else 3892#endif 3893 { 3894 struct tty_struct *tty = tty_port_tty_get(&info->port); 3895 bh_transmit(info, tty); 3896 tty_kref_put(tty); 3897 } 3898} 3899 3900#if SYNCLINK_GENERIC_HDLC 3901 3902/** 3903 * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.) 3904 * set encoding and frame check sequence (FCS) options 3905 * 3906 * dev pointer to network device structure 3907 * encoding serial encoding setting 3908 * parity FCS setting 3909 * 3910 * returns 0 if success, otherwise error code 3911 */ 3912static int hdlcdev_attach(struct net_device *dev, unsigned short encoding, 3913 unsigned short parity) 3914{ 3915 MGSLPC_INFO *info = dev_to_port(dev); 3916 struct tty_struct *tty; 3917 unsigned char new_encoding; 3918 unsigned short new_crctype; 3919 3920 /* return error if TTY interface open */ 3921 if (info->port.count) 3922 return -EBUSY; 3923 3924 switch (encoding) 3925 { 3926 case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break; 3927 case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break; 3928 case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break; 3929 case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break; 3930 case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break; 3931 default: return -EINVAL; 3932 } 3933 3934 switch (parity) 3935 { 3936 case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break; 3937 case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break; 3938 case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break; 3939 default: return -EINVAL; 3940 } 3941 3942 info->params.encoding = new_encoding; 3943 info->params.crc_type = new_crctype; 3944 3945 /* if network interface up, reprogram hardware */ 3946 if (info->netcount) { 3947 tty = tty_port_tty_get(&info->port); 3948 mgslpc_program_hw(info, tty); 3949 tty_kref_put(tty); 3950 } 3951 3952 return 0; 3953} 3954 3955/** 3956 * called by generic HDLC layer to send frame 3957 * 3958 * skb socket buffer containing HDLC frame 3959 * dev pointer to network device structure 3960 */ 3961static netdev_tx_t hdlcdev_xmit(struct sk_buff *skb, 3962 struct net_device *dev) 3963{ 3964 MGSLPC_INFO *info = dev_to_port(dev); 3965 unsigned long flags; 3966 3967 if (debug_level >= DEBUG_LEVEL_INFO) 3968 printk(KERN_INFO "%s:hdlc_xmit(%s)\n", __FILE__, dev->name); 3969 3970 /* stop sending until this frame completes */ 3971 netif_stop_queue(dev); 3972 3973 /* copy data to device buffers */ 3974 skb_copy_from_linear_data(skb, info->tx_buf, skb->len); 3975 info->tx_get = 0; 3976 info->tx_put = info->tx_count = skb->len; 3977 3978 /* update network statistics */ 3979 dev->stats.tx_packets++; 3980 dev->stats.tx_bytes += skb->len; 3981 3982 /* done with socket buffer, so free it */ 3983 dev_kfree_skb(skb); 3984 3985 /* save start time for transmit timeout detection */ 3986 dev->trans_start = jiffies; 3987 3988 /* start hardware transmitter if necessary */ 3989 spin_lock_irqsave(&info->lock, flags); 3990 if (!info->tx_active) { 3991 struct tty_struct *tty = tty_port_tty_get(&info->port); 3992 tx_start(info, tty); 3993 tty_kref_put(tty); 3994 } 3995 spin_unlock_irqrestore(&info->lock, flags); 3996 3997 return NETDEV_TX_OK; 3998} 3999 4000/** 4001 * called by network layer when interface enabled 4002 * claim resources and initialize hardware 4003 * 4004 * dev pointer to network device structure 4005 * 4006 * returns 0 if success, otherwise error code 4007 */ 4008static int hdlcdev_open(struct net_device *dev) 4009{ 4010 MGSLPC_INFO *info = dev_to_port(dev); 4011 struct tty_struct *tty; 4012 int rc; 4013 unsigned long flags; 4014 4015 if (debug_level >= DEBUG_LEVEL_INFO) 4016 printk("%s:hdlcdev_open(%s)\n", __FILE__, dev->name); 4017 4018 /* generic HDLC layer open processing */ 4019 rc = hdlc_open(dev); 4020 if (rc != 0) 4021 return rc; 4022 4023 /* arbitrate between network and tty opens */ 4024 spin_lock_irqsave(&info->netlock, flags); 4025 if (info->port.count != 0 || info->netcount != 0) { 4026 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name); 4027 spin_unlock_irqrestore(&info->netlock, flags); 4028 return -EBUSY; 4029 } 4030 info->netcount=1; 4031 spin_unlock_irqrestore(&info->netlock, flags); 4032 4033 tty = tty_port_tty_get(&info->port); 4034 /* claim resources and init adapter */ 4035 rc = startup(info, tty); 4036 if (rc != 0) { 4037 tty_kref_put(tty); 4038 spin_lock_irqsave(&info->netlock, flags); 4039 info->netcount=0; 4040 spin_unlock_irqrestore(&info->netlock, flags); 4041 return rc; 4042 } 4043 /* assert RTS and DTR, apply hardware settings */ 4044 info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR; 4045 mgslpc_program_hw(info, tty); 4046 tty_kref_put(tty); 4047 4048 /* enable network layer transmit */ 4049 dev->trans_start = jiffies; 4050 netif_start_queue(dev); 4051 4052 /* inform generic HDLC layer of current DCD status */ 4053 spin_lock_irqsave(&info->lock, flags); 4054 get_signals(info); 4055 spin_unlock_irqrestore(&info->lock, flags); 4056 if (info->serial_signals & SerialSignal_DCD) 4057 netif_carrier_on(dev); 4058 else 4059 netif_carrier_off(dev); 4060 return 0; 4061} 4062 4063/** 4064 * called by network layer when interface is disabled 4065 * shutdown hardware and release resources 4066 * 4067 * dev pointer to network device structure 4068 * 4069 * returns 0 if success, otherwise error code 4070 */ 4071static int hdlcdev_close(struct net_device *dev) 4072{ 4073 MGSLPC_INFO *info = dev_to_port(dev); 4074 struct tty_struct *tty = tty_port_tty_get(&info->port); 4075 unsigned long flags; 4076 4077 if (debug_level >= DEBUG_LEVEL_INFO) 4078 printk("%s:hdlcdev_close(%s)\n", __FILE__, dev->name); 4079 4080 netif_stop_queue(dev); 4081 4082 /* shutdown adapter and release resources */ 4083 shutdown(info, tty); 4084 tty_kref_put(tty); 4085 hdlc_close(dev); 4086 4087 spin_lock_irqsave(&info->netlock, flags); 4088 info->netcount=0; 4089 spin_unlock_irqrestore(&info->netlock, flags); 4090 4091 return 0; 4092} 4093 4094/** 4095 * called by network layer to process IOCTL call to network device 4096 * 4097 * dev pointer to network device structure 4098 * ifr pointer to network interface request structure 4099 * cmd IOCTL command code 4100 * 4101 * returns 0 if success, otherwise error code 4102 */ 4103static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 4104{ 4105 const size_t size = sizeof(sync_serial_settings); 4106 sync_serial_settings new_line; 4107 sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync; 4108 MGSLPC_INFO *info = dev_to_port(dev); 4109 unsigned int flags; 4110 4111 if (debug_level >= DEBUG_LEVEL_INFO) 4112 printk("%s:hdlcdev_ioctl(%s)\n", __FILE__, dev->name); 4113 4114 /* return error if TTY interface open */ 4115 if (info->port.count) 4116 return -EBUSY; 4117 4118 if (cmd != SIOCWANDEV) 4119 return hdlc_ioctl(dev, ifr, cmd); 4120 4121 memset(&new_line, 0, size); 4122 4123 switch(ifr->ifr_settings.type) { 4124 case IF_GET_IFACE: /* return current sync_serial_settings */ 4125 4126 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL; 4127 if (ifr->ifr_settings.size < size) { 4128 ifr->ifr_settings.size = size; /* data size wanted */ 4129 return -ENOBUFS; 4130 } 4131 4132 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL | 4133 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN | 4134 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL | 4135 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); 4136 4137 switch (flags){ 4138 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break; 4139 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break; 4140 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break; 4141 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break; 4142 default: new_line.clock_type = CLOCK_DEFAULT; 4143 } 4144 4145 new_line.clock_rate = info->params.clock_speed; 4146 new_line.loopback = info->params.loopback ? 1:0; 4147 4148 if (copy_to_user(line, &new_line, size)) 4149 return -EFAULT; 4150 return 0; 4151 4152 case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */ 4153 4154 if(!capable(CAP_NET_ADMIN)) 4155 return -EPERM; 4156 if (copy_from_user(&new_line, line, size)) 4157 return -EFAULT; 4158 4159 switch (new_line.clock_type) 4160 { 4161 case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break; 4162 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break; 4163 case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break; 4164 case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break; 4165 case CLOCK_DEFAULT: flags = info->params.flags & 4166 (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL | 4167 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN | 4168 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL | 4169 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break; 4170 default: return -EINVAL; 4171 } 4172 4173 if (new_line.loopback != 0 && new_line.loopback != 1) 4174 return -EINVAL; 4175 4176 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL | 4177 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN | 4178 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL | 4179 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); 4180 info->params.flags |= flags; 4181 4182 info->params.loopback = new_line.loopback; 4183 4184 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG)) 4185 info->params.clock_speed = new_line.clock_rate; 4186 else 4187 info->params.clock_speed = 0; 4188 4189 /* if network interface up, reprogram hardware */ 4190 if (info->netcount) { 4191 struct tty_struct *tty = tty_port_tty_get(&info->port); 4192 mgslpc_program_hw(info, tty); 4193 tty_kref_put(tty); 4194 } 4195 return 0; 4196 4197 default: 4198 return hdlc_ioctl(dev, ifr, cmd); 4199 } 4200} 4201 4202/** 4203 * called by network layer when transmit timeout is detected 4204 * 4205 * dev pointer to network device structure 4206 */ 4207static void hdlcdev_tx_timeout(struct net_device *dev) 4208{ 4209 MGSLPC_INFO *info = dev_to_port(dev); 4210 unsigned long flags; 4211 4212 if (debug_level >= DEBUG_LEVEL_INFO) 4213 printk("hdlcdev_tx_timeout(%s)\n", dev->name); 4214 4215 dev->stats.tx_errors++; 4216 dev->stats.tx_aborted_errors++; 4217 4218 spin_lock_irqsave(&info->lock, flags); 4219 tx_stop(info); 4220 spin_unlock_irqrestore(&info->lock, flags); 4221 4222 netif_wake_queue(dev); 4223} 4224 4225/** 4226 * called by device driver when transmit completes 4227 * reenable network layer transmit if stopped 4228 * 4229 * info pointer to device instance information 4230 */ 4231static void hdlcdev_tx_done(MGSLPC_INFO *info) 4232{ 4233 if (netif_queue_stopped(info->netdev)) 4234 netif_wake_queue(info->netdev); 4235} 4236 4237/** 4238 * called by device driver when frame received 4239 * pass frame to network layer 4240 * 4241 * info pointer to device instance information 4242 * buf pointer to buffer contianing frame data 4243 * size count of data bytes in buf 4244 */ 4245static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size) 4246{ 4247 struct sk_buff *skb = dev_alloc_skb(size); 4248 struct net_device *dev = info->netdev; 4249 4250 if (debug_level >= DEBUG_LEVEL_INFO) 4251 printk("hdlcdev_rx(%s)\n", dev->name); 4252 4253 if (skb == NULL) { 4254 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name); 4255 dev->stats.rx_dropped++; 4256 return; 4257 } 4258 4259 memcpy(skb_put(skb, size), buf, size); 4260 4261 skb->protocol = hdlc_type_trans(skb, dev); 4262 4263 dev->stats.rx_packets++; 4264 dev->stats.rx_bytes += size; 4265 4266 netif_rx(skb); 4267} 4268 4269static const struct net_device_ops hdlcdev_ops = { 4270 .ndo_open = hdlcdev_open, 4271 .ndo_stop = hdlcdev_close, 4272 .ndo_change_mtu = hdlc_change_mtu, 4273 .ndo_start_xmit = hdlc_start_xmit, 4274 .ndo_do_ioctl = hdlcdev_ioctl, 4275 .ndo_tx_timeout = hdlcdev_tx_timeout, 4276}; 4277 4278/** 4279 * called by device driver when adding device instance 4280 * do generic HDLC initialization 4281 * 4282 * info pointer to device instance information 4283 * 4284 * returns 0 if success, otherwise error code 4285 */ 4286static int hdlcdev_init(MGSLPC_INFO *info) 4287{ 4288 int rc; 4289 struct net_device *dev; 4290 hdlc_device *hdlc; 4291 4292 /* allocate and initialize network and HDLC layer objects */ 4293 4294 dev = alloc_hdlcdev(info); 4295 if (dev == NULL) { 4296 printk(KERN_ERR "%s:hdlc device allocation failure\n", __FILE__); 4297 return -ENOMEM; 4298 } 4299 4300 /* for network layer reporting purposes only */ 4301 dev->base_addr = info->io_base; 4302 dev->irq = info->irq_level; 4303 4304 /* network layer callbacks and settings */ 4305 dev->netdev_ops = &hdlcdev_ops; 4306 dev->watchdog_timeo = 10 * HZ; 4307 dev->tx_queue_len = 50; 4308 4309 /* generic HDLC layer callbacks and settings */ 4310 hdlc = dev_to_hdlc(dev); 4311 hdlc->attach = hdlcdev_attach; 4312 hdlc->xmit = hdlcdev_xmit; 4313 4314 /* register objects with HDLC layer */ 4315 rc = register_hdlc_device(dev); 4316 if (rc) { 4317 printk(KERN_WARNING "%s:unable to register hdlc device\n", __FILE__); 4318 free_netdev(dev); 4319 return rc; 4320 } 4321 4322 info->netdev = dev; 4323 return 0; 4324} 4325 4326/** 4327 * called by device driver when removing device instance 4328 * do generic HDLC cleanup 4329 * 4330 * info pointer to device instance information 4331 */ 4332static void hdlcdev_exit(MGSLPC_INFO *info) 4333{ 4334 unregister_hdlc_device(info->netdev); 4335 free_netdev(info->netdev); 4336 info->netdev = NULL; 4337} 4338 4339#endif /* CONFIG_HDLC */ 4340 4341