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cpuidle-kirkwood.c revision e978aa7d7d57d04eb5f88a7507c4fb98577def77 
1/*
2 * arch/arm/mach-kirkwood/cpuidle.c
3 *
4 * CPU idle Marvell Kirkwood SoCs
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2.  This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 *
10 * The cpu idle uses wait-for-interrupt and DDR self refresh in order
11 * to implement two idle states -
12 * #1 wait-for-interrupt
13 * #2 wait-for-interrupt and DDR self refresh
14 */
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/platform_device.h>
19#include <linux/cpuidle.h>
20#include <linux/io.h>
21#include <asm/proc-fns.h>
22#include <mach/kirkwood.h>
23
24#define KIRKWOOD_MAX_STATES	2
25
26static struct cpuidle_driver kirkwood_idle_driver = {
27	.name =         "kirkwood_idle",
28	.owner =        THIS_MODULE,
29};
30
31static DEFINE_PER_CPU(struct cpuidle_device, kirkwood_cpuidle_device);
32
33/* Actual code that puts the SoC in different idle states */
34static int kirkwood_enter_idle(struct cpuidle_device *dev,
35			       int index)
36{
37	struct timeval before, after;
38	int idle_time;
39
40	local_irq_disable();
41	do_gettimeofday(&before);
42	if (index == 0)
43		/* Wait for interrupt state */
44		cpu_do_idle();
45	else if (index == 1) {
46		/*
47		 * Following write will put DDR in self refresh.
48		 * Note that we have 256 cycles before DDR puts it
49		 * self in self-refresh, so the wait-for-interrupt
50		 * call afterwards won't get the DDR from self refresh
51		 * mode.
52		 */
53		writel(0x7, DDR_OPERATION_BASE);
54		cpu_do_idle();
55	}
56	do_gettimeofday(&after);
57	local_irq_enable();
58	idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
59			(after.tv_usec - before.tv_usec);
60
61	/* Update last residency */
62	dev->last_residency = idle_time;
63
64	return index;
65}
66
67/* Initialize CPU idle by registering the idle states */
68static int kirkwood_init_cpuidle(void)
69{
70	struct cpuidle_device *device;
71
72	cpuidle_register_driver(&kirkwood_idle_driver);
73
74	device = &per_cpu(kirkwood_cpuidle_device, smp_processor_id());
75	device->state_count = KIRKWOOD_MAX_STATES;
76
77	/* Wait for interrupt state */
78	device->states[0].enter = kirkwood_enter_idle;
79	device->states[0].exit_latency = 1;
80	device->states[0].target_residency = 10000;
81	device->states[0].flags = CPUIDLE_FLAG_TIME_VALID;
82	strcpy(device->states[0].name, "WFI");
83	strcpy(device->states[0].desc, "Wait for interrupt");
84
85	/* Wait for interrupt and DDR self refresh state */
86	device->states[1].enter = kirkwood_enter_idle;
87	device->states[1].exit_latency = 10;
88	device->states[1].target_residency = 10000;
89	device->states[1].flags = CPUIDLE_FLAG_TIME_VALID;
90	strcpy(device->states[1].name, "DDR SR");
91	strcpy(device->states[1].desc, "WFI and DDR Self Refresh");
92
93	if (cpuidle_register_device(device)) {
94		printk(KERN_ERR "kirkwood_init_cpuidle: Failed registering\n");
95		return -EIO;
96	}
97	return 0;
98}
99
100device_initcall(kirkwood_init_cpuidle);
101