[go: nahoru, domu]
1/*
2 * AHCI glue platform driver for Marvell EBU SOCs
3 *
4 * Copyright (C) 2014 Marvell
5 *
6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
7 * Marcin Wojtas <mw@semihalf.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2.  This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <linux/ahci_platform.h>
15#include <linux/kernel.h>
16#include <linux/mbus.h>
17#include <linux/module.h>
18#include <linux/of_device.h>
19#include <linux/platform_device.h>
20#include "ahci.h"
21
22#define AHCI_VENDOR_SPECIFIC_0_ADDR  0xa0
23#define AHCI_VENDOR_SPECIFIC_0_DATA  0xa4
24
25#define AHCI_WINDOW_CTRL(win)	(0x60 + ((win) << 4))
26#define AHCI_WINDOW_BASE(win)	(0x64 + ((win) << 4))
27#define AHCI_WINDOW_SIZE(win)	(0x68 + ((win) << 4))
28
29static void ahci_mvebu_mbus_config(struct ahci_host_priv *hpriv,
30				   const struct mbus_dram_target_info *dram)
31{
32	int i;
33
34	for (i = 0; i < 4; i++) {
35		writel(0, hpriv->mmio + AHCI_WINDOW_CTRL(i));
36		writel(0, hpriv->mmio + AHCI_WINDOW_BASE(i));
37		writel(0, hpriv->mmio + AHCI_WINDOW_SIZE(i));
38	}
39
40	for (i = 0; i < dram->num_cs; i++) {
41		const struct mbus_dram_window *cs = dram->cs + i;
42
43		writel((cs->mbus_attr << 8) |
44		       (dram->mbus_dram_target_id << 4) | 1,
45		       hpriv->mmio + AHCI_WINDOW_CTRL(i));
46		writel(cs->base, hpriv->mmio + AHCI_WINDOW_BASE(i));
47		writel(((cs->size - 1) & 0xffff0000),
48		       hpriv->mmio + AHCI_WINDOW_SIZE(i));
49	}
50}
51
52static void ahci_mvebu_regret_option(struct ahci_host_priv *hpriv)
53{
54	/*
55	 * Enable the regret bit to allow the SATA unit to regret a
56	 * request that didn't receive an acknowlegde and avoid a
57	 * deadlock
58	 */
59	writel(0x4, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_ADDR);
60	writel(0x80, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_DATA);
61}
62
63static const struct ata_port_info ahci_mvebu_port_info = {
64	.flags	   = AHCI_FLAG_COMMON,
65	.pio_mask  = ATA_PIO4,
66	.udma_mask = ATA_UDMA6,
67	.port_ops  = &ahci_platform_ops,
68};
69
70static int ahci_mvebu_probe(struct platform_device *pdev)
71{
72	struct ahci_host_priv *hpriv;
73	const struct mbus_dram_target_info *dram;
74	int rc;
75
76	hpriv = ahci_platform_get_resources(pdev);
77	if (IS_ERR(hpriv))
78		return PTR_ERR(hpriv);
79
80	rc = ahci_platform_enable_resources(hpriv);
81	if (rc)
82		return rc;
83
84	dram = mv_mbus_dram_info();
85	if (!dram)
86		return -ENODEV;
87
88	ahci_mvebu_mbus_config(hpriv, dram);
89	ahci_mvebu_regret_option(hpriv);
90
91	rc = ahci_platform_init_host(pdev, hpriv, &ahci_mvebu_port_info);
92	if (rc)
93		goto disable_resources;
94
95	return 0;
96
97disable_resources:
98	ahci_platform_disable_resources(hpriv);
99	return rc;
100}
101
102static const struct of_device_id ahci_mvebu_of_match[] = {
103	{ .compatible = "marvell,armada-380-ahci", },
104	{ },
105};
106MODULE_DEVICE_TABLE(of, ahci_mvebu_of_match);
107
108/*
109 * We currently don't provide power management related operations,
110 * since there is no suspend/resume support at the platform level for
111 * Armada 38x for the moment.
112 */
113static struct platform_driver ahci_mvebu_driver = {
114	.probe = ahci_mvebu_probe,
115	.remove = ata_platform_remove_one,
116	.driver = {
117		.name = "ahci-mvebu",
118		.owner = THIS_MODULE,
119		.of_match_table = ahci_mvebu_of_match,
120	},
121};
122module_platform_driver(ahci_mvebu_driver);
123
124MODULE_DESCRIPTION("Marvell EBU AHCI SATA driver");
125MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>, Marcin Wojtas <mw@semihalf.com>");
126MODULE_LICENSE("GPL");
127MODULE_ALIAS("platform:ahci_mvebu");
128