1/* 2 * Copyright 2012 Red Hat Inc. 3 * Parts based on xf86-video-ast 4 * Copyright (c) 2005 ASPEED Technology Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 18 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 19 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 20 * USE OR OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * The above copyright notice and this permission notice (including the 23 * next paragraph) shall be included in all copies or substantial portions 24 * of the Software. 25 * 26 */ 27/* 28 * Authors: Dave Airlie <airlied@redhat.com> 29 */ 30#include <linux/export.h> 31#include <drm/drmP.h> 32#include <drm/drm_crtc.h> 33#include <drm/drm_crtc_helper.h> 34#include "ast_drv.h" 35 36#include "ast_tables.h" 37 38static struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev); 39static void ast_i2c_destroy(struct ast_i2c_chan *i2c); 40static int ast_cursor_set(struct drm_crtc *crtc, 41 struct drm_file *file_priv, 42 uint32_t handle, 43 uint32_t width, 44 uint32_t height); 45static int ast_cursor_move(struct drm_crtc *crtc, 46 int x, int y); 47 48static inline void ast_load_palette_index(struct ast_private *ast, 49 u8 index, u8 red, u8 green, 50 u8 blue) 51{ 52 ast_io_write8(ast, AST_IO_DAC_INDEX_WRITE, index); 53 ast_io_read8(ast, AST_IO_SEQ_PORT); 54 ast_io_write8(ast, AST_IO_DAC_DATA, red); 55 ast_io_read8(ast, AST_IO_SEQ_PORT); 56 ast_io_write8(ast, AST_IO_DAC_DATA, green); 57 ast_io_read8(ast, AST_IO_SEQ_PORT); 58 ast_io_write8(ast, AST_IO_DAC_DATA, blue); 59 ast_io_read8(ast, AST_IO_SEQ_PORT); 60} 61 62static void ast_crtc_load_lut(struct drm_crtc *crtc) 63{ 64 struct ast_private *ast = crtc->dev->dev_private; 65 struct ast_crtc *ast_crtc = to_ast_crtc(crtc); 66 int i; 67 68 if (!crtc->enabled) 69 return; 70 71 for (i = 0; i < 256; i++) 72 ast_load_palette_index(ast, i, ast_crtc->lut_r[i], 73 ast_crtc->lut_g[i], ast_crtc->lut_b[i]); 74} 75 76static bool ast_get_vbios_mode_info(struct drm_crtc *crtc, struct drm_display_mode *mode, 77 struct drm_display_mode *adjusted_mode, 78 struct ast_vbios_mode_info *vbios_mode) 79{ 80 struct ast_private *ast = crtc->dev->dev_private; 81 u32 refresh_rate_index = 0, mode_id, color_index, refresh_rate; 82 u32 hborder, vborder; 83 bool check_sync; 84 struct ast_vbios_enhtable *best = NULL; 85 86 switch (crtc->primary->fb->bits_per_pixel) { 87 case 8: 88 vbios_mode->std_table = &vbios_stdtable[VGAModeIndex]; 89 color_index = VGAModeIndex - 1; 90 break; 91 case 16: 92 vbios_mode->std_table = &vbios_stdtable[HiCModeIndex]; 93 color_index = HiCModeIndex; 94 break; 95 case 24: 96 case 32: 97 vbios_mode->std_table = &vbios_stdtable[TrueCModeIndex]; 98 color_index = TrueCModeIndex; 99 break; 100 default: 101 return false; 102 } 103 104 switch (crtc->mode.crtc_hdisplay) { 105 case 640: 106 vbios_mode->enh_table = &res_640x480[refresh_rate_index]; 107 break; 108 case 800: 109 vbios_mode->enh_table = &res_800x600[refresh_rate_index]; 110 break; 111 case 1024: 112 vbios_mode->enh_table = &res_1024x768[refresh_rate_index]; 113 break; 114 case 1280: 115 if (crtc->mode.crtc_vdisplay == 800) 116 vbios_mode->enh_table = &res_1280x800[refresh_rate_index]; 117 else 118 vbios_mode->enh_table = &res_1280x1024[refresh_rate_index]; 119 break; 120 case 1360: 121 vbios_mode->enh_table = &res_1360x768[refresh_rate_index]; 122 break; 123 case 1440: 124 vbios_mode->enh_table = &res_1440x900[refresh_rate_index]; 125 break; 126 case 1600: 127 if (crtc->mode.crtc_vdisplay == 900) 128 vbios_mode->enh_table = &res_1600x900[refresh_rate_index]; 129 else 130 vbios_mode->enh_table = &res_1600x1200[refresh_rate_index]; 131 break; 132 case 1680: 133 vbios_mode->enh_table = &res_1680x1050[refresh_rate_index]; 134 break; 135 case 1920: 136 if (crtc->mode.crtc_vdisplay == 1080) 137 vbios_mode->enh_table = &res_1920x1080[refresh_rate_index]; 138 else 139 vbios_mode->enh_table = &res_1920x1200[refresh_rate_index]; 140 break; 141 default: 142 return false; 143 } 144 145 refresh_rate = drm_mode_vrefresh(mode); 146 check_sync = vbios_mode->enh_table->flags & WideScreenMode; 147 do { 148 struct ast_vbios_enhtable *loop = vbios_mode->enh_table; 149 150 while (loop->refresh_rate != 0xff) { 151 if ((check_sync) && 152 (((mode->flags & DRM_MODE_FLAG_NVSYNC) && 153 (loop->flags & PVSync)) || 154 ((mode->flags & DRM_MODE_FLAG_PVSYNC) && 155 (loop->flags & NVSync)) || 156 ((mode->flags & DRM_MODE_FLAG_NHSYNC) && 157 (loop->flags & PHSync)) || 158 ((mode->flags & DRM_MODE_FLAG_PHSYNC) && 159 (loop->flags & NHSync)))) { 160 loop++; 161 continue; 162 } 163 if (loop->refresh_rate <= refresh_rate 164 && (!best || loop->refresh_rate > best->refresh_rate)) 165 best = loop; 166 loop++; 167 } 168 if (best || !check_sync) 169 break; 170 check_sync = 0; 171 } while (1); 172 if (best) 173 vbios_mode->enh_table = best; 174 175 hborder = (vbios_mode->enh_table->flags & HBorder) ? 8 : 0; 176 vborder = (vbios_mode->enh_table->flags & VBorder) ? 8 : 0; 177 178 adjusted_mode->crtc_htotal = vbios_mode->enh_table->ht; 179 adjusted_mode->crtc_hblank_start = vbios_mode->enh_table->hde + hborder; 180 adjusted_mode->crtc_hblank_end = vbios_mode->enh_table->ht - hborder; 181 adjusted_mode->crtc_hsync_start = vbios_mode->enh_table->hde + hborder + 182 vbios_mode->enh_table->hfp; 183 adjusted_mode->crtc_hsync_end = (vbios_mode->enh_table->hde + hborder + 184 vbios_mode->enh_table->hfp + 185 vbios_mode->enh_table->hsync); 186 187 adjusted_mode->crtc_vtotal = vbios_mode->enh_table->vt; 188 adjusted_mode->crtc_vblank_start = vbios_mode->enh_table->vde + vborder; 189 adjusted_mode->crtc_vblank_end = vbios_mode->enh_table->vt - vborder; 190 adjusted_mode->crtc_vsync_start = vbios_mode->enh_table->vde + vborder + 191 vbios_mode->enh_table->vfp; 192 adjusted_mode->crtc_vsync_end = (vbios_mode->enh_table->vde + vborder + 193 vbios_mode->enh_table->vfp + 194 vbios_mode->enh_table->vsync); 195 196 refresh_rate_index = vbios_mode->enh_table->refresh_rate_index; 197 mode_id = vbios_mode->enh_table->mode_id; 198 199 if (ast->chip == AST1180) { 200 /* TODO 1180 */ 201 } else { 202 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8c, (u8)((color_index & 0xf) << 4)); 203 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8d, refresh_rate_index & 0xff); 204 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8e, mode_id & 0xff); 205 206 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0x00); 207 if (vbios_mode->enh_table->flags & NewModeInfo) { 208 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0xa8); 209 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x92, crtc->primary->fb->bits_per_pixel); 210 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x93, adjusted_mode->clock / 1000); 211 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x94, adjusted_mode->crtc_hdisplay); 212 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x95, adjusted_mode->crtc_hdisplay >> 8); 213 214 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x96, adjusted_mode->crtc_vdisplay); 215 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x97, adjusted_mode->crtc_vdisplay >> 8); 216 } 217 } 218 219 return true; 220 221 222} 223static void ast_set_std_reg(struct drm_crtc *crtc, struct drm_display_mode *mode, 224 struct ast_vbios_mode_info *vbios_mode) 225{ 226 struct ast_private *ast = crtc->dev->dev_private; 227 struct ast_vbios_stdtable *stdtable; 228 u32 i; 229 u8 jreg; 230 231 stdtable = vbios_mode->std_table; 232 233 jreg = stdtable->misc; 234 ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg); 235 236 /* Set SEQ */ 237 ast_set_index_reg(ast, AST_IO_SEQ_PORT, 0x00, 0x03); 238 for (i = 0; i < 4; i++) { 239 jreg = stdtable->seq[i]; 240 if (!i) 241 jreg |= 0x20; 242 ast_set_index_reg(ast, AST_IO_SEQ_PORT, (i + 1) , jreg); 243 } 244 245 /* Set CRTC */ 246 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00); 247 for (i = 0; i < 25; i++) 248 ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]); 249 250 /* set AR */ 251 jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ); 252 for (i = 0; i < 20; i++) { 253 jreg = stdtable->ar[i]; 254 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, (u8)i); 255 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, jreg); 256 } 257 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x14); 258 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x00); 259 260 jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ); 261 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x20); 262 263 /* Set GR */ 264 for (i = 0; i < 9; i++) 265 ast_set_index_reg(ast, AST_IO_GR_PORT, i, stdtable->gr[i]); 266} 267 268static void ast_set_crtc_reg(struct drm_crtc *crtc, struct drm_display_mode *mode, 269 struct ast_vbios_mode_info *vbios_mode) 270{ 271 struct ast_private *ast = crtc->dev->dev_private; 272 u8 jreg05 = 0, jreg07 = 0, jreg09 = 0, jregAC = 0, jregAD = 0, jregAE = 0; 273 u16 temp; 274 275 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00); 276 277 temp = (mode->crtc_htotal >> 3) - 5; 278 if (temp & 0x100) 279 jregAC |= 0x01; /* HT D[8] */ 280 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x00, 0x00, temp); 281 282 temp = (mode->crtc_hdisplay >> 3) - 1; 283 if (temp & 0x100) 284 jregAC |= 0x04; /* HDE D[8] */ 285 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x01, 0x00, temp); 286 287 temp = (mode->crtc_hblank_start >> 3) - 1; 288 if (temp & 0x100) 289 jregAC |= 0x10; /* HBS D[8] */ 290 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x02, 0x00, temp); 291 292 temp = ((mode->crtc_hblank_end >> 3) - 1) & 0x7f; 293 if (temp & 0x20) 294 jreg05 |= 0x80; /* HBE D[5] */ 295 if (temp & 0x40) 296 jregAD |= 0x01; /* HBE D[5] */ 297 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x03, 0xE0, (temp & 0x1f)); 298 299 temp = (mode->crtc_hsync_start >> 3) - 1; 300 if (temp & 0x100) 301 jregAC |= 0x40; /* HRS D[5] */ 302 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x04, 0x00, temp); 303 304 temp = ((mode->crtc_hsync_end >> 3) - 1) & 0x3f; 305 if (temp & 0x20) 306 jregAD |= 0x04; /* HRE D[5] */ 307 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x05, 0x60, (u8)((temp & 0x1f) | jreg05)); 308 309 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAC, 0x00, jregAC); 310 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAD, 0x00, jregAD); 311 312 /* vert timings */ 313 temp = (mode->crtc_vtotal) - 2; 314 if (temp & 0x100) 315 jreg07 |= 0x01; 316 if (temp & 0x200) 317 jreg07 |= 0x20; 318 if (temp & 0x400) 319 jregAE |= 0x01; 320 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x06, 0x00, temp); 321 322 temp = (mode->crtc_vsync_start) - 1; 323 if (temp & 0x100) 324 jreg07 |= 0x04; 325 if (temp & 0x200) 326 jreg07 |= 0x80; 327 if (temp & 0x400) 328 jregAE |= 0x08; 329 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x10, 0x00, temp); 330 331 temp = (mode->crtc_vsync_end - 1) & 0x3f; 332 if (temp & 0x10) 333 jregAE |= 0x20; 334 if (temp & 0x20) 335 jregAE |= 0x40; 336 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x70, temp & 0xf); 337 338 temp = mode->crtc_vdisplay - 1; 339 if (temp & 0x100) 340 jreg07 |= 0x02; 341 if (temp & 0x200) 342 jreg07 |= 0x40; 343 if (temp & 0x400) 344 jregAE |= 0x02; 345 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x12, 0x00, temp); 346 347 temp = mode->crtc_vblank_start - 1; 348 if (temp & 0x100) 349 jreg07 |= 0x08; 350 if (temp & 0x200) 351 jreg09 |= 0x20; 352 if (temp & 0x400) 353 jregAE |= 0x04; 354 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x15, 0x00, temp); 355 356 temp = mode->crtc_vblank_end - 1; 357 if (temp & 0x100) 358 jregAE |= 0x10; 359 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x16, 0x00, temp); 360 361 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x07, 0x00, jreg07); 362 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x09, 0xdf, jreg09); 363 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAE, 0x00, (jregAE | 0x80)); 364 365 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x80); 366} 367 368static void ast_set_offset_reg(struct drm_crtc *crtc) 369{ 370 struct ast_private *ast = crtc->dev->dev_private; 371 372 u16 offset; 373 374 offset = crtc->primary->fb->pitches[0] >> 3; 375 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x13, (offset & 0xff)); 376 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xb0, (offset >> 8) & 0x3f); 377} 378 379static void ast_set_dclk_reg(struct drm_device *dev, struct drm_display_mode *mode, 380 struct ast_vbios_mode_info *vbios_mode) 381{ 382 struct ast_private *ast = dev->dev_private; 383 struct ast_vbios_dclk_info *clk_info; 384 385 clk_info = &dclk_table[vbios_mode->enh_table->dclk_index]; 386 387 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc0, 0x00, clk_info->param1); 388 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc1, 0x00, clk_info->param2); 389 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xbb, 0x0f, 390 (clk_info->param3 & 0x80) | ((clk_info->param3 & 0x3) << 4)); 391} 392 393static void ast_set_ext_reg(struct drm_crtc *crtc, struct drm_display_mode *mode, 394 struct ast_vbios_mode_info *vbios_mode) 395{ 396 struct ast_private *ast = crtc->dev->dev_private; 397 u8 jregA0 = 0, jregA3 = 0, jregA8 = 0; 398 399 switch (crtc->primary->fb->bits_per_pixel) { 400 case 8: 401 jregA0 = 0x70; 402 jregA3 = 0x01; 403 jregA8 = 0x00; 404 break; 405 case 15: 406 case 16: 407 jregA0 = 0x70; 408 jregA3 = 0x04; 409 jregA8 = 0x02; 410 break; 411 case 32: 412 jregA0 = 0x70; 413 jregA3 = 0x08; 414 jregA8 = 0x02; 415 break; 416 } 417 418 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa0, 0x8f, jregA0); 419 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xf0, jregA3); 420 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa8, 0xfd, jregA8); 421 422 /* Set Threshold */ 423 if (ast->chip == AST2300 || ast->chip == AST2400) { 424 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x78); 425 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x60); 426 } else if (ast->chip == AST2100 || 427 ast->chip == AST1100 || 428 ast->chip == AST2200 || 429 ast->chip == AST2150) { 430 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x3f); 431 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x2f); 432 } else { 433 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x2f); 434 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x1f); 435 } 436} 437 438static void ast_set_sync_reg(struct drm_device *dev, struct drm_display_mode *mode, 439 struct ast_vbios_mode_info *vbios_mode) 440{ 441 struct ast_private *ast = dev->dev_private; 442 u8 jreg; 443 444 jreg = ast_io_read8(ast, AST_IO_MISC_PORT_READ); 445 jreg &= ~0xC0; 446 if (vbios_mode->enh_table->flags & NVSync) jreg |= 0x80; 447 if (vbios_mode->enh_table->flags & NHSync) jreg |= 0x40; 448 ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg); 449} 450 451static bool ast_set_dac_reg(struct drm_crtc *crtc, struct drm_display_mode *mode, 452 struct ast_vbios_mode_info *vbios_mode) 453{ 454 switch (crtc->primary->fb->bits_per_pixel) { 455 case 8: 456 break; 457 default: 458 return false; 459 } 460 return true; 461} 462 463static void ast_set_start_address_crt1(struct drm_crtc *crtc, unsigned offset) 464{ 465 struct ast_private *ast = crtc->dev->dev_private; 466 u32 addr; 467 468 addr = offset >> 2; 469 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0d, (u8)(addr & 0xff)); 470 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0c, (u8)((addr >> 8) & 0xff)); 471 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xaf, (u8)((addr >> 16) & 0xff)); 472 473} 474 475static void ast_crtc_dpms(struct drm_crtc *crtc, int mode) 476{ 477 struct ast_private *ast = crtc->dev->dev_private; 478 479 if (ast->chip == AST1180) 480 return; 481 482 switch (mode) { 483 case DRM_MODE_DPMS_ON: 484 case DRM_MODE_DPMS_STANDBY: 485 case DRM_MODE_DPMS_SUSPEND: 486 ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0); 487 if (ast->tx_chip_type == AST_TX_DP501) 488 ast_set_dp501_video_output(crtc->dev, 1); 489 ast_crtc_load_lut(crtc); 490 break; 491 case DRM_MODE_DPMS_OFF: 492 if (ast->tx_chip_type == AST_TX_DP501) 493 ast_set_dp501_video_output(crtc->dev, 0); 494 ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0x20); 495 break; 496 } 497} 498 499static bool ast_crtc_mode_fixup(struct drm_crtc *crtc, 500 const struct drm_display_mode *mode, 501 struct drm_display_mode *adjusted_mode) 502{ 503 return true; 504} 505 506/* ast is different - we will force move buffers out of VRAM */ 507static int ast_crtc_do_set_base(struct drm_crtc *crtc, 508 struct drm_framebuffer *fb, 509 int x, int y, int atomic) 510{ 511 struct ast_private *ast = crtc->dev->dev_private; 512 struct drm_gem_object *obj; 513 struct ast_framebuffer *ast_fb; 514 struct ast_bo *bo; 515 int ret; 516 u64 gpu_addr; 517 518 /* push the previous fb to system ram */ 519 if (!atomic && fb) { 520 ast_fb = to_ast_framebuffer(fb); 521 obj = ast_fb->obj; 522 bo = gem_to_ast_bo(obj); 523 ret = ast_bo_reserve(bo, false); 524 if (ret) 525 return ret; 526 ast_bo_push_sysram(bo); 527 ast_bo_unreserve(bo); 528 } 529 530 ast_fb = to_ast_framebuffer(crtc->primary->fb); 531 obj = ast_fb->obj; 532 bo = gem_to_ast_bo(obj); 533 534 ret = ast_bo_reserve(bo, false); 535 if (ret) 536 return ret; 537 538 ret = ast_bo_pin(bo, TTM_PL_FLAG_VRAM, &gpu_addr); 539 if (ret) { 540 ast_bo_unreserve(bo); 541 return ret; 542 } 543 544 if (&ast->fbdev->afb == ast_fb) { 545 /* if pushing console in kmap it */ 546 ret = ttm_bo_kmap(&bo->bo, 0, bo->bo.num_pages, &bo->kmap); 547 if (ret) 548 DRM_ERROR("failed to kmap fbcon\n"); 549 } 550 ast_bo_unreserve(bo); 551 552 ast_set_start_address_crt1(crtc, (u32)gpu_addr); 553 554 return 0; 555} 556 557static int ast_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, 558 struct drm_framebuffer *old_fb) 559{ 560 return ast_crtc_do_set_base(crtc, old_fb, x, y, 0); 561} 562 563static int ast_crtc_mode_set(struct drm_crtc *crtc, 564 struct drm_display_mode *mode, 565 struct drm_display_mode *adjusted_mode, 566 int x, int y, 567 struct drm_framebuffer *old_fb) 568{ 569 struct drm_device *dev = crtc->dev; 570 struct ast_private *ast = crtc->dev->dev_private; 571 struct ast_vbios_mode_info vbios_mode; 572 bool ret; 573 if (ast->chip == AST1180) { 574 DRM_ERROR("AST 1180 modesetting not supported\n"); 575 return -EINVAL; 576 } 577 578 ret = ast_get_vbios_mode_info(crtc, mode, adjusted_mode, &vbios_mode); 579 if (ret == false) 580 return -EINVAL; 581 ast_open_key(ast); 582 583 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa1, 0xff, 0x04); 584 585 ast_set_std_reg(crtc, adjusted_mode, &vbios_mode); 586 ast_set_crtc_reg(crtc, adjusted_mode, &vbios_mode); 587 ast_set_offset_reg(crtc); 588 ast_set_dclk_reg(dev, adjusted_mode, &vbios_mode); 589 ast_set_ext_reg(crtc, adjusted_mode, &vbios_mode); 590 ast_set_sync_reg(dev, adjusted_mode, &vbios_mode); 591 ast_set_dac_reg(crtc, adjusted_mode, &vbios_mode); 592 593 ast_crtc_mode_set_base(crtc, x, y, old_fb); 594 595 return 0; 596} 597 598static void ast_crtc_disable(struct drm_crtc *crtc) 599{ 600 601} 602 603static void ast_crtc_prepare(struct drm_crtc *crtc) 604{ 605 606} 607 608static void ast_crtc_commit(struct drm_crtc *crtc) 609{ 610 struct ast_private *ast = crtc->dev->dev_private; 611 ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0); 612} 613 614 615static const struct drm_crtc_helper_funcs ast_crtc_helper_funcs = { 616 .dpms = ast_crtc_dpms, 617 .mode_fixup = ast_crtc_mode_fixup, 618 .mode_set = ast_crtc_mode_set, 619 .mode_set_base = ast_crtc_mode_set_base, 620 .disable = ast_crtc_disable, 621 .load_lut = ast_crtc_load_lut, 622 .prepare = ast_crtc_prepare, 623 .commit = ast_crtc_commit, 624 625}; 626 627static void ast_crtc_reset(struct drm_crtc *crtc) 628{ 629 630} 631 632static void ast_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, 633 u16 *blue, uint32_t start, uint32_t size) 634{ 635 struct ast_crtc *ast_crtc = to_ast_crtc(crtc); 636 int end = (start + size > 256) ? 256 : start + size, i; 637 638 /* userspace palettes are always correct as is */ 639 for (i = start; i < end; i++) { 640 ast_crtc->lut_r[i] = red[i] >> 8; 641 ast_crtc->lut_g[i] = green[i] >> 8; 642 ast_crtc->lut_b[i] = blue[i] >> 8; 643 } 644 ast_crtc_load_lut(crtc); 645} 646 647 648static void ast_crtc_destroy(struct drm_crtc *crtc) 649{ 650 drm_crtc_cleanup(crtc); 651 kfree(crtc); 652} 653 654static const struct drm_crtc_funcs ast_crtc_funcs = { 655 .cursor_set = ast_cursor_set, 656 .cursor_move = ast_cursor_move, 657 .reset = ast_crtc_reset, 658 .set_config = drm_crtc_helper_set_config, 659 .gamma_set = ast_crtc_gamma_set, 660 .destroy = ast_crtc_destroy, 661}; 662 663static int ast_crtc_init(struct drm_device *dev) 664{ 665 struct ast_crtc *crtc; 666 int i; 667 668 crtc = kzalloc(sizeof(struct ast_crtc), GFP_KERNEL); 669 if (!crtc) 670 return -ENOMEM; 671 672 drm_crtc_init(dev, &crtc->base, &ast_crtc_funcs); 673 drm_mode_crtc_set_gamma_size(&crtc->base, 256); 674 drm_crtc_helper_add(&crtc->base, &ast_crtc_helper_funcs); 675 676 for (i = 0; i < 256; i++) { 677 crtc->lut_r[i] = i; 678 crtc->lut_g[i] = i; 679 crtc->lut_b[i] = i; 680 } 681 return 0; 682} 683 684static void ast_encoder_destroy(struct drm_encoder *encoder) 685{ 686 drm_encoder_cleanup(encoder); 687 kfree(encoder); 688} 689 690 691static struct drm_encoder *ast_best_single_encoder(struct drm_connector *connector) 692{ 693 int enc_id = connector->encoder_ids[0]; 694 /* pick the encoder ids */ 695 if (enc_id) 696 return drm_encoder_find(connector->dev, enc_id); 697 return NULL; 698} 699 700 701static const struct drm_encoder_funcs ast_enc_funcs = { 702 .destroy = ast_encoder_destroy, 703}; 704 705static void ast_encoder_dpms(struct drm_encoder *encoder, int mode) 706{ 707 708} 709 710static bool ast_mode_fixup(struct drm_encoder *encoder, 711 const struct drm_display_mode *mode, 712 struct drm_display_mode *adjusted_mode) 713{ 714 return true; 715} 716 717static void ast_encoder_mode_set(struct drm_encoder *encoder, 718 struct drm_display_mode *mode, 719 struct drm_display_mode *adjusted_mode) 720{ 721} 722 723static void ast_encoder_prepare(struct drm_encoder *encoder) 724{ 725 726} 727 728static void ast_encoder_commit(struct drm_encoder *encoder) 729{ 730 731} 732 733 734static const struct drm_encoder_helper_funcs ast_enc_helper_funcs = { 735 .dpms = ast_encoder_dpms, 736 .mode_fixup = ast_mode_fixup, 737 .prepare = ast_encoder_prepare, 738 .commit = ast_encoder_commit, 739 .mode_set = ast_encoder_mode_set, 740}; 741 742static int ast_encoder_init(struct drm_device *dev) 743{ 744 struct ast_encoder *ast_encoder; 745 746 ast_encoder = kzalloc(sizeof(struct ast_encoder), GFP_KERNEL); 747 if (!ast_encoder) 748 return -ENOMEM; 749 750 drm_encoder_init(dev, &ast_encoder->base, &ast_enc_funcs, 751 DRM_MODE_ENCODER_DAC); 752 drm_encoder_helper_add(&ast_encoder->base, &ast_enc_helper_funcs); 753 754 ast_encoder->base.possible_crtcs = 1; 755 return 0; 756} 757 758static int ast_get_modes(struct drm_connector *connector) 759{ 760 struct ast_connector *ast_connector = to_ast_connector(connector); 761 struct ast_private *ast = connector->dev->dev_private; 762 struct edid *edid; 763 int ret; 764 bool flags = false; 765 if (ast->tx_chip_type == AST_TX_DP501) { 766 ast->dp501_maxclk = 0xff; 767 edid = kmalloc(128, GFP_KERNEL); 768 if (!edid) 769 return -ENOMEM; 770 771 flags = ast_dp501_read_edid(connector->dev, (u8 *)edid); 772 if (flags) 773 ast->dp501_maxclk = ast_get_dp501_max_clk(connector->dev); 774 else 775 kfree(edid); 776 } 777 if (!flags) 778 edid = drm_get_edid(connector, &ast_connector->i2c->adapter); 779 if (edid) { 780 drm_mode_connector_update_edid_property(&ast_connector->base, edid); 781 ret = drm_add_edid_modes(connector, edid); 782 kfree(edid); 783 return ret; 784 } else 785 drm_mode_connector_update_edid_property(&ast_connector->base, NULL); 786 return 0; 787} 788 789static int ast_mode_valid(struct drm_connector *connector, 790 struct drm_display_mode *mode) 791{ 792 struct ast_private *ast = connector->dev->dev_private; 793 int flags = MODE_NOMODE; 794 uint32_t jtemp; 795 796 if (ast->support_wide_screen) { 797 if ((mode->hdisplay == 1680) && (mode->vdisplay == 1050)) 798 return MODE_OK; 799 if ((mode->hdisplay == 1280) && (mode->vdisplay == 800)) 800 return MODE_OK; 801 if ((mode->hdisplay == 1440) && (mode->vdisplay == 900)) 802 return MODE_OK; 803 if ((mode->hdisplay == 1360) && (mode->vdisplay == 768)) 804 return MODE_OK; 805 if ((mode->hdisplay == 1600) && (mode->vdisplay == 900)) 806 return MODE_OK; 807 808 if ((ast->chip == AST2100) || (ast->chip == AST2200) || (ast->chip == AST2300) || (ast->chip == AST2400) || (ast->chip == AST1180)) { 809 if ((mode->hdisplay == 1920) && (mode->vdisplay == 1080)) 810 return MODE_OK; 811 812 if ((mode->hdisplay == 1920) && (mode->vdisplay == 1200)) { 813 jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff); 814 if (jtemp & 0x01) 815 return MODE_NOMODE; 816 else 817 return MODE_OK; 818 } 819 } 820 } 821 switch (mode->hdisplay) { 822 case 640: 823 if (mode->vdisplay == 480) flags = MODE_OK; 824 break; 825 case 800: 826 if (mode->vdisplay == 600) flags = MODE_OK; 827 break; 828 case 1024: 829 if (mode->vdisplay == 768) flags = MODE_OK; 830 break; 831 case 1280: 832 if (mode->vdisplay == 1024) flags = MODE_OK; 833 break; 834 case 1600: 835 if (mode->vdisplay == 1200) flags = MODE_OK; 836 break; 837 default: 838 return flags; 839 } 840 841 return flags; 842} 843 844static void ast_connector_destroy(struct drm_connector *connector) 845{ 846 struct ast_connector *ast_connector = to_ast_connector(connector); 847 ast_i2c_destroy(ast_connector->i2c); 848 drm_connector_unregister(connector); 849 drm_connector_cleanup(connector); 850 kfree(connector); 851} 852 853static enum drm_connector_status 854ast_connector_detect(struct drm_connector *connector, bool force) 855{ 856 return connector_status_connected; 857} 858 859static const struct drm_connector_helper_funcs ast_connector_helper_funcs = { 860 .mode_valid = ast_mode_valid, 861 .get_modes = ast_get_modes, 862 .best_encoder = ast_best_single_encoder, 863}; 864 865static const struct drm_connector_funcs ast_connector_funcs = { 866 .dpms = drm_helper_connector_dpms, 867 .detect = ast_connector_detect, 868 .fill_modes = drm_helper_probe_single_connector_modes, 869 .destroy = ast_connector_destroy, 870}; 871 872static int ast_connector_init(struct drm_device *dev) 873{ 874 struct ast_connector *ast_connector; 875 struct drm_connector *connector; 876 struct drm_encoder *encoder; 877 878 ast_connector = kzalloc(sizeof(struct ast_connector), GFP_KERNEL); 879 if (!ast_connector) 880 return -ENOMEM; 881 882 connector = &ast_connector->base; 883 drm_connector_init(dev, connector, &ast_connector_funcs, DRM_MODE_CONNECTOR_VGA); 884 885 drm_connector_helper_add(connector, &ast_connector_helper_funcs); 886 887 connector->interlace_allowed = 0; 888 connector->doublescan_allowed = 0; 889 890 drm_connector_register(connector); 891 892 connector->polled = DRM_CONNECTOR_POLL_CONNECT; 893 894 encoder = list_first_entry(&dev->mode_config.encoder_list, struct drm_encoder, head); 895 drm_mode_connector_attach_encoder(connector, encoder); 896 897 ast_connector->i2c = ast_i2c_create(dev); 898 if (!ast_connector->i2c) 899 DRM_ERROR("failed to add ddc bus for connector\n"); 900 901 return 0; 902} 903 904/* allocate cursor cache and pin at start of VRAM */ 905static int ast_cursor_init(struct drm_device *dev) 906{ 907 struct ast_private *ast = dev->dev_private; 908 int size; 909 int ret; 910 struct drm_gem_object *obj; 911 struct ast_bo *bo; 912 uint64_t gpu_addr; 913 914 size = (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE) * AST_DEFAULT_HWC_NUM; 915 916 ret = ast_gem_create(dev, size, true, &obj); 917 if (ret) 918 return ret; 919 bo = gem_to_ast_bo(obj); 920 ret = ast_bo_reserve(bo, false); 921 if (unlikely(ret != 0)) 922 goto fail; 923 924 ret = ast_bo_pin(bo, TTM_PL_FLAG_VRAM, &gpu_addr); 925 ast_bo_unreserve(bo); 926 if (ret) 927 goto fail; 928 929 /* kmap the object */ 930 ret = ttm_bo_kmap(&bo->bo, 0, bo->bo.num_pages, &ast->cache_kmap); 931 if (ret) 932 goto fail; 933 934 ast->cursor_cache = obj; 935 ast->cursor_cache_gpu_addr = gpu_addr; 936 DRM_DEBUG_KMS("pinned cursor cache at %llx\n", ast->cursor_cache_gpu_addr); 937 return 0; 938fail: 939 return ret; 940} 941 942static void ast_cursor_fini(struct drm_device *dev) 943{ 944 struct ast_private *ast = dev->dev_private; 945 ttm_bo_kunmap(&ast->cache_kmap); 946 drm_gem_object_unreference_unlocked(ast->cursor_cache); 947} 948 949int ast_mode_init(struct drm_device *dev) 950{ 951 ast_cursor_init(dev); 952 ast_crtc_init(dev); 953 ast_encoder_init(dev); 954 ast_connector_init(dev); 955 return 0; 956} 957 958void ast_mode_fini(struct drm_device *dev) 959{ 960 ast_cursor_fini(dev); 961} 962 963static int get_clock(void *i2c_priv) 964{ 965 struct ast_i2c_chan *i2c = i2c_priv; 966 struct ast_private *ast = i2c->dev->dev_private; 967 uint32_t val; 968 969 val = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x10) >> 4; 970 return val & 1 ? 1 : 0; 971} 972 973static int get_data(void *i2c_priv) 974{ 975 struct ast_i2c_chan *i2c = i2c_priv; 976 struct ast_private *ast = i2c->dev->dev_private; 977 uint32_t val; 978 979 val = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x20) >> 5; 980 return val & 1 ? 1 : 0; 981} 982 983static void set_clock(void *i2c_priv, int clock) 984{ 985 struct ast_i2c_chan *i2c = i2c_priv; 986 struct ast_private *ast = i2c->dev->dev_private; 987 int i; 988 u8 ujcrb7, jtemp; 989 990 for (i = 0; i < 0x10000; i++) { 991 ujcrb7 = ((clock & 0x01) ? 0 : 1); 992 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xfe, ujcrb7); 993 jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x01); 994 if (ujcrb7 == jtemp) 995 break; 996 } 997} 998 999static void set_data(void *i2c_priv, int data) 1000{ 1001 struct ast_i2c_chan *i2c = i2c_priv; 1002 struct ast_private *ast = i2c->dev->dev_private; 1003 int i; 1004 u8 ujcrb7, jtemp; 1005 1006 for (i = 0; i < 0x10000; i++) { 1007 ujcrb7 = ((data & 0x01) ? 0 : 1) << 2; 1008 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xfb, ujcrb7); 1009 jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x04); 1010 if (ujcrb7 == jtemp) 1011 break; 1012 } 1013} 1014 1015static struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev) 1016{ 1017 struct ast_i2c_chan *i2c; 1018 int ret; 1019 1020 i2c = kzalloc(sizeof(struct ast_i2c_chan), GFP_KERNEL); 1021 if (!i2c) 1022 return NULL; 1023 1024 i2c->adapter.owner = THIS_MODULE; 1025 i2c->adapter.class = I2C_CLASS_DDC; 1026 i2c->adapter.dev.parent = &dev->pdev->dev; 1027 i2c->dev = dev; 1028 i2c_set_adapdata(&i2c->adapter, i2c); 1029 snprintf(i2c->adapter.name, sizeof(i2c->adapter.name), 1030 "AST i2c bit bus"); 1031 i2c->adapter.algo_data = &i2c->bit; 1032 1033 i2c->bit.udelay = 20; 1034 i2c->bit.timeout = 2; 1035 i2c->bit.data = i2c; 1036 i2c->bit.setsda = set_data; 1037 i2c->bit.setscl = set_clock; 1038 i2c->bit.getsda = get_data; 1039 i2c->bit.getscl = get_clock; 1040 ret = i2c_bit_add_bus(&i2c->adapter); 1041 if (ret) { 1042 DRM_ERROR("Failed to register bit i2c\n"); 1043 goto out_free; 1044 } 1045 1046 return i2c; 1047out_free: 1048 kfree(i2c); 1049 return NULL; 1050} 1051 1052static void ast_i2c_destroy(struct ast_i2c_chan *i2c) 1053{ 1054 if (!i2c) 1055 return; 1056 i2c_del_adapter(&i2c->adapter); 1057 kfree(i2c); 1058} 1059 1060static void ast_show_cursor(struct drm_crtc *crtc) 1061{ 1062 struct ast_private *ast = crtc->dev->dev_private; 1063 u8 jreg; 1064 1065 jreg = 0x2; 1066 /* enable ARGB cursor */ 1067 jreg |= 1; 1068 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, 0xfc, jreg); 1069} 1070 1071static void ast_hide_cursor(struct drm_crtc *crtc) 1072{ 1073 struct ast_private *ast = crtc->dev->dev_private; 1074 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, 0xfc, 0x00); 1075} 1076 1077static u32 copy_cursor_image(u8 *src, u8 *dst, int width, int height) 1078{ 1079 union { 1080 u32 ul; 1081 u8 b[4]; 1082 } srcdata32[2], data32; 1083 union { 1084 u16 us; 1085 u8 b[2]; 1086 } data16; 1087 u32 csum = 0; 1088 s32 alpha_dst_delta, last_alpha_dst_delta; 1089 u8 *srcxor, *dstxor; 1090 int i, j; 1091 u32 per_pixel_copy, two_pixel_copy; 1092 1093 alpha_dst_delta = AST_MAX_HWC_WIDTH << 1; 1094 last_alpha_dst_delta = alpha_dst_delta - (width << 1); 1095 1096 srcxor = src; 1097 dstxor = (u8 *)dst + last_alpha_dst_delta + (AST_MAX_HWC_HEIGHT - height) * alpha_dst_delta; 1098 per_pixel_copy = width & 1; 1099 two_pixel_copy = width >> 1; 1100 1101 for (j = 0; j < height; j++) { 1102 for (i = 0; i < two_pixel_copy; i++) { 1103 srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0; 1104 srcdata32[1].ul = *((u32 *)(srcxor + 4)) & 0xf0f0f0f0; 1105 data32.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4); 1106 data32.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4); 1107 data32.b[2] = srcdata32[1].b[1] | (srcdata32[1].b[0] >> 4); 1108 data32.b[3] = srcdata32[1].b[3] | (srcdata32[1].b[2] >> 4); 1109 1110 writel(data32.ul, dstxor); 1111 csum += data32.ul; 1112 1113 dstxor += 4; 1114 srcxor += 8; 1115 1116 } 1117 1118 for (i = 0; i < per_pixel_copy; i++) { 1119 srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0; 1120 data16.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4); 1121 data16.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4); 1122 writew(data16.us, dstxor); 1123 csum += (u32)data16.us; 1124 1125 dstxor += 2; 1126 srcxor += 4; 1127 } 1128 dstxor += last_alpha_dst_delta; 1129 } 1130 return csum; 1131} 1132 1133static int ast_cursor_set(struct drm_crtc *crtc, 1134 struct drm_file *file_priv, 1135 uint32_t handle, 1136 uint32_t width, 1137 uint32_t height) 1138{ 1139 struct ast_private *ast = crtc->dev->dev_private; 1140 struct ast_crtc *ast_crtc = to_ast_crtc(crtc); 1141 struct drm_gem_object *obj; 1142 struct ast_bo *bo; 1143 uint64_t gpu_addr; 1144 u32 csum; 1145 int ret; 1146 struct ttm_bo_kmap_obj uobj_map; 1147 u8 *src, *dst; 1148 bool src_isiomem, dst_isiomem; 1149 if (!handle) { 1150 ast_hide_cursor(crtc); 1151 return 0; 1152 } 1153 1154 if (width > AST_MAX_HWC_WIDTH || height > AST_MAX_HWC_HEIGHT) 1155 return -EINVAL; 1156 1157 obj = drm_gem_object_lookup(crtc->dev, file_priv, handle); 1158 if (!obj) { 1159 DRM_ERROR("Cannot find cursor object %x for crtc\n", handle); 1160 return -ENOENT; 1161 } 1162 bo = gem_to_ast_bo(obj); 1163 1164 ret = ast_bo_reserve(bo, false); 1165 if (ret) 1166 goto fail; 1167 1168 ret = ttm_bo_kmap(&bo->bo, 0, bo->bo.num_pages, &uobj_map); 1169 1170 src = ttm_kmap_obj_virtual(&uobj_map, &src_isiomem); 1171 dst = ttm_kmap_obj_virtual(&ast->cache_kmap, &dst_isiomem); 1172 1173 if (src_isiomem == true) 1174 DRM_ERROR("src cursor bo should be in main memory\n"); 1175 if (dst_isiomem == false) 1176 DRM_ERROR("dst bo should be in VRAM\n"); 1177 1178 dst += (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor; 1179 1180 /* do data transfer to cursor cache */ 1181 csum = copy_cursor_image(src, dst, width, height); 1182 1183 /* write checksum + signature */ 1184 ttm_bo_kunmap(&uobj_map); 1185 ast_bo_unreserve(bo); 1186 { 1187 u8 *dst = (u8 *)ast->cache_kmap.virtual + (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor + AST_HWC_SIZE; 1188 writel(csum, dst); 1189 writel(width, dst + AST_HWC_SIGNATURE_SizeX); 1190 writel(height, dst + AST_HWC_SIGNATURE_SizeY); 1191 writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTX); 1192 writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTY); 1193 1194 /* set pattern offset */ 1195 gpu_addr = ast->cursor_cache_gpu_addr; 1196 gpu_addr += (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor; 1197 gpu_addr >>= 3; 1198 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc8, gpu_addr & 0xff); 1199 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc9, (gpu_addr >> 8) & 0xff); 1200 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xca, (gpu_addr >> 16) & 0xff); 1201 } 1202 ast_crtc->cursor_width = width; 1203 ast_crtc->cursor_height = height; 1204 ast_crtc->offset_x = AST_MAX_HWC_WIDTH - width; 1205 ast_crtc->offset_y = AST_MAX_HWC_WIDTH - height; 1206 1207 ast->next_cursor = (ast->next_cursor + 1) % AST_DEFAULT_HWC_NUM; 1208 1209 ast_show_cursor(crtc); 1210 1211 drm_gem_object_unreference_unlocked(obj); 1212 return 0; 1213fail: 1214 drm_gem_object_unreference_unlocked(obj); 1215 return ret; 1216} 1217 1218static int ast_cursor_move(struct drm_crtc *crtc, 1219 int x, int y) 1220{ 1221 struct ast_crtc *ast_crtc = to_ast_crtc(crtc); 1222 struct ast_private *ast = crtc->dev->dev_private; 1223 int x_offset, y_offset; 1224 u8 *sig; 1225 1226 sig = (u8 *)ast->cache_kmap.virtual + (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor + AST_HWC_SIZE; 1227 writel(x, sig + AST_HWC_SIGNATURE_X); 1228 writel(y, sig + AST_HWC_SIGNATURE_Y); 1229 1230 x_offset = ast_crtc->offset_x; 1231 y_offset = ast_crtc->offset_y; 1232 if (x < 0) { 1233 x_offset = (-x) + ast_crtc->offset_x; 1234 x = 0; 1235 } 1236 1237 if (y < 0) { 1238 y_offset = (-y) + ast_crtc->offset_y; 1239 y = 0; 1240 } 1241 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc2, x_offset); 1242 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc3, y_offset); 1243 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc4, (x & 0xff)); 1244 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc5, ((x >> 8) & 0x0f)); 1245 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc6, (y & 0xff)); 1246 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc7, ((y >> 8) & 0x07)); 1247 1248 /* dummy write to fire HWC */ 1249 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xCB, 0xFF, 0x00); 1250 1251 return 0; 1252} 1253