drm_edid.c revision 2b470ab075b30aaeeab29d67b8f1f111096a5fbe
1/* 2 * Copyright (c) 2006 Luc Verhaegen (quirks list) 3 * Copyright (c) 2007-2008 Intel Corporation 4 * Jesse Barnes <jesse.barnes@intel.com> 5 * Copyright 2010 Red Hat, Inc. 6 * 7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from 8 * FB layer. 9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com> 10 * 11 * Permission is hereby granted, free of charge, to any person obtaining a 12 * copy of this software and associated documentation files (the "Software"), 13 * to deal in the Software without restriction, including without limitation 14 * the rights to use, copy, modify, merge, publish, distribute, sub license, 15 * and/or sell copies of the Software, and to permit persons to whom the 16 * Software is furnished to do so, subject to the following conditions: 17 * 18 * The above copyright notice and this permission notice (including the 19 * next paragraph) shall be included in all copies or substantial portions 20 * of the Software. 21 * 22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 28 * DEALINGS IN THE SOFTWARE. 29 */ 30#include <linux/kernel.h> 31#include <linux/i2c.h> 32#include <linux/i2c-algo-bit.h> 33#include "drmP.h" 34#include "drm_edid.h" 35 36/* 37 * EDID blocks out in the wild have a variety of bugs, try to collect 38 * them here (note that userspace may work around broken monitors first, 39 * but fixes should make their way here so that the kernel "just works" 40 * on as many displays as possible). 41 */ 42 43/* First detailed mode wrong, use largest 60Hz mode */ 44#define EDID_QUIRK_PREFER_LARGE_60 (1 << 0) 45/* Reported 135MHz pixel clock is too high, needs adjustment */ 46#define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1) 47/* Prefer the largest mode at 75 Hz */ 48#define EDID_QUIRK_PREFER_LARGE_75 (1 << 2) 49/* Detail timing is in cm not mm */ 50#define EDID_QUIRK_DETAILED_IN_CM (1 << 3) 51/* Detailed timing descriptors have bogus size values, so just take the 52 * maximum size and use that. 53 */ 54#define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4) 55/* Monitor forgot to set the first detailed is preferred bit. */ 56#define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5) 57/* use +hsync +vsync for detailed mode */ 58#define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6) 59 60 61#define LEVEL_DMT 0 62#define LEVEL_GTF 1 63#define LEVEL_CVT 2 64 65static struct edid_quirk { 66 char *vendor; 67 int product_id; 68 u32 quirks; 69} edid_quirk_list[] = { 70 /* Acer AL1706 */ 71 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 }, 72 /* Acer F51 */ 73 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 }, 74 /* Unknown Acer */ 75 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 76 77 /* Belinea 10 15 55 */ 78 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 }, 79 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 }, 80 81 /* Envision Peripherals, Inc. EN-7100e */ 82 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH }, 83 84 /* Funai Electronics PM36B */ 85 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 | 86 EDID_QUIRK_DETAILED_IN_CM }, 87 88 /* LG Philips LCD LP154W01-A5 */ 89 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, 90 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, 91 92 /* Philips 107p5 CRT */ 93 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 94 95 /* Proview AY765C */ 96 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 97 98 /* Samsung SyncMaster 205BW. Note: irony */ 99 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP }, 100 /* Samsung SyncMaster 22[5-6]BW */ 101 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 }, 102 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 }, 103}; 104 105/*** DDC fetch and block validation ***/ 106 107static const u8 edid_header[] = { 108 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 109}; 110 111/* 112 * Sanity check the EDID block (base or extension). Return 0 if the block 113 * doesn't check out, or 1 if it's valid. 114 */ 115static bool 116drm_edid_block_valid(u8 *raw_edid) 117{ 118 int i; 119 u8 csum = 0; 120 struct edid *edid = (struct edid *)raw_edid; 121 122 if (raw_edid[0] == 0x00) { 123 int score = 0; 124 125 for (i = 0; i < sizeof(edid_header); i++) 126 if (raw_edid[i] == edid_header[i]) 127 score++; 128 129 if (score == 8) ; 130 else if (score >= 6) { 131 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n"); 132 memcpy(raw_edid, edid_header, sizeof(edid_header)); 133 } else { 134 goto bad; 135 } 136 } 137 138 for (i = 0; i < EDID_LENGTH; i++) 139 csum += raw_edid[i]; 140 if (csum) { 141 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum); 142 goto bad; 143 } 144 145 /* per-block-type checks */ 146 switch (raw_edid[0]) { 147 case 0: /* base */ 148 if (edid->version != 1) { 149 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version); 150 goto bad; 151 } 152 153 if (edid->revision > 4) 154 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n"); 155 break; 156 157 default: 158 break; 159 } 160 161 return 1; 162 163bad: 164 if (raw_edid) { 165 DRM_ERROR("Raw EDID:\n"); 166 print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH); 167 printk("\n"); 168 } 169 return 0; 170} 171 172/** 173 * drm_edid_is_valid - sanity check EDID data 174 * @edid: EDID data 175 * 176 * Sanity-check an entire EDID record (including extensions) 177 */ 178bool drm_edid_is_valid(struct edid *edid) 179{ 180 int i; 181 u8 *raw = (u8 *)edid; 182 183 if (!edid) 184 return false; 185 186 for (i = 0; i <= edid->extensions; i++) 187 if (!drm_edid_block_valid(raw + i * EDID_LENGTH)) 188 return false; 189 190 return true; 191} 192EXPORT_SYMBOL(drm_edid_is_valid); 193 194#define DDC_ADDR 0x50 195#define DDC_SEGMENT_ADDR 0x30 196/** 197 * Get EDID information via I2C. 198 * 199 * \param adapter : i2c device adaptor 200 * \param buf : EDID data buffer to be filled 201 * \param len : EDID data buffer length 202 * \return 0 on success or -1 on failure. 203 * 204 * Try to fetch EDID information by calling i2c driver function. 205 */ 206static int 207drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf, 208 int block, int len) 209{ 210 unsigned char start = block * EDID_LENGTH; 211 struct i2c_msg msgs[] = { 212 { 213 .addr = DDC_ADDR, 214 .flags = 0, 215 .len = 1, 216 .buf = &start, 217 }, { 218 .addr = DDC_ADDR, 219 .flags = I2C_M_RD, 220 .len = len, 221 .buf = buf + start, 222 } 223 }; 224 225 if (i2c_transfer(adapter, msgs, 2) == 2) 226 return 0; 227 228 return -1; 229} 230 231static u8 * 232drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter) 233{ 234 int i, j = 0; 235 u8 *block, *new; 236 237 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL) 238 return NULL; 239 240 /* base block fetch */ 241 for (i = 0; i < 4; i++) { 242 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH)) 243 goto out; 244 if (drm_edid_block_valid(block)) 245 break; 246 } 247 if (i == 4) 248 goto carp; 249 250 /* if there's no extensions, we're done */ 251 if (block[0x7e] == 0) 252 return block; 253 254 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL); 255 if (!new) 256 goto out; 257 block = new; 258 259 for (j = 1; j <= block[0x7e]; j++) { 260 for (i = 0; i < 4; i++) { 261 if (drm_do_probe_ddc_edid(adapter, block, j, 262 EDID_LENGTH)) 263 goto out; 264 if (drm_edid_block_valid(block + j * EDID_LENGTH)) 265 break; 266 } 267 if (i == 4) 268 goto carp; 269 } 270 271 return block; 272 273carp: 274 dev_warn(&connector->dev->pdev->dev, "%s: EDID block %d invalid.\n", 275 drm_get_connector_name(connector), j); 276 277out: 278 kfree(block); 279 return NULL; 280} 281 282/** 283 * Probe DDC presence. 284 * 285 * \param adapter : i2c device adaptor 286 * \return 1 on success 287 */ 288static bool 289drm_probe_ddc(struct i2c_adapter *adapter) 290{ 291 unsigned char out; 292 293 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0); 294} 295 296/** 297 * drm_get_edid - get EDID data, if available 298 * @connector: connector we're probing 299 * @adapter: i2c adapter to use for DDC 300 * 301 * Poke the given i2c channel to grab EDID data if possible. If found, 302 * attach it to the connector. 303 * 304 * Return edid data or NULL if we couldn't find any. 305 */ 306struct edid *drm_get_edid(struct drm_connector *connector, 307 struct i2c_adapter *adapter) 308{ 309 struct edid *edid = NULL; 310 311 if (drm_probe_ddc(adapter)) 312 edid = (struct edid *)drm_do_get_edid(connector, adapter); 313 314 connector->display_info.raw_edid = (char *)edid; 315 316 return edid; 317 318} 319EXPORT_SYMBOL(drm_get_edid); 320 321/*** EDID parsing ***/ 322 323/** 324 * edid_vendor - match a string against EDID's obfuscated vendor field 325 * @edid: EDID to match 326 * @vendor: vendor string 327 * 328 * Returns true if @vendor is in @edid, false otherwise 329 */ 330static bool edid_vendor(struct edid *edid, char *vendor) 331{ 332 char edid_vendor[3]; 333 334 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@'; 335 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) | 336 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@'; 337 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@'; 338 339 return !strncmp(edid_vendor, vendor, 3); 340} 341 342/** 343 * edid_get_quirks - return quirk flags for a given EDID 344 * @edid: EDID to process 345 * 346 * This tells subsequent routines what fixes they need to apply. 347 */ 348static u32 edid_get_quirks(struct edid *edid) 349{ 350 struct edid_quirk *quirk; 351 int i; 352 353 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) { 354 quirk = &edid_quirk_list[i]; 355 356 if (edid_vendor(edid, quirk->vendor) && 357 (EDID_PRODUCT_ID(edid) == quirk->product_id)) 358 return quirk->quirks; 359 } 360 361 return 0; 362} 363 364#define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay) 365#define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh)) 366 367 368/** 369 * edid_fixup_preferred - set preferred modes based on quirk list 370 * @connector: has mode list to fix up 371 * @quirks: quirks list 372 * 373 * Walk the mode list for @connector, clearing the preferred status 374 * on existing modes and setting it anew for the right mode ala @quirks. 375 */ 376static void edid_fixup_preferred(struct drm_connector *connector, 377 u32 quirks) 378{ 379 struct drm_display_mode *t, *cur_mode, *preferred_mode; 380 int target_refresh = 0; 381 382 if (list_empty(&connector->probed_modes)) 383 return; 384 385 if (quirks & EDID_QUIRK_PREFER_LARGE_60) 386 target_refresh = 60; 387 if (quirks & EDID_QUIRK_PREFER_LARGE_75) 388 target_refresh = 75; 389 390 preferred_mode = list_first_entry(&connector->probed_modes, 391 struct drm_display_mode, head); 392 393 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) { 394 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED; 395 396 if (cur_mode == preferred_mode) 397 continue; 398 399 /* Largest mode is preferred */ 400 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode)) 401 preferred_mode = cur_mode; 402 403 /* At a given size, try to get closest to target refresh */ 404 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) && 405 MODE_REFRESH_DIFF(cur_mode, target_refresh) < 406 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) { 407 preferred_mode = cur_mode; 408 } 409 } 410 411 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED; 412} 413 414/* 415 * Add the Autogenerated from the DMT spec. 416 * This table is copied from xfree86/modes/xf86EdidModes.c. 417 * But the mode with Reduced blank feature is deleted. 418 */ 419static struct drm_display_mode drm_dmt_modes[] = { 420 /* 640x350@85Hz */ 421 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, 422 736, 832, 0, 350, 382, 385, 445, 0, 423 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 424 /* 640x400@85Hz */ 425 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, 426 736, 832, 0, 400, 401, 404, 445, 0, 427 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 428 /* 720x400@85Hz */ 429 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756, 430 828, 936, 0, 400, 401, 404, 446, 0, 431 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 432 /* 640x480@60Hz */ 433 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, 434 752, 800, 0, 480, 489, 492, 525, 0, 435 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 436 /* 640x480@72Hz */ 437 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, 438 704, 832, 0, 480, 489, 492, 520, 0, 439 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 440 /* 640x480@75Hz */ 441 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, 442 720, 840, 0, 480, 481, 484, 500, 0, 443 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 444 /* 640x480@85Hz */ 445 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696, 446 752, 832, 0, 480, 481, 484, 509, 0, 447 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 448 /* 800x600@56Hz */ 449 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, 450 896, 1024, 0, 600, 601, 603, 625, 0, 451 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 452 /* 800x600@60Hz */ 453 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, 454 968, 1056, 0, 600, 601, 605, 628, 0, 455 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 456 /* 800x600@72Hz */ 457 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, 458 976, 1040, 0, 600, 637, 643, 666, 0, 459 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 460 /* 800x600@75Hz */ 461 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, 462 896, 1056, 0, 600, 601, 604, 625, 0, 463 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 464 /* 800x600@85Hz */ 465 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832, 466 896, 1048, 0, 600, 601, 604, 631, 0, 467 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 468 /* 848x480@60Hz */ 469 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864, 470 976, 1088, 0, 480, 486, 494, 517, 0, 471 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 472 /* 1024x768@43Hz, interlace */ 473 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032, 474 1208, 1264, 0, 768, 768, 772, 817, 0, 475 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 476 DRM_MODE_FLAG_INTERLACE) }, 477 /* 1024x768@60Hz */ 478 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, 479 1184, 1344, 0, 768, 771, 777, 806, 0, 480 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 481 /* 1024x768@70Hz */ 482 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, 483 1184, 1328, 0, 768, 771, 777, 806, 0, 484 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 485 /* 1024x768@75Hz */ 486 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040, 487 1136, 1312, 0, 768, 769, 772, 800, 0, 488 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 489 /* 1024x768@85Hz */ 490 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072, 491 1072, 1376, 0, 768, 769, 772, 808, 0, 492 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 493 /* 1152x864@75Hz */ 494 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, 495 1344, 1600, 0, 864, 865, 868, 900, 0, 496 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 497 /* 1280x768@60Hz */ 498 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344, 499 1472, 1664, 0, 768, 771, 778, 798, 0, 500 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 501 /* 1280x768@75Hz */ 502 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360, 503 1488, 1696, 0, 768, 771, 778, 805, 0, 504 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 505 /* 1280x768@85Hz */ 506 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360, 507 1496, 1712, 0, 768, 771, 778, 809, 0, 508 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 509 /* 1280x800@60Hz */ 510 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352, 511 1480, 1680, 0, 800, 803, 809, 831, 0, 512 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 513 /* 1280x800@75Hz */ 514 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360, 515 1488, 1696, 0, 800, 803, 809, 838, 0, 516 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 517 /* 1280x800@85Hz */ 518 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360, 519 1496, 1712, 0, 800, 803, 809, 843, 0, 520 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 521 /* 1280x960@60Hz */ 522 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376, 523 1488, 1800, 0, 960, 961, 964, 1000, 0, 524 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 525 /* 1280x960@85Hz */ 526 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344, 527 1504, 1728, 0, 960, 961, 964, 1011, 0, 528 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 529 /* 1280x1024@60Hz */ 530 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328, 531 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 532 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 533 /* 1280x1024@75Hz */ 534 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, 535 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 536 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 537 /* 1280x1024@85Hz */ 538 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344, 539 1504, 1728, 0, 1024, 1025, 1028, 1072, 0, 540 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 541 /* 1360x768@60Hz */ 542 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424, 543 1536, 1792, 0, 768, 771, 777, 795, 0, 544 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 545 /* 1440x1050@60Hz */ 546 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488, 547 1632, 1864, 0, 1050, 1053, 1057, 1089, 0, 548 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 549 /* 1440x1050@75Hz */ 550 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504, 551 1648, 1896, 0, 1050, 1053, 1057, 1099, 0, 552 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 553 /* 1440x1050@85Hz */ 554 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504, 555 1656, 1912, 0, 1050, 1053, 1057, 1105, 0, 556 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 557 /* 1440x900@60Hz */ 558 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520, 559 1672, 1904, 0, 900, 903, 909, 934, 0, 560 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 561 /* 1440x900@75Hz */ 562 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536, 563 1688, 1936, 0, 900, 903, 909, 942, 0, 564 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 565 /* 1440x900@85Hz */ 566 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544, 567 1696, 1952, 0, 900, 903, 909, 948, 0, 568 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 569 /* 1600x1200@60Hz */ 570 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664, 571 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 572 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 573 /* 1600x1200@65Hz */ 574 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664, 575 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 576 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 577 /* 1600x1200@70Hz */ 578 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664, 579 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 580 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 581 /* 1600x1200@75Hz */ 582 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 2025000, 1600, 1664, 583 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 584 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 585 /* 1600x1200@85Hz */ 586 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664, 587 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 588 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 589 /* 1680x1050@60Hz */ 590 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784, 591 1960, 2240, 0, 1050, 1053, 1059, 1089, 0, 592 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 593 /* 1680x1050@75Hz */ 594 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800, 595 1976, 2272, 0, 1050, 1053, 1059, 1099, 0, 596 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 597 /* 1680x1050@85Hz */ 598 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808, 599 1984, 2288, 0, 1050, 1053, 1059, 1105, 0, 600 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 601 /* 1792x1344@60Hz */ 602 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920, 603 2120, 2448, 0, 1344, 1345, 1348, 1394, 0, 604 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 605 /* 1729x1344@75Hz */ 606 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888, 607 2104, 2456, 0, 1344, 1345, 1348, 1417, 0, 608 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 609 /* 1853x1392@60Hz */ 610 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952, 611 2176, 2528, 0, 1392, 1393, 1396, 1439, 0, 612 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 613 /* 1856x1392@75Hz */ 614 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984, 615 2208, 2560, 0, 1392, 1395, 1399, 1500, 0, 616 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 617 /* 1920x1200@60Hz */ 618 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056, 619 2256, 2592, 0, 1200, 1203, 1209, 1245, 0, 620 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 621 /* 1920x1200@75Hz */ 622 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056, 623 2264, 2608, 0, 1200, 1203, 1209, 1255, 0, 624 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 625 /* 1920x1200@85Hz */ 626 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064, 627 2272, 2624, 0, 1200, 1203, 1209, 1262, 0, 628 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 629 /* 1920x1440@60Hz */ 630 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048, 631 2256, 2600, 0, 1440, 1441, 1444, 1500, 0, 632 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 633 /* 1920x1440@75Hz */ 634 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064, 635 2288, 2640, 0, 1440, 1441, 1444, 1500, 0, 636 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 637 /* 2560x1600@60Hz */ 638 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752, 639 3032, 3504, 0, 1600, 1603, 1609, 1658, 0, 640 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 641 /* 2560x1600@75HZ */ 642 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768, 643 3048, 3536, 0, 1600, 1603, 1609, 1672, 0, 644 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 645 /* 2560x1600@85HZ */ 646 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768, 647 3048, 3536, 0, 1600, 1603, 1609, 1682, 0, 648 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 649}; 650static const int drm_num_dmt_modes = 651 sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode); 652 653static struct drm_display_mode *drm_find_dmt(struct drm_device *dev, 654 int hsize, int vsize, int fresh) 655{ 656 int i; 657 struct drm_display_mode *ptr, *mode; 658 659 mode = NULL; 660 for (i = 0; i < drm_num_dmt_modes; i++) { 661 ptr = &drm_dmt_modes[i]; 662 if (hsize == ptr->hdisplay && 663 vsize == ptr->vdisplay && 664 fresh == drm_mode_vrefresh(ptr)) { 665 /* get the expected default mode */ 666 mode = drm_mode_duplicate(dev, ptr); 667 break; 668 } 669 } 670 return mode; 671} 672 673/* 674 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old 675 * monitors fill with ascii space (0x20) instead. 676 */ 677static int 678bad_std_timing(u8 a, u8 b) 679{ 680 return (a == 0x00 && b == 0x00) || 681 (a == 0x01 && b == 0x01) || 682 (a == 0x20 && b == 0x20); 683} 684 685/** 686 * drm_mode_std - convert standard mode info (width, height, refresh) into mode 687 * @t: standard timing params 688 * @timing_level: standard timing level 689 * 690 * Take the standard timing params (in this case width, aspect, and refresh) 691 * and convert them into a real mode using CVT/GTF/DMT. 692 */ 693struct drm_display_mode *drm_mode_std(struct drm_device *dev, 694 struct std_timing *t, 695 int revision, 696 int timing_level) 697{ 698 struct drm_display_mode *mode; 699 int hsize, vsize; 700 int vrefresh_rate; 701 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK) 702 >> EDID_TIMING_ASPECT_SHIFT; 703 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK) 704 >> EDID_TIMING_VFREQ_SHIFT; 705 706 if (bad_std_timing(t->hsize, t->vfreq_aspect)) 707 return NULL; 708 709 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */ 710 hsize = t->hsize * 8 + 248; 711 /* vrefresh_rate = vfreq + 60 */ 712 vrefresh_rate = vfreq + 60; 713 /* the vdisplay is calculated based on the aspect ratio */ 714 if (aspect_ratio == 0) { 715 if (revision < 3) 716 vsize = hsize; 717 else 718 vsize = (hsize * 10) / 16; 719 } else if (aspect_ratio == 1) 720 vsize = (hsize * 3) / 4; 721 else if (aspect_ratio == 2) 722 vsize = (hsize * 4) / 5; 723 else 724 vsize = (hsize * 9) / 16; 725 /* HDTV hack */ 726 if (hsize == 1360 && vsize == 765 && vrefresh_rate == 60) { 727 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0, 728 false); 729 mode->hdisplay = 1366; 730 mode->vsync_start = mode->vsync_start - 1; 731 mode->vsync_end = mode->vsync_end - 1; 732 return mode; 733 } 734 mode = NULL; 735 /* check whether it can be found in default mode table */ 736 mode = drm_find_dmt(dev, hsize, vsize, vrefresh_rate); 737 if (mode) 738 return mode; 739 740 switch (timing_level) { 741 case LEVEL_DMT: 742 break; 743 case LEVEL_GTF: 744 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); 745 break; 746 case LEVEL_CVT: 747 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0, 748 false); 749 break; 750 } 751 return mode; 752} 753 754/* 755 * EDID is delightfully ambiguous about how interlaced modes are to be 756 * encoded. Our internal representation is of frame height, but some 757 * HDTV detailed timings are encoded as field height. 758 * 759 * The format list here is from CEA, in frame size. Technically we 760 * should be checking refresh rate too. Whatever. 761 */ 762static void 763drm_mode_do_interlace_quirk(struct drm_display_mode *mode, 764 struct detailed_pixel_timing *pt) 765{ 766 int i; 767 static const struct { 768 int w, h; 769 } cea_interlaced[] = { 770 { 1920, 1080 }, 771 { 720, 480 }, 772 { 1440, 480 }, 773 { 2880, 480 }, 774 { 720, 576 }, 775 { 1440, 576 }, 776 { 2880, 576 }, 777 }; 778 static const int n_sizes = 779 sizeof(cea_interlaced)/sizeof(cea_interlaced[0]); 780 781 if (!(pt->misc & DRM_EDID_PT_INTERLACED)) 782 return; 783 784 for (i = 0; i < n_sizes; i++) { 785 if ((mode->hdisplay == cea_interlaced[i].w) && 786 (mode->vdisplay == cea_interlaced[i].h / 2)) { 787 mode->vdisplay *= 2; 788 mode->vsync_start *= 2; 789 mode->vsync_end *= 2; 790 mode->vtotal *= 2; 791 mode->vtotal |= 1; 792 } 793 } 794 795 mode->flags |= DRM_MODE_FLAG_INTERLACE; 796} 797 798/** 799 * drm_mode_detailed - create a new mode from an EDID detailed timing section 800 * @dev: DRM device (needed to create new mode) 801 * @edid: EDID block 802 * @timing: EDID detailed timing info 803 * @quirks: quirks to apply 804 * 805 * An EDID detailed timing block contains enough info for us to create and 806 * return a new struct drm_display_mode. 807 */ 808static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, 809 struct edid *edid, 810 struct detailed_timing *timing, 811 u32 quirks) 812{ 813 struct drm_display_mode *mode; 814 struct detailed_pixel_timing *pt = &timing->data.pixel_data; 815 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; 816 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; 817 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo; 818 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; 819 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo; 820 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo; 821 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4; 822 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf); 823 824 /* ignore tiny modes */ 825 if (hactive < 64 || vactive < 64) 826 return NULL; 827 828 if (pt->misc & DRM_EDID_PT_STEREO) { 829 printk(KERN_WARNING "stereo mode not supported\n"); 830 return NULL; 831 } 832 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { 833 printk(KERN_WARNING "composite sync not supported\n"); 834 } 835 836 /* it is incorrect if hsync/vsync width is zero */ 837 if (!hsync_pulse_width || !vsync_pulse_width) { 838 DRM_DEBUG_KMS("Incorrect Detailed timing. " 839 "Wrong Hsync/Vsync pulse width\n"); 840 return NULL; 841 } 842 mode = drm_mode_create(dev); 843 if (!mode) 844 return NULL; 845 846 mode->type = DRM_MODE_TYPE_DRIVER; 847 848 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH) 849 timing->pixel_clock = cpu_to_le16(1088); 850 851 mode->clock = le16_to_cpu(timing->pixel_clock) * 10; 852 853 mode->hdisplay = hactive; 854 mode->hsync_start = mode->hdisplay + hsync_offset; 855 mode->hsync_end = mode->hsync_start + hsync_pulse_width; 856 mode->htotal = mode->hdisplay + hblank; 857 858 mode->vdisplay = vactive; 859 mode->vsync_start = mode->vdisplay + vsync_offset; 860 mode->vsync_end = mode->vsync_start + vsync_pulse_width; 861 mode->vtotal = mode->vdisplay + vblank; 862 863 /* Some EDIDs have bogus h/vtotal values */ 864 if (mode->hsync_end > mode->htotal) 865 mode->htotal = mode->hsync_end + 1; 866 if (mode->vsync_end > mode->vtotal) 867 mode->vtotal = mode->vsync_end + 1; 868 869 drm_mode_set_name(mode); 870 871 drm_mode_do_interlace_quirk(mode, pt); 872 873 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) { 874 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE; 875 } 876 877 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? 878 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 879 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? 880 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 881 882 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4; 883 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8; 884 885 if (quirks & EDID_QUIRK_DETAILED_IN_CM) { 886 mode->width_mm *= 10; 887 mode->height_mm *= 10; 888 } 889 890 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { 891 mode->width_mm = edid->width_cm * 10; 892 mode->height_mm = edid->height_cm * 10; 893 } 894 895 return mode; 896} 897 898/* 899 * Detailed mode info for the EDID "established modes" data to use. 900 */ 901static struct drm_display_mode edid_est_modes[] = { 902 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, 903 968, 1056, 0, 600, 601, 605, 628, 0, 904 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */ 905 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, 906 896, 1024, 0, 600, 601, 603, 625, 0, 907 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */ 908 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, 909 720, 840, 0, 480, 481, 484, 500, 0, 910 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */ 911 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, 912 704, 832, 0, 480, 489, 491, 520, 0, 913 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */ 914 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704, 915 768, 864, 0, 480, 483, 486, 525, 0, 916 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */ 917 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656, 918 752, 800, 0, 480, 490, 492, 525, 0, 919 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */ 920 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738, 921 846, 900, 0, 400, 421, 423, 449, 0, 922 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */ 923 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738, 924 846, 900, 0, 400, 412, 414, 449, 0, 925 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */ 926 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, 927 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 928 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */ 929 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040, 930 1136, 1312, 0, 768, 769, 772, 800, 0, 931 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */ 932 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, 933 1184, 1328, 0, 768, 771, 777, 806, 0, 934 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */ 935 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, 936 1184, 1344, 0, 768, 771, 777, 806, 0, 937 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */ 938 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032, 939 1208, 1264, 0, 768, 768, 776, 817, 0, 940 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */ 941 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864, 942 928, 1152, 0, 624, 625, 628, 667, 0, 943 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */ 944 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, 945 896, 1056, 0, 600, 601, 604, 625, 0, 946 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */ 947 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, 948 976, 1040, 0, 600, 637, 643, 666, 0, 949 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */ 950 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, 951 1344, 1600, 0, 864, 865, 868, 900, 0, 952 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */ 953}; 954 955#define EDID_EST_TIMINGS 16 956#define EDID_STD_TIMINGS 8 957#define EDID_DETAILED_TIMINGS 4 958 959/** 960 * add_established_modes - get est. modes from EDID and add them 961 * @edid: EDID block to scan 962 * 963 * Each EDID block contains a bitmap of the supported "established modes" list 964 * (defined above). Tease them out and add them to the global modes list. 965 */ 966static int add_established_modes(struct drm_connector *connector, struct edid *edid) 967{ 968 struct drm_device *dev = connector->dev; 969 unsigned long est_bits = edid->established_timings.t1 | 970 (edid->established_timings.t2 << 8) | 971 ((edid->established_timings.mfg_rsvd & 0x80) << 9); 972 int i, modes = 0; 973 974 for (i = 0; i <= EDID_EST_TIMINGS; i++) 975 if (est_bits & (1<<i)) { 976 struct drm_display_mode *newmode; 977 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]); 978 if (newmode) { 979 drm_mode_probed_add(connector, newmode); 980 modes++; 981 } 982 } 983 984 return modes; 985} 986/** 987 * stanard_timing_level - get std. timing level(CVT/GTF/DMT) 988 * @edid: EDID block to scan 989 */ 990static int standard_timing_level(struct edid *edid) 991{ 992 if (edid->revision >= 2) { 993 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)) 994 return LEVEL_CVT; 995 return LEVEL_GTF; 996 } 997 return LEVEL_DMT; 998} 999 1000/** 1001 * add_standard_modes - get std. modes from EDID and add them 1002 * @edid: EDID block to scan 1003 * 1004 * Standard modes can be calculated using the CVT standard. Grab them from 1005 * @edid, calculate them, and add them to the list. 1006 */ 1007static int add_standard_modes(struct drm_connector *connector, struct edid *edid) 1008{ 1009 struct drm_device *dev = connector->dev; 1010 int i, modes = 0; 1011 int timing_level; 1012 1013 timing_level = standard_timing_level(edid); 1014 1015 for (i = 0; i < EDID_STD_TIMINGS; i++) { 1016 struct std_timing *t = &edid->standard_timings[i]; 1017 struct drm_display_mode *newmode; 1018 1019 newmode = drm_mode_std(dev, &edid->standard_timings[i], 1020 edid->revision, timing_level); 1021 if (newmode) { 1022 drm_mode_probed_add(connector, newmode); 1023 modes++; 1024 } 1025 } 1026 1027 return modes; 1028} 1029 1030/* 1031 * XXX fix this for: 1032 * - GTF secondary curve formula 1033 * - EDID 1.4 range offsets 1034 * - CVT extended bits 1035 */ 1036static bool 1037mode_in_range(struct drm_display_mode *mode, struct detailed_timing *timing) 1038{ 1039 struct detailed_data_monitor_range *range; 1040 int hsync, vrefresh; 1041 1042 range = &timing->data.other_data.data.range; 1043 1044 hsync = drm_mode_hsync(mode); 1045 vrefresh = drm_mode_vrefresh(mode); 1046 1047 if (hsync < range->min_hfreq_khz || hsync > range->max_hfreq_khz) 1048 return false; 1049 1050 if (vrefresh < range->min_vfreq || vrefresh > range->max_vfreq) 1051 return false; 1052 1053 if (range->pixel_clock_mhz && range->pixel_clock_mhz != 0xff) { 1054 /* be forgiving since it's in units of 10MHz */ 1055 int max_clock = range->pixel_clock_mhz * 10 + 9; 1056 max_clock *= 1000; 1057 if (mode->clock > max_clock) 1058 return false; 1059 } 1060 1061 return true; 1062} 1063 1064/* 1065 * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will 1066 * need to account for them. 1067 */ 1068static int drm_gtf_modes_for_range(struct drm_connector *connector, 1069 struct detailed_timing *timing) 1070{ 1071 int i, modes = 0; 1072 struct drm_display_mode *newmode; 1073 struct drm_device *dev = connector->dev; 1074 1075 for (i = 0; i < drm_num_dmt_modes; i++) { 1076 if (mode_in_range(drm_dmt_modes + i, timing)) { 1077 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]); 1078 if (newmode) { 1079 drm_mode_probed_add(connector, newmode); 1080 modes++; 1081 } 1082 } 1083 } 1084 1085 return modes; 1086} 1087 1088static int drm_cvt_modes(struct drm_connector *connector, 1089 struct detailed_timing *timing) 1090{ 1091 int i, j, modes = 0; 1092 struct drm_display_mode *newmode; 1093 struct drm_device *dev = connector->dev; 1094 struct cvt_timing *cvt; 1095 const int rates[] = { 60, 85, 75, 60, 50 }; 1096 const u8 empty[3] = { 0, 0, 0 }; 1097 1098 for (i = 0; i < 4; i++) { 1099 int uninitialized_var(width), height; 1100 cvt = &(timing->data.other_data.data.cvt[i]); 1101 1102 if (!memcmp(cvt->code, empty, 3)) 1103 continue; 1104 1105 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2; 1106 switch (cvt->code[1] & 0x0c) { 1107 case 0x00: 1108 width = height * 4 / 3; 1109 break; 1110 case 0x04: 1111 width = height * 16 / 9; 1112 break; 1113 case 0x08: 1114 width = height * 16 / 10; 1115 break; 1116 case 0x0c: 1117 width = height * 15 / 9; 1118 break; 1119 } 1120 1121 for (j = 1; j < 5; j++) { 1122 if (cvt->code[2] & (1 << j)) { 1123 newmode = drm_cvt_mode(dev, width, height, 1124 rates[j], j == 0, 1125 false, false); 1126 if (newmode) { 1127 drm_mode_probed_add(connector, newmode); 1128 modes++; 1129 } 1130 } 1131 } 1132 } 1133 1134 return modes; 1135} 1136 1137static int add_detailed_modes(struct drm_connector *connector, 1138 struct detailed_timing *timing, 1139 struct edid *edid, u32 quirks, int preferred) 1140{ 1141 int i, modes = 0; 1142 struct detailed_non_pixel *data = &timing->data.other_data; 1143 int timing_level = standard_timing_level(edid); 1144 int gtf = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF); 1145 struct drm_display_mode *newmode; 1146 struct drm_device *dev = connector->dev; 1147 1148 if (timing->pixel_clock) { 1149 newmode = drm_mode_detailed(dev, edid, timing, quirks); 1150 if (!newmode) 1151 return 0; 1152 1153 if (preferred) 1154 newmode->type |= DRM_MODE_TYPE_PREFERRED; 1155 1156 drm_mode_probed_add(connector, newmode); 1157 return 1; 1158 } 1159 1160 /* other timing types */ 1161 switch (data->type) { 1162 case EDID_DETAIL_MONITOR_RANGE: 1163 if (gtf) 1164 modes += drm_gtf_modes_for_range(connector, timing); 1165 break; 1166 case EDID_DETAIL_STD_MODES: 1167 /* Six modes per detailed section */ 1168 for (i = 0; i < 6; i++) { 1169 struct std_timing *std; 1170 struct drm_display_mode *newmode; 1171 1172 std = &data->data.timings[i]; 1173 newmode = drm_mode_std(dev, std, edid->revision, 1174 timing_level); 1175 if (newmode) { 1176 drm_mode_probed_add(connector, newmode); 1177 modes++; 1178 } 1179 } 1180 break; 1181 case EDID_DETAIL_CVT_3BYTE: 1182 modes += drm_cvt_modes(connector, timing); 1183 break; 1184 default: 1185 break; 1186 } 1187 1188 return modes; 1189} 1190 1191/** 1192 * add_detailed_info - get detailed mode info from EDID data 1193 * @connector: attached connector 1194 * @edid: EDID block to scan 1195 * @quirks: quirks to apply 1196 * 1197 * Some of the detailed timing sections may contain mode information. Grab 1198 * it and add it to the list. 1199 */ 1200static int add_detailed_info(struct drm_connector *connector, 1201 struct edid *edid, u32 quirks) 1202{ 1203 int i, modes = 0; 1204 1205 for (i = 0; i < EDID_DETAILED_TIMINGS; i++) { 1206 struct detailed_timing *timing = &edid->detailed_timings[i]; 1207 int preferred = (i == 0) && (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING); 1208 1209 /* In 1.0, only timings are allowed */ 1210 if (!timing->pixel_clock && edid->version == 1 && 1211 edid->revision == 0) 1212 continue; 1213 1214 modes += add_detailed_modes(connector, timing, edid, quirks, 1215 preferred); 1216 } 1217 1218 return modes; 1219} 1220 1221/** 1222 * add_detailed_mode_eedid - get detailed mode info from addtional timing 1223 * EDID block 1224 * @connector: attached connector 1225 * @edid: EDID block to scan(It is only to get addtional timing EDID block) 1226 * @quirks: quirks to apply 1227 * 1228 * Some of the detailed timing sections may contain mode information. Grab 1229 * it and add it to the list. 1230 */ 1231static int add_detailed_info_eedid(struct drm_connector *connector, 1232 struct edid *edid, u32 quirks) 1233{ 1234 int i, modes = 0; 1235 char *edid_ext = NULL; 1236 struct detailed_timing *timing; 1237 int edid_ext_num; 1238 int start_offset, end_offset; 1239 int timing_level; 1240 1241 if (edid->version == 1 && edid->revision < 3) { 1242 /* If the EDID version is less than 1.3, there is no 1243 * extension EDID. 1244 */ 1245 return 0; 1246 } 1247 if (!edid->extensions) { 1248 /* if there is no extension EDID, it is unnecessary to 1249 * parse the E-EDID to get detailed info 1250 */ 1251 return 0; 1252 } 1253 1254 /* Chose real EDID extension number */ 1255 edid_ext_num = edid->extensions > DRM_MAX_EDID_EXT_NUM ? 1256 DRM_MAX_EDID_EXT_NUM : edid->extensions; 1257 1258 /* Find CEA extension */ 1259 for (i = 0; i < edid_ext_num; i++) { 1260 edid_ext = (char *)edid + EDID_LENGTH * (i + 1); 1261 /* This block is CEA extension */ 1262 if (edid_ext[0] == 0x02) 1263 break; 1264 } 1265 1266 if (i == edid_ext_num) { 1267 /* if there is no additional timing EDID block, return */ 1268 return 0; 1269 } 1270 1271 /* Get the start offset of detailed timing block */ 1272 start_offset = edid_ext[2]; 1273 if (start_offset == 0) { 1274 /* If the start_offset is zero, it means that neither detailed 1275 * info nor data block exist. In such case it is also 1276 * unnecessary to parse the detailed timing info. 1277 */ 1278 return 0; 1279 } 1280 1281 timing_level = standard_timing_level(edid); 1282 end_offset = EDID_LENGTH; 1283 end_offset -= sizeof(struct detailed_timing); 1284 for (i = start_offset; i < end_offset; 1285 i += sizeof(struct detailed_timing)) { 1286 timing = (struct detailed_timing *)(edid_ext + i); 1287 modes += add_detailed_modes(connector, timing, edid, quirks, 0); 1288 } 1289 1290 return modes; 1291} 1292 1293#define HDMI_IDENTIFIER 0x000C03 1294#define VENDOR_BLOCK 0x03 1295/** 1296 * drm_detect_hdmi_monitor - detect whether monitor is hdmi. 1297 * @edid: monitor EDID information 1298 * 1299 * Parse the CEA extension according to CEA-861-B. 1300 * Return true if HDMI, false if not or unknown. 1301 */ 1302bool drm_detect_hdmi_monitor(struct edid *edid) 1303{ 1304 char *edid_ext = NULL; 1305 int i, hdmi_id, edid_ext_num; 1306 int start_offset, end_offset; 1307 bool is_hdmi = false; 1308 1309 /* No EDID or EDID extensions */ 1310 if (edid == NULL || edid->extensions == 0) 1311 goto end; 1312 1313 /* Chose real EDID extension number */ 1314 edid_ext_num = edid->extensions > DRM_MAX_EDID_EXT_NUM ? 1315 DRM_MAX_EDID_EXT_NUM : edid->extensions; 1316 1317 /* Find CEA extension */ 1318 for (i = 0; i < edid_ext_num; i++) { 1319 edid_ext = (char *)edid + EDID_LENGTH * (i + 1); 1320 /* This block is CEA extension */ 1321 if (edid_ext[0] == 0x02) 1322 break; 1323 } 1324 1325 if (i == edid_ext_num) 1326 goto end; 1327 1328 /* Data block offset in CEA extension block */ 1329 start_offset = 4; 1330 end_offset = edid_ext[2]; 1331 1332 /* 1333 * Because HDMI identifier is in Vendor Specific Block, 1334 * search it from all data blocks of CEA extension. 1335 */ 1336 for (i = start_offset; i < end_offset; 1337 /* Increased by data block len */ 1338 i += ((edid_ext[i] & 0x1f) + 1)) { 1339 /* Find vendor specific block */ 1340 if ((edid_ext[i] >> 5) == VENDOR_BLOCK) { 1341 hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) | 1342 edid_ext[i + 3] << 16; 1343 /* Find HDMI identifier */ 1344 if (hdmi_id == HDMI_IDENTIFIER) 1345 is_hdmi = true; 1346 break; 1347 } 1348 } 1349 1350end: 1351 return is_hdmi; 1352} 1353EXPORT_SYMBOL(drm_detect_hdmi_monitor); 1354 1355/** 1356 * drm_add_edid_modes - add modes from EDID data, if available 1357 * @connector: connector we're probing 1358 * @edid: edid data 1359 * 1360 * Add the specified modes to the connector's mode list. 1361 * 1362 * Return number of modes added or 0 if we couldn't find any. 1363 */ 1364int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid) 1365{ 1366 int num_modes = 0; 1367 u32 quirks; 1368 1369 if (edid == NULL) { 1370 return 0; 1371 } 1372 if (!drm_edid_is_valid(edid)) { 1373 dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n", 1374 drm_get_connector_name(connector)); 1375 return 0; 1376 } 1377 1378 quirks = edid_get_quirks(edid); 1379 1380 num_modes += add_established_modes(connector, edid); 1381 num_modes += add_standard_modes(connector, edid); 1382 num_modes += add_detailed_info(connector, edid, quirks); 1383 num_modes += add_detailed_info_eedid(connector, edid, quirks); 1384 1385 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75)) 1386 edid_fixup_preferred(connector, quirks); 1387 1388 connector->display_info.serration_vsync = (edid->input & DRM_EDID_INPUT_SERRATION_VSYNC) ? 1 : 0; 1389 connector->display_info.sync_on_green = (edid->input & DRM_EDID_INPUT_SYNC_ON_GREEN) ? 1 : 0; 1390 connector->display_info.composite_sync = (edid->input & DRM_EDID_INPUT_COMPOSITE_SYNC) ? 1 : 0; 1391 connector->display_info.separate_syncs = (edid->input & DRM_EDID_INPUT_SEPARATE_SYNCS) ? 1 : 0; 1392 connector->display_info.blank_to_black = (edid->input & DRM_EDID_INPUT_BLANK_TO_BLACK) ? 1 : 0; 1393 connector->display_info.video_level = (edid->input & DRM_EDID_INPUT_VIDEO_LEVEL) >> 5; 1394 connector->display_info.digital = (edid->input & DRM_EDID_INPUT_DIGITAL) ? 1 : 0; 1395 connector->display_info.width_mm = edid->width_cm * 10; 1396 connector->display_info.height_mm = edid->height_cm * 10; 1397 connector->display_info.gamma = edid->gamma; 1398 connector->display_info.gtf_supported = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) ? 1 : 0; 1399 connector->display_info.standard_color = (edid->features & DRM_EDID_FEATURE_STANDARD_COLOR) ? 1 : 0; 1400 connector->display_info.display_type = (edid->features & DRM_EDID_FEATURE_DISPLAY_TYPE) >> 3; 1401 connector->display_info.active_off_supported = (edid->features & DRM_EDID_FEATURE_PM_ACTIVE_OFF) ? 1 : 0; 1402 connector->display_info.suspend_supported = (edid->features & DRM_EDID_FEATURE_PM_SUSPEND) ? 1 : 0; 1403 connector->display_info.standby_supported = (edid->features & DRM_EDID_FEATURE_PM_STANDBY) ? 1 : 0; 1404 connector->display_info.gamma = edid->gamma; 1405 1406 return num_modes; 1407} 1408EXPORT_SYMBOL(drm_add_edid_modes); 1409 1410/** 1411 * drm_add_modes_noedid - add modes for the connectors without EDID 1412 * @connector: connector we're probing 1413 * @hdisplay: the horizontal display limit 1414 * @vdisplay: the vertical display limit 1415 * 1416 * Add the specified modes to the connector's mode list. Only when the 1417 * hdisplay/vdisplay is not beyond the given limit, it will be added. 1418 * 1419 * Return number of modes added or 0 if we couldn't find any. 1420 */ 1421int drm_add_modes_noedid(struct drm_connector *connector, 1422 int hdisplay, int vdisplay) 1423{ 1424 int i, count, num_modes = 0; 1425 struct drm_display_mode *mode, *ptr; 1426 struct drm_device *dev = connector->dev; 1427 1428 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode); 1429 if (hdisplay < 0) 1430 hdisplay = 0; 1431 if (vdisplay < 0) 1432 vdisplay = 0; 1433 1434 for (i = 0; i < count; i++) { 1435 ptr = &drm_dmt_modes[i]; 1436 if (hdisplay && vdisplay) { 1437 /* 1438 * Only when two are valid, they will be used to check 1439 * whether the mode should be added to the mode list of 1440 * the connector. 1441 */ 1442 if (ptr->hdisplay > hdisplay || 1443 ptr->vdisplay > vdisplay) 1444 continue; 1445 } 1446 if (drm_mode_vrefresh(ptr) > 61) 1447 continue; 1448 mode = drm_mode_duplicate(dev, ptr); 1449 if (mode) { 1450 drm_mode_probed_add(connector, mode); 1451 num_modes++; 1452 } 1453 } 1454 return num_modes; 1455} 1456EXPORT_SYMBOL(drm_add_modes_noedid); 1457