drm_edid.c revision 44fef22416886a04d432043f741a6faf2c6ffefd
1/* 2 * Copyright (c) 2006 Luc Verhaegen (quirks list) 3 * Copyright (c) 2007-2008 Intel Corporation 4 * Jesse Barnes <jesse.barnes@intel.com> 5 * 6 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from 7 * FB layer. 8 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com> 9 * 10 * Permission is hereby granted, free of charge, to any person obtaining a 11 * copy of this software and associated documentation files (the "Software"), 12 * to deal in the Software without restriction, including without limitation 13 * the rights to use, copy, modify, merge, publish, distribute, sub license, 14 * and/or sell copies of the Software, and to permit persons to whom the 15 * Software is furnished to do so, subject to the following conditions: 16 * 17 * The above copyright notice and this permission notice (including the 18 * next paragraph) shall be included in all copies or substantial portions 19 * of the Software. 20 * 21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 22 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 23 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 24 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 25 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 26 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 27 * DEALINGS IN THE SOFTWARE. 28 */ 29#include <linux/kernel.h> 30#include <linux/i2c.h> 31#include <linux/i2c-algo-bit.h> 32#include "drmP.h" 33#include "drm_edid.h" 34 35/* 36 * TODO: 37 * - support EDID 1.4 (incl. CE blocks) 38 */ 39 40/* 41 * EDID blocks out in the wild have a variety of bugs, try to collect 42 * them here (note that userspace may work around broken monitors first, 43 * but fixes should make their way here so that the kernel "just works" 44 * on as many displays as possible). 45 */ 46 47/* First detailed mode wrong, use largest 60Hz mode */ 48#define EDID_QUIRK_PREFER_LARGE_60 (1 << 0) 49/* Reported 135MHz pixel clock is too high, needs adjustment */ 50#define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1) 51/* Prefer the largest mode at 75 Hz */ 52#define EDID_QUIRK_PREFER_LARGE_75 (1 << 2) 53/* Detail timing is in cm not mm */ 54#define EDID_QUIRK_DETAILED_IN_CM (1 << 3) 55/* Detailed timing descriptors have bogus size values, so just take the 56 * maximum size and use that. 57 */ 58#define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4) 59/* Monitor forgot to set the first detailed is preferred bit. */ 60#define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5) 61/* use +hsync +vsync for detailed mode */ 62#define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6) 63 64 65#define LEVEL_DMT 0 66#define LEVEL_GTF 1 67#define LEVEL_CVT 2 68 69static struct edid_quirk { 70 char *vendor; 71 int product_id; 72 u32 quirks; 73} edid_quirk_list[] = { 74 /* Acer AL1706 */ 75 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 }, 76 /* Acer F51 */ 77 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 }, 78 /* Unknown Acer */ 79 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 80 81 /* Belinea 10 15 55 */ 82 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 }, 83 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 }, 84 85 /* Envision Peripherals, Inc. EN-7100e */ 86 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH }, 87 88 /* Funai Electronics PM36B */ 89 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 | 90 EDID_QUIRK_DETAILED_IN_CM }, 91 92 /* LG Philips LCD LP154W01-A5 */ 93 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, 94 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, 95 96 /* Philips 107p5 CRT */ 97 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 98 99 /* Proview AY765C */ 100 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 101 102 /* Samsung SyncMaster 205BW. Note: irony */ 103 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP }, 104 /* Samsung SyncMaster 22[5-6]BW */ 105 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 }, 106 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 }, 107}; 108 109 110/* Valid EDID header has these bytes */ 111static const u8 edid_header[] = { 112 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 113}; 114 115/** 116 * drm_edid_is_valid - sanity check EDID data 117 * @edid: EDID data 118 * 119 * Sanity check the EDID block by looking at the header, the version number 120 * and the checksum. Return 0 if the EDID doesn't check out, or 1 if it's 121 * valid. 122 */ 123bool drm_edid_is_valid(struct edid *edid) 124{ 125 int i, score = 0; 126 u8 csum = 0; 127 u8 *raw_edid = (u8 *)edid; 128 129 for (i = 0; i < sizeof(edid_header); i++) 130 if (raw_edid[i] == edid_header[i]) 131 score++; 132 133 if (score == 8) ; 134 else if (score >= 6) { 135 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n"); 136 memcpy(raw_edid, edid_header, sizeof(edid_header)); 137 } else 138 goto bad; 139 140 for (i = 0; i < EDID_LENGTH; i++) 141 csum += raw_edid[i]; 142 if (csum) { 143 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum); 144 goto bad; 145 } 146 147 if (edid->version != 1) { 148 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version); 149 goto bad; 150 } 151 152 if (edid->revision > 4) 153 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n"); 154 155 return 1; 156 157bad: 158 if (raw_edid) { 159 DRM_ERROR("Raw EDID:\n"); 160 print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH); 161 printk("\n"); 162 } 163 return 0; 164} 165EXPORT_SYMBOL(drm_edid_is_valid); 166 167/** 168 * edid_vendor - match a string against EDID's obfuscated vendor field 169 * @edid: EDID to match 170 * @vendor: vendor string 171 * 172 * Returns true if @vendor is in @edid, false otherwise 173 */ 174static bool edid_vendor(struct edid *edid, char *vendor) 175{ 176 char edid_vendor[3]; 177 178 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@'; 179 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) | 180 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@'; 181 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@'; 182 183 return !strncmp(edid_vendor, vendor, 3); 184} 185 186/** 187 * edid_get_quirks - return quirk flags for a given EDID 188 * @edid: EDID to process 189 * 190 * This tells subsequent routines what fixes they need to apply. 191 */ 192static u32 edid_get_quirks(struct edid *edid) 193{ 194 struct edid_quirk *quirk; 195 int i; 196 197 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) { 198 quirk = &edid_quirk_list[i]; 199 200 if (edid_vendor(edid, quirk->vendor) && 201 (EDID_PRODUCT_ID(edid) == quirk->product_id)) 202 return quirk->quirks; 203 } 204 205 return 0; 206} 207 208#define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay) 209#define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh)) 210 211 212/** 213 * edid_fixup_preferred - set preferred modes based on quirk list 214 * @connector: has mode list to fix up 215 * @quirks: quirks list 216 * 217 * Walk the mode list for @connector, clearing the preferred status 218 * on existing modes and setting it anew for the right mode ala @quirks. 219 */ 220static void edid_fixup_preferred(struct drm_connector *connector, 221 u32 quirks) 222{ 223 struct drm_display_mode *t, *cur_mode, *preferred_mode; 224 int target_refresh = 0; 225 226 if (list_empty(&connector->probed_modes)) 227 return; 228 229 if (quirks & EDID_QUIRK_PREFER_LARGE_60) 230 target_refresh = 60; 231 if (quirks & EDID_QUIRK_PREFER_LARGE_75) 232 target_refresh = 75; 233 234 preferred_mode = list_first_entry(&connector->probed_modes, 235 struct drm_display_mode, head); 236 237 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) { 238 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED; 239 240 if (cur_mode == preferred_mode) 241 continue; 242 243 /* Largest mode is preferred */ 244 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode)) 245 preferred_mode = cur_mode; 246 247 /* At a given size, try to get closest to target refresh */ 248 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) && 249 MODE_REFRESH_DIFF(cur_mode, target_refresh) < 250 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) { 251 preferred_mode = cur_mode; 252 } 253 } 254 255 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED; 256} 257 258/* 259 * Add the Autogenerated from the DMT spec. 260 * This table is copied from xfree86/modes/xf86EdidModes.c. 261 * But the mode with Reduced blank feature is deleted. 262 */ 263static struct drm_display_mode drm_dmt_modes[] = { 264 /* 640x350@85Hz */ 265 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, 266 736, 832, 0, 350, 382, 385, 445, 0, 267 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 268 /* 640x400@85Hz */ 269 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, 270 736, 832, 0, 400, 401, 404, 445, 0, 271 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 272 /* 720x400@85Hz */ 273 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756, 274 828, 936, 0, 400, 401, 404, 446, 0, 275 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 276 /* 640x480@60Hz */ 277 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, 278 752, 800, 0, 480, 489, 492, 525, 0, 279 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 280 /* 640x480@72Hz */ 281 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, 282 704, 832, 0, 480, 489, 492, 520, 0, 283 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 284 /* 640x480@75Hz */ 285 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, 286 720, 840, 0, 480, 481, 484, 500, 0, 287 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 288 /* 640x480@85Hz */ 289 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696, 290 752, 832, 0, 480, 481, 484, 509, 0, 291 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 292 /* 800x600@56Hz */ 293 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, 294 896, 1024, 0, 600, 601, 603, 625, 0, 295 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 296 /* 800x600@60Hz */ 297 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, 298 968, 1056, 0, 600, 601, 605, 628, 0, 299 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 300 /* 800x600@72Hz */ 301 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, 302 976, 1040, 0, 600, 637, 643, 666, 0, 303 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 304 /* 800x600@75Hz */ 305 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, 306 896, 1056, 0, 600, 601, 604, 625, 0, 307 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 308 /* 800x600@85Hz */ 309 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832, 310 896, 1048, 0, 600, 601, 604, 631, 0, 311 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 312 /* 848x480@60Hz */ 313 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864, 314 976, 1088, 0, 480, 486, 494, 517, 0, 315 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 316 /* 1024x768@43Hz, interlace */ 317 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032, 318 1208, 1264, 0, 768, 768, 772, 817, 0, 319 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 320 DRM_MODE_FLAG_INTERLACE) }, 321 /* 1024x768@60Hz */ 322 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, 323 1184, 1344, 0, 768, 771, 777, 806, 0, 324 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 325 /* 1024x768@70Hz */ 326 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, 327 1184, 1328, 0, 768, 771, 777, 806, 0, 328 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 329 /* 1024x768@75Hz */ 330 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040, 331 1136, 1312, 0, 768, 769, 772, 800, 0, 332 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 333 /* 1024x768@85Hz */ 334 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072, 335 1072, 1376, 0, 768, 769, 772, 808, 0, 336 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 337 /* 1152x864@75Hz */ 338 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, 339 1344, 1600, 0, 864, 865, 868, 900, 0, 340 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 341 /* 1280x768@60Hz */ 342 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344, 343 1472, 1664, 0, 768, 771, 778, 798, 0, 344 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 345 /* 1280x768@75Hz */ 346 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360, 347 1488, 1696, 0, 768, 771, 778, 805, 0, 348 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 349 /* 1280x768@85Hz */ 350 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360, 351 1496, 1712, 0, 768, 771, 778, 809, 0, 352 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 353 /* 1280x800@60Hz */ 354 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352, 355 1480, 1680, 0, 800, 803, 809, 831, 0, 356 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 357 /* 1280x800@75Hz */ 358 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360, 359 1488, 1696, 0, 800, 803, 809, 838, 0, 360 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 361 /* 1280x800@85Hz */ 362 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360, 363 1496, 1712, 0, 800, 803, 809, 843, 0, 364 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 365 /* 1280x960@60Hz */ 366 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376, 367 1488, 1800, 0, 960, 961, 964, 1000, 0, 368 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 369 /* 1280x960@85Hz */ 370 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344, 371 1504, 1728, 0, 960, 961, 964, 1011, 0, 372 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 373 /* 1280x1024@60Hz */ 374 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328, 375 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 376 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 377 /* 1280x1024@75Hz */ 378 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, 379 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 380 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 381 /* 1280x1024@85Hz */ 382 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344, 383 1504, 1728, 0, 1024, 1025, 1028, 1072, 0, 384 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 385 /* 1360x768@60Hz */ 386 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424, 387 1536, 1792, 0, 768, 771, 777, 795, 0, 388 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 389 /* 1440x1050@60Hz */ 390 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488, 391 1632, 1864, 0, 1050, 1053, 1057, 1089, 0, 392 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 393 /* 1440x1050@75Hz */ 394 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504, 395 1648, 1896, 0, 1050, 1053, 1057, 1099, 0, 396 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 397 /* 1440x1050@85Hz */ 398 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504, 399 1656, 1912, 0, 1050, 1053, 1057, 1105, 0, 400 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 401 /* 1440x900@60Hz */ 402 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520, 403 1672, 1904, 0, 900, 903, 909, 934, 0, 404 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 405 /* 1440x900@75Hz */ 406 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536, 407 1688, 1936, 0, 900, 903, 909, 942, 0, 408 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 409 /* 1440x900@85Hz */ 410 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544, 411 1696, 1952, 0, 900, 903, 909, 948, 0, 412 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 413 /* 1600x1200@60Hz */ 414 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664, 415 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 416 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 417 /* 1600x1200@65Hz */ 418 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664, 419 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 420 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 421 /* 1600x1200@70Hz */ 422 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664, 423 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 424 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 425 /* 1600x1200@75Hz */ 426 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 2025000, 1600, 1664, 427 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 428 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 429 /* 1600x1200@85Hz */ 430 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664, 431 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 432 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 433 /* 1680x1050@60Hz */ 434 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784, 435 1960, 2240, 0, 1050, 1053, 1059, 1089, 0, 436 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 437 /* 1680x1050@75Hz */ 438 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800, 439 1976, 2272, 0, 1050, 1053, 1059, 1099, 0, 440 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 441 /* 1680x1050@85Hz */ 442 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808, 443 1984, 2288, 0, 1050, 1053, 1059, 1105, 0, 444 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 445 /* 1792x1344@60Hz */ 446 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920, 447 2120, 2448, 0, 1344, 1345, 1348, 1394, 0, 448 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 449 /* 1729x1344@75Hz */ 450 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888, 451 2104, 2456, 0, 1344, 1345, 1348, 1417, 0, 452 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 453 /* 1853x1392@60Hz */ 454 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952, 455 2176, 2528, 0, 1392, 1393, 1396, 1439, 0, 456 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 457 /* 1856x1392@75Hz */ 458 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984, 459 2208, 2560, 0, 1392, 1395, 1399, 1500, 0, 460 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 461 /* 1920x1200@60Hz */ 462 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056, 463 2256, 2592, 0, 1200, 1203, 1209, 1245, 0, 464 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 465 /* 1920x1200@75Hz */ 466 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056, 467 2264, 2608, 0, 1200, 1203, 1209, 1255, 0, 468 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 469 /* 1920x1200@85Hz */ 470 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064, 471 2272, 2624, 0, 1200, 1203, 1209, 1262, 0, 472 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 473 /* 1920x1440@60Hz */ 474 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048, 475 2256, 2600, 0, 1440, 1441, 1444, 1500, 0, 476 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 477 /* 1920x1440@75Hz */ 478 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064, 479 2288, 2640, 0, 1440, 1441, 1444, 1500, 0, 480 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 481 /* 2560x1600@60Hz */ 482 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752, 483 3032, 3504, 0, 1600, 1603, 1609, 1658, 0, 484 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 485 /* 2560x1600@75HZ */ 486 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768, 487 3048, 3536, 0, 1600, 1603, 1609, 1672, 0, 488 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 489 /* 2560x1600@85HZ */ 490 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768, 491 3048, 3536, 0, 1600, 1603, 1609, 1682, 0, 492 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 493}; 494static const int drm_num_dmt_modes = 495 sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode); 496 497static struct drm_display_mode *drm_find_dmt(struct drm_device *dev, 498 int hsize, int vsize, int fresh) 499{ 500 int i; 501 struct drm_display_mode *ptr, *mode; 502 503 mode = NULL; 504 for (i = 0; i < drm_num_dmt_modes; i++) { 505 ptr = &drm_dmt_modes[i]; 506 if (hsize == ptr->hdisplay && 507 vsize == ptr->vdisplay && 508 fresh == drm_mode_vrefresh(ptr)) { 509 /* get the expected default mode */ 510 mode = drm_mode_duplicate(dev, ptr); 511 break; 512 } 513 } 514 return mode; 515} 516 517/* 518 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old 519 * monitors fill with ascii space (0x20) instead. 520 */ 521static int 522bad_std_timing(u8 a, u8 b) 523{ 524 return (a == 0x00 && b == 0x00) || 525 (a == 0x01 && b == 0x01) || 526 (a == 0x20 && b == 0x20); 527} 528 529/** 530 * drm_mode_std - convert standard mode info (width, height, refresh) into mode 531 * @t: standard timing params 532 * @timing_level: standard timing level 533 * 534 * Take the standard timing params (in this case width, aspect, and refresh) 535 * and convert them into a real mode using CVT/GTF/DMT. 536 * 537 * Punts for now, but should eventually use the FB layer's CVT based mode 538 * generation code. 539 */ 540struct drm_display_mode *drm_mode_std(struct drm_device *dev, 541 struct std_timing *t, 542 int revision, 543 int timing_level) 544{ 545 struct drm_display_mode *mode; 546 int hsize, vsize; 547 int vrefresh_rate; 548 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK) 549 >> EDID_TIMING_ASPECT_SHIFT; 550 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK) 551 >> EDID_TIMING_VFREQ_SHIFT; 552 553 if (bad_std_timing(t->hsize, t->vfreq_aspect)) 554 return NULL; 555 556 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */ 557 hsize = t->hsize * 8 + 248; 558 /* vrefresh_rate = vfreq + 60 */ 559 vrefresh_rate = vfreq + 60; 560 /* the vdisplay is calculated based on the aspect ratio */ 561 if (aspect_ratio == 0) { 562 if (revision < 3) 563 vsize = hsize; 564 else 565 vsize = (hsize * 10) / 16; 566 } else if (aspect_ratio == 1) 567 vsize = (hsize * 3) / 4; 568 else if (aspect_ratio == 2) 569 vsize = (hsize * 4) / 5; 570 else 571 vsize = (hsize * 9) / 16; 572 /* HDTV hack */ 573 if (hsize == 1360 && vsize == 765 && vrefresh_rate == 60) { 574 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0, 575 false); 576 mode->hdisplay = 1366; 577 mode->vsync_start = mode->vsync_start - 1; 578 mode->vsync_end = mode->vsync_end - 1; 579 return mode; 580 } 581 mode = NULL; 582 /* check whether it can be found in default mode table */ 583 mode = drm_find_dmt(dev, hsize, vsize, vrefresh_rate); 584 if (mode) 585 return mode; 586 587 switch (timing_level) { 588 case LEVEL_DMT: 589 break; 590 case LEVEL_GTF: 591 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); 592 break; 593 case LEVEL_CVT: 594 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0, 595 false); 596 break; 597 } 598 return mode; 599} 600 601/* 602 * EDID is delightfully ambiguous about how interlaced modes are to be 603 * encoded. Our internal representation is of frame height, but some 604 * HDTV detailed timings are encoded as field height. 605 * 606 * The format list here is from CEA, in frame size. Technically we 607 * should be checking refresh rate too. Whatever. 608 */ 609static void 610drm_mode_do_interlace_quirk(struct drm_display_mode *mode, 611 struct detailed_pixel_timing *pt) 612{ 613 int i; 614 static const struct { 615 int w, h; 616 } cea_interlaced[] = { 617 { 1920, 1080 }, 618 { 720, 480 }, 619 { 1440, 480 }, 620 { 2880, 480 }, 621 { 720, 576 }, 622 { 1440, 576 }, 623 { 2880, 576 }, 624 }; 625 static const int n_sizes = 626 sizeof(cea_interlaced)/sizeof(cea_interlaced[0]); 627 628 if (!(pt->misc & DRM_EDID_PT_INTERLACED)) 629 return; 630 631 for (i = 0; i < n_sizes; i++) { 632 if ((mode->hdisplay == cea_interlaced[i].w) && 633 (mode->vdisplay == cea_interlaced[i].h / 2)) { 634 mode->vdisplay *= 2; 635 mode->vsync_start *= 2; 636 mode->vsync_end *= 2; 637 mode->vtotal *= 2; 638 mode->vtotal |= 1; 639 } 640 } 641 642 mode->flags |= DRM_MODE_FLAG_INTERLACE; 643} 644 645/** 646 * drm_mode_detailed - create a new mode from an EDID detailed timing section 647 * @dev: DRM device (needed to create new mode) 648 * @edid: EDID block 649 * @timing: EDID detailed timing info 650 * @quirks: quirks to apply 651 * 652 * An EDID detailed timing block contains enough info for us to create and 653 * return a new struct drm_display_mode. 654 */ 655static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, 656 struct edid *edid, 657 struct detailed_timing *timing, 658 u32 quirks) 659{ 660 struct drm_display_mode *mode; 661 struct detailed_pixel_timing *pt = &timing->data.pixel_data; 662 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; 663 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; 664 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo; 665 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; 666 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo; 667 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo; 668 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4; 669 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf); 670 671 /* ignore tiny modes */ 672 if (hactive < 64 || vactive < 64) 673 return NULL; 674 675 if (pt->misc & DRM_EDID_PT_STEREO) { 676 printk(KERN_WARNING "stereo mode not supported\n"); 677 return NULL; 678 } 679 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { 680 printk(KERN_WARNING "composite sync not supported\n"); 681 } 682 683 /* it is incorrect if hsync/vsync width is zero */ 684 if (!hsync_pulse_width || !vsync_pulse_width) { 685 DRM_DEBUG_KMS("Incorrect Detailed timing. " 686 "Wrong Hsync/Vsync pulse width\n"); 687 return NULL; 688 } 689 mode = drm_mode_create(dev); 690 if (!mode) 691 return NULL; 692 693 mode->type = DRM_MODE_TYPE_DRIVER; 694 695 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH) 696 timing->pixel_clock = cpu_to_le16(1088); 697 698 mode->clock = le16_to_cpu(timing->pixel_clock) * 10; 699 700 mode->hdisplay = hactive; 701 mode->hsync_start = mode->hdisplay + hsync_offset; 702 mode->hsync_end = mode->hsync_start + hsync_pulse_width; 703 mode->htotal = mode->hdisplay + hblank; 704 705 mode->vdisplay = vactive; 706 mode->vsync_start = mode->vdisplay + vsync_offset; 707 mode->vsync_end = mode->vsync_start + vsync_pulse_width; 708 mode->vtotal = mode->vdisplay + vblank; 709 710 /* Some EDIDs have bogus h/vtotal values */ 711 if (mode->hsync_end > mode->htotal) 712 mode->htotal = mode->hsync_end + 1; 713 if (mode->vsync_end > mode->vtotal) 714 mode->vtotal = mode->vsync_end + 1; 715 716 drm_mode_set_name(mode); 717 718 drm_mode_do_interlace_quirk(mode, pt); 719 720 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) { 721 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE; 722 } 723 724 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? 725 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 726 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? 727 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 728 729 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4; 730 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8; 731 732 if (quirks & EDID_QUIRK_DETAILED_IN_CM) { 733 mode->width_mm *= 10; 734 mode->height_mm *= 10; 735 } 736 737 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { 738 mode->width_mm = edid->width_cm * 10; 739 mode->height_mm = edid->height_cm * 10; 740 } 741 742 return mode; 743} 744 745/* 746 * Detailed mode info for the EDID "established modes" data to use. 747 */ 748static struct drm_display_mode edid_est_modes[] = { 749 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, 750 968, 1056, 0, 600, 601, 605, 628, 0, 751 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */ 752 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, 753 896, 1024, 0, 600, 601, 603, 625, 0, 754 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */ 755 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, 756 720, 840, 0, 480, 481, 484, 500, 0, 757 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */ 758 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, 759 704, 832, 0, 480, 489, 491, 520, 0, 760 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */ 761 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704, 762 768, 864, 0, 480, 483, 486, 525, 0, 763 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */ 764 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656, 765 752, 800, 0, 480, 490, 492, 525, 0, 766 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */ 767 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738, 768 846, 900, 0, 400, 421, 423, 449, 0, 769 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */ 770 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738, 771 846, 900, 0, 400, 412, 414, 449, 0, 772 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */ 773 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, 774 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 775 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */ 776 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040, 777 1136, 1312, 0, 768, 769, 772, 800, 0, 778 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */ 779 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, 780 1184, 1328, 0, 768, 771, 777, 806, 0, 781 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */ 782 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, 783 1184, 1344, 0, 768, 771, 777, 806, 0, 784 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */ 785 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032, 786 1208, 1264, 0, 768, 768, 776, 817, 0, 787 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */ 788 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864, 789 928, 1152, 0, 624, 625, 628, 667, 0, 790 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */ 791 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, 792 896, 1056, 0, 600, 601, 604, 625, 0, 793 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */ 794 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, 795 976, 1040, 0, 600, 637, 643, 666, 0, 796 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */ 797 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, 798 1344, 1600, 0, 864, 865, 868, 900, 0, 799 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */ 800}; 801 802#define EDID_EST_TIMINGS 16 803#define EDID_STD_TIMINGS 8 804#define EDID_DETAILED_TIMINGS 4 805 806/** 807 * add_established_modes - get est. modes from EDID and add them 808 * @edid: EDID block to scan 809 * 810 * Each EDID block contains a bitmap of the supported "established modes" list 811 * (defined above). Tease them out and add them to the global modes list. 812 */ 813static int add_established_modes(struct drm_connector *connector, struct edid *edid) 814{ 815 struct drm_device *dev = connector->dev; 816 unsigned long est_bits = edid->established_timings.t1 | 817 (edid->established_timings.t2 << 8) | 818 ((edid->established_timings.mfg_rsvd & 0x80) << 9); 819 int i, modes = 0; 820 821 for (i = 0; i <= EDID_EST_TIMINGS; i++) 822 if (est_bits & (1<<i)) { 823 struct drm_display_mode *newmode; 824 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]); 825 if (newmode) { 826 drm_mode_probed_add(connector, newmode); 827 modes++; 828 } 829 } 830 831 return modes; 832} 833/** 834 * stanard_timing_level - get std. timing level(CVT/GTF/DMT) 835 * @edid: EDID block to scan 836 */ 837static int standard_timing_level(struct edid *edid) 838{ 839 if (edid->revision >= 2) { 840 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)) 841 return LEVEL_CVT; 842 return LEVEL_GTF; 843 } 844 return LEVEL_DMT; 845} 846 847/** 848 * add_standard_modes - get std. modes from EDID and add them 849 * @edid: EDID block to scan 850 * 851 * Standard modes can be calculated using the CVT standard. Grab them from 852 * @edid, calculate them, and add them to the list. 853 */ 854static int add_standard_modes(struct drm_connector *connector, struct edid *edid) 855{ 856 struct drm_device *dev = connector->dev; 857 int i, modes = 0; 858 int timing_level; 859 860 timing_level = standard_timing_level(edid); 861 862 for (i = 0; i < EDID_STD_TIMINGS; i++) { 863 struct std_timing *t = &edid->standard_timings[i]; 864 struct drm_display_mode *newmode; 865 866 /* If std timings bytes are 1, 1 it's empty */ 867 if (t->hsize == 1 && t->vfreq_aspect == 1) 868 continue; 869 870 newmode = drm_mode_std(dev, &edid->standard_timings[i], 871 edid->revision, timing_level); 872 if (newmode) { 873 drm_mode_probed_add(connector, newmode); 874 modes++; 875 } 876 } 877 878 return modes; 879} 880 881/* 882 * XXX fix this for: 883 * - GTF secondary curve formula 884 * - EDID 1.4 range offsets 885 * - CVT extended bits 886 */ 887static bool 888mode_in_range(struct drm_display_mode *mode, struct detailed_timing *timing) 889{ 890 struct detailed_data_monitor_range *range; 891 int hsync, vrefresh; 892 893 range = &timing->data.other_data.data.range; 894 895 hsync = drm_mode_hsync(mode); 896 vrefresh = drm_mode_vrefresh(mode); 897 898 if (hsync < range->min_hfreq_khz || hsync > range->max_hfreq_khz) 899 return false; 900 901 if (vrefresh < range->min_vfreq || vrefresh > range->max_vfreq) 902 return false; 903 904 if (range->pixel_clock_mhz && range->pixel_clock_mhz != 0xff) { 905 /* be forgiving since it's in units of 10MHz */ 906 int max_clock = range->pixel_clock_mhz * 10 + 9; 907 max_clock *= 1000; 908 if (mode->clock > max_clock) 909 return false; 910 } 911 912 return true; 913} 914 915/* 916 * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will 917 * need to account for them. 918 */ 919static int drm_gtf_modes_for_range(struct drm_connector *connector, 920 struct detailed_timing *timing) 921{ 922 int i, modes = 0; 923 struct drm_display_mode *newmode; 924 struct drm_device *dev = connector->dev; 925 926 for (i = 0; i < drm_num_dmt_modes; i++) { 927 if (mode_in_range(drm_dmt_modes + i, timing)) { 928 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]); 929 if (newmode) { 930 drm_mode_probed_add(connector, newmode); 931 modes++; 932 } 933 } 934 } 935 936 return modes; 937} 938 939static int drm_cvt_modes(struct drm_connector *connector, 940 struct detailed_timing *timing) 941{ 942 int i, j, modes = 0; 943 struct drm_display_mode *newmode; 944 struct drm_device *dev = connector->dev; 945 struct cvt_timing *cvt; 946 const int rates[] = { 60, 85, 75, 60, 50 }; 947 const u8 empty[3] = { 0, 0, 0 }; 948 949 for (i = 0; i < 4; i++) { 950 int uninitialized_var(width), height; 951 cvt = &(timing->data.other_data.data.cvt[i]); 952 953 if (!memcmp(cvt->code, empty, 3)) 954 continue; 955 956 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2; 957 switch (cvt->code[1] & 0x0c) { 958 case 0x00: 959 width = height * 4 / 3; 960 break; 961 case 0x04: 962 width = height * 16 / 9; 963 break; 964 case 0x08: 965 width = height * 16 / 10; 966 break; 967 case 0x0c: 968 width = height * 15 / 9; 969 break; 970 } 971 972 for (j = 1; j < 5; j++) { 973 if (cvt->code[2] & (1 << j)) { 974 newmode = drm_cvt_mode(dev, width, height, 975 rates[j], j == 0, 976 false, false); 977 if (newmode) { 978 drm_mode_probed_add(connector, newmode); 979 modes++; 980 } 981 } 982 } 983 } 984 985 return modes; 986} 987 988static int add_detailed_modes(struct drm_connector *connector, 989 struct detailed_timing *timing, 990 struct edid *edid, u32 quirks, int preferred) 991{ 992 int i, modes = 0; 993 struct detailed_non_pixel *data = &timing->data.other_data; 994 int timing_level = standard_timing_level(edid); 995 int gtf = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF); 996 struct drm_display_mode *newmode; 997 struct drm_device *dev = connector->dev; 998 999 if (timing->pixel_clock) { 1000 newmode = drm_mode_detailed(dev, edid, timing, quirks); 1001 if (!newmode) 1002 return 0; 1003 1004 if (preferred) 1005 newmode->type |= DRM_MODE_TYPE_PREFERRED; 1006 1007 drm_mode_probed_add(connector, newmode); 1008 return 1; 1009 } 1010 1011 /* other timing types */ 1012 switch (data->type) { 1013 case EDID_DETAIL_MONITOR_RANGE: 1014 if (gtf) 1015 modes += drm_gtf_modes_for_range(connector, timing); 1016 break; 1017 case EDID_DETAIL_STD_MODES: 1018 /* Six modes per detailed section */ 1019 for (i = 0; i < 6; i++) { 1020 struct std_timing *std; 1021 struct drm_display_mode *newmode; 1022 1023 std = &data->data.timings[i]; 1024 newmode = drm_mode_std(dev, std, edid->revision, 1025 timing_level); 1026 if (newmode) { 1027 drm_mode_probed_add(connector, newmode); 1028 modes++; 1029 } 1030 } 1031 break; 1032 case EDID_DETAIL_CVT_3BYTE: 1033 modes += drm_cvt_modes(connector, timing); 1034 break; 1035 default: 1036 break; 1037 } 1038 1039 return modes; 1040} 1041 1042/** 1043 * add_detailed_info - get detailed mode info from EDID data 1044 * @connector: attached connector 1045 * @edid: EDID block to scan 1046 * @quirks: quirks to apply 1047 * 1048 * Some of the detailed timing sections may contain mode information. Grab 1049 * it and add it to the list. 1050 */ 1051static int add_detailed_info(struct drm_connector *connector, 1052 struct edid *edid, u32 quirks) 1053{ 1054 int i, modes = 0; 1055 1056 for (i = 0; i < EDID_DETAILED_TIMINGS; i++) { 1057 struct detailed_timing *timing = &edid->detailed_timings[i]; 1058 int preferred = (i == 0) && (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING); 1059 1060 /* In 1.0, only timings are allowed */ 1061 if (!timing->pixel_clock && edid->version == 1 && 1062 edid->revision == 0) 1063 continue; 1064 1065 modes += add_detailed_modes(connector, timing, edid, quirks, 1066 preferred); 1067 } 1068 1069 return modes; 1070} 1071 1072/** 1073 * add_detailed_mode_eedid - get detailed mode info from addtional timing 1074 * EDID block 1075 * @connector: attached connector 1076 * @edid: EDID block to scan(It is only to get addtional timing EDID block) 1077 * @quirks: quirks to apply 1078 * 1079 * Some of the detailed timing sections may contain mode information. Grab 1080 * it and add it to the list. 1081 */ 1082static int add_detailed_info_eedid(struct drm_connector *connector, 1083 struct edid *edid, u32 quirks) 1084{ 1085 int i, modes = 0; 1086 char *edid_ext = NULL; 1087 struct detailed_timing *timing; 1088 int edid_ext_num; 1089 int start_offset, end_offset; 1090 int timing_level; 1091 1092 if (edid->version == 1 && edid->revision < 3) { 1093 /* If the EDID version is less than 1.3, there is no 1094 * extension EDID. 1095 */ 1096 return 0; 1097 } 1098 if (!edid->extensions) { 1099 /* if there is no extension EDID, it is unnecessary to 1100 * parse the E-EDID to get detailed info 1101 */ 1102 return 0; 1103 } 1104 1105 /* Chose real EDID extension number */ 1106 edid_ext_num = edid->extensions > DRM_MAX_EDID_EXT_NUM ? 1107 DRM_MAX_EDID_EXT_NUM : edid->extensions; 1108 1109 /* Find CEA extension */ 1110 for (i = 0; i < edid_ext_num; i++) { 1111 edid_ext = (char *)edid + EDID_LENGTH * (i + 1); 1112 /* This block is CEA extension */ 1113 if (edid_ext[0] == 0x02) 1114 break; 1115 } 1116 1117 if (i == edid_ext_num) { 1118 /* if there is no additional timing EDID block, return */ 1119 return 0; 1120 } 1121 1122 /* Get the start offset of detailed timing block */ 1123 start_offset = edid_ext[2]; 1124 if (start_offset == 0) { 1125 /* If the start_offset is zero, it means that neither detailed 1126 * info nor data block exist. In such case it is also 1127 * unnecessary to parse the detailed timing info. 1128 */ 1129 return 0; 1130 } 1131 1132 timing_level = standard_timing_level(edid); 1133 end_offset = EDID_LENGTH; 1134 end_offset -= sizeof(struct detailed_timing); 1135 for (i = start_offset; i < end_offset; 1136 i += sizeof(struct detailed_timing)) { 1137 timing = (struct detailed_timing *)(edid_ext + i); 1138 modes += add_detailed_modes(connector, timing, edid, quirks, 0); 1139 } 1140 1141 return modes; 1142} 1143 1144#define DDC_ADDR 0x50 1145/** 1146 * Get EDID information via I2C. 1147 * 1148 * \param adapter : i2c device adaptor 1149 * \param buf : EDID data buffer to be filled 1150 * \param len : EDID data buffer length 1151 * \return 0 on success or -1 on failure. 1152 * 1153 * Try to fetch EDID information by calling i2c driver function. 1154 */ 1155int drm_do_probe_ddc_edid(struct i2c_adapter *adapter, 1156 unsigned char *buf, int len) 1157{ 1158 unsigned char start = 0x0; 1159 struct i2c_msg msgs[] = { 1160 { 1161 .addr = DDC_ADDR, 1162 .flags = 0, 1163 .len = 1, 1164 .buf = &start, 1165 }, { 1166 .addr = DDC_ADDR, 1167 .flags = I2C_M_RD, 1168 .len = len, 1169 .buf = buf, 1170 } 1171 }; 1172 1173 if (i2c_transfer(adapter, msgs, 2) == 2) 1174 return 0; 1175 1176 return -1; 1177} 1178EXPORT_SYMBOL(drm_do_probe_ddc_edid); 1179 1180static int drm_ddc_read_edid(struct drm_connector *connector, 1181 struct i2c_adapter *adapter, 1182 char *buf, int len) 1183{ 1184 int i; 1185 1186 for (i = 0; i < 4; i++) { 1187 if (drm_do_probe_ddc_edid(adapter, buf, len)) 1188 return -1; 1189 if (drm_edid_is_valid((struct edid *)buf)) 1190 return 0; 1191 } 1192 1193 /* repeated checksum failures; warn, but carry on */ 1194 dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n", 1195 drm_get_connector_name(connector)); 1196 return -1; 1197} 1198 1199/** 1200 * drm_get_edid - get EDID data, if available 1201 * @connector: connector we're probing 1202 * @adapter: i2c adapter to use for DDC 1203 * 1204 * Poke the given connector's i2c channel to grab EDID data if possible. 1205 * 1206 * Return edid data or NULL if we couldn't find any. 1207 */ 1208struct edid *drm_get_edid(struct drm_connector *connector, 1209 struct i2c_adapter *adapter) 1210{ 1211 int ret; 1212 struct edid *edid; 1213 1214 edid = kmalloc(EDID_LENGTH * (DRM_MAX_EDID_EXT_NUM + 1), 1215 GFP_KERNEL); 1216 if (edid == NULL) { 1217 dev_warn(&connector->dev->pdev->dev, 1218 "Failed to allocate EDID\n"); 1219 goto end; 1220 } 1221 1222 /* Read first EDID block */ 1223 ret = drm_ddc_read_edid(connector, adapter, 1224 (unsigned char *)edid, EDID_LENGTH); 1225 if (ret != 0) 1226 goto clean_up; 1227 1228 /* There are EDID extensions to be read */ 1229 if (edid->extensions != 0) { 1230 int edid_ext_num = edid->extensions; 1231 1232 if (edid_ext_num > DRM_MAX_EDID_EXT_NUM) { 1233 dev_warn(&connector->dev->pdev->dev, 1234 "The number of extension(%d) is " 1235 "over max (%d), actually read number (%d)\n", 1236 edid_ext_num, DRM_MAX_EDID_EXT_NUM, 1237 DRM_MAX_EDID_EXT_NUM); 1238 /* Reset EDID extension number to be read */ 1239 edid_ext_num = DRM_MAX_EDID_EXT_NUM; 1240 } 1241 /* Read EDID including extensions too */ 1242 ret = drm_ddc_read_edid(connector, adapter, (char *)edid, 1243 EDID_LENGTH * (edid_ext_num + 1)); 1244 if (ret != 0) 1245 goto clean_up; 1246 1247 } 1248 1249 connector->display_info.raw_edid = (char *)edid; 1250 goto end; 1251 1252clean_up: 1253 kfree(edid); 1254 edid = NULL; 1255end: 1256 return edid; 1257 1258} 1259EXPORT_SYMBOL(drm_get_edid); 1260 1261#define HDMI_IDENTIFIER 0x000C03 1262#define VENDOR_BLOCK 0x03 1263/** 1264 * drm_detect_hdmi_monitor - detect whether monitor is hdmi. 1265 * @edid: monitor EDID information 1266 * 1267 * Parse the CEA extension according to CEA-861-B. 1268 * Return true if HDMI, false if not or unknown. 1269 */ 1270bool drm_detect_hdmi_monitor(struct edid *edid) 1271{ 1272 char *edid_ext = NULL; 1273 int i, hdmi_id, edid_ext_num; 1274 int start_offset, end_offset; 1275 bool is_hdmi = false; 1276 1277 /* No EDID or EDID extensions */ 1278 if (edid == NULL || edid->extensions == 0) 1279 goto end; 1280 1281 /* Chose real EDID extension number */ 1282 edid_ext_num = edid->extensions > DRM_MAX_EDID_EXT_NUM ? 1283 DRM_MAX_EDID_EXT_NUM : edid->extensions; 1284 1285 /* Find CEA extension */ 1286 for (i = 0; i < edid_ext_num; i++) { 1287 edid_ext = (char *)edid + EDID_LENGTH * (i + 1); 1288 /* This block is CEA extension */ 1289 if (edid_ext[0] == 0x02) 1290 break; 1291 } 1292 1293 if (i == edid_ext_num) 1294 goto end; 1295 1296 /* Data block offset in CEA extension block */ 1297 start_offset = 4; 1298 end_offset = edid_ext[2]; 1299 1300 /* 1301 * Because HDMI identifier is in Vendor Specific Block, 1302 * search it from all data blocks of CEA extension. 1303 */ 1304 for (i = start_offset; i < end_offset; 1305 /* Increased by data block len */ 1306 i += ((edid_ext[i] & 0x1f) + 1)) { 1307 /* Find vendor specific block */ 1308 if ((edid_ext[i] >> 5) == VENDOR_BLOCK) { 1309 hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) | 1310 edid_ext[i + 3] << 16; 1311 /* Find HDMI identifier */ 1312 if (hdmi_id == HDMI_IDENTIFIER) 1313 is_hdmi = true; 1314 break; 1315 } 1316 } 1317 1318end: 1319 return is_hdmi; 1320} 1321EXPORT_SYMBOL(drm_detect_hdmi_monitor); 1322 1323/** 1324 * drm_add_edid_modes - add modes from EDID data, if available 1325 * @connector: connector we're probing 1326 * @edid: edid data 1327 * 1328 * Add the specified modes to the connector's mode list. 1329 * 1330 * Return number of modes added or 0 if we couldn't find any. 1331 */ 1332int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid) 1333{ 1334 int num_modes = 0; 1335 u32 quirks; 1336 1337 if (edid == NULL) { 1338 return 0; 1339 } 1340 if (!drm_edid_is_valid(edid)) { 1341 dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n", 1342 drm_get_connector_name(connector)); 1343 return 0; 1344 } 1345 1346 quirks = edid_get_quirks(edid); 1347 1348 num_modes += add_established_modes(connector, edid); 1349 num_modes += add_standard_modes(connector, edid); 1350 num_modes += add_detailed_info(connector, edid, quirks); 1351 num_modes += add_detailed_info_eedid(connector, edid, quirks); 1352 1353 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75)) 1354 edid_fixup_preferred(connector, quirks); 1355 1356 connector->display_info.serration_vsync = (edid->input & DRM_EDID_INPUT_SERRATION_VSYNC) ? 1 : 0; 1357 connector->display_info.sync_on_green = (edid->input & DRM_EDID_INPUT_SYNC_ON_GREEN) ? 1 : 0; 1358 connector->display_info.composite_sync = (edid->input & DRM_EDID_INPUT_COMPOSITE_SYNC) ? 1 : 0; 1359 connector->display_info.separate_syncs = (edid->input & DRM_EDID_INPUT_SEPARATE_SYNCS) ? 1 : 0; 1360 connector->display_info.blank_to_black = (edid->input & DRM_EDID_INPUT_BLANK_TO_BLACK) ? 1 : 0; 1361 connector->display_info.video_level = (edid->input & DRM_EDID_INPUT_VIDEO_LEVEL) >> 5; 1362 connector->display_info.digital = (edid->input & DRM_EDID_INPUT_DIGITAL) ? 1 : 0; 1363 connector->display_info.width_mm = edid->width_cm * 10; 1364 connector->display_info.height_mm = edid->height_cm * 10; 1365 connector->display_info.gamma = edid->gamma; 1366 connector->display_info.gtf_supported = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) ? 1 : 0; 1367 connector->display_info.standard_color = (edid->features & DRM_EDID_FEATURE_STANDARD_COLOR) ? 1 : 0; 1368 connector->display_info.display_type = (edid->features & DRM_EDID_FEATURE_DISPLAY_TYPE) >> 3; 1369 connector->display_info.active_off_supported = (edid->features & DRM_EDID_FEATURE_PM_ACTIVE_OFF) ? 1 : 0; 1370 connector->display_info.suspend_supported = (edid->features & DRM_EDID_FEATURE_PM_SUSPEND) ? 1 : 0; 1371 connector->display_info.standby_supported = (edid->features & DRM_EDID_FEATURE_PM_STANDBY) ? 1 : 0; 1372 connector->display_info.gamma = edid->gamma; 1373 1374 return num_modes; 1375} 1376EXPORT_SYMBOL(drm_add_edid_modes); 1377 1378/** 1379 * drm_add_modes_noedid - add modes for the connectors without EDID 1380 * @connector: connector we're probing 1381 * @hdisplay: the horizontal display limit 1382 * @vdisplay: the vertical display limit 1383 * 1384 * Add the specified modes to the connector's mode list. Only when the 1385 * hdisplay/vdisplay is not beyond the given limit, it will be added. 1386 * 1387 * Return number of modes added or 0 if we couldn't find any. 1388 */ 1389int drm_add_modes_noedid(struct drm_connector *connector, 1390 int hdisplay, int vdisplay) 1391{ 1392 int i, count, num_modes = 0; 1393 struct drm_display_mode *mode, *ptr; 1394 struct drm_device *dev = connector->dev; 1395 1396 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode); 1397 if (hdisplay < 0) 1398 hdisplay = 0; 1399 if (vdisplay < 0) 1400 vdisplay = 0; 1401 1402 for (i = 0; i < count; i++) { 1403 ptr = &drm_dmt_modes[i]; 1404 if (hdisplay && vdisplay) { 1405 /* 1406 * Only when two are valid, they will be used to check 1407 * whether the mode should be added to the mode list of 1408 * the connector. 1409 */ 1410 if (ptr->hdisplay > hdisplay || 1411 ptr->vdisplay > vdisplay) 1412 continue; 1413 } 1414 if (drm_mode_vrefresh(ptr) > 61) 1415 continue; 1416 mode = drm_mode_duplicate(dev, ptr); 1417 if (mode) { 1418 drm_mode_probed_add(connector, mode); 1419 num_modes++; 1420 } 1421 } 1422 return num_modes; 1423} 1424EXPORT_SYMBOL(drm_add_modes_noedid); 1425