[go: nahoru, domu]

1/*
2 * Xilinx gpio driver for xps/axi_gpio IP.
3 *
4 * Copyright 2008 - 2013 Xilinx, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
9 *
10 * You should have received a copy of the GNU General Public License
11 * along with this program; if not, write to the Free Software
12 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
13 */
14
15#include <linux/bitops.h>
16#include <linux/init.h>
17#include <linux/errno.h>
18#include <linux/module.h>
19#include <linux/of_device.h>
20#include <linux/of_platform.h>
21#include <linux/of_gpio.h>
22#include <linux/io.h>
23#include <linux/gpio.h>
24#include <linux/slab.h>
25
26/* Register Offset Definitions */
27#define XGPIO_DATA_OFFSET   (0x0)	/* Data register  */
28#define XGPIO_TRI_OFFSET    (0x4)	/* I/O direction register  */
29
30#define XGPIO_CHANNEL_OFFSET	0x8
31
32/* Read/Write access to the GPIO registers */
33#ifdef CONFIG_ARCH_ZYNQ
34# define xgpio_readreg(offset)		readl(offset)
35# define xgpio_writereg(offset, val)	writel(val, offset)
36#else
37# define xgpio_readreg(offset)		__raw_readl(offset)
38# define xgpio_writereg(offset, val)	__raw_writel(val, offset)
39#endif
40
41/**
42 * struct xgpio_instance - Stores information about GPIO device
43 * struct of_mm_gpio_chip mmchip: OF GPIO chip for memory mapped banks
44 * gpio_state: GPIO state shadow register
45 * gpio_dir: GPIO direction shadow register
46 * offset: GPIO channel offset
47 * gpio_lock: Lock used for synchronization
48 */
49struct xgpio_instance {
50	struct of_mm_gpio_chip mmchip;
51	u32 gpio_state;
52	u32 gpio_dir;
53	u32 offset;
54	spinlock_t gpio_lock;
55};
56
57/**
58 * xgpio_get - Read the specified signal of the GPIO device.
59 * @gc:     Pointer to gpio_chip device structure.
60 * @gpio:   GPIO signal number.
61 *
62 * This function reads the specified signal of the GPIO device. It returns 0 if
63 * the signal clear, 1 if signal is set or negative value on error.
64 */
65static int xgpio_get(struct gpio_chip *gc, unsigned int gpio)
66{
67	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
68	struct xgpio_instance *chip =
69	    container_of(mm_gc, struct xgpio_instance, mmchip);
70
71	void __iomem *regs = mm_gc->regs + chip->offset;
72
73	return !!(xgpio_readreg(regs + XGPIO_DATA_OFFSET) & BIT(gpio));
74}
75
76/**
77 * xgpio_set - Write the specified signal of the GPIO device.
78 * @gc:     Pointer to gpio_chip device structure.
79 * @gpio:   GPIO signal number.
80 * @val:    Value to be written to specified signal.
81 *
82 * This function writes the specified value in to the specified signal of the
83 * GPIO device.
84 */
85static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
86{
87	unsigned long flags;
88	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
89	struct xgpio_instance *chip =
90	    container_of(mm_gc, struct xgpio_instance, mmchip);
91	void __iomem *regs = mm_gc->regs;
92
93	spin_lock_irqsave(&chip->gpio_lock, flags);
94
95	/* Write to GPIO signal and set its direction to output */
96	if (val)
97		chip->gpio_state |= BIT(gpio);
98	else
99		chip->gpio_state &= ~BIT(gpio);
100
101	xgpio_writereg(regs + chip->offset + XGPIO_DATA_OFFSET,
102							 chip->gpio_state);
103
104	spin_unlock_irqrestore(&chip->gpio_lock, flags);
105}
106
107/**
108 * xgpio_dir_in - Set the direction of the specified GPIO signal as input.
109 * @gc:     Pointer to gpio_chip device structure.
110 * @gpio:   GPIO signal number.
111 *
112 * This function sets the direction of specified GPIO signal as input.
113 * It returns 0 if direction of GPIO signals is set as input otherwise it
114 * returns negative error value.
115 */
116static int xgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
117{
118	unsigned long flags;
119	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
120	struct xgpio_instance *chip =
121	    container_of(mm_gc, struct xgpio_instance, mmchip);
122	void __iomem *regs = mm_gc->regs;
123
124	spin_lock_irqsave(&chip->gpio_lock, flags);
125
126	/* Set the GPIO bit in shadow register and set direction as input */
127	chip->gpio_dir |= BIT(gpio);
128	xgpio_writereg(regs + chip->offset + XGPIO_TRI_OFFSET, chip->gpio_dir);
129
130	spin_unlock_irqrestore(&chip->gpio_lock, flags);
131
132	return 0;
133}
134
135/**
136 * xgpio_dir_out - Set the direction of the specified GPIO signal as output.
137 * @gc:     Pointer to gpio_chip device structure.
138 * @gpio:   GPIO signal number.
139 * @val:    Value to be written to specified signal.
140 *
141 * This function sets the direction of specified GPIO signal as output. If all
142 * GPIO signals of GPIO chip is configured as input then it returns
143 * error otherwise it returns 0.
144 */
145static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
146{
147	unsigned long flags;
148	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
149	struct xgpio_instance *chip =
150	    container_of(mm_gc, struct xgpio_instance, mmchip);
151	void __iomem *regs = mm_gc->regs;
152
153	spin_lock_irqsave(&chip->gpio_lock, flags);
154
155	/* Write state of GPIO signal */
156	if (val)
157		chip->gpio_state |= BIT(gpio);
158	else
159		chip->gpio_state &= ~BIT(gpio);
160	xgpio_writereg(regs + chip->offset + XGPIO_DATA_OFFSET,
161		       chip->gpio_state);
162
163	/* Clear the GPIO bit in shadow register and set direction as output */
164	chip->gpio_dir &= ~BIT(gpio);
165	xgpio_writereg(regs + chip->offset + XGPIO_TRI_OFFSET, chip->gpio_dir);
166
167	spin_unlock_irqrestore(&chip->gpio_lock, flags);
168
169	return 0;
170}
171
172/**
173 * xgpio_save_regs - Set initial values of GPIO pins
174 * @mm_gc: pointer to memory mapped GPIO chip structure
175 */
176static void xgpio_save_regs(struct of_mm_gpio_chip *mm_gc)
177{
178	struct xgpio_instance *chip =
179	    container_of(mm_gc, struct xgpio_instance, mmchip);
180
181	xgpio_writereg(mm_gc->regs + chip->offset + XGPIO_DATA_OFFSET,
182							chip->gpio_state);
183	xgpio_writereg(mm_gc->regs + chip->offset + XGPIO_TRI_OFFSET,
184							 chip->gpio_dir);
185}
186
187/**
188 * xgpio_of_probe - Probe method for the GPIO device.
189 * @np: pointer to device tree node
190 *
191 * This function probes the GPIO device in the device tree. It initializes the
192 * driver data structure. It returns 0, if the driver is bound to the GPIO
193 * device, or a negative value if there is an error.
194 */
195static int xgpio_of_probe(struct device_node *np)
196{
197	struct xgpio_instance *chip;
198	int status = 0;
199	const u32 *tree_info;
200	u32 ngpio;
201
202	chip = kzalloc(sizeof(*chip), GFP_KERNEL);
203	if (!chip)
204		return -ENOMEM;
205
206	/* Update GPIO state shadow register with default value */
207	of_property_read_u32(np, "xlnx,dout-default", &chip->gpio_state);
208
209	/* By default, all pins are inputs */
210	chip->gpio_dir = 0xFFFFFFFF;
211
212	/* Update GPIO direction shadow register with default value */
213	of_property_read_u32(np, "xlnx,tri-default", &chip->gpio_dir);
214
215	/*
216	 * Check device node and parent device node for device width
217	 * and assume default width of 32
218	 */
219	if (of_property_read_u32(np, "xlnx,gpio-width", &ngpio))
220		ngpio = 32;
221	chip->mmchip.gc.ngpio = (u16)ngpio;
222
223	spin_lock_init(&chip->gpio_lock);
224
225	chip->mmchip.gc.direction_input = xgpio_dir_in;
226	chip->mmchip.gc.direction_output = xgpio_dir_out;
227	chip->mmchip.gc.get = xgpio_get;
228	chip->mmchip.gc.set = xgpio_set;
229
230	chip->mmchip.save_regs = xgpio_save_regs;
231
232	/* Call the OF gpio helper to setup and register the GPIO device */
233	status = of_mm_gpiochip_add(np, &chip->mmchip);
234	if (status) {
235		kfree(chip);
236		pr_err("%s: error in probe function with status %d\n",
237		       np->full_name, status);
238		return status;
239	}
240
241	pr_info("XGpio: %s: registered, base is %d\n", np->full_name,
242							chip->mmchip.gc.base);
243
244	tree_info = of_get_property(np, "xlnx,is-dual", NULL);
245	if (tree_info && be32_to_cpup(tree_info)) {
246		chip = kzalloc(sizeof(*chip), GFP_KERNEL);
247		if (!chip)
248			return -ENOMEM;
249
250		/* Add dual channel offset */
251		chip->offset = XGPIO_CHANNEL_OFFSET;
252
253		/* Update GPIO state shadow register with default value */
254		of_property_read_u32(np, "xlnx,dout-default-2",
255				     &chip->gpio_state);
256
257		/* By default, all pins are inputs */
258		chip->gpio_dir = 0xFFFFFFFF;
259
260		/* Update GPIO direction shadow register with default value */
261		of_property_read_u32(np, "xlnx,tri-default-2", &chip->gpio_dir);
262
263		/*
264		 * Check device node and parent device node for device width
265		 * and assume default width of 32
266		 */
267		if (of_property_read_u32(np, "xlnx,gpio2-width", &ngpio))
268			ngpio = 32;
269		chip->mmchip.gc.ngpio = (u16)ngpio;
270
271		spin_lock_init(&chip->gpio_lock);
272
273		chip->mmchip.gc.direction_input = xgpio_dir_in;
274		chip->mmchip.gc.direction_output = xgpio_dir_out;
275		chip->mmchip.gc.get = xgpio_get;
276		chip->mmchip.gc.set = xgpio_set;
277
278		chip->mmchip.save_regs = xgpio_save_regs;
279
280		/* Call the OF gpio helper to setup and register the GPIO dev */
281		status = of_mm_gpiochip_add(np, &chip->mmchip);
282		if (status) {
283			kfree(chip);
284			pr_err("%s: error in probe function with status %d\n",
285			np->full_name, status);
286			return status;
287		}
288		pr_info("XGpio: %s: dual channel registered, base is %d\n",
289					np->full_name, chip->mmchip.gc.base);
290	}
291
292	return 0;
293}
294
295static const struct of_device_id xgpio_of_match[] = {
296	{ .compatible = "xlnx,xps-gpio-1.00.a", },
297	{ /* end of list */ },
298};
299
300static int __init xgpio_init(void)
301{
302	struct device_node *np;
303
304	for_each_matching_node(np, xgpio_of_match)
305		xgpio_of_probe(np);
306
307	return 0;
308}
309
310/* Make sure we get initialized before anyone else tries to use us */
311subsys_initcall(xgpio_init);
312/* No exit call at the moment as we cannot unregister of GPIO chips */
313
314MODULE_AUTHOR("Xilinx, Inc.");
315MODULE_DESCRIPTION("Xilinx GPIO driver");
316MODULE_LICENSE("GPL");
317