hisax.h revision e86a6a1b7849217bb3b1ef725c7fee86ed6dae33
1/* $Id: hisax.h,v 2.64.2.4 2004/02/11 13:21:33 keil Exp $ 2 * 3 * Basic declarations, defines and prototypes 4 * 5 * This software may be used and distributed according to the terms 6 * of the GNU General Public License, incorporated herein by reference. 7 * 8 */ 9#include <linux/errno.h> 10#include <linux/fs.h> 11#include <linux/major.h> 12#include <asm/io.h> 13#include <linux/delay.h> 14#include <linux/kernel.h> 15#include <linux/signal.h> 16#include <linux/slab.h> 17#include <linux/mm.h> 18#include <linux/mman.h> 19#include <linux/ioport.h> 20#include <linux/timer.h> 21#include <linux/wait.h> 22#include <linux/isdnif.h> 23#include <linux/tty.h> 24#include <linux/serial_reg.h> 25#include <linux/netdevice.h> 26 27#define ERROR_STATISTIC 28 29#define REQUEST 0 30#define CONFIRM 1 31#define INDICATION 2 32#define RESPONSE 3 33 34#define HW_ENABLE 0x0000 35#define HW_RESET 0x0004 36#define HW_POWERUP 0x0008 37#define HW_ACTIVATE 0x0010 38#define HW_DEACTIVATE 0x0018 39 40#define HW_INFO1 0x0010 41#define HW_INFO2 0x0020 42#define HW_INFO3 0x0030 43#define HW_INFO4 0x0040 44#define HW_INFO4_P8 0x0040 45#define HW_INFO4_P10 0x0048 46#define HW_RSYNC 0x0060 47#define HW_TESTLOOP 0x0070 48#define CARD_RESET 0x00F0 49#define CARD_INIT 0x00F2 50#define CARD_RELEASE 0x00F3 51#define CARD_TEST 0x00F4 52#define CARD_AUX_IND 0x00F5 53 54#define PH_ACTIVATE 0x0100 55#define PH_DEACTIVATE 0x0110 56#define PH_DATA 0x0120 57#define PH_PULL 0x0130 58#define PH_TESTLOOP 0x0140 59#define PH_PAUSE 0x0150 60#define MPH_ACTIVATE 0x0180 61#define MPH_DEACTIVATE 0x0190 62#define MPH_INFORMATION 0x01A0 63 64#define DL_ESTABLISH 0x0200 65#define DL_RELEASE 0x0210 66#define DL_DATA 0x0220 67#define DL_FLUSH 0x0224 68#define DL_UNIT_DATA 0x0230 69 70#define MDL_BC_RELEASE 0x0278 // Formula-n enter:now 71#define MDL_BC_ASSIGN 0x027C // Formula-n enter:now 72#define MDL_ASSIGN 0x0280 73#define MDL_REMOVE 0x0284 74#define MDL_ERROR 0x0288 75#define MDL_INFO_SETUP 0x02E0 76#define MDL_INFO_CONN 0x02E4 77#define MDL_INFO_REL 0x02E8 78 79#define CC_SETUP 0x0300 80#define CC_RESUME 0x0304 81#define CC_MORE_INFO 0x0310 82#define CC_IGNORE 0x0320 83#define CC_REJECT 0x0324 84#define CC_SETUP_COMPL 0x0330 85#define CC_PROCEEDING 0x0340 86#define CC_ALERTING 0x0344 87#define CC_PROGRESS 0x0348 88#define CC_CONNECT 0x0350 89#define CC_CHARGE 0x0354 90#define CC_NOTIFY 0x0358 91#define CC_DISCONNECT 0x0360 92#define CC_RELEASE 0x0368 93#define CC_SUSPEND 0x0370 94#define CC_PROCEED_SEND 0x0374 95#define CC_REDIR 0x0378 96#define CC_T302 0x0382 97#define CC_T303 0x0383 98#define CC_T304 0x0384 99#define CC_T305 0x0385 100#define CC_T308_1 0x0388 101#define CC_T308_2 0x038A 102#define CC_T309 0x0309 103#define CC_T310 0x0390 104#define CC_T313 0x0393 105#define CC_T318 0x0398 106#define CC_T319 0x0399 107#define CC_TSPID 0x03A0 108#define CC_NOSETUP_RSP 0x03E0 109#define CC_SETUP_ERR 0x03E1 110#define CC_SUSPEND_ERR 0x03E2 111#define CC_RESUME_ERR 0x03E3 112#define CC_CONNECT_ERR 0x03E4 113#define CC_RELEASE_ERR 0x03E5 114#define CC_RESTART 0x03F4 115#define CC_TDSS1_IO 0x13F4 /* DSS1 IO user timer */ 116#define CC_TNI1_IO 0x13F5 /* NI1 IO user timer */ 117 118/* define maximum number of possible waiting incoming calls */ 119#define MAX_WAITING_CALLS 2 120 121 122#ifdef __KERNEL__ 123 124extern const char *CardType[]; 125extern int nrcards; 126 127extern const char *l1_revision; 128extern const char *l2_revision; 129extern const char *l3_revision; 130extern const char *lli_revision; 131extern const char *tei_revision; 132 133/* include l3dss1 & ni1 specific process structures, but no other defines */ 134#ifdef CONFIG_HISAX_EURO 135 #define l3dss1_process 136 #include "l3dss1.h" 137 #undef l3dss1_process 138#endif /* CONFIG_HISAX_EURO */ 139 140#ifdef CONFIG_HISAX_NI1 141 #define l3ni1_process 142 #include "l3ni1.h" 143 #undef l3ni1_process 144#endif /* CONFIG_HISAX_NI1 */ 145 146#define MAX_DFRAME_LEN 260 147#define MAX_DFRAME_LEN_L1 300 148#define HSCX_BUFMAX 4096 149#define MAX_DATA_SIZE (HSCX_BUFMAX - 4) 150#define MAX_DATA_MEM (HSCX_BUFMAX + 64) 151#define RAW_BUFMAX (((HSCX_BUFMAX*6)/5) + 5) 152#define MAX_HEADER_LEN 4 153#define MAX_WINDOW 8 154#define MAX_MON_FRAME 32 155#define MAX_DLOG_SPACE 2048 156#define MAX_BLOG_SPACE 256 157 158/* #define I4L_IRQ_FLAG SA_INTERRUPT */ 159#define I4L_IRQ_FLAG 0 160 161/* 162 * Statemachine 163 */ 164 165struct FsmInst; 166 167typedef void (* FSMFNPTR)(struct FsmInst *, int, void *); 168 169struct Fsm { 170 FSMFNPTR *jumpmatrix; 171 int state_count, event_count; 172 char **strEvent, **strState; 173}; 174 175struct FsmInst { 176 struct Fsm *fsm; 177 int state; 178 int debug; 179 void *userdata; 180 int userint; 181 void (*printdebug) (struct FsmInst *, char *, ...); 182}; 183 184struct FsmNode { 185 int state, event; 186 void (*routine) (struct FsmInst *, int, void *); 187}; 188 189struct FsmTimer { 190 struct FsmInst *fi; 191 struct timer_list tl; 192 int event; 193 void *arg; 194}; 195 196struct L3Timer { 197 struct l3_process *pc; 198 struct timer_list tl; 199 int event; 200}; 201 202#define FLG_L1_ACTIVATING 1 203#define FLG_L1_ACTIVATED 2 204#define FLG_L1_DEACTTIMER 3 205#define FLG_L1_ACTTIMER 4 206#define FLG_L1_T3RUN 5 207#define FLG_L1_PULL_REQ 6 208#define FLG_L1_UINT 7 209 210struct Layer1 { 211 void *hardware; 212 struct BCState *bcs; 213 struct PStack **stlistp; 214 unsigned long Flags; 215 struct FsmInst l1m; 216 struct FsmTimer timer; 217 void (*l1l2) (struct PStack *, int, void *); 218 void (*l1hw) (struct PStack *, int, void *); 219 void (*l1tei) (struct PStack *, int, void *); 220 int mode, bc; 221 int delay; 222}; 223 224#define GROUP_TEI 127 225#define TEI_SAPI 63 226#define CTRL_SAPI 0 227#define PACKET_NOACK 7 228 229/* Layer2 Flags */ 230 231#define FLG_LAPB 0 232#define FLG_LAPD 1 233#define FLG_ORIG 2 234#define FLG_MOD128 3 235#define FLG_PEND_REL 4 236#define FLG_L3_INIT 5 237#define FLG_T200_RUN 6 238#define FLG_ACK_PEND 7 239#define FLG_REJEXC 8 240#define FLG_OWN_BUSY 9 241#define FLG_PEER_BUSY 10 242#define FLG_DCHAN_BUSY 11 243#define FLG_L1_ACTIV 12 244#define FLG_ESTAB_PEND 13 245#define FLG_PTP 14 246#define FLG_FIXED_TEI 15 247#define FLG_L2BLOCK 16 248 249struct Layer2 { 250 int tei; 251 int sap; 252 int maxlen; 253 u_long flag; 254 spinlock_t lock; 255 u_int vs, va, vr; 256 int rc; 257 unsigned int window; 258 unsigned int sow; 259 struct sk_buff *windowar[MAX_WINDOW]; 260 struct sk_buff_head i_queue; 261 struct sk_buff_head ui_queue; 262 void (*l2l1) (struct PStack *, int, void *); 263 void (*l2l3) (struct PStack *, int, void *); 264 void (*l2tei) (struct PStack *, int, void *); 265 struct FsmInst l2m; 266 struct FsmTimer t200, t203; 267 int T200, N200, T203; 268 int debug; 269 char debug_id[16]; 270}; 271 272struct Layer3 { 273 void (*l3l4) (struct PStack *, int, void *); 274 void (*l3ml3) (struct PStack *, int, void *); 275 void (*l3l2) (struct PStack *, int, void *); 276 struct FsmInst l3m; 277 struct FsmTimer l3m_timer; 278 struct sk_buff_head squeue; 279 struct l3_process *proc; 280 struct l3_process *global; 281 int N303; 282 int debug; 283 char debug_id[8]; 284}; 285 286struct LLInterface { 287 void (*l4l3) (struct PStack *, int, void *); 288 int (*l4l3_proto) (struct PStack *, isdn_ctrl *); 289 void *userdata; 290 u_long flag; 291}; 292 293#define FLG_LLI_L1WAKEUP 1 294#define FLG_LLI_L2WAKEUP 2 295 296struct Management { 297 int ri; 298 struct FsmInst tei_m; 299 struct FsmTimer t202; 300 int T202, N202, debug; 301 void (*layer) (struct PStack *, int, void *); 302}; 303 304#define NO_CAUSE 254 305 306struct Param { 307 u_char cause; 308 u_char loc; 309 u_char diag[6]; 310 int bchannel; 311 int chargeinfo; 312 int spv; /* SPV Flag */ 313 setup_parm setup; /* from isdnif.h numbers and Serviceindicator */ 314 u_char moderate; /* transfer mode and rate (bearer octet 4) */ 315}; 316 317 318struct PStack { 319 struct PStack *next; 320 struct Layer1 l1; 321 struct Layer2 l2; 322 struct Layer3 l3; 323 struct LLInterface lli; 324 struct Management ma; 325 int protocol; /* EDSS1, 1TR6 or NI1 */ 326 327 /* protocol specific data fields */ 328 union 329 { u_char uuuu; /* only as dummy */ 330#ifdef CONFIG_HISAX_EURO 331 dss1_stk_priv dss1; /* private dss1 data */ 332#endif /* CONFIG_HISAX_EURO */ 333#ifdef CONFIG_HISAX_NI1 334 ni1_stk_priv ni1; /* private ni1 data */ 335#endif /* CONFIG_HISAX_NI1 */ 336 } prot; 337}; 338 339struct l3_process { 340 int callref; 341 int state; 342 struct L3Timer timer; 343 int N303; 344 int debug; 345 struct Param para; 346 struct Channel *chan; 347 struct PStack *st; 348 struct l3_process *next; 349 ulong redir_result; 350 351 /* protocol specific data fields */ 352 union 353 { u_char uuuu; /* only when euro not defined, avoiding empty union */ 354#ifdef CONFIG_HISAX_EURO 355 dss1_proc_priv dss1; /* private dss1 data */ 356#endif /* CONFIG_HISAX_EURO */ 357#ifdef CONFIG_HISAX_NI1 358 ni1_proc_priv ni1; /* private ni1 data */ 359#endif /* CONFIG_HISAX_NI1 */ 360 } prot; 361}; 362 363struct hscx_hw { 364 int hscx; 365 int rcvidx; 366 int count; /* Current skb sent count */ 367 u_char *rcvbuf; /* B-Channel receive Buffer */ 368 u_char tsaxr0; 369 u_char tsaxr1; 370}; 371 372struct w6692B_hw { 373 int bchan; 374 int rcvidx; 375 int count; /* Current skb sent count */ 376 u_char *rcvbuf; /* B-Channel receive Buffer */ 377}; 378 379struct isar_reg { 380 unsigned long Flags; 381 volatile u_char bstat; 382 volatile u_char iis; 383 volatile u_char cmsb; 384 volatile u_char clsb; 385 volatile u_char par[8]; 386}; 387 388struct isar_hw { 389 int dpath; 390 int rcvidx; 391 int txcnt; 392 int mml; 393 u_char state; 394 u_char cmd; 395 u_char mod; 396 u_char newcmd; 397 u_char newmod; 398 char try_mod; 399 struct timer_list ftimer; 400 u_char *rcvbuf; /* B-Channel receive Buffer */ 401 u_char conmsg[16]; 402 struct isar_reg *reg; 403}; 404 405struct hdlc_stat_reg { 406#ifdef __BIG_ENDIAN 407 u_char fill; 408 u_char mode; 409 u_char xml; 410 u_char cmd; 411#else 412 u_char cmd; 413 u_char xml; 414 u_char mode; 415 u_char fill; 416#endif 417} __attribute__((packed)); 418 419struct hdlc_hw { 420 union { 421 u_int ctrl; 422 struct hdlc_stat_reg sr; 423 } ctrl; 424 u_int stat; 425 int rcvidx; 426 int count; /* Current skb sent count */ 427 u_char *rcvbuf; /* B-Channel receive Buffer */ 428}; 429 430struct hfcB_hw { 431 unsigned int *send; 432 int f1; 433 int f2; 434}; 435 436struct tiger_hw { 437 u_int *send; 438 u_int *s_irq; 439 u_int *s_end; 440 u_int *sendp; 441 u_int *rec; 442 int free; 443 u_char *rcvbuf; 444 u_char *sendbuf; 445 u_char *sp; 446 int sendcnt; 447 u_int s_tot; 448 u_int r_bitcnt; 449 u_int r_tot; 450 u_int r_err; 451 u_int r_fcs; 452 u_char r_state; 453 u_char r_one; 454 u_char r_val; 455 u_char s_state; 456}; 457 458struct amd7930_hw { 459 u_char *tx_buff; 460 u_char *rv_buff; 461 int rv_buff_in; 462 int rv_buff_out; 463 struct sk_buff *rv_skb; 464 struct hdlc_state *hdlc_state; 465 struct work_struct tq_rcv; 466 struct work_struct tq_xmt; 467}; 468 469#define BC_FLG_INIT 1 470#define BC_FLG_ACTIV 2 471#define BC_FLG_BUSY 3 472#define BC_FLG_NOFRAME 4 473#define BC_FLG_HALF 5 474#define BC_FLG_EMPTY 6 475#define BC_FLG_ORIG 7 476#define BC_FLG_DLEETX 8 477#define BC_FLG_LASTDLE 9 478#define BC_FLG_FIRST 10 479#define BC_FLG_LASTDATA 11 480#define BC_FLG_NMD_DATA 12 481#define BC_FLG_FTI_RUN 13 482#define BC_FLG_LL_OK 14 483#define BC_FLG_LL_CONN 15 484#define BC_FLG_FTI_FTS 16 485#define BC_FLG_FRH_WAIT 17 486 487#define L1_MODE_NULL 0 488#define L1_MODE_TRANS 1 489#define L1_MODE_HDLC 2 490#define L1_MODE_EXTRN 3 491#define L1_MODE_HDLC_56K 4 492#define L1_MODE_MODEM 7 493#define L1_MODE_V32 8 494#define L1_MODE_FAX 9 495 496struct BCState { 497 int channel; 498 int mode; 499 u_long Flag; 500 struct IsdnCardState *cs; 501 int tx_cnt; /* B-Channel transmit counter */ 502 struct sk_buff *tx_skb; /* B-Channel transmit Buffer */ 503 struct sk_buff_head rqueue; /* B-Channel receive Queue */ 504 struct sk_buff_head squeue; /* B-Channel send Queue */ 505 int ackcnt; 506 spinlock_t aclock; 507 struct PStack *st; 508 u_char *blog; 509 u_char *conmsg; 510 struct timer_list transbusy; 511 struct work_struct tqueue; 512 u_long event; 513 int (*BC_SetStack) (struct PStack *, struct BCState *); 514 void (*BC_Close) (struct BCState *); 515#ifdef ERROR_STATISTIC 516 int err_crc; 517 int err_tx; 518 int err_rdo; 519 int err_inv; 520#endif 521 union { 522 struct hscx_hw hscx; 523 struct hdlc_hw hdlc; 524 struct isar_hw isar; 525 struct hfcB_hw hfc; 526 struct tiger_hw tiger; 527 struct amd7930_hw amd7930; 528 struct w6692B_hw w6692; 529 struct hisax_b_if *b_if; 530 } hw; 531}; 532 533struct Channel { 534 struct PStack *b_st, *d_st; 535 struct IsdnCardState *cs; 536 struct BCState *bcs; 537 int chan; 538 int incoming; 539 struct FsmInst fi; 540 struct FsmTimer drel_timer, dial_timer; 541 int debug; 542 int l2_protocol, l2_active_protocol; 543 int l3_protocol; 544 int data_open; 545 struct l3_process *proc; 546 setup_parm setup; /* from isdnif.h numbers and Serviceindicator */ 547 u_long Flags; /* for remembering action done in l4 */ 548 int leased; 549}; 550 551struct elsa_hw { 552 struct pci_dev *dev; 553 unsigned long base; 554 unsigned int cfg; 555 unsigned int ctrl; 556 unsigned int ale; 557 unsigned int isac; 558 unsigned int itac; 559 unsigned int hscx; 560 unsigned int trig; 561 unsigned int timer; 562 unsigned int counter; 563 unsigned int status; 564 struct timer_list tl; 565 unsigned int MFlag; 566 struct BCState *bcs; 567 u_char *transbuf; 568 u_char *rcvbuf; 569 unsigned int transp; 570 unsigned int rcvp; 571 unsigned int transcnt; 572 unsigned int rcvcnt; 573 u_char IER; 574 u_char FCR; 575 u_char LCR; 576 u_char MCR; 577 u_char ctrl_reg; 578}; 579 580struct teles3_hw { 581 unsigned int cfg_reg; 582 signed int isac; 583 signed int hscx[2]; 584 signed int isacfifo; 585 signed int hscxfifo[2]; 586}; 587 588struct teles0_hw { 589 unsigned int cfg_reg; 590 void __iomem *membase; 591 unsigned long phymem; 592}; 593 594struct avm_hw { 595 unsigned int cfg_reg; 596 unsigned int isac; 597 unsigned int hscx[2]; 598 unsigned int isacfifo; 599 unsigned int hscxfifo[2]; 600 unsigned int counter; 601 struct pci_dev *dev; 602}; 603 604struct ix1_hw { 605 unsigned int cfg_reg; 606 unsigned int isac_ale; 607 unsigned int isac; 608 unsigned int hscx_ale; 609 unsigned int hscx; 610}; 611 612struct diva_hw { 613 unsigned long cfg_reg; 614 unsigned long pci_cfg; 615 unsigned int ctrl; 616 unsigned long isac_adr; 617 unsigned int isac; 618 unsigned long hscx_adr; 619 unsigned int hscx; 620 unsigned int status; 621 struct timer_list tl; 622 u_char ctrl_reg; 623 struct pci_dev *dev; 624}; 625 626struct asus_hw { 627 unsigned int cfg_reg; 628 unsigned int adr; 629 unsigned int isac; 630 unsigned int hscx; 631 unsigned int u7; 632 unsigned int pots; 633}; 634 635 636struct hfc_hw { 637 unsigned int addr; 638 unsigned int fifosize; 639 unsigned char cirm; 640 unsigned char ctmt; 641 unsigned char cip; 642 u_char isac_spcr; 643 struct timer_list timer; 644}; 645 646struct sedl_hw { 647 unsigned int cfg_reg; 648 unsigned int adr; 649 unsigned int isac; 650 unsigned int hscx; 651 unsigned int reset_on; 652 unsigned int reset_off; 653 struct isar_reg isar; 654 unsigned int chip; 655 unsigned int bus; 656 struct pci_dev *dev; 657}; 658 659struct spt_hw { 660 unsigned int cfg_reg; 661 unsigned int isac; 662 unsigned int hscx[2]; 663 unsigned char res_irq; 664}; 665 666struct mic_hw { 667 unsigned int cfg_reg; 668 unsigned int adr; 669 unsigned int isac; 670 unsigned int hscx; 671}; 672 673struct njet_hw { 674 unsigned long base; 675 unsigned int isac; 676 unsigned int auxa; 677 unsigned char auxd; 678 unsigned char dmactrl; 679 unsigned char ctrl_reg; 680 unsigned char irqmask0; 681 unsigned char irqstat0; 682 unsigned char last_is0; 683 struct pci_dev *dev; 684}; 685 686struct hfcPCI_hw { 687 unsigned char cirm; 688 unsigned char ctmt; 689 unsigned char conn; 690 unsigned char mst_m; 691 unsigned char int_m1; 692 unsigned char int_m2; 693 unsigned char int_s1; 694 unsigned char sctrl; 695 unsigned char sctrl_r; 696 unsigned char sctrl_e; 697 unsigned char trm; 698 unsigned char stat; 699 unsigned char fifo; 700 unsigned char fifo_en; 701 unsigned char bswapped; 702 unsigned char nt_mode; 703 int nt_timer; 704 struct pci_dev *dev; 705 unsigned char *pci_io; /* start of PCI IO memory */ 706 void *share_start; /* shared memory for Fifos start */ 707 void *fifos; /* FIFO memory */ 708 int last_bfifo_cnt[2]; /* marker saving last b-fifo frame count */ 709 struct timer_list timer; 710}; 711 712struct hfcSX_hw { 713 unsigned long base; 714 unsigned char cirm; 715 unsigned char ctmt; 716 unsigned char conn; 717 unsigned char mst_m; 718 unsigned char int_m1; 719 unsigned char int_m2; 720 unsigned char int_s1; 721 unsigned char sctrl; 722 unsigned char sctrl_r; 723 unsigned char sctrl_e; 724 unsigned char trm; 725 unsigned char stat; 726 unsigned char fifo; 727 unsigned char bswapped; 728 unsigned char nt_mode; 729 unsigned char chip; 730 int b_fifo_size; 731 unsigned char last_fifo; 732 void *extra; 733 int nt_timer; 734 struct timer_list timer; 735}; 736 737struct hfcD_hw { 738 unsigned int addr; 739 unsigned int bfifosize; 740 unsigned int dfifosize; 741 unsigned char cirm; 742 unsigned char ctmt; 743 unsigned char cip; 744 unsigned char conn; 745 unsigned char mst_m; 746 unsigned char int_m1; 747 unsigned char int_m2; 748 unsigned char int_s1; 749 unsigned char sctrl; 750 unsigned char stat; 751 unsigned char fifo; 752 unsigned char f1; 753 unsigned char f2; 754 unsigned int *send; 755 struct timer_list timer; 756}; 757 758struct isurf_hw { 759 unsigned int reset; 760 unsigned long phymem; 761 void __iomem *isac; 762 void __iomem *isar; 763 struct isar_reg isar_r; 764}; 765 766struct saphir_hw { 767 struct pci_dev *dev; 768 unsigned int cfg_reg; 769 unsigned int ale; 770 unsigned int isac; 771 unsigned int hscx; 772 struct timer_list timer; 773}; 774 775struct bkm_hw { 776 struct pci_dev *dev; 777 unsigned long base; 778 /* A4T stuff */ 779 unsigned long isac_adr; 780 unsigned int isac_ale; 781 unsigned long jade_adr; 782 unsigned int jade_ale; 783 /* Scitel Quadro stuff */ 784 unsigned long plx_adr; 785 unsigned long data_adr; 786}; 787 788struct gazel_hw { 789 struct pci_dev *dev; 790 unsigned int cfg_reg; 791 unsigned int pciaddr[2]; 792 signed int ipac; 793 signed int isac; 794 signed int hscx[2]; 795 signed int isacfifo; 796 signed int hscxfifo[2]; 797 unsigned char timeslot; 798 unsigned char iom2; 799}; 800 801struct w6692_hw { 802 struct pci_dev *dev; 803 unsigned int iobase; 804 struct timer_list timer; 805}; 806 807struct arcofi_msg { 808 struct arcofi_msg *next; 809 u_char receive; 810 u_char len; 811 u_char msg[10]; 812}; 813 814struct isac_chip { 815 int ph_state; 816 u_char *mon_tx; 817 u_char *mon_rx; 818 int mon_txp; 819 int mon_txc; 820 int mon_rxp; 821 struct arcofi_msg *arcofi_list; 822 struct timer_list arcofitimer; 823 wait_queue_head_t arcofi_wait; 824 u_char arcofi_bc; 825 u_char arcofi_state; 826 u_char mocr; 827 u_char adf2; 828}; 829 830struct hfcd_chip { 831 int ph_state; 832}; 833 834struct hfcpci_chip { 835 int ph_state; 836}; 837 838struct hfcsx_chip { 839 int ph_state; 840}; 841 842struct w6692_chip { 843 int ph_state; 844}; 845 846struct amd7930_chip { 847 u_char lmr1; 848 u_char ph_state; 849 u_char old_state; 850 u_char flg_t3; 851 unsigned int tx_xmtlen; 852 struct timer_list timer3; 853 void (*ph_command) (struct IsdnCardState *, u_char, char *); 854 void (*setIrqMask) (struct IsdnCardState *, u_char); 855}; 856 857struct icc_chip { 858 int ph_state; 859 u_char *mon_tx; 860 u_char *mon_rx; 861 int mon_txp; 862 int mon_txc; 863 int mon_rxp; 864 struct arcofi_msg *arcofi_list; 865 struct timer_list arcofitimer; 866 wait_queue_head_t arcofi_wait; 867 u_char arcofi_bc; 868 u_char arcofi_state; 869 u_char mocr; 870 u_char adf2; 871}; 872 873#define HW_IOM1 0 874#define HW_IPAC 1 875#define HW_ISAR 2 876#define HW_ARCOFI 3 877#define FLG_TWO_DCHAN 4 878#define FLG_L1_DBUSY 5 879#define FLG_DBUSY_TIMER 6 880#define FLG_LOCK_ATOMIC 7 881#define FLG_ARCOFI_TIMER 8 882#define FLG_ARCOFI_ERROR 9 883#define FLG_HW_L1_UINT 10 884 885struct IsdnCardState { 886 spinlock_t lock; 887 u_char typ; 888 u_char subtyp; 889 int protocol; 890 u_int irq; 891 u_long irq_flags; 892 u_long HW_Flags; 893 int *busy_flag; 894 int chanlimit; /* limited number of B-chans to use */ 895 int logecho; /* log echo if supported by card */ 896 union { 897 struct elsa_hw elsa; 898 struct teles0_hw teles0; 899 struct teles3_hw teles3; 900 struct avm_hw avm; 901 struct ix1_hw ix1; 902 struct diva_hw diva; 903 struct asus_hw asus; 904 struct hfc_hw hfc; 905 struct sedl_hw sedl; 906 struct spt_hw spt; 907 struct mic_hw mic; 908 struct njet_hw njet; 909 struct hfcD_hw hfcD; 910 struct hfcPCI_hw hfcpci; 911 struct hfcSX_hw hfcsx; 912 struct ix1_hw niccy; 913 struct isurf_hw isurf; 914 struct saphir_hw saphir; 915 struct bkm_hw ax; 916 struct gazel_hw gazel; 917 struct w6692_hw w6692; 918 struct hisax_d_if *hisax_d_if; 919 } hw; 920 int myid; 921 isdn_if iif; 922 spinlock_t statlock; 923 u_char *status_buf; 924 u_char *status_read; 925 u_char *status_write; 926 u_char *status_end; 927 u_char (*readisac) (struct IsdnCardState *, u_char); 928 void (*writeisac) (struct IsdnCardState *, u_char, u_char); 929 void (*readisacfifo) (struct IsdnCardState *, u_char *, int); 930 void (*writeisacfifo) (struct IsdnCardState *, u_char *, int); 931 u_char (*BC_Read_Reg) (struct IsdnCardState *, int, u_char); 932 void (*BC_Write_Reg) (struct IsdnCardState *, int, u_char, u_char); 933 void (*BC_Send_Data) (struct BCState *); 934 int (*cardmsg) (struct IsdnCardState *, int, void *); 935 void (*setstack_d) (struct PStack *, struct IsdnCardState *); 936 void (*DC_Close) (struct IsdnCardState *); 937 irq_handler_t irq_func; 938 int (*auxcmd) (struct IsdnCardState *, isdn_ctrl *); 939 struct Channel channel[2+MAX_WAITING_CALLS]; 940 struct BCState bcs[2+MAX_WAITING_CALLS]; 941 struct PStack *stlist; 942 struct sk_buff_head rq, sq; /* D-channel queues */ 943 int cardnr; 944 char *dlog; 945 int debug; 946 union { 947 struct isac_chip isac; 948 struct hfcd_chip hfcd; 949 struct hfcpci_chip hfcpci; 950 struct hfcsx_chip hfcsx; 951 struct w6692_chip w6692; 952 struct amd7930_chip amd7930; 953 struct icc_chip icc; 954 } dc; 955 u_char *rcvbuf; 956 int rcvidx; 957 struct sk_buff *tx_skb; 958 int tx_cnt; 959 u_long event; 960 struct work_struct tqueue; 961 struct timer_list dbusytimer; 962#ifdef ERROR_STATISTIC 963 int err_crc; 964 int err_tx; 965 int err_rx; 966#endif 967}; 968 969 970#define schedule_event(s, ev) do {test_and_set_bit(ev, &s->event);schedule_work(&s->tqueue); } while(0) 971 972#define MON0_RX 1 973#define MON1_RX 2 974#define MON0_TX 4 975#define MON1_TX 8 976 977 978#ifdef ISDN_CHIP_ISAC 979#undef ISDN_CHIP_ISAC 980#endif 981 982#ifdef CONFIG_HISAX_16_0 983#define CARD_TELES0 1 984#ifndef ISDN_CHIP_ISAC 985#define ISDN_CHIP_ISAC 1 986#endif 987#else 988#define CARD_TELES0 0 989#endif 990 991#ifdef CONFIG_HISAX_16_3 992#define CARD_TELES3 1 993#ifndef ISDN_CHIP_ISAC 994#define ISDN_CHIP_ISAC 1 995#endif 996#else 997#define CARD_TELES3 0 998#endif 999 1000#ifdef CONFIG_HISAX_TELESPCI 1001#define CARD_TELESPCI 1 1002#ifndef ISDN_CHIP_ISAC 1003#define ISDN_CHIP_ISAC 1 1004#endif 1005#else 1006#define CARD_TELESPCI 0 1007#endif 1008 1009#ifdef CONFIG_HISAX_AVM_A1 1010#define CARD_AVM_A1 1 1011#ifndef ISDN_CHIP_ISAC 1012#define ISDN_CHIP_ISAC 1 1013#endif 1014#else 1015#define CARD_AVM_A1 0 1016#endif 1017 1018#ifdef CONFIG_HISAX_AVM_A1_PCMCIA 1019#define CARD_AVM_A1_PCMCIA 1 1020#ifndef ISDN_CHIP_ISAC 1021#define ISDN_CHIP_ISAC 1 1022#endif 1023#else 1024#define CARD_AVM_A1_PCMCIA 0 1025#endif 1026 1027#ifdef CONFIG_HISAX_FRITZPCI 1028#define CARD_FRITZPCI 1 1029#ifndef ISDN_CHIP_ISAC 1030#define ISDN_CHIP_ISAC 1 1031#endif 1032#else 1033#define CARD_FRITZPCI 0 1034#endif 1035 1036#ifdef CONFIG_HISAX_ELSA 1037#define CARD_ELSA 1 1038#ifndef ISDN_CHIP_ISAC 1039#define ISDN_CHIP_ISAC 1 1040#endif 1041#else 1042#define CARD_ELSA 0 1043#endif 1044 1045#ifdef CONFIG_HISAX_IX1MICROR2 1046#define CARD_IX1MICROR2 1 1047#ifndef ISDN_CHIP_ISAC 1048#define ISDN_CHIP_ISAC 1 1049#endif 1050#else 1051#define CARD_IX1MICROR2 0 1052#endif 1053 1054#ifdef CONFIG_HISAX_DIEHLDIVA 1055#define CARD_DIEHLDIVA 1 1056#ifndef ISDN_CHIP_ISAC 1057#define ISDN_CHIP_ISAC 1 1058#endif 1059#else 1060#define CARD_DIEHLDIVA 0 1061#endif 1062 1063#ifdef CONFIG_HISAX_ASUSCOM 1064#define CARD_ASUSCOM 1 1065#ifndef ISDN_CHIP_ISAC 1066#define ISDN_CHIP_ISAC 1 1067#endif 1068#else 1069#define CARD_ASUSCOM 0 1070#endif 1071 1072#ifdef CONFIG_HISAX_TELEINT 1073#define CARD_TELEINT 1 1074#ifndef ISDN_CHIP_ISAC 1075#define ISDN_CHIP_ISAC 1 1076#endif 1077#else 1078#define CARD_TELEINT 0 1079#endif 1080 1081#ifdef CONFIG_HISAX_SEDLBAUER 1082#define CARD_SEDLBAUER 1 1083#ifndef ISDN_CHIP_ISAC 1084#define ISDN_CHIP_ISAC 1 1085#endif 1086#else 1087#define CARD_SEDLBAUER 0 1088#endif 1089 1090#ifdef CONFIG_HISAX_SPORTSTER 1091#define CARD_SPORTSTER 1 1092#ifndef ISDN_CHIP_ISAC 1093#define ISDN_CHIP_ISAC 1 1094#endif 1095#else 1096#define CARD_SPORTSTER 0 1097#endif 1098 1099#ifdef CONFIG_HISAX_MIC 1100#define CARD_MIC 1 1101#ifndef ISDN_CHIP_ISAC 1102#define ISDN_CHIP_ISAC 1 1103#endif 1104#else 1105#define CARD_MIC 0 1106#endif 1107 1108#ifdef CONFIG_HISAX_NETJET 1109#define CARD_NETJET_S 1 1110#ifndef ISDN_CHIP_ISAC 1111#define ISDN_CHIP_ISAC 1 1112#endif 1113#else 1114#define CARD_NETJET_S 0 1115#endif 1116 1117#ifdef CONFIG_HISAX_HFCS 1118#define CARD_HFCS 1 1119#else 1120#define CARD_HFCS 0 1121#endif 1122 1123#ifdef CONFIG_HISAX_HFC_PCI 1124#define CARD_HFC_PCI 1 1125#else 1126#define CARD_HFC_PCI 0 1127#endif 1128 1129#ifdef CONFIG_HISAX_HFC_SX 1130#define CARD_HFC_SX 1 1131#else 1132#define CARD_HFC_SX 0 1133#endif 1134 1135#ifdef CONFIG_HISAX_NICCY 1136#define CARD_NICCY 1 1137#ifndef ISDN_CHIP_ISAC 1138#define ISDN_CHIP_ISAC 1 1139#endif 1140#else 1141#define CARD_NICCY 0 1142#endif 1143 1144#ifdef CONFIG_HISAX_ISURF 1145#define CARD_ISURF 1 1146#ifndef ISDN_CHIP_ISAC 1147#define ISDN_CHIP_ISAC 1 1148#endif 1149#else 1150#define CARD_ISURF 0 1151#endif 1152 1153#ifdef CONFIG_HISAX_S0BOX 1154#define CARD_S0BOX 1 1155#ifndef ISDN_CHIP_ISAC 1156#define ISDN_CHIP_ISAC 1 1157#endif 1158#else 1159#define CARD_S0BOX 0 1160#endif 1161 1162#ifdef CONFIG_HISAX_HSTSAPHIR 1163#define CARD_HSTSAPHIR 1 1164#ifndef ISDN_CHIP_ISAC 1165#define ISDN_CHIP_ISAC 1 1166#endif 1167#else 1168#define CARD_HSTSAPHIR 0 1169#endif 1170 1171#ifdef CONFIG_HISAX_BKM_A4T 1172#define CARD_BKM_A4T 1 1173#ifndef ISDN_CHIP_ISAC 1174#define ISDN_CHIP_ISAC 1 1175#endif 1176#else 1177#define CARD_BKM_A4T 0 1178#endif 1179 1180#ifdef CONFIG_HISAX_SCT_QUADRO 1181#define CARD_SCT_QUADRO 1 1182#ifndef ISDN_CHIP_ISAC 1183#define ISDN_CHIP_ISAC 1 1184#endif 1185#else 1186#define CARD_SCT_QUADRO 0 1187#endif 1188 1189#ifdef CONFIG_HISAX_GAZEL 1190#define CARD_GAZEL 1 1191#ifndef ISDN_CHIP_ISAC 1192#define ISDN_CHIP_ISAC 1 1193#endif 1194#else 1195#define CARD_GAZEL 0 1196#endif 1197 1198#ifdef CONFIG_HISAX_W6692 1199#define CARD_W6692 1 1200#ifndef ISDN_CHIP_W6692 1201#define ISDN_CHIP_W6692 1 1202#endif 1203#else 1204#define CARD_W6692 0 1205#endif 1206 1207#ifdef CONFIG_HISAX_NETJET_U 1208#define CARD_NETJET_U 1 1209#ifndef ISDN_CHIP_ICC 1210#define ISDN_CHIP_ICC 1 1211#endif 1212#ifndef HISAX_UINTERFACE 1213#define HISAX_UINTERFACE 1 1214#endif 1215#else 1216#define CARD_NETJET_U 0 1217#endif 1218 1219#ifdef CONFIG_HISAX_ENTERNOW_PCI 1220#define CARD_FN_ENTERNOW_PCI 1 1221#else 1222#define CARD_FN_ENTERNOW_PCI 0 1223#endif 1224 1225#define TEI_PER_CARD 1 1226 1227/* L1 Debug */ 1228#define L1_DEB_WARN 0x01 1229#define L1_DEB_INTSTAT 0x02 1230#define L1_DEB_ISAC 0x04 1231#define L1_DEB_ISAC_FIFO 0x08 1232#define L1_DEB_HSCX 0x10 1233#define L1_DEB_HSCX_FIFO 0x20 1234#define L1_DEB_LAPD 0x40 1235#define L1_DEB_IPAC 0x80 1236#define L1_DEB_RECEIVE_FRAME 0x100 1237#define L1_DEB_MONITOR 0x200 1238#define DEB_DLOG_HEX 0x400 1239#define DEB_DLOG_VERBOSE 0x800 1240 1241#define L2FRAME_DEBUG 1242 1243#ifdef L2FRAME_DEBUG 1244extern void Logl2Frame(struct IsdnCardState *cs, struct sk_buff *skb, char *buf, int dir); 1245#endif 1246 1247#include "hisax_cfg.h" 1248 1249void init_bcstate(struct IsdnCardState *cs, int bc); 1250 1251void setstack_HiSax(struct PStack *st, struct IsdnCardState *cs); 1252void HiSax_addlist(struct IsdnCardState *sp, struct PStack *st); 1253void HiSax_rmlist(struct IsdnCardState *sp, struct PStack *st); 1254 1255void setstack_l1_B(struct PStack *st); 1256 1257void setstack_tei(struct PStack *st); 1258void setstack_manager(struct PStack *st); 1259 1260void setstack_isdnl2(struct PStack *st, char *debug_id); 1261void releasestack_isdnl2(struct PStack *st); 1262void setstack_transl2(struct PStack *st); 1263void releasestack_transl2(struct PStack *st); 1264void lli_writewakeup(struct PStack *st, int len); 1265 1266void setstack_l3dc(struct PStack *st, struct Channel *chanp); 1267void setstack_l3bc(struct PStack *st, struct Channel *chanp); 1268void releasestack_isdnl3(struct PStack *st); 1269 1270u_char *findie(u_char * p, int size, u_char ie, int wanted_set); 1271int getcallref(u_char * p); 1272int newcallref(void); 1273 1274int FsmNew(struct Fsm *fsm, struct FsmNode *fnlist, int fncount); 1275void FsmFree(struct Fsm *fsm); 1276int FsmEvent(struct FsmInst *fi, int event, void *arg); 1277void FsmChangeState(struct FsmInst *fi, int newstate); 1278void FsmInitTimer(struct FsmInst *fi, struct FsmTimer *ft); 1279int FsmAddTimer(struct FsmTimer *ft, int millisec, int event, 1280 void *arg, int where); 1281void FsmRestartTimer(struct FsmTimer *ft, int millisec, int event, 1282 void *arg, int where); 1283void FsmDelTimer(struct FsmTimer *ft, int where); 1284int jiftime(char *s, long mark); 1285 1286int HiSax_command(isdn_ctrl * ic); 1287int HiSax_writebuf_skb(int id, int chan, int ack, struct sk_buff *skb); 1288void HiSax_putstatus(struct IsdnCardState *cs, char *head, char *fmt, ...); 1289void VHiSax_putstatus(struct IsdnCardState *cs, char *head, char *fmt, va_list args); 1290void HiSax_reportcard(int cardnr, int sel); 1291int QuickHex(char *txt, u_char * p, int cnt); 1292void LogFrame(struct IsdnCardState *cs, u_char * p, int size); 1293void dlogframe(struct IsdnCardState *cs, struct sk_buff *skb, int dir); 1294void iecpy(u_char * dest, u_char * iestart, int ieoffset); 1295#endif /* __KERNEL__ */ 1296 1297/* 1298 * Busywait delay for `jiffs' jiffies 1299 */ 1300#define HZDELAY(jiffs) do { \ 1301 int tout = jiffs; \ 1302 \ 1303 while (tout--) { \ 1304 int loops = USEC_PER_SEC / HZ; \ 1305 while (loops--) \ 1306 udelay(1); \ 1307 } \ 1308 } while (0) 1309 1310int ll_run(struct IsdnCardState *cs, int addfeatures); 1311int CallcNew(void); 1312void CallcFree(void); 1313int CallcNewChan(struct IsdnCardState *cs); 1314void CallcFreeChan(struct IsdnCardState *cs); 1315int Isdnl1New(void); 1316void Isdnl1Free(void); 1317int Isdnl2New(void); 1318void Isdnl2Free(void); 1319int Isdnl3New(void); 1320void Isdnl3Free(void); 1321void init_tei(struct IsdnCardState *cs, int protocol); 1322void release_tei(struct IsdnCardState *cs); 1323char *HiSax_getrev(const char *revision); 1324int TeiNew(void); 1325void TeiFree(void); 1326