1236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman/* 2236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman * Marvell MMC/SD/SDIO driver 3236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman * 4236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman * Authors: Maen Suleiman, Nicolas Pitre 5236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman * Copyright (C) 2008-2009 Marvell Ltd. 6236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman * 7236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman * This program is free software; you can redistribute it and/or modify 8236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman * it under the terms of the GNU General Public License version 2 as 9236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman * published by the Free Software Foundation. 10236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman */ 11236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 12236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman#include <linux/module.h> 13236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman#include <linux/init.h> 14236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman#include <linux/io.h> 15236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman#include <linux/platform_device.h> 16236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman#include <linux/mbus.h> 17236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman#include <linux/delay.h> 18236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman#include <linux/interrupt.h> 19236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman#include <linux/dma-mapping.h> 20236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman#include <linux/scatterlist.h> 21236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman#include <linux/irq.h> 22f4f7561e032777cd7376800ac97352d5b1684d8fAndrew Lunn#include <linux/clk.h> 23236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman#include <linux/gpio.h> 24111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni#include <linux/of_gpio.h> 25111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni#include <linux/of_irq.h> 26236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman#include <linux/mmc/host.h> 273724482d4ce4790d4534bcecebfda2c7133244c7Thomas Petazzoni#include <linux/mmc/slot-gpio.h> 286f1989bc982bc176b0d63e028e9b7f23ae1b4583Thomas Petazzoni#include <linux/pinctrl/consumer.h> 29236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 30236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman#include <asm/sizes.h> 31236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman#include <asm/unaligned.h> 32c02cecb92ed49f36196ee9e29d29c4cfcbad05aeArnd Bergmann#include <linux/platform_data/mmc-mvsdio.h> 33236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 34236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman#include "mvsdio.h" 35236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 36236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman#define DRIVER_NAME "mvsdio" 37236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 382cd1722496de794d336e4670d8de1e46fa84b773Simon Baatzstatic int maxfreq; 39236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleimanstatic int nodma; 40236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 41236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleimanstruct mvsd_host { 42236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman void __iomem *base; 43236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman struct mmc_request *mrq; 44236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman spinlock_t lock; 45236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman unsigned int xfer_mode; 46236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman unsigned int intr_en; 47236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman unsigned int ctrl; 48236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman unsigned int pio_size; 49236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman void *pio_ptr; 50236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman unsigned int sg_frags; 51236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman unsigned int ns_per_clk; 52236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman unsigned int clock; 53236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman unsigned int base_clock; 54236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman struct timer_list timer; 55236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman struct mmc_host *mmc; 56236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman struct device *dev; 57f4f7561e032777cd7376800ac97352d5b1684d8fAndrew Lunn struct clk *clk; 58236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman}; 59236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 60236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman#define mvsd_write(offs, val) writel(val, iobase + (offs)) 61236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman#define mvsd_read(offs) readl(iobase + (offs)) 62236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 63236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleimanstatic int mvsd_setup_data(struct mvsd_host *host, struct mmc_data *data) 64236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman{ 65236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman void __iomem *iobase = host->base; 66236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman unsigned int tmout; 67236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman int tmout_index; 68236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 69a6d297f008e124d0bb4312369191b012c10a1a4eNicolas Pitre /* 70a6d297f008e124d0bb4312369191b012c10a1a4eNicolas Pitre * Hardware weirdness. The FIFO_EMPTY bit of the HW_STATE 71a6d297f008e124d0bb4312369191b012c10a1a4eNicolas Pitre * register is sometimes not set before a while when some 72a6d297f008e124d0bb4312369191b012c10a1a4eNicolas Pitre * "unusual" data block sizes are used (such as with the SWITCH 73a6d297f008e124d0bb4312369191b012c10a1a4eNicolas Pitre * command), even despite the fact that the XFER_DONE interrupt 74a6d297f008e124d0bb4312369191b012c10a1a4eNicolas Pitre * was raised. And if another data transfer starts before 75a6d297f008e124d0bb4312369191b012c10a1a4eNicolas Pitre * this bit comes to good sense (which eventually happens by 76a6d297f008e124d0bb4312369191b012c10a1a4eNicolas Pitre * itself) then the new transfer simply fails with a timeout. 77a6d297f008e124d0bb4312369191b012c10a1a4eNicolas Pitre */ 78a6d297f008e124d0bb4312369191b012c10a1a4eNicolas Pitre if (!(mvsd_read(MVSD_HW_STATE) & (1 << 13))) { 79a6d297f008e124d0bb4312369191b012c10a1a4eNicolas Pitre unsigned long t = jiffies + HZ; 80a6d297f008e124d0bb4312369191b012c10a1a4eNicolas Pitre unsigned int hw_state, count = 0; 81a6d297f008e124d0bb4312369191b012c10a1a4eNicolas Pitre do { 82d7fe833f3fc9a02806c96dd28f48e5e28c8484a8Arnd Bergmann hw_state = mvsd_read(MVSD_HW_STATE); 83a6d297f008e124d0bb4312369191b012c10a1a4eNicolas Pitre if (time_after(jiffies, t)) { 84a6d297f008e124d0bb4312369191b012c10a1a4eNicolas Pitre dev_warn(host->dev, "FIFO_EMPTY bit missing\n"); 85a6d297f008e124d0bb4312369191b012c10a1a4eNicolas Pitre break; 86a6d297f008e124d0bb4312369191b012c10a1a4eNicolas Pitre } 87a6d297f008e124d0bb4312369191b012c10a1a4eNicolas Pitre count++; 88a6d297f008e124d0bb4312369191b012c10a1a4eNicolas Pitre } while (!(hw_state & (1 << 13))); 89a6d297f008e124d0bb4312369191b012c10a1a4eNicolas Pitre dev_dbg(host->dev, "*** wait for FIFO_EMPTY bit " 90a6d297f008e124d0bb4312369191b012c10a1a4eNicolas Pitre "(hw=0x%04x, count=%d, jiffies=%ld)\n", 91a6d297f008e124d0bb4312369191b012c10a1a4eNicolas Pitre hw_state, count, jiffies - (t - HZ)); 92a6d297f008e124d0bb4312369191b012c10a1a4eNicolas Pitre } 93a6d297f008e124d0bb4312369191b012c10a1a4eNicolas Pitre 94236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman /* If timeout=0 then maximum timeout index is used. */ 95236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman tmout = DIV_ROUND_UP(data->timeout_ns, host->ns_per_clk); 96236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman tmout += data->timeout_clks; 97236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman tmout_index = fls(tmout - 1) - 12; 98236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (tmout_index < 0) 99236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman tmout_index = 0; 100236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (tmout_index > MVSD_HOST_CTRL_TMOUT_MAX) 101236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman tmout_index = MVSD_HOST_CTRL_TMOUT_MAX; 102236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 103236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman dev_dbg(host->dev, "data %s at 0x%08x: blocks=%d blksz=%d tmout=%u (%d)\n", 104236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman (data->flags & MMC_DATA_READ) ? "read" : "write", 105236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman (u32)sg_virt(data->sg), data->blocks, data->blksz, 106236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman tmout, tmout_index); 107236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 108236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->ctrl &= ~MVSD_HOST_CTRL_TMOUT_MASK; 109236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->ctrl |= MVSD_HOST_CTRL_TMOUT(tmout_index); 110236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_HOST_CTRL, host->ctrl); 111236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_BLK_COUNT, data->blocks); 112236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_BLK_SIZE, data->blksz); 113236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 114236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (nodma || (data->blksz | data->sg->offset) & 3) { 115236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman /* 116236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman * We cannot do DMA on a buffer which offset or size 117236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman * is not aligned on a 4-byte boundary. 118236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman */ 119236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->pio_size = data->blocks * data->blksz; 120236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->pio_ptr = sg_virt(data->sg); 121236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (!nodma) 122e573d6985e315fd307862c2142dfd41731e9f209Thomas Petazzoni dev_dbg(host->dev, "fallback to PIO for data at 0x%p size %d\n", 123e573d6985e315fd307862c2142dfd41731e9f209Thomas Petazzoni host->pio_ptr, host->pio_size); 124236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman return 1; 125236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } else { 126236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman dma_addr_t phys_addr; 127236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman int dma_dir = (data->flags & MMC_DATA_READ) ? 128236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman DMA_FROM_DEVICE : DMA_TO_DEVICE; 129236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->sg_frags = dma_map_sg(mmc_dev(host->mmc), data->sg, 130236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman data->sg_len, dma_dir); 131236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman phys_addr = sg_dma_address(data->sg); 132236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_SYS_ADDR_LOW, (u32)phys_addr & 0xffff); 133236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_SYS_ADDR_HI, (u32)phys_addr >> 16); 134236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman return 0; 135236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 136236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman} 137236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 138236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleimanstatic void mvsd_request(struct mmc_host *mmc, struct mmc_request *mrq) 139236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman{ 140236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman struct mvsd_host *host = mmc_priv(mmc); 141236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman void __iomem *iobase = host->base; 142236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman struct mmc_command *cmd = mrq->cmd; 143236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman u32 cmdreg = 0, xfer = 0, intr = 0; 144236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman unsigned long flags; 145236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 146236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman BUG_ON(host->mrq != NULL); 147236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->mrq = mrq; 148236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 149236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman dev_dbg(host->dev, "cmd %d (hw state 0x%04x)\n", 150236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman cmd->opcode, mvsd_read(MVSD_HW_STATE)); 151236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 152236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman cmdreg = MVSD_CMD_INDEX(cmd->opcode); 153236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 154236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (cmd->flags & MMC_RSP_BUSY) 155236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman cmdreg |= MVSD_CMD_RSP_48BUSY; 156236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman else if (cmd->flags & MMC_RSP_136) 157236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman cmdreg |= MVSD_CMD_RSP_136; 158236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman else if (cmd->flags & MMC_RSP_PRESENT) 159236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman cmdreg |= MVSD_CMD_RSP_48; 160236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman else 161236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman cmdreg |= MVSD_CMD_RSP_NONE; 162236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 163236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (cmd->flags & MMC_RSP_CRC) 164236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman cmdreg |= MVSD_CMD_CHECK_CMDCRC; 165236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 166236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (cmd->flags & MMC_RSP_OPCODE) 167236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman cmdreg |= MVSD_CMD_INDX_CHECK; 168236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 169236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (cmd->flags & MMC_RSP_PRESENT) { 170236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman cmdreg |= MVSD_UNEXPECTED_RESP; 171236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman intr |= MVSD_NOR_UNEXP_RSP; 172236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 173236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 174236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (mrq->data) { 175236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman struct mmc_data *data = mrq->data; 176236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman int pio; 177236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 178236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman cmdreg |= MVSD_CMD_DATA_PRESENT | MVSD_CMD_CHECK_DATACRC16; 179236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman xfer |= MVSD_XFER_MODE_HW_WR_DATA_EN; 180236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (data->flags & MMC_DATA_READ) 181236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman xfer |= MVSD_XFER_MODE_TO_HOST; 182236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 183236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman pio = mvsd_setup_data(host, data); 184236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (pio) { 185236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman xfer |= MVSD_XFER_MODE_PIO; 186236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman /* PIO section of mvsd_irq has comments on those bits */ 187236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (data->flags & MMC_DATA_WRITE) 188236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman intr |= MVSD_NOR_TX_AVAIL; 189236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman else if (host->pio_size > 32) 190236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman intr |= MVSD_NOR_RX_FIFO_8W; 191236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman else 192236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman intr |= MVSD_NOR_RX_READY; 193236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 194236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 195236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (data->stop) { 196236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman struct mmc_command *stop = data->stop; 197236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman u32 cmd12reg = 0; 198236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 199236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_AUTOCMD12_ARG_LOW, stop->arg & 0xffff); 200236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_AUTOCMD12_ARG_HI, stop->arg >> 16); 201236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 202236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (stop->flags & MMC_RSP_BUSY) 203236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman cmd12reg |= MVSD_AUTOCMD12_BUSY; 204236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (stop->flags & MMC_RSP_OPCODE) 205236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman cmd12reg |= MVSD_AUTOCMD12_INDX_CHECK; 206236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman cmd12reg |= MVSD_AUTOCMD12_INDEX(stop->opcode); 207236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_AUTOCMD12_CMD, cmd12reg); 208236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 209236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman xfer |= MVSD_XFER_MODE_AUTO_CMD12; 210236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman intr |= MVSD_NOR_AUTOCMD12_DONE; 211236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } else { 212236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman intr |= MVSD_NOR_XFER_DONE; 213236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 214236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } else { 215236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman intr |= MVSD_NOR_CMD_DONE; 216236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 217236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 218236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_ARG_LOW, cmd->arg & 0xffff); 219236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_ARG_HI, cmd->arg >> 16); 220236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 221236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman spin_lock_irqsave(&host->lock, flags); 222236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 223236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->xfer_mode &= MVSD_XFER_MODE_INT_CHK_EN; 224236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->xfer_mode |= xfer; 225236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_XFER_MODE, host->xfer_mode); 226236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 227236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_NOR_INTR_STATUS, ~MVSD_NOR_CARD_INT); 228236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_ERR_INTR_STATUS, 0xffff); 229236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_CMD, cmdreg); 230236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 231236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->intr_en &= MVSD_NOR_CARD_INT; 232236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->intr_en |= intr | MVSD_NOR_ERROR; 233236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_NOR_INTR_EN, host->intr_en); 234236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_ERR_INTR_EN, 0xffff); 235236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 236236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mod_timer(&host->timer, jiffies + 5 * HZ); 237236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 238236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman spin_unlock_irqrestore(&host->lock, flags); 239236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman} 240236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 241236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleimanstatic u32 mvsd_finish_cmd(struct mvsd_host *host, struct mmc_command *cmd, 242236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman u32 err_status) 243236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman{ 244236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman void __iomem *iobase = host->base; 245236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 246236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (cmd->flags & MMC_RSP_136) { 247236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman unsigned int response[8], i; 248236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman for (i = 0; i < 8; i++) 249236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman response[i] = mvsd_read(MVSD_RSP(i)); 250236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman cmd->resp[0] = ((response[0] & 0x03ff) << 22) | 251236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman ((response[1] & 0xffff) << 6) | 252236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman ((response[2] & 0xfc00) >> 10); 253236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman cmd->resp[1] = ((response[2] & 0x03ff) << 22) | 254236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman ((response[3] & 0xffff) << 6) | 255236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman ((response[4] & 0xfc00) >> 10); 256236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman cmd->resp[2] = ((response[4] & 0x03ff) << 22) | 257236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman ((response[5] & 0xffff) << 6) | 258236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman ((response[6] & 0xfc00) >> 10); 259236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman cmd->resp[3] = ((response[6] & 0x03ff) << 22) | 260236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman ((response[7] & 0x3fff) << 8); 261236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } else if (cmd->flags & MMC_RSP_PRESENT) { 262236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman unsigned int response[3], i; 263236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman for (i = 0; i < 3; i++) 264236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman response[i] = mvsd_read(MVSD_RSP(i)); 265236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman cmd->resp[0] = ((response[2] & 0x003f) << (8 - 8)) | 266236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman ((response[1] & 0xffff) << (14 - 8)) | 267236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman ((response[0] & 0x03ff) << (30 - 8)); 268236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman cmd->resp[1] = ((response[0] & 0xfc00) >> 10); 269236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman cmd->resp[2] = 0; 270236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman cmd->resp[3] = 0; 271236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 272236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 273236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (err_status & MVSD_ERR_CMD_TIMEOUT) { 274236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman cmd->error = -ETIMEDOUT; 275236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } else if (err_status & (MVSD_ERR_CMD_CRC | MVSD_ERR_CMD_ENDBIT | 276236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman MVSD_ERR_CMD_INDEX | MVSD_ERR_CMD_STARTBIT)) { 277236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman cmd->error = -EILSEQ; 278236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 279236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman err_status &= ~(MVSD_ERR_CMD_TIMEOUT | MVSD_ERR_CMD_CRC | 280236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman MVSD_ERR_CMD_ENDBIT | MVSD_ERR_CMD_INDEX | 281236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman MVSD_ERR_CMD_STARTBIT); 282236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 283236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman return err_status; 284236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman} 285236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 286236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleimanstatic u32 mvsd_finish_data(struct mvsd_host *host, struct mmc_data *data, 287236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman u32 err_status) 288236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman{ 289236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman void __iomem *iobase = host->base; 290236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 291236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (host->pio_ptr) { 292236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->pio_ptr = NULL; 293236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->pio_size = 0; 294236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } else { 295236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->sg_frags, 296236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman (data->flags & MMC_DATA_READ) ? 297236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman DMA_FROM_DEVICE : DMA_TO_DEVICE); 298236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 299236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 300236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (err_status & MVSD_ERR_DATA_TIMEOUT) 301236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman data->error = -ETIMEDOUT; 302236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman else if (err_status & (MVSD_ERR_DATA_CRC | MVSD_ERR_DATA_ENDBIT)) 303236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman data->error = -EILSEQ; 304236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman else if (err_status & MVSD_ERR_XFER_SIZE) 305236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman data->error = -EBADE; 306236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman err_status &= ~(MVSD_ERR_DATA_TIMEOUT | MVSD_ERR_DATA_CRC | 307236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman MVSD_ERR_DATA_ENDBIT | MVSD_ERR_XFER_SIZE); 308236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 309236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman dev_dbg(host->dev, "data done: blocks_left=%d, bytes_left=%d\n", 310236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_read(MVSD_CURR_BLK_LEFT), mvsd_read(MVSD_CURR_BYTE_LEFT)); 311236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman data->bytes_xfered = 312236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman (data->blocks - mvsd_read(MVSD_CURR_BLK_LEFT)) * data->blksz; 313236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman /* We can't be sure about the last block when errors are detected */ 314236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (data->bytes_xfered && data->error) 315236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman data->bytes_xfered -= data->blksz; 316236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 317236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman /* Handle Auto cmd 12 response */ 318236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (data->stop) { 319236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman unsigned int response[3], i; 320236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman for (i = 0; i < 3; i++) 321236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman response[i] = mvsd_read(MVSD_AUTO_RSP(i)); 322236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman data->stop->resp[0] = ((response[2] & 0x003f) << (8 - 8)) | 323236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman ((response[1] & 0xffff) << (14 - 8)) | 324236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman ((response[0] & 0x03ff) << (30 - 8)); 325236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman data->stop->resp[1] = ((response[0] & 0xfc00) >> 10); 326236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman data->stop->resp[2] = 0; 327236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman data->stop->resp[3] = 0; 328236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 329236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (err_status & MVSD_ERR_AUTOCMD12) { 330236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman u32 err_cmd12 = mvsd_read(MVSD_AUTOCMD12_ERR_STATUS); 331236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman dev_dbg(host->dev, "c12err 0x%04x\n", err_cmd12); 332236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (err_cmd12 & MVSD_AUTOCMD12_ERR_NOTEXE) 333236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman data->stop->error = -ENOEXEC; 334236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman else if (err_cmd12 & MVSD_AUTOCMD12_ERR_TIMEOUT) 335236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman data->stop->error = -ETIMEDOUT; 336236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman else if (err_cmd12) 337236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman data->stop->error = -EILSEQ; 338236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman err_status &= ~MVSD_ERR_AUTOCMD12; 339236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 340236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 341236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 342236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman return err_status; 343236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman} 344236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 345236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleimanstatic irqreturn_t mvsd_irq(int irq, void *dev) 346236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman{ 347236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman struct mvsd_host *host = dev; 348236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman void __iomem *iobase = host->base; 349236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman u32 intr_status, intr_done_mask; 350236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman int irq_handled = 0; 351236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 352236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman intr_status = mvsd_read(MVSD_NOR_INTR_STATUS); 353236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman dev_dbg(host->dev, "intr 0x%04x intr_en 0x%04x hw_state 0x%04x\n", 354236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman intr_status, mvsd_read(MVSD_NOR_INTR_EN), 355236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_read(MVSD_HW_STATE)); 356236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 357b78871d0cf13d37e7bdcf39c49782ca3885343bcSebastian Hesselbarth /* 358b78871d0cf13d37e7bdcf39c49782ca3885343bcSebastian Hesselbarth * It looks like, SDIO IP can issue one late, spurious irq 359b78871d0cf13d37e7bdcf39c49782ca3885343bcSebastian Hesselbarth * although all irqs should be disabled. To work around this, 360b78871d0cf13d37e7bdcf39c49782ca3885343bcSebastian Hesselbarth * bail out early, if we didn't expect any irqs to occur. 361b78871d0cf13d37e7bdcf39c49782ca3885343bcSebastian Hesselbarth */ 362b78871d0cf13d37e7bdcf39c49782ca3885343bcSebastian Hesselbarth if (!mvsd_read(MVSD_NOR_INTR_EN) && !mvsd_read(MVSD_ERR_INTR_EN)) { 363b78871d0cf13d37e7bdcf39c49782ca3885343bcSebastian Hesselbarth dev_dbg(host->dev, "spurious irq detected intr 0x%04x intr_en 0x%04x erri 0x%04x erri_en 0x%04x\n", 364b78871d0cf13d37e7bdcf39c49782ca3885343bcSebastian Hesselbarth mvsd_read(MVSD_NOR_INTR_STATUS), 365b78871d0cf13d37e7bdcf39c49782ca3885343bcSebastian Hesselbarth mvsd_read(MVSD_NOR_INTR_EN), 366b78871d0cf13d37e7bdcf39c49782ca3885343bcSebastian Hesselbarth mvsd_read(MVSD_ERR_INTR_STATUS), 367b78871d0cf13d37e7bdcf39c49782ca3885343bcSebastian Hesselbarth mvsd_read(MVSD_ERR_INTR_EN)); 368b78871d0cf13d37e7bdcf39c49782ca3885343bcSebastian Hesselbarth return IRQ_HANDLED; 369b78871d0cf13d37e7bdcf39c49782ca3885343bcSebastian Hesselbarth } 370b78871d0cf13d37e7bdcf39c49782ca3885343bcSebastian Hesselbarth 371236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman spin_lock(&host->lock); 372236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 373236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman /* PIO handling, if needed. Messy business... */ 374236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (host->pio_size && 375236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman (intr_status & host->intr_en & 376236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman (MVSD_NOR_RX_READY | MVSD_NOR_RX_FIFO_8W))) { 377236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman u16 *p = host->pio_ptr; 378236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman int s = host->pio_size; 379236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman while (s >= 32 && (intr_status & MVSD_NOR_RX_FIFO_8W)) { 380236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman readsw(iobase + MVSD_FIFO, p, 16); 381236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman p += 16; 382236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman s -= 32; 383236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman intr_status = mvsd_read(MVSD_NOR_INTR_STATUS); 384236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 385236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman /* 386236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman * Normally we'd use < 32 here, but the RX_FIFO_8W bit 387236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman * doesn't appear to assert when there is exactly 32 bytes 388236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman * (8 words) left to fetch in a transfer. 389236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman */ 390236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (s <= 32) { 391236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman while (s >= 4 && (intr_status & MVSD_NOR_RX_READY)) { 392236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman put_unaligned(mvsd_read(MVSD_FIFO), p++); 393236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman put_unaligned(mvsd_read(MVSD_FIFO), p++); 394236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman s -= 4; 395236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman intr_status = mvsd_read(MVSD_NOR_INTR_STATUS); 396236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 397236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (s && s < 4 && (intr_status & MVSD_NOR_RX_READY)) { 398236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman u16 val[2] = {0, 0}; 399236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman val[0] = mvsd_read(MVSD_FIFO); 400236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman val[1] = mvsd_read(MVSD_FIFO); 4016cdbf734493d6e8f5afc6f539b82897772809d43Nicolas Pitre memcpy(p, ((void *)&val) + 4 - s, s); 402236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman s = 0; 403236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman intr_status = mvsd_read(MVSD_NOR_INTR_STATUS); 404236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 405236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (s == 0) { 406236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->intr_en &= 407236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman ~(MVSD_NOR_RX_READY | MVSD_NOR_RX_FIFO_8W); 408236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_NOR_INTR_EN, host->intr_en); 409236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } else if (host->intr_en & MVSD_NOR_RX_FIFO_8W) { 410236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->intr_en &= ~MVSD_NOR_RX_FIFO_8W; 411236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->intr_en |= MVSD_NOR_RX_READY; 412236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_NOR_INTR_EN, host->intr_en); 413236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 414236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 415236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman dev_dbg(host->dev, "pio %d intr 0x%04x hw_state 0x%04x\n", 416236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman s, intr_status, mvsd_read(MVSD_HW_STATE)); 417236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->pio_ptr = p; 418236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->pio_size = s; 419236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman irq_handled = 1; 420236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } else if (host->pio_size && 421236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman (intr_status & host->intr_en & 422236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman (MVSD_NOR_TX_AVAIL | MVSD_NOR_TX_FIFO_8W))) { 423236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman u16 *p = host->pio_ptr; 424236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman int s = host->pio_size; 425236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman /* 426236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman * The TX_FIFO_8W bit is unreliable. When set, bursting 427236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman * 16 halfwords all at once in the FIFO drops data. Actually 428236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman * TX_AVAIL does go off after only one word is pushed even if 429236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman * TX_FIFO_8W remains set. 430236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman */ 431236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman while (s >= 4 && (intr_status & MVSD_NOR_TX_AVAIL)) { 432236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_FIFO, get_unaligned(p++)); 433236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_FIFO, get_unaligned(p++)); 434236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman s -= 4; 435236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman intr_status = mvsd_read(MVSD_NOR_INTR_STATUS); 436236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 437236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (s < 4) { 438236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (s && (intr_status & MVSD_NOR_TX_AVAIL)) { 439236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman u16 val[2] = {0, 0}; 4406cdbf734493d6e8f5afc6f539b82897772809d43Nicolas Pitre memcpy(((void *)&val) + 4 - s, p, s); 441236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_FIFO, val[0]); 442236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_FIFO, val[1]); 443236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman s = 0; 444236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman intr_status = mvsd_read(MVSD_NOR_INTR_STATUS); 445236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 446236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (s == 0) { 447236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->intr_en &= 448236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman ~(MVSD_NOR_TX_AVAIL | MVSD_NOR_TX_FIFO_8W); 449236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_NOR_INTR_EN, host->intr_en); 450236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 451236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 452236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman dev_dbg(host->dev, "pio %d intr 0x%04x hw_state 0x%04x\n", 453236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman s, intr_status, mvsd_read(MVSD_HW_STATE)); 454236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->pio_ptr = p; 455236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->pio_size = s; 456236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman irq_handled = 1; 457236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 458236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 459236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_NOR_INTR_STATUS, intr_status); 460236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 461236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman intr_done_mask = MVSD_NOR_CARD_INT | MVSD_NOR_RX_READY | 462236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman MVSD_NOR_RX_FIFO_8W | MVSD_NOR_TX_FIFO_8W; 463236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (intr_status & host->intr_en & ~intr_done_mask) { 464236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman struct mmc_request *mrq = host->mrq; 465236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman struct mmc_command *cmd = mrq->cmd; 466236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman u32 err_status = 0; 467236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 468236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman del_timer(&host->timer); 469236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->mrq = NULL; 470236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 471236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->intr_en &= MVSD_NOR_CARD_INT; 472236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_NOR_INTR_EN, host->intr_en); 473236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_ERR_INTR_EN, 0); 474236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 475236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman spin_unlock(&host->lock); 476236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 477236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (intr_status & MVSD_NOR_UNEXP_RSP) { 478236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman cmd->error = -EPROTO; 479236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } else if (intr_status & MVSD_NOR_ERROR) { 480236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman err_status = mvsd_read(MVSD_ERR_INTR_STATUS); 481236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman dev_dbg(host->dev, "err 0x%04x\n", err_status); 482236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 483236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 484236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman err_status = mvsd_finish_cmd(host, cmd, err_status); 485236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (mrq->data) 486236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman err_status = mvsd_finish_data(host, mrq->data, err_status); 487236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (err_status) { 488e573d6985e315fd307862c2142dfd41731e9f209Thomas Petazzoni dev_err(host->dev, "unhandled error status %#04x\n", 489e573d6985e315fd307862c2142dfd41731e9f209Thomas Petazzoni err_status); 490236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman cmd->error = -ENOMSG; 491236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 492236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 493236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mmc_request_done(host->mmc, mrq); 494236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman irq_handled = 1; 495236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } else 496236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman spin_unlock(&host->lock); 497236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 498236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (intr_status & MVSD_NOR_CARD_INT) { 499236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mmc_signal_sdio_irq(host->mmc); 500236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman irq_handled = 1; 501236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 502236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 503236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (irq_handled) 504236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman return IRQ_HANDLED; 505236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 506e573d6985e315fd307862c2142dfd41731e9f209Thomas Petazzoni dev_err(host->dev, "unhandled interrupt status=0x%04x en=0x%04x pio=%d\n", 507e573d6985e315fd307862c2142dfd41731e9f209Thomas Petazzoni intr_status, host->intr_en, host->pio_size); 508236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman return IRQ_NONE; 509236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman} 510236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 511236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleimanstatic void mvsd_timeout_timer(unsigned long data) 512236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman{ 513236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman struct mvsd_host *host = (struct mvsd_host *)data; 514236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman void __iomem *iobase = host->base; 515236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman struct mmc_request *mrq; 516236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman unsigned long flags; 517236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 518236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman spin_lock_irqsave(&host->lock, flags); 519236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mrq = host->mrq; 520236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (mrq) { 521e573d6985e315fd307862c2142dfd41731e9f209Thomas Petazzoni dev_err(host->dev, "Timeout waiting for hardware interrupt.\n"); 522e573d6985e315fd307862c2142dfd41731e9f209Thomas Petazzoni dev_err(host->dev, "hw_state=0x%04x, intr_status=0x%04x intr_en=0x%04x\n", 523e573d6985e315fd307862c2142dfd41731e9f209Thomas Petazzoni mvsd_read(MVSD_HW_STATE), 524e573d6985e315fd307862c2142dfd41731e9f209Thomas Petazzoni mvsd_read(MVSD_NOR_INTR_STATUS), 525e573d6985e315fd307862c2142dfd41731e9f209Thomas Petazzoni mvsd_read(MVSD_NOR_INTR_EN)); 526236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 527236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->mrq = NULL; 528236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 529236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_SW_RESET, MVSD_SW_RESET_NOW); 530236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 531236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->xfer_mode &= MVSD_XFER_MODE_INT_CHK_EN; 532236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_XFER_MODE, host->xfer_mode); 533236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 534236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->intr_en &= MVSD_NOR_CARD_INT; 535236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_NOR_INTR_EN, host->intr_en); 536236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_ERR_INTR_EN, 0); 537236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_ERR_INTR_STATUS, 0xffff); 538236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 539236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mrq->cmd->error = -ETIMEDOUT; 540236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_finish_cmd(host, mrq->cmd, 0); 541236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (mrq->data) { 542236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mrq->data->error = -ETIMEDOUT; 543236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_finish_data(host, mrq->data, 0); 544236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 545236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 546236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman spin_unlock_irqrestore(&host->lock, flags); 547236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 548236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (mrq) 549236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mmc_request_done(host->mmc, mrq); 550236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman} 551236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 552236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleimanstatic void mvsd_enable_sdio_irq(struct mmc_host *mmc, int enable) 553236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman{ 554236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman struct mvsd_host *host = mmc_priv(mmc); 555236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman void __iomem *iobase = host->base; 556236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman unsigned long flags; 557236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 558236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman spin_lock_irqsave(&host->lock, flags); 559236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (enable) { 560236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->xfer_mode |= MVSD_XFER_MODE_INT_CHK_EN; 561236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->intr_en |= MVSD_NOR_CARD_INT; 562236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } else { 563236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->xfer_mode &= ~MVSD_XFER_MODE_INT_CHK_EN; 564236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->intr_en &= ~MVSD_NOR_CARD_INT; 565236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 566236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_XFER_MODE, host->xfer_mode); 567236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_NOR_INTR_EN, host->intr_en); 568236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman spin_unlock_irqrestore(&host->lock, flags); 569236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman} 570236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 571236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleimanstatic void mvsd_power_up(struct mvsd_host *host) 572236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman{ 573236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman void __iomem *iobase = host->base; 574236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman dev_dbg(host->dev, "power up\n"); 575236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_NOR_INTR_EN, 0); 576236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_ERR_INTR_EN, 0); 577236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_SW_RESET, MVSD_SW_RESET_NOW); 578236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_XFER_MODE, 0); 579236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_NOR_STATUS_EN, 0xffff); 580236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_ERR_STATUS_EN, 0xffff); 581236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_NOR_INTR_STATUS, 0xffff); 582236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_ERR_INTR_STATUS, 0xffff); 583236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman} 584236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 585236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleimanstatic void mvsd_power_down(struct mvsd_host *host) 586236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman{ 587236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman void __iomem *iobase = host->base; 588236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman dev_dbg(host->dev, "power down\n"); 589236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_NOR_INTR_EN, 0); 590236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_ERR_INTR_EN, 0); 591236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_SW_RESET, MVSD_SW_RESET_NOW); 592236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_XFER_MODE, MVSD_XFER_MODE_STOP_CLK); 593236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_NOR_STATUS_EN, 0); 594236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_ERR_STATUS_EN, 0); 595236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_NOR_INTR_STATUS, 0xffff); 596236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_ERR_INTR_STATUS, 0xffff); 597236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman} 598236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 599236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleimanstatic void mvsd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 600236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman{ 601236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman struct mvsd_host *host = mmc_priv(mmc); 602236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman void __iomem *iobase = host->base; 603236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman u32 ctrl_reg = 0; 604236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 605236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (ios->power_mode == MMC_POWER_UP) 606236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_power_up(host); 607236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 608236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (ios->clock == 0) { 609236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_XFER_MODE, MVSD_XFER_MODE_STOP_CLK); 610236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_CLK_DIV, MVSD_BASE_DIV_MAX); 611236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->clock = 0; 612236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman dev_dbg(host->dev, "clock off\n"); 613236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } else if (ios->clock != host->clock) { 614236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman u32 m = DIV_ROUND_UP(host->base_clock, ios->clock) - 1; 615236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (m > MVSD_BASE_DIV_MAX) 616236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman m = MVSD_BASE_DIV_MAX; 617236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_CLK_DIV, m); 618236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->clock = ios->clock; 619236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->ns_per_clk = 1000000000 / (host->base_clock / (m+1)); 620236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman dev_dbg(host->dev, "clock=%d (%d), div=0x%04x\n", 621236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman ios->clock, host->base_clock / (m+1), m); 622236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 623236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 624236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman /* default transfer mode */ 625236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman ctrl_reg |= MVSD_HOST_CTRL_BIG_ENDIAN; 626236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman ctrl_reg &= ~MVSD_HOST_CTRL_LSB_FIRST; 627236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 628236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman /* default to maximum timeout */ 629236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman ctrl_reg |= MVSD_HOST_CTRL_TMOUT_MASK; 630236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman ctrl_reg |= MVSD_HOST_CTRL_TMOUT_EN; 631236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 632236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (ios->bus_mode == MMC_BUSMODE_PUSHPULL) 633236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman ctrl_reg |= MVSD_HOST_CTRL_PUSH_PULL_EN; 634236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 635236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (ios->bus_width == MMC_BUS_WIDTH_4) 636236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman ctrl_reg |= MVSD_HOST_CTRL_DATA_WIDTH_4_BITS; 637236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 6389ca6944cbfad11f2368cf10292e7f3eb036386c2Nicolas Pitre /* 6399ca6944cbfad11f2368cf10292e7f3eb036386c2Nicolas Pitre * The HI_SPEED_EN bit is causing trouble with many (but not all) 6409ca6944cbfad11f2368cf10292e7f3eb036386c2Nicolas Pitre * high speed SD, SDHC and SDIO cards. Not enabling that bit 6419ca6944cbfad11f2368cf10292e7f3eb036386c2Nicolas Pitre * makes all cards work. So let's just ignore that bit for now 6429ca6944cbfad11f2368cf10292e7f3eb036386c2Nicolas Pitre * and revisit this issue if problems for not enabling this bit 6439ca6944cbfad11f2368cf10292e7f3eb036386c2Nicolas Pitre * are ever reported. 6449ca6944cbfad11f2368cf10292e7f3eb036386c2Nicolas Pitre */ 6459ca6944cbfad11f2368cf10292e7f3eb036386c2Nicolas Pitre#if 0 646236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (ios->timing == MMC_TIMING_MMC_HS || 647236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman ios->timing == MMC_TIMING_SD_HS) 648236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman ctrl_reg |= MVSD_HOST_CTRL_HI_SPEED_EN; 6499ca6944cbfad11f2368cf10292e7f3eb036386c2Nicolas Pitre#endif 650236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 651236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->ctrl = ctrl_reg; 652236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_write(MVSD_HOST_CTRL, ctrl_reg); 653236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman dev_dbg(host->dev, "ctrl 0x%04x: %s %s %s\n", ctrl_reg, 654236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman (ctrl_reg & MVSD_HOST_CTRL_PUSH_PULL_EN) ? 655236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman "push-pull" : "open-drain", 656236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman (ctrl_reg & MVSD_HOST_CTRL_DATA_WIDTH_4_BITS) ? 657236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman "4bit-width" : "1bit-width", 658236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman (ctrl_reg & MVSD_HOST_CTRL_HI_SPEED_EN) ? 659236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman "high-speed" : ""); 660236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 661236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (ios->power_mode == MMC_POWER_OFF) 662236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_power_down(host); 663236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman} 664236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 665236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleimanstatic const struct mmc_host_ops mvsd_ops = { 666236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman .request = mvsd_request, 6673724482d4ce4790d4534bcecebfda2c7133244c7Thomas Petazzoni .get_ro = mmc_gpio_get_ro, 668236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman .set_ios = mvsd_set_ios, 669236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman .enable_sdio_irq = mvsd_enable_sdio_irq, 670236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman}; 671236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 6721867adee6ed7793a256ecdd623e1337988223c09Johan Hovoldstatic void 67363a9332b232bdab0df6ef18a9f39e8d58a82bda4Andrew Lunnmv_conf_mbus_windows(struct mvsd_host *host, 67463a9332b232bdab0df6ef18a9f39e8d58a82bda4Andrew Lunn const struct mbus_dram_target_info *dram) 675236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman{ 676236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman void __iomem *iobase = host->base; 677236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman int i; 678236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 679236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman for (i = 0; i < 4; i++) { 680236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman writel(0, iobase + MVSD_WINDOW_CTRL(i)); 681236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman writel(0, iobase + MVSD_WINDOW_BASE(i)); 682236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 683236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 684236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman for (i = 0; i < dram->num_cs; i++) { 68563a9332b232bdab0df6ef18a9f39e8d58a82bda4Andrew Lunn const struct mbus_dram_window *cs = dram->cs + i; 686236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman writel(((cs->size - 1) & 0xffff0000) | 687236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman (cs->mbus_attr << 8) | 688236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman (dram->mbus_dram_target_id << 4) | 1, 689236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman iobase + MVSD_WINDOW_CTRL(i)); 690236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman writel(cs->base, iobase + MVSD_WINDOW_BASE(i)); 691236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 692236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman} 693236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 6941867adee6ed7793a256ecdd623e1337988223c09Johan Hovoldstatic int mvsd_probe(struct platform_device *pdev) 695236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman{ 696111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni struct device_node *np = pdev->dev.of_node; 697236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman struct mmc_host *mmc = NULL; 698236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman struct mvsd_host *host = NULL; 69963a9332b232bdab0df6ef18a9f39e8d58a82bda4Andrew Lunn const struct mbus_dram_target_info *dram; 700236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman struct resource *r; 701236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman int ret, irq; 7026f1989bc982bc176b0d63e028e9b7f23ae1b4583Thomas Petazzoni struct pinctrl *pinctrl; 703236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 704236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 705236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman irq = platform_get_irq(pdev, 0); 706111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni if (!r || irq < 0) 707236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman return -ENXIO; 708236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 709236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mmc = mmc_alloc_host(sizeof(struct mvsd_host), &pdev->dev); 710236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (!mmc) { 711236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman ret = -ENOMEM; 712236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman goto out; 713236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 714236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 715236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host = mmc_priv(mmc); 716236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->mmc = mmc; 717236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman host->dev = &pdev->dev; 718111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni 7196f1989bc982bc176b0d63e028e9b7f23ae1b4583Thomas Petazzoni pinctrl = devm_pinctrl_get_select_default(&pdev->dev); 7206f1989bc982bc176b0d63e028e9b7f23ae1b4583Thomas Petazzoni if (IS_ERR(pinctrl)) 7216f1989bc982bc176b0d63e028e9b7f23ae1b4583Thomas Petazzoni dev_warn(&pdev->dev, "no pins associated\n"); 7226f1989bc982bc176b0d63e028e9b7f23ae1b4583Thomas Petazzoni 723111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni /* 724111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni * Some non-DT platforms do not pass a clock, and the clock 725111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni * frequency is passed through platform_data. On DT platforms, 726111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni * a clock must always be passed, even if there is no gatable 727111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni * clock associated to the SDIO interface (it can simply be a 728111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni * fixed rate clock). 729111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni */ 730111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni host->clk = devm_clk_get(&pdev->dev, NULL); 731111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni if (!IS_ERR(host->clk)) 732111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni clk_prepare_enable(host->clk); 733111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni 7342cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz mmc->ops = &mvsd_ops; 7352cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz 7362cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; 7372cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz 7382cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz mmc->f_min = DIV_ROUND_UP(host->base_clock, MVSD_BASE_DIV_MAX); 7392cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz mmc->f_max = MVSD_CLOCKRATE_MAX; 7402cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz 7412cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz mmc->max_blk_size = 2048; 7422cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz mmc->max_blk_count = 65535; 7432cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz 7442cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz mmc->max_segs = 1; 7452cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz mmc->max_seg_size = mmc->max_blk_size * mmc->max_blk_count; 7462cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 7472cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz 748111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni if (np) { 749111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni if (IS_ERR(host->clk)) { 750111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni dev_err(&pdev->dev, "DT platforms must have a clock associated\n"); 751111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni ret = -EINVAL; 752111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni goto out; 753111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni } 754111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni 755111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni host->base_clock = clk_get_rate(host->clk) / 2; 7562cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz ret = mmc_of_parse(mmc); 7572cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz if (ret < 0) 7582cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz goto out; 759111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni } else { 760111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni const struct mvsdio_platform_data *mvsd_data; 7612cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz 762111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni mvsd_data = pdev->dev.platform_data; 763111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni if (!mvsd_data) { 764111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni ret = -ENXIO; 765111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni goto out; 766111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni } 7672cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ | 7682cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; 769111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni host->base_clock = mvsd_data->clock / 2; 7702cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz /* GPIO 0 regarded as invalid for backward compatibility */ 7712cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz if (mvsd_data->gpio_card_detect && 7722cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz gpio_is_valid(mvsd_data->gpio_card_detect)) { 7732cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz ret = mmc_gpio_request_cd(mmc, 774214fc309d1387e822d606a33a10e31cacfe83520Laurent Pinchart mvsd_data->gpio_card_detect, 775214fc309d1387e822d606a33a10e31cacfe83520Laurent Pinchart 0); 7762cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz if (ret) 7772cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz goto out; 7782cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz } else { 7792cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz mmc->caps |= MMC_CAP_NEEDS_POLL; 7802cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz } 781236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 7822cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz if (mvsd_data->gpio_write_protect && 7832cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz gpio_is_valid(mvsd_data->gpio_write_protect)) 7842cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz mmc_gpio_request_ro(mmc, mvsd_data->gpio_write_protect); 7852cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz } 786236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 7872cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz if (maxfreq) 7882cd1722496de794d336e4670d8de1e46fa84b773Simon Baatz mmc->f_max = maxfreq; 789236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 790236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman spin_lock_init(&host->lock); 791236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 792e02d2930040f993922e9c4449e3d90c8040cfedcSachin Kamat host->base = devm_ioremap_resource(&pdev->dev, r); 793e02d2930040f993922e9c4449e3d90c8040cfedcSachin Kamat if (IS_ERR(host->base)) { 794e02d2930040f993922e9c4449e3d90c8040cfedcSachin Kamat ret = PTR_ERR(host->base); 795236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman goto out; 796236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman } 797236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 798236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman /* (Re-)program MBUS remapping windows if we are asked to. */ 79963a9332b232bdab0df6ef18a9f39e8d58a82bda4Andrew Lunn dram = mv_mbus_dram_info(); 80063a9332b232bdab0df6ef18a9f39e8d58a82bda4Andrew Lunn if (dram) 80163a9332b232bdab0df6ef18a9f39e8d58a82bda4Andrew Lunn mv_conf_mbus_windows(host, dram); 802236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 803236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mvsd_power_down(host); 804236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 805f42abc72da2e77efefd547562a92ddd18926b48bAndrew Lunn ret = devm_request_irq(&pdev->dev, irq, mvsd_irq, 0, DRIVER_NAME, host); 806236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (ret) { 807e573d6985e315fd307862c2142dfd41731e9f209Thomas Petazzoni dev_err(&pdev->dev, "cannot assign irq %d\n", irq); 808236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman goto out; 809f42abc72da2e77efefd547562a92ddd18926b48bAndrew Lunn } 810236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 811236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman setup_timer(&host->timer, mvsd_timeout_timer, (unsigned long)host); 812236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman platform_set_drvdata(pdev, mmc); 813236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman ret = mmc_add_host(mmc); 814236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman if (ret) 815236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman goto out; 816236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 81707728b77c03dc0721daaf551976d95e6f714af1aThomas Petazzoni if (!(mmc->caps & MMC_CAP_NEEDS_POLL)) 818fcf902bea30a57bd6fa8820619ecdce51e847832Sebastian Hesselbarth dev_dbg(&pdev->dev, "using GPIO for card detection\n"); 819236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman else 820fcf902bea30a57bd6fa8820619ecdce51e847832Sebastian Hesselbarth dev_dbg(&pdev->dev, "lacking card detect (fall back to polling)\n"); 821fcf902bea30a57bd6fa8820619ecdce51e847832Sebastian Hesselbarth 822236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman return 0; 823236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 824236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleimanout: 825f42abc72da2e77efefd547562a92ddd18926b48bAndrew Lunn if (mmc) { 82607728b77c03dc0721daaf551976d95e6f714af1aThomas Petazzoni mmc_gpio_free_cd(mmc); 8273724482d4ce4790d4534bcecebfda2c7133244c7Thomas Petazzoni mmc_gpio_free_ro(mmc); 828f42abc72da2e77efefd547562a92ddd18926b48bAndrew Lunn if (!IS_ERR(host->clk)) 829baffab28b13120694fa3ebab08d3e99667a851d2Simon Baatz clk_disable_unprepare(host->clk); 830236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman mmc_free_host(mmc); 831f42abc72da2e77efefd547562a92ddd18926b48bAndrew Lunn } 832236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 833236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman return ret; 834236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman} 835236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 8361867adee6ed7793a256ecdd623e1337988223c09Johan Hovoldstatic int mvsd_remove(struct platform_device *pdev) 837236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman{ 838236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman struct mmc_host *mmc = platform_get_drvdata(pdev); 839236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 840f42abc72da2e77efefd547562a92ddd18926b48bAndrew Lunn struct mvsd_host *host = mmc_priv(mmc); 841236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 84207728b77c03dc0721daaf551976d95e6f714af1aThomas Petazzoni mmc_gpio_free_cd(mmc); 8433724482d4ce4790d4534bcecebfda2c7133244c7Thomas Petazzoni mmc_gpio_free_ro(mmc); 844f42abc72da2e77efefd547562a92ddd18926b48bAndrew Lunn mmc_remove_host(mmc); 845f42abc72da2e77efefd547562a92ddd18926b48bAndrew Lunn del_timer_sync(&host->timer); 846f42abc72da2e77efefd547562a92ddd18926b48bAndrew Lunn mvsd_power_down(host); 847f42abc72da2e77efefd547562a92ddd18926b48bAndrew Lunn 848f42abc72da2e77efefd547562a92ddd18926b48bAndrew Lunn if (!IS_ERR(host->clk)) 849f42abc72da2e77efefd547562a92ddd18926b48bAndrew Lunn clk_disable_unprepare(host->clk); 850f42abc72da2e77efefd547562a92ddd18926b48bAndrew Lunn mmc_free_host(mmc); 851f4f7561e032777cd7376800ac97352d5b1684d8fAndrew Lunn 852236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman return 0; 853236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman} 854236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 855111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzonistatic const struct of_device_id mvsdio_dt_ids[] = { 856111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni { .compatible = "marvell,orion-sdio" }, 857111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni { /* sentinel */ } 858111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni}; 859111936ff3bc33585b475c1033fc98cd6b3370a74Thomas PetazzoniMODULE_DEVICE_TABLE(of, mvsdio_dt_ids); 860111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni 861236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleimanstatic struct platform_driver mvsd_driver = { 8621867adee6ed7793a256ecdd623e1337988223c09Johan Hovold .probe = mvsd_probe, 8631867adee6ed7793a256ecdd623e1337988223c09Johan Hovold .remove = mvsd_remove, 864236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman .driver = { 865236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman .name = DRIVER_NAME, 866111936ff3bc33585b475c1033fc98cd6b3370a74Thomas Petazzoni .of_match_table = mvsdio_dt_ids, 867236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman }, 868236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman}; 869236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 8701867adee6ed7793a256ecdd623e1337988223c09Johan Hovoldmodule_platform_driver(mvsd_driver); 871236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 872236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman/* maximum card clock frequency (default 50MHz) */ 873236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleimanmodule_param(maxfreq, int, 0); 874236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 875236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman/* force PIO transfers all the time */ 876236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleimanmodule_param(nodma, int, 0); 877236caa7cc351f885874a2776b7dd1b5667359dc8Maen Suleiman 878236caa7cc351f885874a2776b7dd1b5667359dc8Maen SuleimanMODULE_AUTHOR("Maen Suleiman, Nicolas Pitre"); 879236caa7cc351f885874a2776b7dd1b5667359dc8Maen SuleimanMODULE_DESCRIPTION("Marvell MMC,SD,SDIO Host Controller driver"); 880236caa7cc351f885874a2776b7dd1b5667359dc8Maen SuleimanMODULE_LICENSE("GPL"); 881703aaced2b9c9a98285f265f3444c2f89d9d4d19Nicolas PitreMODULE_ALIAS("platform:mvsdio"); 882