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11c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil/*
21c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil *  cx18 driver internal defines and structures
31c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil *
41c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil *  Derived from ivtv-driver.h
51c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil *
61c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil *  Copyright (C) 2007  Hans Verkuil <hverkuil@xs4all.nl>
76afdeaf865b729287e02aafc61d8d013b89996efAndy Walls *  Copyright (C) 2008  Andy Walls <awalls@md.metrocast.net>
81c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil *
91c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil *  This program is free software; you can redistribute it and/or modify
101c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil *  it under the terms of the GNU General Public License as published by
111c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil *  the Free Software Foundation; either version 2 of the License, or
121c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil *  (at your option) any later version.
131c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil *
141c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil *  This program is distributed in the hope that it will be useful,
151c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil *  but WITHOUT ANY WARRANTY; without even the implied warranty of
161c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
171c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil *  GNU General Public License for more details.
181c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil *
191c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil *  You should have received a copy of the GNU General Public License
201c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil *  along with this program; if not, write to the Free Software
211c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
221c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil *  02111-1307  USA
231c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil */
241c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
251c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#ifndef CX18_DRIVER_H
261c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DRIVER_H
271c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
281c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include <linux/module.h>
291c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include <linux/moduleparam.h>
301c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include <linux/init.h>
311c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include <linux/delay.h>
321c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include <linux/sched.h>
331c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include <linux/fs.h>
341c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include <linux/pci.h>
351c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include <linux/interrupt.h>
361c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include <linux/spinlock.h>
371c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include <linux/i2c.h>
381c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include <linux/i2c-algo-bit.h>
391c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include <linux/list.h>
401c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include <linux/unistd.h>
411c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include <linux/pagemap.h>
421c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include <linux/workqueue.h>
431c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include <linux/mutex.h>
445a0e3ad6af8660be21ca98a971cd00f331318c05Tejun Heo#include <linux/slab.h>
451a651a00e20fd4997f0b91258f6f95b7d96edcd9Harvey Harrison#include <asm/byteorder.h>
461c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
471c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include <media/v4l2-common.h>
4835ea11ff84719b1bfab2909903a9640a86552fd1Hans Verkuil#include <media/v4l2-ioctl.h>
49888cdb07741ab0098ccb8d9feff3f98cad048c26Andy Walls#include <media/v4l2-device.h>
500b5f265a88d89cbbf8abc42ca3311cb3219162abHans Verkuil#include <media/v4l2-fh.h>
511c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include <media/tuner.h>
528352619043a04785b8d20e438629b14e556fffceAndy Walls#include <media/ir-kbd-i2c.h>
531c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include "cx18-mailbox.h"
541c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include "cx18-av-core.h"
551c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include "cx23418.h"
561c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
571c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil/* DVB */
581c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include "demux.h"
591c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include "dmxdev.h"
601c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include "dvb_demux.h"
611c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include "dvb_frontend.h"
621c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include "dvb_net.h"
631c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include "dvbdev.h"
641c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
65b7101de3fff596b35e45cd9fb7007caa07e97c9aSteven Toth/* Videobuf / YUV support */
66b7101de3fff596b35e45cd9fb7007caa07e97c9aSteven Toth#include <media/videobuf-core.h>
67b7101de3fff596b35e45cd9fb7007caa07e97c9aSteven Toth#include <media/videobuf-vmalloc.h>
68b7101de3fff596b35e45cd9fb7007caa07e97c9aSteven Toth
691c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#ifndef CONFIG_PCI
701c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#  error "This driver requires kernel PCI support."
711c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#endif
721c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
731c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_MEM_OFFSET	0x00000000
741c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_MEM_SIZE	0x04000000
751c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_REG_OFFSET	0x02000000
761c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
771c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil/* Maximum cx18 driver instances. */
781c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_MAX_CARDS 32
791c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
801c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil/* Supported cards */
811c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_CARD_HVR_1600_ESMT	      0	/* Hauppauge HVR 1600 (ESMT memory) */
821c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_CARD_HVR_1600_SAMSUNG    1	/* Hauppauge HVR 1600 (Samsung memory) */
831c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_CARD_COMPRO_H900 	      2	/* Compro VideoMate H900 */
841c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_CARD_YUAN_MPC718 	      3	/* Yuan MPC718 */
8503c2808503b102971226007070c57410267d0b9dSri Deevi#define CX18_CARD_CNXT_RAPTOR_PAL     4	/* Conexant Raptor PAL */
869eee4fb69ecbe6a8a25378e801a3621ef0146fa3Andy Walls#define CX18_CARD_TOSHIBA_QOSMIO_DVBT 5 /* Toshiba Qosmio Interal DVB-T/Analog*/
879d5af8629255ef6e62481ee7dea8c6787facc579Andy Walls#define CX18_CARD_LEADTEK_PVR2100     6 /* Leadtek WinFast PVR2100 */
889d5af8629255ef6e62481ee7dea8c6787facc579Andy Walls#define CX18_CARD_LEADTEK_DVR3100H    7 /* Leadtek WinFast DVR3100 H */
89a363436396ad68509db4513c886055cc067a184cAlexey Chernov#define CX18_CARD_GOTVIEW_PCI_DVD3    8 /* GoTView PCI DVD3 Hybrid */
90e3bfeabbf5ba5da7f6cc5d53a83cb7765220c619Devin Heitmueller#define CX18_CARD_HVR_1600_S5H1411    9 /* Hauppauge HVR 1600 s5h1411/tda18271*/
91e3bfeabbf5ba5da7f6cc5d53a83cb7765220c619Devin Heitmueller#define CX18_CARD_LAST		      9
921c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
931c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_ENC_STREAM_TYPE_MPG  0
941c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_ENC_STREAM_TYPE_TS   1
951c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_ENC_STREAM_TYPE_YUV  2
961c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_ENC_STREAM_TYPE_VBI  3
971c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_ENC_STREAM_TYPE_PCM  4
981c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_ENC_STREAM_TYPE_IDX  5
991c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_ENC_STREAM_TYPE_RAD  6
1001c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_MAX_STREAMS	  7
1011c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
1021c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil/* system vendor and device IDs */
1031c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define PCI_VENDOR_ID_CX      0x14f1
1041c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define PCI_DEVICE_ID_CX23418 0x5b7a
1051c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
1061c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil/* subsystem vendor ID */
1071c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_PCI_ID_HAUPPAUGE 		0x0070
1081c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_PCI_ID_COMPRO 		0x185b
1091c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_PCI_ID_YUAN 		0x12ab
11003c2808503b102971226007070c57410267d0b9dSri Deevi#define CX18_PCI_ID_CONEXANT		0x14f1
1119eee4fb69ecbe6a8a25378e801a3621ef0146fa3Andy Walls#define CX18_PCI_ID_TOSHIBA		0x1179
1129eee4fb69ecbe6a8a25378e801a3621ef0146fa3Andy Walls#define CX18_PCI_ID_LEADTEK		0x107D
113a363436396ad68509db4513c886055cc067a184cAlexey Chernov#define CX18_PCI_ID_GOTVIEW		0x5854
1141c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
1151c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil/* ======================================================================== */
1161c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil/* ========================== START USER SETTABLE DMA VARIABLES =========== */
1171c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil/* ======================================================================== */
1181c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
1191c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil/* DMA Buffers, Default size in MB allocated */
1201c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DEFAULT_ENC_TS_BUFFERS  1
1211c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DEFAULT_ENC_MPG_BUFFERS 2
1221c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DEFAULT_ENC_IDX_BUFFERS 1
1231c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DEFAULT_ENC_YUV_BUFFERS 2
1241c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DEFAULT_ENC_VBI_BUFFERS 1
1251c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DEFAULT_ENC_PCM_BUFFERS 1
1261c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
1276ecd86dcc838fa446ec86334a9fe0c1e415e3514Andy Walls/* Maximum firmware DMA buffers per stream */
1280ef0289264e8f278312909f1639a7764cc9cf580Andy Walls#define CX18_MAX_FW_MDLS_PER_STREAM 63
1296ecd86dcc838fa446ec86334a9fe0c1e415e3514Andy Walls
13022dce188ef3e1e058ceabe3b3072640d7568f764Andy Walls/* YUV buffer sizes in bytes to ensure integer # of frames per buffer */
13122dce188ef3e1e058ceabe3b3072640d7568f764Andy Walls#define CX18_UNIT_ENC_YUV_BUFSIZE	(720 *  32 * 3 / 2) /* bytes */
13222dce188ef3e1e058ceabe3b3072640d7568f764Andy Walls#define CX18_625_LINE_ENC_YUV_BUFSIZE	(CX18_UNIT_ENC_YUV_BUFSIZE * 576/32)
13322dce188ef3e1e058ceabe3b3072640d7568f764Andy Walls#define CX18_525_LINE_ENC_YUV_BUFSIZE	(CX18_UNIT_ENC_YUV_BUFSIZE * 480/32)
13422dce188ef3e1e058ceabe3b3072640d7568f764Andy Walls
135efc0b127b2e0135053680cd0118856b051450009Andy Walls/* IDX buffer size should be a multiple of the index entry size from the chip */
136efc0b127b2e0135053680cd0118856b051450009Andy Wallsstruct cx18_enc_idx_entry {
137efc0b127b2e0135053680cd0118856b051450009Andy Walls	__le32 length;
138efc0b127b2e0135053680cd0118856b051450009Andy Walls	__le32 offset_low;
139efc0b127b2e0135053680cd0118856b051450009Andy Walls	__le32 offset_high;
140efc0b127b2e0135053680cd0118856b051450009Andy Walls	__le32 flags;
141efc0b127b2e0135053680cd0118856b051450009Andy Walls	__le32 pts_low;
142efc0b127b2e0135053680cd0118856b051450009Andy Walls	__le32 pts_high;
143efc0b127b2e0135053680cd0118856b051450009Andy Walls} __attribute__ ((packed));
144efc0b127b2e0135053680cd0118856b051450009Andy Walls#define CX18_UNIT_ENC_IDX_BUFSIZE \
145efc0b127b2e0135053680cd0118856b051450009Andy Walls	(sizeof(struct cx18_enc_idx_entry) * V4L2_ENC_IDX_ENTRIES)
146efc0b127b2e0135053680cd0118856b051450009Andy Walls
1476ecd86dcc838fa446ec86334a9fe0c1e415e3514Andy Walls/* DMA buffer, default size in kB allocated */
1486ecd86dcc838fa446ec86334a9fe0c1e415e3514Andy Walls#define CX18_DEFAULT_ENC_TS_BUFSIZE   32
1496ecd86dcc838fa446ec86334a9fe0c1e415e3514Andy Walls#define CX18_DEFAULT_ENC_MPG_BUFSIZE  32
150efc0b127b2e0135053680cd0118856b051450009Andy Walls#define CX18_DEFAULT_ENC_IDX_BUFSIZE  (CX18_UNIT_ENC_IDX_BUFSIZE * 1 / 1024 + 1)
15122dce188ef3e1e058ceabe3b3072640d7568f764Andy Walls#define CX18_DEFAULT_ENC_YUV_BUFSIZE  (CX18_UNIT_ENC_YUV_BUFSIZE * 3 / 1024 + 1)
1526ecd86dcc838fa446ec86334a9fe0c1e415e3514Andy Walls#define CX18_DEFAULT_ENC_PCM_BUFSIZE   4
1536ecd86dcc838fa446ec86334a9fe0c1e415e3514Andy Walls
1541c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil/* i2c stuff */
1551c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define I2C_CLIENTS_MAX 16
1561c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
1571c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil/* debugging */
1581c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
1591c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil/* Flag to turn on high volume debugging */
1601c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DBGFLG_WARN  (1 << 0)
1611c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DBGFLG_INFO  (1 << 1)
1621c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DBGFLG_API   (1 << 2)
1631c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DBGFLG_DMA   (1 << 3)
1641c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DBGFLG_IOCTL (1 << 4)
1651c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DBGFLG_FILE  (1 << 5)
1661c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DBGFLG_I2C   (1 << 6)
1671c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DBGFLG_IRQ   (1 << 7)
1681c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil/* Flag to turn on high volume debugging */
1691c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DBGFLG_HIGHVOL (1 << 8)
1701c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
1715811cf99df2e3c102055be3ea77508e56c9f77c6Andy Walls/* NOTE: extra space before comma in 'fmt , ## args' is required for
1721c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil   gcc-2.95, otherwise it won't compile. */
1731c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DEBUG(x, type, fmt, args...) \
1741c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	do { \
1751c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil		if ((x) & cx18_debug) \
1765811cf99df2e3c102055be3ea77508e56c9f77c6Andy Walls			v4l2_info(&cx->v4l2_dev, " " type ": " fmt , ## args); \
1771c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	} while (0)
1781c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DEBUG_WARN(fmt, args...)  CX18_DEBUG(CX18_DBGFLG_WARN, "warning", fmt , ## args)
1791c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DEBUG_INFO(fmt, args...)  CX18_DEBUG(CX18_DBGFLG_INFO, "info", fmt , ## args)
1801c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DEBUG_API(fmt, args...)   CX18_DEBUG(CX18_DBGFLG_API, "api", fmt , ## args)
1811c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DEBUG_DMA(fmt, args...)   CX18_DEBUG(CX18_DBGFLG_DMA, "dma", fmt , ## args)
1821c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DEBUG_IOCTL(fmt, args...) CX18_DEBUG(CX18_DBGFLG_IOCTL, "ioctl", fmt , ## args)
1831c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DEBUG_FILE(fmt, args...)  CX18_DEBUG(CX18_DBGFLG_FILE, "file", fmt , ## args)
1841c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DEBUG_I2C(fmt, args...)   CX18_DEBUG(CX18_DBGFLG_I2C, "i2c", fmt , ## args)
1851c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DEBUG_IRQ(fmt, args...)   CX18_DEBUG(CX18_DBGFLG_IRQ, "irq", fmt , ## args)
1861c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
1871c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DEBUG_HIGH_VOL(x, type, fmt, args...) \
1881c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	do { \
1891c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil		if (((x) & cx18_debug) && (cx18_debug & CX18_DBGFLG_HIGHVOL)) \
1905811cf99df2e3c102055be3ea77508e56c9f77c6Andy Walls			v4l2_info(&cx->v4l2_dev, " " type ": " fmt , ## args); \
1911c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	} while (0)
1921c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DEBUG_HI_WARN(fmt, args...)  CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_WARN, "warning", fmt , ## args)
1931c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DEBUG_HI_INFO(fmt, args...)  CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_INFO, "info", fmt , ## args)
1941c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DEBUG_HI_API(fmt, args...)   CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_API, "api", fmt , ## args)
1951c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DEBUG_HI_DMA(fmt, args...)   CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_DMA, "dma", fmt , ## args)
1961c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DEBUG_HI_IOCTL(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_IOCTL, "ioctl", fmt , ## args)
1971c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DEBUG_HI_FILE(fmt, args...)  CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_FILE, "file", fmt , ## args)
1981c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DEBUG_HI_I2C(fmt, args...)   CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_I2C, "i2c", fmt , ## args)
1991c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_DEBUG_HI_IRQ(fmt, args...)   CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_IRQ, "irq", fmt , ## args)
2001c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
2011c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil/* Standard kernel messages */
2025811cf99df2e3c102055be3ea77508e56c9f77c6Andy Walls#define CX18_ERR(fmt, args...)      v4l2_err(&cx->v4l2_dev, fmt , ## args)
2035811cf99df2e3c102055be3ea77508e56c9f77c6Andy Walls#define CX18_WARN(fmt, args...)     v4l2_warn(&cx->v4l2_dev, fmt , ## args)
2045811cf99df2e3c102055be3ea77508e56c9f77c6Andy Walls#define CX18_INFO(fmt, args...)     v4l2_info(&cx->v4l2_dev, fmt , ## args)
2051c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
2066246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls/* Messages for internal subdevs to use */
2076246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls#define CX18_DEBUG_DEV(x, dev, type, fmt, args...) \
2086246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls	do { \
2096246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls		if ((x) & cx18_debug) \
2106246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls			v4l2_info(dev, " " type ": " fmt , ## args); \
2116246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls	} while (0)
2126246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls#define CX18_DEBUG_WARN_DEV(dev, fmt, args...) \
2136246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls		CX18_DEBUG_DEV(CX18_DBGFLG_WARN, dev, "warning", fmt , ## args)
2146246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls#define CX18_DEBUG_INFO_DEV(dev, fmt, args...) \
2156246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls		CX18_DEBUG_DEV(CX18_DBGFLG_INFO, dev, "info", fmt , ## args)
2166246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls#define CX18_DEBUG_API_DEV(dev, fmt, args...) \
2176246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls		CX18_DEBUG_DEV(CX18_DBGFLG_API, dev, "api", fmt , ## args)
2186246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls#define CX18_DEBUG_DMA_DEV(dev, fmt, args...) \
2196246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls		CX18_DEBUG_DEV(CX18_DBGFLG_DMA, dev, "dma", fmt , ## args)
2206246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls#define CX18_DEBUG_IOCTL_DEV(dev, fmt, args...) \
2216246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls		CX18_DEBUG_DEV(CX18_DBGFLG_IOCTL, dev, "ioctl", fmt , ## args)
2226246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls#define CX18_DEBUG_FILE_DEV(dev, fmt, args...) \
2236246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls		CX18_DEBUG_DEV(CX18_DBGFLG_FILE, dev, "file", fmt , ## args)
2246246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls#define CX18_DEBUG_I2C_DEV(dev, fmt, args...) \
2256246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls		CX18_DEBUG_DEV(CX18_DBGFLG_I2C, dev, "i2c", fmt , ## args)
2266246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls#define CX18_DEBUG_IRQ_DEV(dev, fmt, args...) \
2276246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls		CX18_DEBUG_DEV(CX18_DBGFLG_IRQ, dev, "irq", fmt , ## args)
2286246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls
2296246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls#define CX18_DEBUG_HIGH_VOL_DEV(x, dev, type, fmt, args...) \
2306246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls	do { \
2316246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls		if (((x) & cx18_debug) && (cx18_debug & CX18_DBGFLG_HIGHVOL)) \
2326246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls			v4l2_info(dev, " " type ": " fmt , ## args); \
2336246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls	} while (0)
2346246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls#define CX18_DEBUG_HI_WARN_DEV(dev, fmt, args...) \
2356246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls	CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_WARN, dev, "warning", fmt , ## args)
2366246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls#define CX18_DEBUG_HI_INFO_DEV(dev, fmt, args...) \
2376246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls	CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_INFO, dev, "info", fmt , ## args)
2386246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls#define CX18_DEBUG_HI_API_DEV(dev, fmt, args...) \
2396246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls	CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_API, dev, "api", fmt , ## args)
2406246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls#define CX18_DEBUG_HI_DMA_DEV(dev, fmt, args...) \
2416246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls	CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_DMA, dev, "dma", fmt , ## args)
2426246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls#define CX18_DEBUG_HI_IOCTL_DEV(dev, fmt, args...) \
2436246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls	CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_IOCTL, dev, "ioctl", fmt , ## args)
2446246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls#define CX18_DEBUG_HI_FILE_DEV(dev, fmt, args...) \
2456246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls	CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_FILE, dev, "file", fmt , ## args)
2466246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls#define CX18_DEBUG_HI_I2C_DEV(dev, fmt, args...) \
2476246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls	CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_I2C, dev, "i2c", fmt , ## args)
2486246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls#define CX18_DEBUG_HI_IRQ_DEV(dev, fmt, args...) \
2496246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls	CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_IRQ, dev, "irq", fmt , ## args)
2506246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls
2516246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls#define CX18_ERR_DEV(dev, fmt, args...)      v4l2_err(dev, fmt , ## args)
2526246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls#define CX18_WARN_DEV(dev, fmt, args...)     v4l2_warn(dev, fmt , ## args)
2536246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls#define CX18_INFO_DEV(dev, fmt, args...)     v4l2_info(dev, fmt , ## args)
2546246d4e1b30aa9404d2603dc09a823aba36d9c13Andy Walls
2551c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuilextern int cx18_debug;
2561c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
2571c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuilstruct cx18_options {
2581c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	int megabytes[CX18_MAX_STREAMS]; /* Size in megabytes of each stream */
2591c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	int cardtype;		/* force card type on load */
2601c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	int tuner;		/* set tuner on load */
2611c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	int radio;		/* enable/disable radio */
2621c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil};
2631c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
26452fcb3ecc6707f52dfe4297f96b7609d4ba517fbAndy Walls/* per-mdl bit flags */
265f58c91ce82cbb55a48fbc1a0cb7c84c0d0a4e1bdJonathan McCrohan#define CX18_F_M_NEED_SWAP  0	/* mdl buffer data must be endianness swapped */
2661c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
2671c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil/* per-stream, s_flags */
2681c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_F_S_CLAIMED 	3	/* this stream is claimed */
2691c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_F_S_STREAMING      4	/* the fw is decoding/encoding this stream */
2701c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_F_S_INTERNAL_USE	5	/* this stream is used internally (sliced VBI processing) */
2711c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_F_S_STREAMOFF	7	/* signal end of stream EOS */
2721c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_F_S_APPL_IO        8	/* this stream is used read/written by an application */
27387116159517ecf6b9cf62a136f2935a63833c485Andy Walls#define CX18_F_S_STOPPING	9	/* telling the fw to stop capturing */
2741c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
2751c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil/* per-cx18, i_flags */
2761d6782bda5c1fb2bca44af50647b45427d8ef4ecAndy Walls#define CX18_F_I_LOADED_FW		0 	/* Loaded firmware 1st time */
2771d6782bda5c1fb2bca44af50647b45427d8ef4ecAndy Walls#define CX18_F_I_EOS			4 	/* End of encoder stream */
2781d6782bda5c1fb2bca44af50647b45427d8ef4ecAndy Walls#define CX18_F_I_RADIO_USER		5 	/* radio tuner is selected */
2791d6782bda5c1fb2bca44af50647b45427d8ef4ecAndy Walls#define CX18_F_I_ENC_PAUSED		13 	/* the encoder is paused */
2801d6782bda5c1fb2bca44af50647b45427d8ef4ecAndy Walls#define CX18_F_I_INITED			21 	/* set after first open */
2811d6782bda5c1fb2bca44af50647b45427d8ef4ecAndy Walls#define CX18_F_I_FAILED			22 	/* set if first open failed */
2821c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
2831c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil/* These are the VBI types as they appear in the embedded VBI private packets. */
2841c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_SLICED_TYPE_TELETEXT_B     (1)
2851c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_SLICED_TYPE_CAPTION_525    (4)
2861c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_SLICED_TYPE_WSS_625        (5)
2871c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_SLICED_TYPE_VPS            (7)
2881c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
28982acdc84cc4acc11389bdc648b23b15426d2038cAndy Walls/**
29082acdc84cc4acc11389bdc648b23b15426d2038cAndy Walls * list_entry_is_past_end - check if a previous loop cursor is off list end
29182acdc84cc4acc11389bdc648b23b15426d2038cAndy Walls * @pos:	the type * previously used as a loop cursor.
29282acdc84cc4acc11389bdc648b23b15426d2038cAndy Walls * @head:	the head for your list.
29382acdc84cc4acc11389bdc648b23b15426d2038cAndy Walls * @member:	the name of the list_struct within the struct.
29482acdc84cc4acc11389bdc648b23b15426d2038cAndy Walls *
29582acdc84cc4acc11389bdc648b23b15426d2038cAndy Walls * Check if the entry's list_head is the head of the list, thus it's not a
29682acdc84cc4acc11389bdc648b23b15426d2038cAndy Walls * real entry but was the loop cursor that walked past the end
29782acdc84cc4acc11389bdc648b23b15426d2038cAndy Walls */
29882acdc84cc4acc11389bdc648b23b15426d2038cAndy Walls#define list_entry_is_past_end(pos, head, member) \
29982acdc84cc4acc11389bdc648b23b15426d2038cAndy Walls	(&pos->member == (head))
30082acdc84cc4acc11389bdc648b23b15426d2038cAndy Walls
3011c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuilstruct cx18_buffer {
3021c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	struct list_head list;
3031c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	dma_addr_t dma_handle;
3041c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	char *buf;
3051c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
3061c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	u32 bytesused;
3071c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	u32 readpos;
3081c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil};
3091c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
31052fcb3ecc6707f52dfe4297f96b7609d4ba517fbAndy Wallsstruct cx18_mdl {
31152fcb3ecc6707f52dfe4297f96b7609d4ba517fbAndy Walls	struct list_head list;
31252fcb3ecc6707f52dfe4297f96b7609d4ba517fbAndy Walls	u32 id;		/* index into cx->scb->cpu_mdl[] of 1st cx18_mdl_ent */
31352fcb3ecc6707f52dfe4297f96b7609d4ba517fbAndy Walls
31452fcb3ecc6707f52dfe4297f96b7609d4ba517fbAndy Walls	unsigned int skipped;
31552fcb3ecc6707f52dfe4297f96b7609d4ba517fbAndy Walls	unsigned long m_flags;
31652fcb3ecc6707f52dfe4297f96b7609d4ba517fbAndy Walls
31752fcb3ecc6707f52dfe4297f96b7609d4ba517fbAndy Walls	struct list_head buf_list;
31852fcb3ecc6707f52dfe4297f96b7609d4ba517fbAndy Walls	struct cx18_buffer *curr_buf; /* current buffer in list for reading */
31952fcb3ecc6707f52dfe4297f96b7609d4ba517fbAndy Walls
32052fcb3ecc6707f52dfe4297f96b7609d4ba517fbAndy Walls	u32 bytesused;
32152fcb3ecc6707f52dfe4297f96b7609d4ba517fbAndy Walls	u32 readpos;
32252fcb3ecc6707f52dfe4297f96b7609d4ba517fbAndy Walls};
32352fcb3ecc6707f52dfe4297f96b7609d4ba517fbAndy Walls
3241c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuilstruct cx18_queue {
3251c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	struct list_head list;
326c37b11bf17b66b960b217c35283aa9c55eacb292Andy Walls	atomic_t depth;
3271c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	u32 bytesused;
32840c5520f55924ba87090d0d93222baad74202559Andy Walls	spinlock_t lock;
3291c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil};
3301c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
331754f9969c323559a12bce1475f3c1e6574129856Andy Wallsstruct cx18_stream; /* forward reference */
332754f9969c323559a12bce1475f3c1e6574129856Andy Walls
3331c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuilstruct cx18_dvb {
334754f9969c323559a12bce1475f3c1e6574129856Andy Walls	struct cx18_stream *stream;
3351c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	struct dmx_frontend hw_frontend;
3361c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	struct dmx_frontend mem_frontend;
3371c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	struct dmxdev dmxdev;
3381c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	struct dvb_adapter dvb_adapter;
3391c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	struct dvb_demux demux;
3401c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	struct dvb_frontend *fe;
3411c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	struct dvb_net dvbnet;
3421c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	int enabled;
3431c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	int feeding;
3441c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	struct mutex feedlock;
3451c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil};
3461c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
3471c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuilstruct cx18;	 /* forward reference */
3481c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuilstruct cx18_scb; /* forward reference */
3491c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
35072a4f8081af1c53a1673c173ce0fdd85c4b7d403Andy Walls
351ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls#define CX18_MAX_MDL_ACKS 2
352deed75ed9f7576ada4bca02e6c851833a352a38dAndy Walls#define CX18_MAX_IN_WORK_ORDERS (CX18_MAX_FW_MDLS_PER_STREAM + 7)
3530ef0289264e8f278312909f1639a7764cc9cf580Andy Walls/* CPU_DE_RELEASE_MDL can burst CX18_MAX_FW_MDLS_PER_STREAM orders in a group */
354ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls
35572a4f8081af1c53a1673c173ce0fdd85c4b7d403Andy Walls#define CX18_F_EWO_MB_STALE_UPON_RECEIPT 0x1
35672a4f8081af1c53a1673c173ce0fdd85c4b7d403Andy Walls#define CX18_F_EWO_MB_STALE_WHILE_PROC   0x2
35772a4f8081af1c53a1673c173ce0fdd85c4b7d403Andy Walls#define CX18_F_EWO_MB_STALE \
35872a4f8081af1c53a1673c173ce0fdd85c4b7d403Andy Walls	     (CX18_F_EWO_MB_STALE_UPON_RECEIPT | CX18_F_EWO_MB_STALE_WHILE_PROC)
35972a4f8081af1c53a1673c173ce0fdd85c4b7d403Andy Walls
360deed75ed9f7576ada4bca02e6c851833a352a38dAndy Wallsstruct cx18_in_work_order {
361ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls	struct work_struct work;
362ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls	atomic_t pending;
363ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls	struct cx18 *cx;
36472a4f8081af1c53a1673c173ce0fdd85c4b7d403Andy Walls	unsigned long flags;
365ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls	int rpu;
366ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls	struct cx18_mailbox mb;
367ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls	struct cx18_mdl_ack mdl_ack[CX18_MAX_MDL_ACKS];
368ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls	char *str;
369ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls};
370ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls
371d3c5e7075508a6874d1a53d0a409b0bbbe3a9fbeAndy Walls#define CX18_INVALID_TASK_HANDLE 0xffffffff
372d3c5e7075508a6874d1a53d0a409b0bbbe3a9fbeAndy Walls
3731c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuilstruct cx18_stream {
374754f9969c323559a12bce1475f3c1e6574129856Andy Walls	/* These first five fields are always set, even if the stream
3751c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	   is not actually created. */
3763d05913d894a460b7dc8e5d93415fde21b986411Andy Walls	struct video_device *video_dev;	/* NULL when stream not created */
377754f9969c323559a12bce1475f3c1e6574129856Andy Walls	struct cx18_dvb *dvb;		/* DVB / Digital Transport */
3781c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	struct cx18 *cx; 		/* for ease of use */
3791c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	const char *name;		/* name of the stream */
3801c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	int type;			/* stream type */
3811c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	u32 handle;			/* task handle */
382fa655dda5ce6e5ac4a9b94fd451358edca2ddab8Andy Walls	unsigned int mdl_base_idx;
3831c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
3841c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	u32 id;
3851c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	unsigned long s_flags;	/* status flags, see above */
3861c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	int dma;		/* can be PCI_DMA_TODEVICE,
3871c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil				   PCI_DMA_FROMDEVICE or
3881c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil				   PCI_DMA_NONE */
3891c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	wait_queue_head_t waitq;
3901c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
39152fcb3ecc6707f52dfe4297f96b7609d4ba517fbAndy Walls	/* Buffers */
39252fcb3ecc6707f52dfe4297f96b7609d4ba517fbAndy Walls	struct list_head buf_pool;	/* buffers not attached to an MDL */
39352fcb3ecc6707f52dfe4297f96b7609d4ba517fbAndy Walls	u32 buffers;			/* total buffers owned by this stream */
39452fcb3ecc6707f52dfe4297f96b7609d4ba517fbAndy Walls	u32 buf_size;			/* size in bytes of a single buffer */
39552fcb3ecc6707f52dfe4297f96b7609d4ba517fbAndy Walls
39652fcb3ecc6707f52dfe4297f96b7609d4ba517fbAndy Walls	/* MDL sizes - all stream MDLs are the same size */
39752fcb3ecc6707f52dfe4297f96b7609d4ba517fbAndy Walls	u32 bufs_per_mdl;
39852fcb3ecc6707f52dfe4297f96b7609d4ba517fbAndy Walls	u32 mdl_size;		/* total bytes in all buffers in a mdl */
3991c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
40052fcb3ecc6707f52dfe4297f96b7609d4ba517fbAndy Walls	/* MDL Queues */
40152fcb3ecc6707f52dfe4297f96b7609d4ba517fbAndy Walls	struct cx18_queue q_free;	/* free - in rotation, not committed */
40252fcb3ecc6707f52dfe4297f96b7609d4ba517fbAndy Walls	struct cx18_queue q_busy;	/* busy - in use by firmware */
40352fcb3ecc6707f52dfe4297f96b7609d4ba517fbAndy Walls	struct cx18_queue q_full;	/* full - data for user apps */
40452fcb3ecc6707f52dfe4297f96b7609d4ba517fbAndy Walls	struct cx18_queue q_idle;	/* idle - not in rotation */
4051c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
40621a278b85d3c6b8064af0c03aec3205e28aad3b7Andy Walls	struct work_struct out_work_order;
407b7101de3fff596b35e45cd9fb7007caa07e97c9aSteven Toth
408b7101de3fff596b35e45cd9fb7007caa07e97c9aSteven Toth	/* Videobuf for YUV video */
409b7101de3fff596b35e45cd9fb7007caa07e97c9aSteven Toth	u32 pixelformat;
41009fc9802c31a9358a4e34642aa5f569111752879Simon Farnsworth	u32 vb_bytes_per_frame;
411b7101de3fff596b35e45cd9fb7007caa07e97c9aSteven Toth	struct list_head vb_capture;    /* video capture queue */
412b7101de3fff596b35e45cd9fb7007caa07e97c9aSteven Toth	spinlock_t vb_lock;
413b7101de3fff596b35e45cd9fb7007caa07e97c9aSteven Toth	struct timer_list vb_timeout;
4141bf5842fe3b61d2dbbced96dbd27ad26fe93444aSimon Farnsworth
4151bf5842fe3b61d2dbbced96dbd27ad26fe93444aSimon Farnsworth	struct videobuf_queue vbuf_q;
4161bf5842fe3b61d2dbbced96dbd27ad26fe93444aSimon Farnsworth	spinlock_t vbuf_q_lock; /* Protect vbuf_q */
4171bf5842fe3b61d2dbbced96dbd27ad26fe93444aSimon Farnsworth	enum v4l2_buf_type vb_type;
418b7101de3fff596b35e45cd9fb7007caa07e97c9aSteven Toth};
419b7101de3fff596b35e45cd9fb7007caa07e97c9aSteven Toth
420b7101de3fff596b35e45cd9fb7007caa07e97c9aSteven Tothstruct cx18_videobuf_buffer {
421b7101de3fff596b35e45cd9fb7007caa07e97c9aSteven Toth	/* Common video buffer sub-system struct */
422b7101de3fff596b35e45cd9fb7007caa07e97c9aSteven Toth	struct videobuf_buffer vb;
423b7101de3fff596b35e45cd9fb7007caa07e97c9aSteven Toth	v4l2_std_id tvnorm; /* selected tv norm */
424b7101de3fff596b35e45cd9fb7007caa07e97c9aSteven Toth	u32 bytes_used;
4251c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil};
4261c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
4271c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuilstruct cx18_open_id {
4280b5f265a88d89cbbf8abc42ca3311cb3219162abHans Verkuil	struct v4l2_fh fh;
4291c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	u32 open_id;
4301c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	int type;
4311c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	struct cx18 *cx;
4321c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil};
4331c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
4340b5f265a88d89cbbf8abc42ca3311cb3219162abHans Verkuilstatic inline struct cx18_open_id *fh2id(struct v4l2_fh *fh)
4350b5f265a88d89cbbf8abc42ca3311cb3219162abHans Verkuil{
4360b5f265a88d89cbbf8abc42ca3311cb3219162abHans Verkuil	return container_of(fh, struct cx18_open_id, fh);
4370b5f265a88d89cbbf8abc42ca3311cb3219162abHans Verkuil}
4380b5f265a88d89cbbf8abc42ca3311cb3219162abHans Verkuil
4390b5f265a88d89cbbf8abc42ca3311cb3219162abHans Verkuilstatic inline struct cx18_open_id *file2id(struct file *file)
4400b5f265a88d89cbbf8abc42ca3311cb3219162abHans Verkuil{
4410b5f265a88d89cbbf8abc42ca3311cb3219162abHans Verkuil	return fh2id(file->private_data);
4420b5f265a88d89cbbf8abc42ca3311cb3219162abHans Verkuil}
4430b5f265a88d89cbbf8abc42ca3311cb3219162abHans Verkuil
4441c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil/* forward declaration of struct defined in cx18-cards.h */
4451c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuilstruct cx18_card;
4461c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
447302df9702192a68578916ef922c33370cbba350dAndy Walls/*
448302df9702192a68578916ef922c33370cbba350dAndy Walls * A note about "sliced" VBI data as implemented in this driver:
449302df9702192a68578916ef922c33370cbba350dAndy Walls *
450302df9702192a68578916ef922c33370cbba350dAndy Walls * Currently we collect the sliced VBI in the form of Ancillary Data
451302df9702192a68578916ef922c33370cbba350dAndy Walls * packets, inserted by the AV core decoder/digitizer/slicer in the
452302df9702192a68578916ef922c33370cbba350dAndy Walls * horizontal blanking region of the VBI lines, in "raw" mode as far as
453302df9702192a68578916ef922c33370cbba350dAndy Walls * the Encoder is concerned.  We don't ever tell the Encoder itself
454302df9702192a68578916ef922c33370cbba350dAndy Walls * to provide sliced VBI. (AV Core: sliced mode - Encoder: raw mode)
455302df9702192a68578916ef922c33370cbba350dAndy Walls *
456302df9702192a68578916ef922c33370cbba350dAndy Walls * We then process the ancillary data ourselves to send the sliced data
457302df9702192a68578916ef922c33370cbba350dAndy Walls * to the user application directly or build up MPEG-2 private stream 1
458302df9702192a68578916ef922c33370cbba350dAndy Walls * packets to splice into (only!) MPEG-2 PS streams for the user app.
459302df9702192a68578916ef922c33370cbba350dAndy Walls *
460302df9702192a68578916ef922c33370cbba350dAndy Walls * (That's how ivtv essentially does it.)
461302df9702192a68578916ef922c33370cbba350dAndy Walls *
462302df9702192a68578916ef922c33370cbba350dAndy Walls * The Encoder should be able to extract certain sliced VBI data for
463302df9702192a68578916ef922c33370cbba350dAndy Walls * us and provide it in a separate stream or splice it into any type of
464302df9702192a68578916ef922c33370cbba350dAndy Walls * MPEG PS or TS stream, but this isn't implemented yet.
465302df9702192a68578916ef922c33370cbba350dAndy Walls */
466302df9702192a68578916ef922c33370cbba350dAndy Walls
467302df9702192a68578916ef922c33370cbba350dAndy Walls/*
468302df9702192a68578916ef922c33370cbba350dAndy Walls * Number of "raw" VBI samples per horizontal line we tell the Encoder to
469302df9702192a68578916ef922c33370cbba350dAndy Walls * grab from the decoder/digitizer/slicer output for raw or sliced VBI.
470302df9702192a68578916ef922c33370cbba350dAndy Walls * It depends on the pixel clock and the horiz rate:
471302df9702192a68578916ef922c33370cbba350dAndy Walls *
472302df9702192a68578916ef922c33370cbba350dAndy Walls * (1/Fh)*(2*Fp) = Samples/line
473302df9702192a68578916ef922c33370cbba350dAndy Walls *     = 4 bytes EAV + Anc data in hblank + 4 bytes SAV + active samples
474302df9702192a68578916ef922c33370cbba350dAndy Walls *
475302df9702192a68578916ef922c33370cbba350dAndy Walls *  Sliced VBI data is sent as ancillary data during horizontal blanking
476302df9702192a68578916ef922c33370cbba350dAndy Walls *  Raw VBI is sent as active video samples during vertcal blanking
477302df9702192a68578916ef922c33370cbba350dAndy Walls *
478302df9702192a68578916ef922c33370cbba350dAndy Walls *  We use a  BT.656 pxiel clock of 13.5 MHz and a BT.656 active line
479302df9702192a68578916ef922c33370cbba350dAndy Walls *  length of 720 pixels @ 4:2:2 sampling.  Thus...
480302df9702192a68578916ef922c33370cbba350dAndy Walls *
481302df9702192a68578916ef922c33370cbba350dAndy Walls *  For systems that use a 15.734 kHz horizontal rate, such as
482302df9702192a68578916ef922c33370cbba350dAndy Walls *  NTSC-M, PAL-M, PAL-60, and other 60 Hz/525 line systems, we have:
483302df9702192a68578916ef922c33370cbba350dAndy Walls *
484302df9702192a68578916ef922c33370cbba350dAndy Walls *  (1/15.734 kHz) * 2 * 13.5 MHz = 1716 samples/line =
485302df9702192a68578916ef922c33370cbba350dAndy Walls *  4 bytes SAV + 268 bytes anc data + 4 bytes SAV + 1440 active samples
486302df9702192a68578916ef922c33370cbba350dAndy Walls *
487302df9702192a68578916ef922c33370cbba350dAndy Walls *  For systems that use a 15.625 kHz horizontal rate, such as
488302df9702192a68578916ef922c33370cbba350dAndy Walls *  PAL-B/G/H, PAL-I, SECAM-L and other 50 Hz/625 line systems, we have:
489302df9702192a68578916ef922c33370cbba350dAndy Walls *
490302df9702192a68578916ef922c33370cbba350dAndy Walls *  (1/15.625 kHz) * 2 * 13.5 MHz = 1728 samples/line =
491302df9702192a68578916ef922c33370cbba350dAndy Walls *  4 bytes SAV + 280 bytes anc data + 4 bytes SAV + 1440 active samples
492302df9702192a68578916ef922c33370cbba350dAndy Walls */
493302df9702192a68578916ef922c33370cbba350dAndy Wallsstatic const u32 vbi_active_samples = 1444; /* 4 byte SAV + 720 Y + 720 U/V */
494302df9702192a68578916ef922c33370cbba350dAndy Wallsstatic const u32 vbi_hblank_samples_60Hz = 272; /* 4 byte EAV + 268 anc/fill */
495302df9702192a68578916ef922c33370cbba350dAndy Wallsstatic const u32 vbi_hblank_samples_50Hz = 284; /* 4 byte EAV + 280 anc/fill */
4961c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
4971c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define CX18_VBI_FRAMES 32
4981c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
4991c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuilstruct vbi_info {
500302df9702192a68578916ef922c33370cbba350dAndy Walls	/* Current state of v4l2 VBI settings for this device */
5011c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	struct v4l2_format in;
502302df9702192a68578916ef922c33370cbba350dAndy Walls	struct v4l2_sliced_vbi_format *sliced_in; /* pointer to in.fmt.sliced */
503302df9702192a68578916ef922c33370cbba350dAndy Walls	u32 count;    /* Count of VBI data lines: 60 Hz: 12 or 50 Hz: 18 */
504302df9702192a68578916ef922c33370cbba350dAndy Walls	u32 start[2]; /* First VBI data line per field: 10 & 273 or 6 & 318 */
5051c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
506302df9702192a68578916ef922c33370cbba350dAndy Walls	u32 frame; /* Count of VBI buffers/frames received from Encoder */
5071c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
508302df9702192a68578916ef922c33370cbba350dAndy Walls	/*
509302df9702192a68578916ef922c33370cbba350dAndy Walls	 * Vars for creation and insertion of MPEG Private Stream 1 packets
510302df9702192a68578916ef922c33370cbba350dAndy Walls	 * of sliced VBI data into an MPEG PS
511302df9702192a68578916ef922c33370cbba350dAndy Walls	 */
5121c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
513302df9702192a68578916ef922c33370cbba350dAndy Walls	/* Boolean: create and insert Private Stream 1 packets into the PS */
514302df9702192a68578916ef922c33370cbba350dAndy Walls	int insert_mpeg;
515302df9702192a68578916ef922c33370cbba350dAndy Walls
516302df9702192a68578916ef922c33370cbba350dAndy Walls	/*
517302df9702192a68578916ef922c33370cbba350dAndy Walls	 * Buffer for the maximum of 2 * 18 * packet_size sliced VBI lines.
518302df9702192a68578916ef922c33370cbba350dAndy Walls	 * Used in cx18-vbi.c only for collecting sliced data, and as a source
519302df9702192a68578916ef922c33370cbba350dAndy Walls	 * during conversion of sliced VBI data into MPEG Priv Stream 1 packets.
520302df9702192a68578916ef922c33370cbba350dAndy Walls	 * We don't need to save state here, but the array may have been a bit
521302df9702192a68578916ef922c33370cbba350dAndy Walls	 * too big (2304 bytes) to alloc from the stack.
522302df9702192a68578916ef922c33370cbba350dAndy Walls	 */
523302df9702192a68578916ef922c33370cbba350dAndy Walls	struct v4l2_sliced_vbi_data sliced_data[36];
5241c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
525302df9702192a68578916ef922c33370cbba350dAndy Walls	/*
526302df9702192a68578916ef922c33370cbba350dAndy Walls	 * A ring buffer of driver-generated MPEG-2 PS
527302df9702192a68578916ef922c33370cbba350dAndy Walls	 * Program Pack/Private Stream 1 packets for sliced VBI data insertion
528302df9702192a68578916ef922c33370cbba350dAndy Walls	 * into the MPEG PS stream.
529302df9702192a68578916ef922c33370cbba350dAndy Walls	 *
530302df9702192a68578916ef922c33370cbba350dAndy Walls	 * In each sliced_mpeg_data[] buffer is:
531302df9702192a68578916ef922c33370cbba350dAndy Walls	 * 	16 byte MPEG-2 PS Program Pack Header
532302df9702192a68578916ef922c33370cbba350dAndy Walls	 * 	16 byte MPEG-2 Private Stream 1 PES Header
533302df9702192a68578916ef922c33370cbba350dAndy Walls	 * 	 4 byte magic number: "itv0" or "ITV0"
534302df9702192a68578916ef922c33370cbba350dAndy Walls	 * 	 4 byte first  field line mask, if "itv0"
535302df9702192a68578916ef922c33370cbba350dAndy Walls	 * 	 4 byte second field line mask, if "itv0"
536302df9702192a68578916ef922c33370cbba350dAndy Walls	 * 	36 lines, if "ITV0"; or <36 lines, if "itv0"; of sliced VBI data
537302df9702192a68578916ef922c33370cbba350dAndy Walls	 *
538302df9702192a68578916ef922c33370cbba350dAndy Walls	 * 	Each line in the payload is
539302df9702192a68578916ef922c33370cbba350dAndy Walls	 *	 1 byte line header derived from the SDID (WSS, CC, VPS, etc.)
540302df9702192a68578916ef922c33370cbba350dAndy Walls	 *	42 bytes of line data
541302df9702192a68578916ef922c33370cbba350dAndy Walls	 *
542302df9702192a68578916ef922c33370cbba350dAndy Walls	 * That's a maximum 1552 bytes of payload in the Private Stream 1 packet
543302df9702192a68578916ef922c33370cbba350dAndy Walls	 * which is the payload size a PVR-350 (CX23415) MPEG decoder will
544302df9702192a68578916ef922c33370cbba350dAndy Walls	 * accept for VBI data. So, including the headers, it's a maximum 1584
545302df9702192a68578916ef922c33370cbba350dAndy Walls	 * bytes total.
546302df9702192a68578916ef922c33370cbba350dAndy Walls	 */
547302df9702192a68578916ef922c33370cbba350dAndy Walls#define CX18_SLICED_MPEG_DATA_MAXSZ	1584
548302df9702192a68578916ef922c33370cbba350dAndy Walls	/* copy_vbi_buf() needs 8 temp bytes on the end for the worst case */
549302df9702192a68578916ef922c33370cbba350dAndy Walls#define CX18_SLICED_MPEG_DATA_BUFSZ	(CX18_SLICED_MPEG_DATA_MAXSZ+8)
5501c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	u8 *sliced_mpeg_data[CX18_VBI_FRAMES];
5511c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	u32 sliced_mpeg_size[CX18_VBI_FRAMES];
552302df9702192a68578916ef922c33370cbba350dAndy Walls
553302df9702192a68578916ef922c33370cbba350dAndy Walls	/* Count of Program Pack/Program Stream 1 packets inserted into PS */
5541c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	u32 inserted_frame;
5551c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
556302df9702192a68578916ef922c33370cbba350dAndy Walls	/*
55752fcb3ecc6707f52dfe4297f96b7609d4ba517fbAndy Walls	 * A dummy driver stream transfer mdl & buffer with a copy of the next
558302df9702192a68578916ef922c33370cbba350dAndy Walls	 * sliced_mpeg_data[] buffer for output to userland apps.
559302df9702192a68578916ef922c33370cbba350dAndy Walls	 * Only used in cx18-fileops.c, but its state needs to persist at times.
560302df9702192a68578916ef922c33370cbba350dAndy Walls	 */
56152fcb3ecc6707f52dfe4297f96b7609d4ba517fbAndy Walls	struct cx18_mdl sliced_mpeg_mdl;
562302df9702192a68578916ef922c33370cbba350dAndy Walls	struct cx18_buffer sliced_mpeg_buf;
5631c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil};
5641c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
5651c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil/* Per cx23418, per I2C bus private algo callback data */
5661c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuilstruct cx18_i2c_algo_callback_data {
5671c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	struct cx18 *cx;
5681c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	int bus_index;   /* 0 or 1 for the cx23418's 1st or 2nd I2C bus */
5691c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil};
5701c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
571f7823f8f437fbbd41155f2312ef17e471199b706Andy Walls#define CX18_MAX_MMIO_WR_RETRIES 10
572330c6ec8942765e81f237bd58020da1b161935ceAndy Walls
5731c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil/* Struct to hold info about cx18 cards */
5741c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuilstruct cx18 {
5755811cf99df2e3c102055be3ea77508e56c9f77c6Andy Walls	int instance;
5763d05913d894a460b7dc8e5d93415fde21b986411Andy Walls	struct pci_dev *pci_dev;
577888cdb07741ab0098ccb8d9feff3f98cad048c26Andy Walls	struct v4l2_device v4l2_dev;
578ff2a20018094c593a35f4887bbdabf8926ddb6e6Andy Walls	struct v4l2_subdev *sd_av;     /* A/V decoder/digitizer sub-device */
579eefe1010a4657959588afc7fb3551cfa4e8bb4a7Andy Walls	struct v4l2_subdev *sd_extmux; /* External multiplexer sub-dev */
580888cdb07741ab0098ccb8d9feff3f98cad048c26Andy Walls
5811c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	const struct cx18_card *card;	/* card information */
5821c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	const char *card_name;  /* full name of the card */
5831c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	const struct cx18_card_tuner_i2c *card_i2c; /* i2c addresses to probe for tuner */
5841c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	u8 is_50hz;
5851c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	u8 is_60hz;
5861c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	u8 nof_inputs;		/* number of video inputs */
5871c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	u8 nof_audio_inputs;	/* number of audio inputs */
5881c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	u32 v4l2_cap;		/* V4L2 capabilities of card */
5891c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	u32 hw_flags; 		/* Hardware description of the board */
590fa655dda5ce6e5ac4a9b94fd451358edca2ddab8Andy Walls	unsigned int free_mdl_idx;
59172c2d6d3ac91d1b9efb482ff4a8dd68e3d867965Andy Walls	struct cx18_scb __iomem *scb; /* pointer to SCB */
59272c2d6d3ac91d1b9efb482ff4a8dd68e3d867965Andy Walls	struct mutex epu2apu_mb_lock; /* protect driver to chip mailbox in SCB*/
59372c2d6d3ac91d1b9efb482ff4a8dd68e3d867965Andy Walls	struct mutex epu2cpu_mb_lock; /* protect driver to chip mailbox in SCB*/
59472c2d6d3ac91d1b9efb482ff4a8dd68e3d867965Andy Walls
5951c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	struct cx18_av_state av_state;
5961c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
5971c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	/* codec settings */
598a75b9be1c2fb52dee765d35f29031dd788d522ebHans Verkuil	struct cx2341x_handler cxhdl;
5991c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	u32 filter_mode;
6001c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	u32 temporal_strength;
6011c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	u32 spatial_strength;
6021c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
6031c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	/* dualwatch */
6041c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	unsigned long dualwatch_jiffies;
6050d82fe801d7c6d8cb8987e66b570f6decde9e235Andy Walls	u32 dualwatch_stereo_mode;
6061c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
6071c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	struct mutex serialize_lock;    /* mutex used to serialize open/close/start/stop/ioctl operations */
6081c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	struct cx18_options options; 	/* User options */
6096ecd86dcc838fa446ec86334a9fe0c1e415e3514Andy Walls	int stream_buffers[CX18_MAX_STREAMS]; /* # of buffers for each stream */
6101c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	int stream_buf_size[CX18_MAX_STREAMS]; /* Stream buffer size */
6111c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	struct cx18_stream streams[CX18_MAX_STREAMS]; 	/* Stream data */
6129722c8f95a5bd51a3d392cb2f125c8240b745c48Andy Walls	struct snd_cx18_card *alsa; /* ALSA interface for PCM capture stream */
6139972de904216828c9f9f9d638df52206aa2bacd1Devin Heitmueller	void (*pcm_announce_callback)(struct snd_cx18_card *card, u8 *pcm_data,
6149972de904216828c9f9f9d638df52206aa2bacd1Devin Heitmueller				      size_t num_bytes);
6159972de904216828c9f9f9d638df52206aa2bacd1Devin Heitmueller
6161c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	unsigned long i_flags;  /* global cx18 flags */
61731554ae599a8ff6854bf8ecbedc1946c64854388Hans Verkuil	atomic_t ana_capturing;	/* count number of active analog capture streams */
61831554ae599a8ff6854bf8ecbedc1946c64854388Hans Verkuil	atomic_t tot_capturing;	/* total count number of active capture streams */
6191c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	int search_pack_header;
6201c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
6211c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	int open_id;		/* incremented each time an open occurs, used as
6221c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil				   unique ID. Starts at 1, so 0 can be used as
6231c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil				   uninitialized value in the stream->id. */
6241c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
62542d0c3ad28837a4a475c18b69160053fdb562976Hans Verkuil	resource_size_t base_addr;
6261c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
6271c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	u8 card_rev;
6281c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	void __iomem *enc_mem, *reg_mem;
6291c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
6301c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	struct vbi_info vbi;
6311c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
6321c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	u64 mpg_data_received;
6331c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	u64 vbi_data_inserted;
6341c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
6351c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	wait_queue_head_t mb_apu_waitq;
6361c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	wait_queue_head_t mb_cpu_waitq;
6371c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	wait_queue_head_t cap_w;
6381c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	/* when the current DMA is finished this queue is woken up */
6391c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	wait_queue_head_t dma_waitq;
6401c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
641d6c7e5f8faad080e75bace5c4f2265e3513e3510Andy Walls	u32 sw1_irq_mask;
642d6c7e5f8faad080e75bace5c4f2265e3513e3510Andy Walls	u32 sw2_irq_mask;
643d6c7e5f8faad080e75bace5c4f2265e3513e3510Andy Walls	u32 hw2_irq_mask;
644d6c7e5f8faad080e75bace5c4f2265e3513e3510Andy Walls
645deed75ed9f7576ada4bca02e6c851833a352a38dAndy Walls	struct workqueue_struct *in_work_queue;
646deed75ed9f7576ada4bca02e6c851833a352a38dAndy Walls	char in_workq_name[11]; /* "cx18-NN-in" */
647deed75ed9f7576ada4bca02e6c851833a352a38dAndy Walls	struct cx18_in_work_order in_work_order[CX18_MAX_IN_WORK_ORDERS];
648ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls	char epu_debug_str[256]; /* CX18_EPU_DEBUG is rare: use shared space */
6491d6782bda5c1fb2bca44af50647b45427d8ef4ecAndy Walls
6501c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	/* i2c */
6511c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	struct i2c_adapter i2c_adap[2];
6521c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	struct i2c_algo_bit_data i2c_algo[2];
6531c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	struct cx18_i2c_algo_callback_data i2c_algo_cb_data[2];
6541c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
6558352619043a04785b8d20e438629b14e556fffceAndy Walls	struct IR_i2c_init_data ir_i2c_init_data;
6568352619043a04785b8d20e438629b14e556fffceAndy Walls
657ba60bc673ce7d019ae6684cebbb33e5239346664Hans Verkuil	/* gpio */
658ba60bc673ce7d019ae6684cebbb33e5239346664Hans Verkuil	u32 gpio_dir;
659ba60bc673ce7d019ae6684cebbb33e5239346664Hans Verkuil	u32 gpio_val;
6608abdd00dcc6a58cab3afe6a23a0ce819dc08049aAndy Walls	struct mutex gpio_lock;
661eefe1010a4657959588afc7fb3551cfa4e8bb4a7Andy Walls	struct v4l2_subdev sd_gpiomux;
662eefe1010a4657959588afc7fb3551cfa4e8bb4a7Andy Walls	struct v4l2_subdev sd_resetctrl;
663ba60bc673ce7d019ae6684cebbb33e5239346664Hans Verkuil
6641c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	/* v4l2 and User settings */
6651c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
6661c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	/* codec settings */
6671c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	u32 audio_input;
6681c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	u32 active_input;
6691c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	v4l2_std_id std;
6701c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil	v4l2_std_id tuner_std;	/* The norm of the tuner (fixed) */
671d68b687b1e322e7325b1458d799e8234997e4ccdDevin Heitmueller
672d68b687b1e322e7325b1458d799e8234997e4ccdDevin Heitmueller	/* Used for cx18-alsa module loading */
673d68b687b1e322e7325b1458d799e8234997e4ccdDevin Heitmueller	struct work_struct request_module_wk;
6741c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil};
6751c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
6765811cf99df2e3c102055be3ea77508e56c9f77c6Andy Wallsstatic inline struct cx18 *to_cx18(struct v4l2_device *v4l2_dev)
6775811cf99df2e3c102055be3ea77508e56c9f77c6Andy Walls{
6785811cf99df2e3c102055be3ea77508e56c9f77c6Andy Walls	return container_of(v4l2_dev, struct cx18, v4l2_dev);
6795811cf99df2e3c102055be3ea77508e56c9f77c6Andy Walls}
6805811cf99df2e3c102055be3ea77508e56c9f77c6Andy Walls
681d68b687b1e322e7325b1458d799e8234997e4ccdDevin Heitmueller/* cx18 extensions to be loaded */
682d68b687b1e322e7325b1458d799e8234997e4ccdDevin Heitmuellerextern int (*cx18_ext_init)(struct cx18 *);
683d68b687b1e322e7325b1458d799e8234997e4ccdDevin Heitmueller
6841c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil/* Globals */
6851c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuilextern int cx18_first_minor;
6861c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
6871c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil/*==============Prototypes==================*/
6881c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
6891c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil/* Return non-zero if a signal is pending */
6901c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuilint cx18_msleep_timeout(unsigned int msecs, int intr);
6911c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
6921c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil/* Read Hauppauge eeprom */
6931c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuilstruct tveeprom; /* forward reference */
6941c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuilvoid cx18_read_eeprom(struct cx18 *cx, struct tveeprom *tv);
6951c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
6961c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil/* First-open initialization: load firmware, etc. */
6971c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuilint cx18_init_on_first_open(struct cx18 *cx);
6981c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil
699dd073434b5285121007860914a004320d644ee7eAndy Walls/* Test if the current VBI mode is raw (1) or sliced (0) */
700dd073434b5285121007860914a004320d644ee7eAndy Wallsstatic inline int cx18_raw_vbi(const struct cx18 *cx)
701dd073434b5285121007860914a004320d644ee7eAndy Walls{
702dd073434b5285121007860914a004320d644ee7eAndy Walls	return cx->vbi.in.type == V4L2_BUF_TYPE_VBI_CAPTURE;
703dd073434b5285121007860914a004320d644ee7eAndy Walls}
704dd073434b5285121007860914a004320d644ee7eAndy Walls
705ff2a20018094c593a35f4887bbdabf8926ddb6e6Andy Walls/* Call the specified callback for all subdevs with a grp_id bit matching the
706ff2a20018094c593a35f4887bbdabf8926ddb6e6Andy Walls * mask in hw (if 0, then match them all). Ignore any errors. */
7076c2d4dd139de417d18151b98c157aa35387038a3Guennadi Liakhovetski#define cx18_call_hw(cx, hw, o, f, args...)				\
7086c2d4dd139de417d18151b98c157aa35387038a3Guennadi Liakhovetski	do {								\
7096c2d4dd139de417d18151b98c157aa35387038a3Guennadi Liakhovetski		struct v4l2_subdev *__sd;				\
7106c2d4dd139de417d18151b98c157aa35387038a3Guennadi Liakhovetski		__v4l2_device_call_subdevs_p(&(cx)->v4l2_dev, __sd,	\
7116c2d4dd139de417d18151b98c157aa35387038a3Guennadi Liakhovetski			!(hw) || (__sd->grp_id & (hw)), o, f , ##args);	\
7126c2d4dd139de417d18151b98c157aa35387038a3Guennadi Liakhovetski	} while (0)
713ff2a20018094c593a35f4887bbdabf8926ddb6e6Andy Walls
714ff2a20018094c593a35f4887bbdabf8926ddb6e6Andy Walls#define cx18_call_all(cx, o, f, args...) cx18_call_hw(cx, 0, o, f , ##args)
715ff2a20018094c593a35f4887bbdabf8926ddb6e6Andy Walls
716ff2a20018094c593a35f4887bbdabf8926ddb6e6Andy Walls/* Call the specified callback for all subdevs with a grp_id bit matching the
717ff2a20018094c593a35f4887bbdabf8926ddb6e6Andy Walls * mask in hw (if 0, then match them all). If the callback returns an error
718ff2a20018094c593a35f4887bbdabf8926ddb6e6Andy Walls * other than 0 or -ENOIOCTLCMD, then return with that error code. */
7196c2d4dd139de417d18151b98c157aa35387038a3Guennadi Liakhovetski#define cx18_call_hw_err(cx, hw, o, f, args...)				\
7206c2d4dd139de417d18151b98c157aa35387038a3Guennadi Liakhovetski({									\
7216c2d4dd139de417d18151b98c157aa35387038a3Guennadi Liakhovetski	struct v4l2_subdev *__sd;					\
7226c2d4dd139de417d18151b98c157aa35387038a3Guennadi Liakhovetski	__v4l2_device_call_subdevs_until_err_p(&(cx)->v4l2_dev,		\
7236c2d4dd139de417d18151b98c157aa35387038a3Guennadi Liakhovetski			__sd, !(hw) || (__sd->grp_id & (hw)), o, f,	\
7246c2d4dd139de417d18151b98c157aa35387038a3Guennadi Liakhovetski			##args);					\
7256c2d4dd139de417d18151b98c157aa35387038a3Guennadi Liakhovetski})
726ff2a20018094c593a35f4887bbdabf8926ddb6e6Andy Walls
727ff2a20018094c593a35f4887bbdabf8926ddb6e6Andy Walls#define cx18_call_all_err(cx, o, f, args...) \
728ff2a20018094c593a35f4887bbdabf8926ddb6e6Andy Walls	cx18_call_hw_err(cx, 0, o, f , ##args)
729ff2a20018094c593a35f4887bbdabf8926ddb6e6Andy Walls
7301c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#endif /* CX18_DRIVER_H */
731