1/* 2 * ispccdc.h 3 * 4 * TI OMAP3 ISP - CCDC module 5 * 6 * Copyright (C) 2009-2010 Nokia Corporation 7 * Copyright (C) 2009 Texas Instruments, Inc. 8 * 9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com> 10 * Sakari Ailus <sakari.ailus@iki.fi> 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License version 2 as 14 * published by the Free Software Foundation. 15 */ 16 17#ifndef OMAP3_ISP_CCDC_H 18#define OMAP3_ISP_CCDC_H 19 20#include <linux/omap3isp.h> 21#include <linux/workqueue.h> 22 23#include "ispvideo.h" 24 25enum ccdc_input_entity { 26 CCDC_INPUT_NONE, 27 CCDC_INPUT_PARALLEL, 28 CCDC_INPUT_CSI2A, 29 CCDC_INPUT_CCP2B, 30 CCDC_INPUT_CSI2C 31}; 32 33#define CCDC_OUTPUT_MEMORY (1 << 0) 34#define CCDC_OUTPUT_PREVIEW (1 << 1) 35#define CCDC_OUTPUT_RESIZER (1 << 2) 36 37#define OMAP3ISP_CCDC_NEVENTS 16 38 39struct ispccdc_fpc { 40 void *addr; 41 dma_addr_t dma; 42 unsigned int fpnum; 43}; 44 45enum ispccdc_lsc_state { 46 LSC_STATE_STOPPED = 0, 47 LSC_STATE_STOPPING = 1, 48 LSC_STATE_RUNNING = 2, 49 LSC_STATE_RECONFIG = 3, 50}; 51 52struct ispccdc_lsc_config_req { 53 struct list_head list; 54 struct omap3isp_ccdc_lsc_config config; 55 unsigned char enable; 56 57 struct { 58 void *addr; 59 dma_addr_t dma; 60 struct sg_table sgt; 61 } table; 62}; 63 64/* 65 * ispccdc_lsc - CCDC LSC parameters 66 */ 67struct ispccdc_lsc { 68 enum ispccdc_lsc_state state; 69 struct work_struct table_work; 70 71 /* LSC queue of configurations */ 72 spinlock_t req_lock; 73 struct ispccdc_lsc_config_req *request; /* requested configuration */ 74 struct ispccdc_lsc_config_req *active; /* active configuration */ 75 struct list_head free_queue; /* configurations for freeing */ 76}; 77 78#define CCDC_STOP_NOT_REQUESTED 0x00 79#define CCDC_STOP_REQUEST 0x01 80#define CCDC_STOP_EXECUTED (0x02 | CCDC_STOP_REQUEST) 81#define CCDC_STOP_CCDC_FINISHED 0x04 82#define CCDC_STOP_LSC_FINISHED 0x08 83#define CCDC_STOP_FINISHED \ 84 (CCDC_STOP_EXECUTED | CCDC_STOP_CCDC_FINISHED | CCDC_STOP_LSC_FINISHED) 85 86#define CCDC_EVENT_VD1 0x10 87#define CCDC_EVENT_VD0 0x20 88#define CCDC_EVENT_LSC_DONE 0x40 89 90/* Sink and source CCDC pads */ 91#define CCDC_PAD_SINK 0 92#define CCDC_PAD_SOURCE_OF 1 93#define CCDC_PAD_SOURCE_VP 2 94#define CCDC_PADS_NUM 3 95 96#define CCDC_FIELD_TOP 1 97#define CCDC_FIELD_BOTTOM 2 98#define CCDC_FIELD_BOTH 3 99 100/* 101 * struct isp_ccdc_device - Structure for the CCDC module to store its own 102 * information 103 * @subdev: V4L2 subdevice 104 * @pads: Sink and source media entity pads 105 * @formats: Active video formats 106 * @crop: Active crop rectangle on the OF source pad 107 * @input: Active input 108 * @output: Active outputs 109 * @video_out: Output video node 110 * @alaw: A-law compression enabled (1) or disabled (0) 111 * @lpf: Low pass filter enabled (1) or disabled (0) 112 * @obclamp: Optical-black clamp enabled (1) or disabled (0) 113 * @fpc_en: Faulty pixels correction enabled (1) or disabled (0) 114 * @blcomp: Black level compensation configuration 115 * @clamp: Optical-black or digital clamp configuration 116 * @fpc: Faulty pixels correction configuration 117 * @lsc: Lens shading compensation configuration 118 * @update: Bitmask of controls to update during the next interrupt 119 * @shadow_update: Controls update in progress by userspace 120 * @bt656: Whether the input interface uses BT.656 synchronization 121 * @fields: The fields (CCDC_FIELD_*) stored in the current buffer 122 * @underrun: A buffer underrun occurred and a new buffer has been queued 123 * @state: Streaming state 124 * @lock: Serializes shadow_update with interrupt handler 125 * @wait: Wait queue used to stop the module 126 * @stopping: Stopping state 127 * @running: Is the CCDC hardware running 128 * @ioctl_lock: Serializes ioctl calls and LSC requests freeing 129 */ 130struct isp_ccdc_device { 131 struct v4l2_subdev subdev; 132 struct media_pad pads[CCDC_PADS_NUM]; 133 struct v4l2_mbus_framefmt formats[CCDC_PADS_NUM]; 134 struct v4l2_rect crop; 135 136 enum ccdc_input_entity input; 137 unsigned int output; 138 struct isp_video video_out; 139 140 unsigned int alaw:1, 141 lpf:1, 142 obclamp:1, 143 fpc_en:1; 144 struct omap3isp_ccdc_blcomp blcomp; 145 struct omap3isp_ccdc_bclamp clamp; 146 struct ispccdc_fpc fpc; 147 struct ispccdc_lsc lsc; 148 unsigned int update; 149 unsigned int shadow_update; 150 151 bool bt656; 152 unsigned int fields; 153 154 unsigned int underrun:1; 155 enum isp_pipeline_stream_state state; 156 spinlock_t lock; 157 wait_queue_head_t wait; 158 unsigned int stopping; 159 bool running; 160 struct mutex ioctl_lock; 161}; 162 163struct isp_device; 164 165int omap3isp_ccdc_init(struct isp_device *isp); 166void omap3isp_ccdc_cleanup(struct isp_device *isp); 167int omap3isp_ccdc_register_entities(struct isp_ccdc_device *ccdc, 168 struct v4l2_device *vdev); 169void omap3isp_ccdc_unregister_entities(struct isp_ccdc_device *ccdc); 170 171int omap3isp_ccdc_busy(struct isp_ccdc_device *isp_ccdc); 172int omap3isp_ccdc_isr(struct isp_ccdc_device *isp_ccdc, u32 events); 173void omap3isp_ccdc_restore_context(struct isp_device *isp); 174void omap3isp_ccdc_max_rate(struct isp_ccdc_device *ccdc, 175 unsigned int *max_rate); 176 177#endif /* OMAP3_ISP_CCDC_H */ 178