1af935746781088f28904601469671d244d2f653bKamil Debski/* 2af935746781088f28904601469671d244d2f653bKamil Debski * Samsung S5P Multi Format Codec v 5.0 3af935746781088f28904601469671d244d2f653bKamil Debski * 4af935746781088f28904601469671d244d2f653bKamil Debski * This file contains definitions of enums and structs used by the codec 5af935746781088f28904601469671d244d2f653bKamil Debski * driver. 6af935746781088f28904601469671d244d2f653bKamil Debski * 7af935746781088f28904601469671d244d2f653bKamil Debski * Copyright (C) 2011 Samsung Electronics Co., Ltd. 8af935746781088f28904601469671d244d2f653bKamil Debski * Kamil Debski, <k.debski@samsung.com> 9af935746781088f28904601469671d244d2f653bKamil Debski * 10af935746781088f28904601469671d244d2f653bKamil Debski * This program is free software; you can redistribute it and/or modify 11af935746781088f28904601469671d244d2f653bKamil Debski * it under the terms of the GNU General Public License as published by the 12af935746781088f28904601469671d244d2f653bKamil Debski * Free Software Foundation; either version 2 of the 13af935746781088f28904601469671d244d2f653bKamil Debski * License, or (at your option) any later version 14af935746781088f28904601469671d244d2f653bKamil Debski */ 15af935746781088f28904601469671d244d2f653bKamil Debski 16af935746781088f28904601469671d244d2f653bKamil Debski#ifndef S5P_MFC_COMMON_H_ 17af935746781088f28904601469671d244d2f653bKamil Debski#define S5P_MFC_COMMON_H_ 18af935746781088f28904601469671d244d2f653bKamil Debski 19af935746781088f28904601469671d244d2f653bKamil Debski#include <linux/platform_device.h> 20af935746781088f28904601469671d244d2f653bKamil Debski#include <linux/videodev2.h> 21af935746781088f28904601469671d244d2f653bKamil Debski#include <media/v4l2-ctrls.h> 22af935746781088f28904601469671d244d2f653bKamil Debski#include <media/v4l2-device.h> 23af935746781088f28904601469671d244d2f653bKamil Debski#include <media/v4l2-ioctl.h> 24af935746781088f28904601469671d244d2f653bKamil Debski#include <media/videobuf2-core.h> 25f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park#include "regs-mfc.h" 26e2b9deb2ad34c9ca6e11a6193bf29088716c2b62Kiran AVND#include "regs-mfc-v8.h" 27af935746781088f28904601469671d244d2f653bKamil Debski 28af935746781088f28904601469671d244d2f653bKamil Debski/* Definitions related to MFC memory */ 29af935746781088f28904601469671d244d2f653bKamil Debski 30af935746781088f28904601469671d244d2f653bKamil Debski/* Offset base used to differentiate between CAPTURE and OUTPUT 31af935746781088f28904601469671d244d2f653bKamil Debski* while mmaping */ 32af935746781088f28904601469671d244d2f653bKamil Debski#define DST_QUEUE_OFF_BASE (TASK_SIZE / 2) 33af935746781088f28904601469671d244d2f653bKamil Debski 34af935746781088f28904601469671d244d2f653bKamil Debski#define MFC_BANK1_ALLOC_CTX 0 35af935746781088f28904601469671d244d2f653bKamil Debski#define MFC_BANK2_ALLOC_CTX 1 36af935746781088f28904601469671d244d2f653bKamil Debski 37af935746781088f28904601469671d244d2f653bKamil Debski#define MFC_BANK1_ALIGN_ORDER 13 38af935746781088f28904601469671d244d2f653bKamil Debski#define MFC_BANK2_ALIGN_ORDER 13 39af935746781088f28904601469671d244d2f653bKamil Debski#define MFC_BASE_ALIGN_ORDER 17 40af935746781088f28904601469671d244d2f653bKamil Debski 4177ba6b7396047736f37c4f78d1f24f662e655a7eArun Kumar K#define MFC_FW_MAX_VERSIONS 2 4277ba6b7396047736f37c4f78d1f24f662e655a7eArun Kumar K 43af935746781088f28904601469671d244d2f653bKamil Debski#include <media/videobuf2-dma-contig.h> 44af935746781088f28904601469671d244d2f653bKamil Debski 45af935746781088f28904601469671d244d2f653bKamil Debskistatic inline dma_addr_t s5p_mfc_mem_cookie(void *a, void *b) 46af935746781088f28904601469671d244d2f653bKamil Debski{ 47af935746781088f28904601469671d244d2f653bKamil Debski /* Same functionality as the vb2_dma_contig_plane_paddr */ 48af935746781088f28904601469671d244d2f653bKamil Debski dma_addr_t *paddr = vb2_dma_contig_memops.cookie(b); 49af935746781088f28904601469671d244d2f653bKamil Debski 50af935746781088f28904601469671d244d2f653bKamil Debski return *paddr; 51af935746781088f28904601469671d244d2f653bKamil Debski} 52af935746781088f28904601469671d244d2f653bKamil Debski 53af935746781088f28904601469671d244d2f653bKamil Debski/* MFC definitions */ 54af935746781088f28904601469671d244d2f653bKamil Debski#define MFC_MAX_EXTRA_DPB 5 55af935746781088f28904601469671d244d2f653bKamil Debski#define MFC_MAX_BUFFERS 32 56af935746781088f28904601469671d244d2f653bKamil Debski#define MFC_NUM_CONTEXTS 4 57af935746781088f28904601469671d244d2f653bKamil Debski/* Interrupt timeout */ 58af935746781088f28904601469671d244d2f653bKamil Debski#define MFC_INT_TIMEOUT 2000 59af935746781088f28904601469671d244d2f653bKamil Debski/* Busy wait timeout */ 60af935746781088f28904601469671d244d2f653bKamil Debski#define MFC_BW_TIMEOUT 500 61af935746781088f28904601469671d244d2f653bKamil Debski/* Watchdog interval */ 62af935746781088f28904601469671d244d2f653bKamil Debski#define MFC_WATCHDOG_INTERVAL 1000 63af935746781088f28904601469671d244d2f653bKamil Debski/* After how many executions watchdog should assume lock up */ 64af935746781088f28904601469671d244d2f653bKamil Debski#define MFC_WATCHDOG_CNT 10 65af935746781088f28904601469671d244d2f653bKamil Debski#define MFC_NO_INSTANCE_SET -1 66af935746781088f28904601469671d244d2f653bKamil Debski#define MFC_ENC_CAP_PLANE_COUNT 1 67af935746781088f28904601469671d244d2f653bKamil Debski#define MFC_ENC_OUT_PLANE_COUNT 2 68af935746781088f28904601469671d244d2f653bKamil Debski#define STUFF_BYTE 4 693a9677063f00a61b6067a07df3d7ee12eace79b7Arun Kumar K#define MFC_MAX_CTRLS 77 7043a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K 7143a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define S5P_MFC_CODEC_NONE -1 7243a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define S5P_MFC_CODEC_H264_DEC 0 7343a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define S5P_MFC_CODEC_H264_MVC_DEC 1 7443a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define S5P_MFC_CODEC_VC1_DEC 2 7543a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define S5P_MFC_CODEC_MPEG4_DEC 3 7643a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define S5P_MFC_CODEC_MPEG2_DEC 4 7743a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define S5P_MFC_CODEC_H263_DEC 5 7843a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define S5P_MFC_CODEC_VC1RCV_DEC 6 7943a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define S5P_MFC_CODEC_VP8_DEC 7 8043a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K 8143a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define S5P_MFC_CODEC_H264_ENC 20 8243a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define S5P_MFC_CODEC_H264_MVC_ENC 21 8343a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define S5P_MFC_CODEC_MPEG4_ENC 22 8443a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define S5P_MFC_CODEC_H263_ENC 23 853a9677063f00a61b6067a07df3d7ee12eace79b7Arun Kumar K#define S5P_MFC_CODEC_VP8_ENC 24 8643a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K 8743a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define S5P_MFC_R2H_CMD_EMPTY 0 8843a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define S5P_MFC_R2H_CMD_SYS_INIT_RET 1 8943a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define S5P_MFC_R2H_CMD_OPEN_INSTANCE_RET 2 9043a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define S5P_MFC_R2H_CMD_SEQ_DONE_RET 3 9143a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define S5P_MFC_R2H_CMD_INIT_BUFFERS_RET 4 9243a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define S5P_MFC_R2H_CMD_CLOSE_INSTANCE_RET 6 9343a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define S5P_MFC_R2H_CMD_SLEEP_RET 7 9443a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define S5P_MFC_R2H_CMD_WAKEUP_RET 8 9543a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define S5P_MFC_R2H_CMD_COMPLETE_SEQ_RET 9 9643a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define S5P_MFC_R2H_CMD_DPB_FLUSH_RET 10 9743a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define S5P_MFC_R2H_CMD_NAL_ABORT_RET 11 9843a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define S5P_MFC_R2H_CMD_FW_STATUS_RET 12 9943a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define S5P_MFC_R2H_CMD_FRAME_DONE_RET 13 10043a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define S5P_MFC_R2H_CMD_FIELD_DONE_RET 14 10143a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define S5P_MFC_R2H_CMD_SLICE_DONE_RET 15 10243a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define S5P_MFC_R2H_CMD_ENC_BUFFER_FUL_RET 16 10343a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define S5P_MFC_R2H_CMD_ERR_RET 32 104af935746781088f28904601469671d244d2f653bKamil Debski 105af935746781088f28904601469671d244d2f653bKamil Debski#define mfc_read(dev, offset) readl(dev->regs_base + (offset)) 106af935746781088f28904601469671d244d2f653bKamil Debski#define mfc_write(dev, data, offset) writel((data), dev->regs_base + \ 107af935746781088f28904601469671d244d2f653bKamil Debski (offset)) 108af935746781088f28904601469671d244d2f653bKamil Debski 109af935746781088f28904601469671d244d2f653bKamil Debski/** 110af935746781088f28904601469671d244d2f653bKamil Debski * enum s5p_mfc_fmt_type - type of the pixelformat 111af935746781088f28904601469671d244d2f653bKamil Debski */ 112af935746781088f28904601469671d244d2f653bKamil Debskienum s5p_mfc_fmt_type { 113af935746781088f28904601469671d244d2f653bKamil Debski MFC_FMT_DEC, 114af935746781088f28904601469671d244d2f653bKamil Debski MFC_FMT_ENC, 115af935746781088f28904601469671d244d2f653bKamil Debski MFC_FMT_RAW, 116af935746781088f28904601469671d244d2f653bKamil Debski}; 117af935746781088f28904601469671d244d2f653bKamil Debski 118af935746781088f28904601469671d244d2f653bKamil Debski/** 119af935746781088f28904601469671d244d2f653bKamil Debski * enum s5p_mfc_inst_type - The type of an MFC instance. 120af935746781088f28904601469671d244d2f653bKamil Debski */ 121af935746781088f28904601469671d244d2f653bKamil Debskienum s5p_mfc_inst_type { 122af935746781088f28904601469671d244d2f653bKamil Debski MFCINST_INVALID, 123af935746781088f28904601469671d244d2f653bKamil Debski MFCINST_DECODER, 124af935746781088f28904601469671d244d2f653bKamil Debski MFCINST_ENCODER, 125af935746781088f28904601469671d244d2f653bKamil Debski}; 126af935746781088f28904601469671d244d2f653bKamil Debski 127af935746781088f28904601469671d244d2f653bKamil Debski/** 128af935746781088f28904601469671d244d2f653bKamil Debski * enum s5p_mfc_inst_state - The state of an MFC instance. 129af935746781088f28904601469671d244d2f653bKamil Debski */ 130af935746781088f28904601469671d244d2f653bKamil Debskienum s5p_mfc_inst_state { 131af935746781088f28904601469671d244d2f653bKamil Debski MFCINST_FREE = 0, 132af935746781088f28904601469671d244d2f653bKamil Debski MFCINST_INIT = 100, 133af935746781088f28904601469671d244d2f653bKamil Debski MFCINST_GOT_INST, 134af935746781088f28904601469671d244d2f653bKamil Debski MFCINST_HEAD_PARSED, 135e9d98ddc0a4e4e11603c818bf234644031bff384Arun Kumar K MFCINST_HEAD_PRODUCED, 136af935746781088f28904601469671d244d2f653bKamil Debski MFCINST_BUFS_SET, 137af935746781088f28904601469671d244d2f653bKamil Debski MFCINST_RUNNING, 138af935746781088f28904601469671d244d2f653bKamil Debski MFCINST_FINISHING, 139af935746781088f28904601469671d244d2f653bKamil Debski MFCINST_FINISHED, 140af935746781088f28904601469671d244d2f653bKamil Debski MFCINST_RETURN_INST, 141af935746781088f28904601469671d244d2f653bKamil Debski MFCINST_ERROR, 142af935746781088f28904601469671d244d2f653bKamil Debski MFCINST_ABORT, 1438f23cc0222a9fe9c43f679dcb3d38604b30cf7c8Arun Kumar K MFCINST_FLUSH, 144af935746781088f28904601469671d244d2f653bKamil Debski MFCINST_RES_CHANGE_INIT, 145af935746781088f28904601469671d244d2f653bKamil Debski MFCINST_RES_CHANGE_FLUSH, 146af935746781088f28904601469671d244d2f653bKamil Debski MFCINST_RES_CHANGE_END, 147af935746781088f28904601469671d244d2f653bKamil Debski}; 148af935746781088f28904601469671d244d2f653bKamil Debski 149af935746781088f28904601469671d244d2f653bKamil Debski/** 150af935746781088f28904601469671d244d2f653bKamil Debski * enum s5p_mfc_queue_state - The state of buffer queue. 151af935746781088f28904601469671d244d2f653bKamil Debski */ 152af935746781088f28904601469671d244d2f653bKamil Debskienum s5p_mfc_queue_state { 153af935746781088f28904601469671d244d2f653bKamil Debski QUEUE_FREE, 154af935746781088f28904601469671d244d2f653bKamil Debski QUEUE_BUFS_REQUESTED, 155af935746781088f28904601469671d244d2f653bKamil Debski QUEUE_BUFS_QUERIED, 156af935746781088f28904601469671d244d2f653bKamil Debski QUEUE_BUFS_MMAPED, 157af935746781088f28904601469671d244d2f653bKamil Debski}; 158af935746781088f28904601469671d244d2f653bKamil Debski 159af935746781088f28904601469671d244d2f653bKamil Debski/** 160af935746781088f28904601469671d244d2f653bKamil Debski * enum s5p_mfc_decode_arg - type of frame decoding 161af935746781088f28904601469671d244d2f653bKamil Debski */ 162af935746781088f28904601469671d244d2f653bKamil Debskienum s5p_mfc_decode_arg { 163af935746781088f28904601469671d244d2f653bKamil Debski MFC_DEC_FRAME, 164af935746781088f28904601469671d244d2f653bKamil Debski MFC_DEC_LAST_FRAME, 165af935746781088f28904601469671d244d2f653bKamil Debski MFC_DEC_RES_CHANGE, 166af935746781088f28904601469671d244d2f653bKamil Debski}; 167af935746781088f28904601469671d244d2f653bKamil Debski 16877ba6b7396047736f37c4f78d1f24f662e655a7eArun Kumar Kenum s5p_mfc_fw_ver { 16977ba6b7396047736f37c4f78d1f24f662e655a7eArun Kumar K MFC_FW_V1, 17077ba6b7396047736f37c4f78d1f24f662e655a7eArun Kumar K MFC_FW_V2, 17177ba6b7396047736f37c4f78d1f24f662e655a7eArun Kumar K}; 17277ba6b7396047736f37c4f78d1f24f662e655a7eArun Kumar K 173f9f715a95d07d3868bb30aeb20252b6b05d35d8fAndrzej Hajda#define MFC_BUF_FLAG_USED (1 << 0) 174f9f715a95d07d3868bb30aeb20252b6b05d35d8fAndrzej Hajda#define MFC_BUF_FLAG_EOS (1 << 1) 175f9f715a95d07d3868bb30aeb20252b6b05d35d8fAndrzej Hajda 176af935746781088f28904601469671d244d2f653bKamil Debskistruct s5p_mfc_ctx; 177af935746781088f28904601469671d244d2f653bKamil Debski 178af935746781088f28904601469671d244d2f653bKamil Debski/** 179af935746781088f28904601469671d244d2f653bKamil Debski * struct s5p_mfc_buf - MFC buffer 180af935746781088f28904601469671d244d2f653bKamil Debski */ 181af935746781088f28904601469671d244d2f653bKamil Debskistruct s5p_mfc_buf { 182af935746781088f28904601469671d244d2f653bKamil Debski struct list_head list; 183af935746781088f28904601469671d244d2f653bKamil Debski struct vb2_buffer *b; 184af935746781088f28904601469671d244d2f653bKamil Debski union { 185af935746781088f28904601469671d244d2f653bKamil Debski struct { 186af935746781088f28904601469671d244d2f653bKamil Debski size_t luma; 187af935746781088f28904601469671d244d2f653bKamil Debski size_t chroma; 188af935746781088f28904601469671d244d2f653bKamil Debski } raw; 189af935746781088f28904601469671d244d2f653bKamil Debski size_t stream; 190af935746781088f28904601469671d244d2f653bKamil Debski } cookie; 191f9f715a95d07d3868bb30aeb20252b6b05d35d8fAndrzej Hajda int flags; 192af935746781088f28904601469671d244d2f653bKamil Debski}; 193af935746781088f28904601469671d244d2f653bKamil Debski 194af935746781088f28904601469671d244d2f653bKamil Debski/** 195af935746781088f28904601469671d244d2f653bKamil Debski * struct s5p_mfc_pm - power management data structure 196af935746781088f28904601469671d244d2f653bKamil Debski */ 197af935746781088f28904601469671d244d2f653bKamil Debskistruct s5p_mfc_pm { 198af935746781088f28904601469671d244d2f653bKamil Debski struct clk *clock; 199af935746781088f28904601469671d244d2f653bKamil Debski struct clk *clock_gate; 200af935746781088f28904601469671d244d2f653bKamil Debski atomic_t power; 201af935746781088f28904601469671d244d2f653bKamil Debski struct device *device; 202af935746781088f28904601469671d244d2f653bKamil Debski}; 203af935746781088f28904601469671d244d2f653bKamil Debski 2048f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar Kstruct s5p_mfc_buf_size_v5 { 2058f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K unsigned int h264_ctx; 2068f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K unsigned int non_h264_ctx; 2078f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K unsigned int dsc; 2088f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K unsigned int shm; 2098f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K}; 2108f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K 211f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Parkstruct s5p_mfc_buf_size_v6 { 212f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park unsigned int dev_ctx; 213f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park unsigned int h264_dec_ctx; 214f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park unsigned int other_dec_ctx; 215f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park unsigned int h264_enc_ctx; 216f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park unsigned int other_enc_ctx; 217f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park}; 218f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park 2198f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar Kstruct s5p_mfc_buf_size { 2208f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K unsigned int fw; 2218f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K unsigned int cpb; 2228f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K void *priv; 2238f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K}; 2248f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K 2258f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar Kstruct s5p_mfc_buf_align { 2268f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K unsigned int base; 2278f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K}; 2288f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K 2298f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar Kstruct s5p_mfc_variant { 2308f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K unsigned int version; 2318f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K unsigned int port_num; 2329aa5f0087a5c2aabbce5a475309d7d5caa1fab07Kamil Debski u32 version_bit; 2338f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K struct s5p_mfc_buf_size *buf_size; 2348f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K struct s5p_mfc_buf_align *buf_align; 23577ba6b7396047736f37c4f78d1f24f662e655a7eArun Kumar K char *fw_name[MFC_FW_MAX_VERSIONS]; 2368f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K}; 2378f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K 2388f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K/** 2398f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K * struct s5p_mfc_priv_buf - represents internal used buffer 2408f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K * @alloc: allocation-specific context for each buffer 2418f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K * (videobuf2 allocator) 2428f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K * @ofs: offset of each buffer, will be used for MFC 2438f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K * @virt: kernel virtual address, only valid when the 2448f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K * buffer accessed by driver 2458f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K * @dma: DMA address, only valid when kernel DMA API used 2468f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K * @size: size of the buffer 2478f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K */ 2488f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar Kstruct s5p_mfc_priv_buf { 2498f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K void *alloc; 2508f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K unsigned long ofs; 2518f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K void *virt; 2528f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K dma_addr_t dma; 2538f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K size_t size; 2548f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K}; 2558f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K 256af935746781088f28904601469671d244d2f653bKamil Debski/** 257af935746781088f28904601469671d244d2f653bKamil Debski * struct s5p_mfc_dev - The struct containing driver internal parameters. 258af935746781088f28904601469671d244d2f653bKamil Debski * 259af935746781088f28904601469671d244d2f653bKamil Debski * @v4l2_dev: v4l2_device 260af935746781088f28904601469671d244d2f653bKamil Debski * @vfd_dec: video device for decoding 261af935746781088f28904601469671d244d2f653bKamil Debski * @vfd_enc: video device for encoding 262af935746781088f28904601469671d244d2f653bKamil Debski * @plat_dev: platform device 263af935746781088f28904601469671d244d2f653bKamil Debski * @mem_dev_l: child device of the left memory bank (0) 264af935746781088f28904601469671d244d2f653bKamil Debski * @mem_dev_r: child device of the right memory bank (1) 265af935746781088f28904601469671d244d2f653bKamil Debski * @regs_base: base address of the MFC hw registers 266af935746781088f28904601469671d244d2f653bKamil Debski * @irq: irq resource 267af935746781088f28904601469671d244d2f653bKamil Debski * @dec_ctrl_handler: control framework handler for decoding 268af935746781088f28904601469671d244d2f653bKamil Debski * @enc_ctrl_handler: control framework handler for encoding 269af935746781088f28904601469671d244d2f653bKamil Debski * @pm: power management control 2708f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K * @variant: MFC hardware variant information 271af935746781088f28904601469671d244d2f653bKamil Debski * @num_inst: couter of active MFC instances 272af935746781088f28904601469671d244d2f653bKamil Debski * @irqlock: lock for operations on videobuf2 queues 273af935746781088f28904601469671d244d2f653bKamil Debski * @condlock: lock for changing/checking if a context is ready to be 274af935746781088f28904601469671d244d2f653bKamil Debski * processed 275af935746781088f28904601469671d244d2f653bKamil Debski * @mfc_mutex: lock for video_device 276af935746781088f28904601469671d244d2f653bKamil Debski * @int_cond: variable used by the waitqueue 277af935746781088f28904601469671d244d2f653bKamil Debski * @int_type: type of last interrupt 278af935746781088f28904601469671d244d2f653bKamil Debski * @int_err: error number for last interrupt 279af935746781088f28904601469671d244d2f653bKamil Debski * @queue: waitqueue for waiting for completion of device commands 280af935746781088f28904601469671d244d2f653bKamil Debski * @fw_size: size of firmware 2812e731e443fcc8e4553201ad0573c1d5571e906acKamil Debski * @fw_virt_addr: virtual firmware address 2822e731e443fcc8e4553201ad0573c1d5571e906acKamil Debski * @bank1: address of the beginning of bank 1 memory 2832e731e443fcc8e4553201ad0573c1d5571e906acKamil Debski * @bank2: address of the beginning of bank 2 memory 284af935746781088f28904601469671d244d2f653bKamil Debski * @hw_lock: used for hardware locking 285af935746781088f28904601469671d244d2f653bKamil Debski * @ctx: array of driver contexts 286af935746781088f28904601469671d244d2f653bKamil Debski * @curr_ctx: number of the currently running context 287af935746781088f28904601469671d244d2f653bKamil Debski * @ctx_work_bits: used to mark which contexts are waiting for hardware 288af935746781088f28904601469671d244d2f653bKamil Debski * @watchdog_cnt: counter for the watchdog 289af935746781088f28904601469671d244d2f653bKamil Debski * @watchdog_workqueue: workqueue for the watchdog 290af935746781088f28904601469671d244d2f653bKamil Debski * @watchdog_work: worker for the watchdog 291af935746781088f28904601469671d244d2f653bKamil Debski * @alloc_ctx: videobuf2 allocator contexts for two memory banks 292af935746781088f28904601469671d244d2f653bKamil Debski * @enter_suspend: flag set when entering suspend 293f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park * @ctx_buf: common context memory (MFCv6) 29443a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K * @warn_start: hardware error code from which warnings start 29543a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K * @mfc_ops: ops structure holding HW operation function pointers 29643a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K * @mfc_cmds: cmd structure holding HW commands function pointers 29777ba6b7396047736f37c4f78d1f24f662e655a7eArun Kumar K * @fw_ver: loaded firmware sub-version 298af935746781088f28904601469671d244d2f653bKamil Debski * 299af935746781088f28904601469671d244d2f653bKamil Debski */ 300af935746781088f28904601469671d244d2f653bKamil Debskistruct s5p_mfc_dev { 301af935746781088f28904601469671d244d2f653bKamil Debski struct v4l2_device v4l2_dev; 302af935746781088f28904601469671d244d2f653bKamil Debski struct video_device *vfd_dec; 303af935746781088f28904601469671d244d2f653bKamil Debski struct video_device *vfd_enc; 304af935746781088f28904601469671d244d2f653bKamil Debski struct platform_device *plat_dev; 305af935746781088f28904601469671d244d2f653bKamil Debski struct device *mem_dev_l; 306af935746781088f28904601469671d244d2f653bKamil Debski struct device *mem_dev_r; 307af935746781088f28904601469671d244d2f653bKamil Debski void __iomem *regs_base; 308af935746781088f28904601469671d244d2f653bKamil Debski int irq; 309af935746781088f28904601469671d244d2f653bKamil Debski struct v4l2_ctrl_handler dec_ctrl_handler; 310af935746781088f28904601469671d244d2f653bKamil Debski struct v4l2_ctrl_handler enc_ctrl_handler; 311af935746781088f28904601469671d244d2f653bKamil Debski struct s5p_mfc_pm pm; 3128f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K struct s5p_mfc_variant *variant; 313af935746781088f28904601469671d244d2f653bKamil Debski int num_inst; 314af935746781088f28904601469671d244d2f653bKamil Debski spinlock_t irqlock; /* lock when operating on videobuf2 queues */ 315af935746781088f28904601469671d244d2f653bKamil Debski spinlock_t condlock; /* lock when changing/checking if a context is 316af935746781088f28904601469671d244d2f653bKamil Debski ready to be processed */ 317af935746781088f28904601469671d244d2f653bKamil Debski struct mutex mfc_mutex; /* video_device lock */ 318af935746781088f28904601469671d244d2f653bKamil Debski int int_cond; 319af935746781088f28904601469671d244d2f653bKamil Debski int int_type; 320af935746781088f28904601469671d244d2f653bKamil Debski unsigned int int_err; 321af935746781088f28904601469671d244d2f653bKamil Debski wait_queue_head_t queue; 322af935746781088f28904601469671d244d2f653bKamil Debski size_t fw_size; 3232e731e443fcc8e4553201ad0573c1d5571e906acKamil Debski void *fw_virt_addr; 3242e731e443fcc8e4553201ad0573c1d5571e906acKamil Debski dma_addr_t bank1; 3252e731e443fcc8e4553201ad0573c1d5571e906acKamil Debski dma_addr_t bank2; 326af935746781088f28904601469671d244d2f653bKamil Debski unsigned long hw_lock; 327af935746781088f28904601469671d244d2f653bKamil Debski struct s5p_mfc_ctx *ctx[MFC_NUM_CONTEXTS]; 328af935746781088f28904601469671d244d2f653bKamil Debski int curr_ctx; 329af935746781088f28904601469671d244d2f653bKamil Debski unsigned long ctx_work_bits; 330af935746781088f28904601469671d244d2f653bKamil Debski atomic_t watchdog_cnt; 331af935746781088f28904601469671d244d2f653bKamil Debski struct timer_list watchdog_timer; 332af935746781088f28904601469671d244d2f653bKamil Debski struct workqueue_struct *watchdog_workqueue; 333af935746781088f28904601469671d244d2f653bKamil Debski struct work_struct watchdog_work; 334af935746781088f28904601469671d244d2f653bKamil Debski void *alloc_ctx[2]; 335af935746781088f28904601469671d244d2f653bKamil Debski unsigned long enter_suspend; 33643a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K 337f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park struct s5p_mfc_priv_buf ctx_buf; 33843a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K int warn_start; 33943a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K struct s5p_mfc_hw_ops *mfc_ops; 34043a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K struct s5p_mfc_hw_cmds *mfc_cmds; 3416a9c6f681257985468e4835bf9f911ec56482f02Kiran AVND const struct s5p_mfc_regs *mfc_regs; 34277ba6b7396047736f37c4f78d1f24f662e655a7eArun Kumar K enum s5p_mfc_fw_ver fw_ver; 343af935746781088f28904601469671d244d2f653bKamil Debski}; 344af935746781088f28904601469671d244d2f653bKamil Debski 345af935746781088f28904601469671d244d2f653bKamil Debski/** 346af935746781088f28904601469671d244d2f653bKamil Debski * struct s5p_mfc_h264_enc_params - encoding parameters for h264 347af935746781088f28904601469671d244d2f653bKamil Debski */ 348af935746781088f28904601469671d244d2f653bKamil Debskistruct s5p_mfc_h264_enc_params { 349af935746781088f28904601469671d244d2f653bKamil Debski enum v4l2_mpeg_video_h264_profile profile; 350af935746781088f28904601469671d244d2f653bKamil Debski enum v4l2_mpeg_video_h264_loop_filter_mode loop_filter_mode; 351af935746781088f28904601469671d244d2f653bKamil Debski s8 loop_filter_alpha; 352af935746781088f28904601469671d244d2f653bKamil Debski s8 loop_filter_beta; 353af935746781088f28904601469671d244d2f653bKamil Debski enum v4l2_mpeg_video_h264_entropy_mode entropy_mode; 354af935746781088f28904601469671d244d2f653bKamil Debski u8 max_ref_pic; 355af935746781088f28904601469671d244d2f653bKamil Debski u8 num_ref_pic_4p; 356af935746781088f28904601469671d244d2f653bKamil Debski int _8x8_transform; 357af935746781088f28904601469671d244d2f653bKamil Debski int rc_mb_dark; 358af935746781088f28904601469671d244d2f653bKamil Debski int rc_mb_smooth; 359af935746781088f28904601469671d244d2f653bKamil Debski int rc_mb_static; 360af935746781088f28904601469671d244d2f653bKamil Debski int rc_mb_activity; 361af935746781088f28904601469671d244d2f653bKamil Debski int vui_sar; 362af935746781088f28904601469671d244d2f653bKamil Debski u8 vui_sar_idc; 363af935746781088f28904601469671d244d2f653bKamil Debski u16 vui_ext_sar_width; 364af935746781088f28904601469671d244d2f653bKamil Debski u16 vui_ext_sar_height; 365af935746781088f28904601469671d244d2f653bKamil Debski int open_gop; 366af935746781088f28904601469671d244d2f653bKamil Debski u16 open_gop_size; 367af935746781088f28904601469671d244d2f653bKamil Debski u8 rc_frame_qp; 368af935746781088f28904601469671d244d2f653bKamil Debski u8 rc_min_qp; 369af935746781088f28904601469671d244d2f653bKamil Debski u8 rc_max_qp; 370af935746781088f28904601469671d244d2f653bKamil Debski u8 rc_p_frame_qp; 371af935746781088f28904601469671d244d2f653bKamil Debski u8 rc_b_frame_qp; 372af935746781088f28904601469671d244d2f653bKamil Debski enum v4l2_mpeg_video_h264_level level_v4l2; 373af935746781088f28904601469671d244d2f653bKamil Debski int level; 374af935746781088f28904601469671d244d2f653bKamil Debski u16 cpb_size; 3758f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K int interlace; 376f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park u8 hier_qp; 377f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park u8 hier_qp_type; 378f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park u8 hier_qp_layer; 379f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park u8 hier_qp_layer_qp[7]; 380f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park u8 sei_frame_packing; 381f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park u8 sei_fp_curr_frame_0; 382f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park u8 sei_fp_arrangement_type; 383f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park 384f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park u8 fmo; 385f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park u8 fmo_map_type; 386f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park u8 fmo_slice_grp; 387f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park u8 fmo_chg_dir; 388f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park u32 fmo_chg_rate; 389f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park u32 fmo_run_len[4]; 390f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park u8 aso; 391f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park u32 aso_slice_order[8]; 392af935746781088f28904601469671d244d2f653bKamil Debski}; 393af935746781088f28904601469671d244d2f653bKamil Debski 394af935746781088f28904601469671d244d2f653bKamil Debski/** 395af935746781088f28904601469671d244d2f653bKamil Debski * struct s5p_mfc_mpeg4_enc_params - encoding parameters for h263 and mpeg4 396af935746781088f28904601469671d244d2f653bKamil Debski */ 397af935746781088f28904601469671d244d2f653bKamil Debskistruct s5p_mfc_mpeg4_enc_params { 398af935746781088f28904601469671d244d2f653bKamil Debski /* MPEG4 Only */ 399af935746781088f28904601469671d244d2f653bKamil Debski enum v4l2_mpeg_video_mpeg4_profile profile; 400af935746781088f28904601469671d244d2f653bKamil Debski int quarter_pixel; 401af935746781088f28904601469671d244d2f653bKamil Debski /* Common for MPEG4, H263 */ 402af935746781088f28904601469671d244d2f653bKamil Debski u16 vop_time_res; 403af935746781088f28904601469671d244d2f653bKamil Debski u16 vop_frm_delta; 404af935746781088f28904601469671d244d2f653bKamil Debski u8 rc_frame_qp; 405af935746781088f28904601469671d244d2f653bKamil Debski u8 rc_min_qp; 406af935746781088f28904601469671d244d2f653bKamil Debski u8 rc_max_qp; 407af935746781088f28904601469671d244d2f653bKamil Debski u8 rc_p_frame_qp; 408af935746781088f28904601469671d244d2f653bKamil Debski u8 rc_b_frame_qp; 409af935746781088f28904601469671d244d2f653bKamil Debski enum v4l2_mpeg_video_mpeg4_level level_v4l2; 410af935746781088f28904601469671d244d2f653bKamil Debski int level; 411af935746781088f28904601469671d244d2f653bKamil Debski}; 412af935746781088f28904601469671d244d2f653bKamil Debski 413af935746781088f28904601469671d244d2f653bKamil Debski/** 4143a9677063f00a61b6067a07df3d7ee12eace79b7Arun Kumar K * struct s5p_mfc_vp8_enc_params - encoding parameters for vp8 4153a9677063f00a61b6067a07df3d7ee12eace79b7Arun Kumar K */ 4163a9677063f00a61b6067a07df3d7ee12eace79b7Arun Kumar Kstruct s5p_mfc_vp8_enc_params { 4173a9677063f00a61b6067a07df3d7ee12eace79b7Arun Kumar K u8 imd_4x4; 4183a9677063f00a61b6067a07df3d7ee12eace79b7Arun Kumar K enum v4l2_vp8_num_partitions num_partitions; 4193a9677063f00a61b6067a07df3d7ee12eace79b7Arun Kumar K enum v4l2_vp8_num_ref_frames num_ref; 4203a9677063f00a61b6067a07df3d7ee12eace79b7Arun Kumar K u8 filter_level; 4213a9677063f00a61b6067a07df3d7ee12eace79b7Arun Kumar K u8 filter_sharpness; 4223a9677063f00a61b6067a07df3d7ee12eace79b7Arun Kumar K u32 golden_frame_ref_period; 4233a9677063f00a61b6067a07df3d7ee12eace79b7Arun Kumar K enum v4l2_vp8_golden_frame_sel golden_frame_sel; 4243a9677063f00a61b6067a07df3d7ee12eace79b7Arun Kumar K u8 hier_layer; 4253a9677063f00a61b6067a07df3d7ee12eace79b7Arun Kumar K u8 hier_layer_qp[3]; 4264773ab99aa8bda57de22bf54ddbaa1a941b25fb0Arun Kumar K u8 rc_min_qp; 4274773ab99aa8bda57de22bf54ddbaa1a941b25fb0Arun Kumar K u8 rc_max_qp; 4284773ab99aa8bda57de22bf54ddbaa1a941b25fb0Arun Kumar K u8 rc_frame_qp; 4294773ab99aa8bda57de22bf54ddbaa1a941b25fb0Arun Kumar K u8 rc_p_frame_qp; 430bbd8f3fef9d289fcfddaefccc2e5a2355da5d2f4Kiran AVND u8 profile; 4313a9677063f00a61b6067a07df3d7ee12eace79b7Arun Kumar K}; 4323a9677063f00a61b6067a07df3d7ee12eace79b7Arun Kumar K 4333a9677063f00a61b6067a07df3d7ee12eace79b7Arun Kumar K/** 434af935746781088f28904601469671d244d2f653bKamil Debski * struct s5p_mfc_enc_params - general encoding parameters 435af935746781088f28904601469671d244d2f653bKamil Debski */ 436af935746781088f28904601469671d244d2f653bKamil Debskistruct s5p_mfc_enc_params { 437af935746781088f28904601469671d244d2f653bKamil Debski u16 width; 438af935746781088f28904601469671d244d2f653bKamil Debski u16 height; 439a378a320aa5bfeacf5bade374d126e4a8d01b115Amit Grover u32 mv_h_range; 440a378a320aa5bfeacf5bade374d126e4a8d01b115Amit Grover u32 mv_v_range; 441af935746781088f28904601469671d244d2f653bKamil Debski 442af935746781088f28904601469671d244d2f653bKamil Debski u16 gop_size; 443af935746781088f28904601469671d244d2f653bKamil Debski enum v4l2_mpeg_video_multi_slice_mode slice_mode; 444af935746781088f28904601469671d244d2f653bKamil Debski u16 slice_mb; 445af935746781088f28904601469671d244d2f653bKamil Debski u32 slice_bit; 446af935746781088f28904601469671d244d2f653bKamil Debski u16 intra_refresh_mb; 447af935746781088f28904601469671d244d2f653bKamil Debski int pad; 448af935746781088f28904601469671d244d2f653bKamil Debski u8 pad_luma; 449af935746781088f28904601469671d244d2f653bKamil Debski u8 pad_cb; 450af935746781088f28904601469671d244d2f653bKamil Debski u8 pad_cr; 451af935746781088f28904601469671d244d2f653bKamil Debski int rc_frame; 4528f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K int rc_mb; 453af935746781088f28904601469671d244d2f653bKamil Debski u32 rc_bitrate; 454af935746781088f28904601469671d244d2f653bKamil Debski u16 rc_reaction_coeff; 455af935746781088f28904601469671d244d2f653bKamil Debski u16 vbv_size; 456f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park u32 vbv_delay; 457af935746781088f28904601469671d244d2f653bKamil Debski 458af935746781088f28904601469671d244d2f653bKamil Debski enum v4l2_mpeg_video_header_mode seq_hdr_mode; 459af935746781088f28904601469671d244d2f653bKamil Debski enum v4l2_mpeg_mfc51_video_frame_skip_mode frame_skip_mode; 460af935746781088f28904601469671d244d2f653bKamil Debski int fixed_target_bit; 461af935746781088f28904601469671d244d2f653bKamil Debski 462af935746781088f28904601469671d244d2f653bKamil Debski u8 num_b_frame; 463af935746781088f28904601469671d244d2f653bKamil Debski u32 rc_framerate_num; 464af935746781088f28904601469671d244d2f653bKamil Debski u32 rc_framerate_denom; 465af935746781088f28904601469671d244d2f653bKamil Debski 466ac5f867fbfbd1ff5a43e796ed470deff42b630d2Andrzej Hajda struct { 467af935746781088f28904601469671d244d2f653bKamil Debski struct s5p_mfc_h264_enc_params h264; 468af935746781088f28904601469671d244d2f653bKamil Debski struct s5p_mfc_mpeg4_enc_params mpeg4; 4693a9677063f00a61b6067a07df3d7ee12eace79b7Arun Kumar K struct s5p_mfc_vp8_enc_params vp8; 470af935746781088f28904601469671d244d2f653bKamil Debski } codec; 471af935746781088f28904601469671d244d2f653bKamil Debski 472af935746781088f28904601469671d244d2f653bKamil Debski}; 473af935746781088f28904601469671d244d2f653bKamil Debski 474af935746781088f28904601469671d244d2f653bKamil Debski/** 475af935746781088f28904601469671d244d2f653bKamil Debski * struct s5p_mfc_codec_ops - codec ops, used by encoding 476af935746781088f28904601469671d244d2f653bKamil Debski */ 477af935746781088f28904601469671d244d2f653bKamil Debskistruct s5p_mfc_codec_ops { 478af935746781088f28904601469671d244d2f653bKamil Debski /* initialization routines */ 479af935746781088f28904601469671d244d2f653bKamil Debski int (*pre_seq_start) (struct s5p_mfc_ctx *ctx); 480af935746781088f28904601469671d244d2f653bKamil Debski int (*post_seq_start) (struct s5p_mfc_ctx *ctx); 481af935746781088f28904601469671d244d2f653bKamil Debski /* execution routines */ 482af935746781088f28904601469671d244d2f653bKamil Debski int (*pre_frame_start) (struct s5p_mfc_ctx *ctx); 483af935746781088f28904601469671d244d2f653bKamil Debski int (*post_frame_start) (struct s5p_mfc_ctx *ctx); 484af935746781088f28904601469671d244d2f653bKamil Debski}; 485af935746781088f28904601469671d244d2f653bKamil Debski 486af935746781088f28904601469671d244d2f653bKamil Debski#define call_cop(c, op, args...) \ 487af935746781088f28904601469671d244d2f653bKamil Debski (((c)->c_ops->op) ? \ 488af935746781088f28904601469671d244d2f653bKamil Debski ((c)->c_ops->op(args)) : 0) 489af935746781088f28904601469671d244d2f653bKamil Debski 490af935746781088f28904601469671d244d2f653bKamil Debski/** 491af935746781088f28904601469671d244d2f653bKamil Debski * struct s5p_mfc_ctx - This struct contains the instance context 492af935746781088f28904601469671d244d2f653bKamil Debski * 493af935746781088f28904601469671d244d2f653bKamil Debski * @dev: pointer to the s5p_mfc_dev of the device 494af935746781088f28904601469671d244d2f653bKamil Debski * @fh: struct v4l2_fh 495af935746781088f28904601469671d244d2f653bKamil Debski * @num: number of the context that this structure describes 496af935746781088f28904601469671d244d2f653bKamil Debski * @int_cond: variable used by the waitqueue 497af935746781088f28904601469671d244d2f653bKamil Debski * @int_type: type of the last interrupt 498af935746781088f28904601469671d244d2f653bKamil Debski * @int_err: error number received from MFC hw in the interrupt 499af935746781088f28904601469671d244d2f653bKamil Debski * @queue: waitqueue that can be used to wait for this context to 500af935746781088f28904601469671d244d2f653bKamil Debski * finish 501af935746781088f28904601469671d244d2f653bKamil Debski * @src_fmt: source pixelformat information 502af935746781088f28904601469671d244d2f653bKamil Debski * @dst_fmt: destination pixelformat information 503af935746781088f28904601469671d244d2f653bKamil Debski * @vq_src: vb2 queue for source buffers 504af935746781088f28904601469671d244d2f653bKamil Debski * @vq_dst: vb2 queue for destination buffers 505af935746781088f28904601469671d244d2f653bKamil Debski * @src_queue: driver internal queue for source buffers 506af935746781088f28904601469671d244d2f653bKamil Debski * @dst_queue: driver internal queue for destination buffers 507af935746781088f28904601469671d244d2f653bKamil Debski * @src_queue_cnt: number of buffers queued on the source internal queue 508af935746781088f28904601469671d244d2f653bKamil Debski * @dst_queue_cnt: number of buffers queued on the dest internal queue 509af935746781088f28904601469671d244d2f653bKamil Debski * @type: type of the instance - decoder or encoder 510af935746781088f28904601469671d244d2f653bKamil Debski * @state: state of the context 511af935746781088f28904601469671d244d2f653bKamil Debski * @inst_no: number of hw instance associated with the context 512af935746781088f28904601469671d244d2f653bKamil Debski * @img_width: width of the image that is decoded or encoded 513af935746781088f28904601469671d244d2f653bKamil Debski * @img_height: height of the image that is decoded or encoded 514af935746781088f28904601469671d244d2f653bKamil Debski * @buf_width: width of the buffer for processed image 515af935746781088f28904601469671d244d2f653bKamil Debski * @buf_height: height of the buffer for processed image 516af935746781088f28904601469671d244d2f653bKamil Debski * @luma_size: size of a luma plane 517af935746781088f28904601469671d244d2f653bKamil Debski * @chroma_size: size of a chroma plane 518af935746781088f28904601469671d244d2f653bKamil Debski * @mv_size: size of a motion vectors buffer 519af935746781088f28904601469671d244d2f653bKamil Debski * @consumed_stream: number of bytes that have been used so far from the 520af935746781088f28904601469671d244d2f653bKamil Debski * decoding buffer 521af935746781088f28904601469671d244d2f653bKamil Debski * @dpb_flush_flag: flag used to indicate that a DPB buffers are being 522af935746781088f28904601469671d244d2f653bKamil Debski * flushed 523f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park * @head_processed: flag mentioning whether the header data is processed 524f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park * completely or not 525317b4ca4982ea2429b75d0acd10445ec9475aa86Kamil Debski * @bank1: handle to memory allocated for temporary buffers from 526af935746781088f28904601469671d244d2f653bKamil Debski * memory bank 1 527317b4ca4982ea2429b75d0acd10445ec9475aa86Kamil Debski * @bank2: handle to memory allocated for temporary buffers from 528af935746781088f28904601469671d244d2f653bKamil Debski * memory bank 2 529af935746781088f28904601469671d244d2f653bKamil Debski * @capture_state: state of the capture buffers queue 530af935746781088f28904601469671d244d2f653bKamil Debski * @output_state: state of the output buffers queue 531af935746781088f28904601469671d244d2f653bKamil Debski * @src_bufs: information on allocated source buffers 532af935746781088f28904601469671d244d2f653bKamil Debski * @dst_bufs: information on allocated destination buffers 533af935746781088f28904601469671d244d2f653bKamil Debski * @sequence: counter for the sequence number for v4l2 534af935746781088f28904601469671d244d2f653bKamil Debski * @dec_dst_flag: flags for buffers queued in the hardware 535af935746781088f28904601469671d244d2f653bKamil Debski * @dec_src_buf_size: size of the buffer for source buffers in decoding 536af935746781088f28904601469671d244d2f653bKamil Debski * @codec_mode: number of codec mode used by MFC hw 537af935746781088f28904601469671d244d2f653bKamil Debski * @slice_interface: slice interface flag 538af935746781088f28904601469671d244d2f653bKamil Debski * @loop_filter_mpeg4: loop filter for MPEG4 flag 539af935746781088f28904601469671d244d2f653bKamil Debski * @display_delay: value of the display delay for H264 540af935746781088f28904601469671d244d2f653bKamil Debski * @display_delay_enable: display delay for H264 enable flag 541af935746781088f28904601469671d244d2f653bKamil Debski * @after_packed_pb: flag used to track buffer when stream is in 542af935746781088f28904601469671d244d2f653bKamil Debski * Packed PB format 543f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park * @sei_fp_parse: enable/disable parsing of frame packing SEI information 544af935746781088f28904601469671d244d2f653bKamil Debski * @dpb_count: count of the DPB buffers required by MFC hw 545af935746781088f28904601469671d244d2f653bKamil Debski * @total_dpb_count: count of DPB buffers with additional buffers 546af935746781088f28904601469671d244d2f653bKamil Debski * requested by the application 5478f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K * @ctx: context buffer information 5488f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K * @dsc: descriptor buffer information 5498f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K * @shm: shared memory buffer information 550f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park * @mv_count: number of MV buffers allocated for decoding 551af935746781088f28904601469671d244d2f653bKamil Debski * @enc_params: encoding parameters for MFC 552af935746781088f28904601469671d244d2f653bKamil Debski * @enc_dst_buf_size: size of the buffers for encoder output 553f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park * @luma_dpb_size: dpb buffer size for luma 554f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park * @chroma_dpb_size: dpb buffer size for chroma 555f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park * @me_buffer_size: size of the motion estimation buffer 556f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park * @tmv_buffer_size: size of temporal predictor motion vector buffer 557af935746781088f28904601469671d244d2f653bKamil Debski * @frame_type: used to force the type of the next encoded frame 558af935746781088f28904601469671d244d2f653bKamil Debski * @ref_queue: list of the reference buffers for encoding 559af935746781088f28904601469671d244d2f653bKamil Debski * @ref_queue_cnt: number of the buffers in the reference list 560af935746781088f28904601469671d244d2f653bKamil Debski * @c_ops: ops for encoding 561af935746781088f28904601469671d244d2f653bKamil Debski * @ctrls: array of controls, used when adding controls to the 562af935746781088f28904601469671d244d2f653bKamil Debski * v4l2 control framework 563af935746781088f28904601469671d244d2f653bKamil Debski * @ctrl_handler: handler for v4l2 framework 564af935746781088f28904601469671d244d2f653bKamil Debski */ 565af935746781088f28904601469671d244d2f653bKamil Debskistruct s5p_mfc_ctx { 566af935746781088f28904601469671d244d2f653bKamil Debski struct s5p_mfc_dev *dev; 567af935746781088f28904601469671d244d2f653bKamil Debski struct v4l2_fh fh; 568af935746781088f28904601469671d244d2f653bKamil Debski 569af935746781088f28904601469671d244d2f653bKamil Debski int num; 570af935746781088f28904601469671d244d2f653bKamil Debski 571af935746781088f28904601469671d244d2f653bKamil Debski int int_cond; 572af935746781088f28904601469671d244d2f653bKamil Debski int int_type; 573af935746781088f28904601469671d244d2f653bKamil Debski unsigned int int_err; 574af935746781088f28904601469671d244d2f653bKamil Debski wait_queue_head_t queue; 575af935746781088f28904601469671d244d2f653bKamil Debski 576af935746781088f28904601469671d244d2f653bKamil Debski struct s5p_mfc_fmt *src_fmt; 577af935746781088f28904601469671d244d2f653bKamil Debski struct s5p_mfc_fmt *dst_fmt; 578af935746781088f28904601469671d244d2f653bKamil Debski 579af935746781088f28904601469671d244d2f653bKamil Debski struct vb2_queue vq_src; 580af935746781088f28904601469671d244d2f653bKamil Debski struct vb2_queue vq_dst; 581af935746781088f28904601469671d244d2f653bKamil Debski 582af935746781088f28904601469671d244d2f653bKamil Debski struct list_head src_queue; 583af935746781088f28904601469671d244d2f653bKamil Debski struct list_head dst_queue; 584af935746781088f28904601469671d244d2f653bKamil Debski 585af935746781088f28904601469671d244d2f653bKamil Debski unsigned int src_queue_cnt; 586af935746781088f28904601469671d244d2f653bKamil Debski unsigned int dst_queue_cnt; 587af935746781088f28904601469671d244d2f653bKamil Debski 588af935746781088f28904601469671d244d2f653bKamil Debski enum s5p_mfc_inst_type type; 589af935746781088f28904601469671d244d2f653bKamil Debski enum s5p_mfc_inst_state state; 590af935746781088f28904601469671d244d2f653bKamil Debski int inst_no; 591af935746781088f28904601469671d244d2f653bKamil Debski 592af935746781088f28904601469671d244d2f653bKamil Debski /* Image parameters */ 593af935746781088f28904601469671d244d2f653bKamil Debski int img_width; 594af935746781088f28904601469671d244d2f653bKamil Debski int img_height; 595af935746781088f28904601469671d244d2f653bKamil Debski int buf_width; 596af935746781088f28904601469671d244d2f653bKamil Debski int buf_height; 597af935746781088f28904601469671d244d2f653bKamil Debski 598af935746781088f28904601469671d244d2f653bKamil Debski int luma_size; 599af935746781088f28904601469671d244d2f653bKamil Debski int chroma_size; 600af935746781088f28904601469671d244d2f653bKamil Debski int mv_size; 601af935746781088f28904601469671d244d2f653bKamil Debski 602af935746781088f28904601469671d244d2f653bKamil Debski unsigned long consumed_stream; 603af935746781088f28904601469671d244d2f653bKamil Debski 604af935746781088f28904601469671d244d2f653bKamil Debski unsigned int dpb_flush_flag; 605f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park unsigned int head_processed; 606af935746781088f28904601469671d244d2f653bKamil Debski 607317b4ca4982ea2429b75d0acd10445ec9475aa86Kamil Debski struct s5p_mfc_priv_buf bank1; 608317b4ca4982ea2429b75d0acd10445ec9475aa86Kamil Debski struct s5p_mfc_priv_buf bank2; 609af935746781088f28904601469671d244d2f653bKamil Debski 610af935746781088f28904601469671d244d2f653bKamil Debski enum s5p_mfc_queue_state capture_state; 611af935746781088f28904601469671d244d2f653bKamil Debski enum s5p_mfc_queue_state output_state; 612af935746781088f28904601469671d244d2f653bKamil Debski 613af935746781088f28904601469671d244d2f653bKamil Debski struct s5p_mfc_buf src_bufs[MFC_MAX_BUFFERS]; 614af935746781088f28904601469671d244d2f653bKamil Debski int src_bufs_cnt; 615af935746781088f28904601469671d244d2f653bKamil Debski struct s5p_mfc_buf dst_bufs[MFC_MAX_BUFFERS]; 616af935746781088f28904601469671d244d2f653bKamil Debski int dst_bufs_cnt; 617af935746781088f28904601469671d244d2f653bKamil Debski 618af935746781088f28904601469671d244d2f653bKamil Debski unsigned int sequence; 619af935746781088f28904601469671d244d2f653bKamil Debski unsigned long dec_dst_flag; 620af935746781088f28904601469671d244d2f653bKamil Debski size_t dec_src_buf_size; 621af935746781088f28904601469671d244d2f653bKamil Debski 622af935746781088f28904601469671d244d2f653bKamil Debski /* Control values */ 623af935746781088f28904601469671d244d2f653bKamil Debski int codec_mode; 624af935746781088f28904601469671d244d2f653bKamil Debski int slice_interface; 625af935746781088f28904601469671d244d2f653bKamil Debski int loop_filter_mpeg4; 626af935746781088f28904601469671d244d2f653bKamil Debski int display_delay; 627af935746781088f28904601469671d244d2f653bKamil Debski int display_delay_enable; 628af935746781088f28904601469671d244d2f653bKamil Debski int after_packed_pb; 629f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park int sei_fp_parse; 630af935746781088f28904601469671d244d2f653bKamil Debski 631e9d98ddc0a4e4e11603c818bf234644031bff384Arun Kumar K int pb_count; 632af935746781088f28904601469671d244d2f653bKamil Debski int total_dpb_count; 633f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park int mv_count; 634af935746781088f28904601469671d244d2f653bKamil Debski /* Buffers */ 6358f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K struct s5p_mfc_priv_buf ctx; 6368f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K struct s5p_mfc_priv_buf dsc; 6378f532a7fec5ee872a65d2096f846f76afd9ede6fArun Kumar K struct s5p_mfc_priv_buf shm; 638af935746781088f28904601469671d244d2f653bKamil Debski 639af935746781088f28904601469671d244d2f653bKamil Debski struct s5p_mfc_enc_params enc_params; 640af935746781088f28904601469671d244d2f653bKamil Debski 641af935746781088f28904601469671d244d2f653bKamil Debski size_t enc_dst_buf_size; 642f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park size_t luma_dpb_size; 643f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park size_t chroma_dpb_size; 644f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park size_t me_buffer_size; 645f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park size_t tmv_buffer_size; 646af935746781088f28904601469671d244d2f653bKamil Debski 647af935746781088f28904601469671d244d2f653bKamil Debski enum v4l2_mpeg_mfc51_video_force_frame_type force_frame_type; 648af935746781088f28904601469671d244d2f653bKamil Debski 649af935746781088f28904601469671d244d2f653bKamil Debski struct list_head ref_queue; 650af935746781088f28904601469671d244d2f653bKamil Debski unsigned int ref_queue_cnt; 651af935746781088f28904601469671d244d2f653bKamil Debski 652f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park enum v4l2_mpeg_video_multi_slice_mode slice_mode; 653f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park union { 654f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park unsigned int mb; 655f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park unsigned int bits; 656f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park } slice_size; 657f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park 658af935746781088f28904601469671d244d2f653bKamil Debski struct s5p_mfc_codec_ops *c_ops; 659af935746781088f28904601469671d244d2f653bKamil Debski 660af935746781088f28904601469671d244d2f653bKamil Debski struct v4l2_ctrl *ctrls[MFC_MAX_CTRLS]; 661af935746781088f28904601469671d244d2f653bKamil Debski struct v4l2_ctrl_handler ctrl_handler; 662f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park unsigned int frame_tag; 663f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park size_t scratch_buf_size; 664af935746781088f28904601469671d244d2f653bKamil Debski}; 665af935746781088f28904601469671d244d2f653bKamil Debski 666af935746781088f28904601469671d244d2f653bKamil Debski/* 667af935746781088f28904601469671d244d2f653bKamil Debski * struct s5p_mfc_fmt - structure used to store information about pixelformats 668af935746781088f28904601469671d244d2f653bKamil Debski * used by the MFC 669af935746781088f28904601469671d244d2f653bKamil Debski */ 670af935746781088f28904601469671d244d2f653bKamil Debskistruct s5p_mfc_fmt { 671af935746781088f28904601469671d244d2f653bKamil Debski char *name; 672af935746781088f28904601469671d244d2f653bKamil Debski u32 fourcc; 673af935746781088f28904601469671d244d2f653bKamil Debski u32 codec_mode; 674af935746781088f28904601469671d244d2f653bKamil Debski enum s5p_mfc_fmt_type type; 675af935746781088f28904601469671d244d2f653bKamil Debski u32 num_planes; 6769aa5f0087a5c2aabbce5a475309d7d5caa1fab07Kamil Debski u32 versions; 677af935746781088f28904601469671d244d2f653bKamil Debski}; 678af935746781088f28904601469671d244d2f653bKamil Debski 679af935746781088f28904601469671d244d2f653bKamil Debski/** 680af935746781088f28904601469671d244d2f653bKamil Debski * struct mfc_control - structure used to store information about MFC controls 681af935746781088f28904601469671d244d2f653bKamil Debski * it is used to initialize the control framework. 682af935746781088f28904601469671d244d2f653bKamil Debski */ 683af935746781088f28904601469671d244d2f653bKamil Debskistruct mfc_control { 684af935746781088f28904601469671d244d2f653bKamil Debski __u32 id; 685af935746781088f28904601469671d244d2f653bKamil Debski enum v4l2_ctrl_type type; 686af935746781088f28904601469671d244d2f653bKamil Debski __u8 name[32]; /* Whatever */ 687af935746781088f28904601469671d244d2f653bKamil Debski __s32 minimum; /* Note signedness */ 688af935746781088f28904601469671d244d2f653bKamil Debski __s32 maximum; 689af935746781088f28904601469671d244d2f653bKamil Debski __s32 step; 690af935746781088f28904601469671d244d2f653bKamil Debski __u32 menu_skip_mask; 691af935746781088f28904601469671d244d2f653bKamil Debski __s32 default_value; 692af935746781088f28904601469671d244d2f653bKamil Debski __u32 flags; 693af935746781088f28904601469671d244d2f653bKamil Debski __u32 reserved[2]; 694af935746781088f28904601469671d244d2f653bKamil Debski __u8 is_volatile; 695af935746781088f28904601469671d244d2f653bKamil Debski}; 696af935746781088f28904601469671d244d2f653bKamil Debski 69743a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K/* Macro for making hardware specific calls */ 69843a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K#define s5p_mfc_hw_call(f, op, args...) \ 69943a1ea1f90382a6a8fcf5ed94835b8518ebdefc8Arun Kumar K ((f && f->op) ? f->op(args) : -ENODEV) 700af935746781088f28904601469671d244d2f653bKamil Debski 701e2c3be2aff3358e485ed307cc3ad11a9c58c086fKamil Debski#define s5p_mfc_hw_call_void(f, op, args...) \ 702e2c3be2aff3358e485ed307cc3ad11a9c58c086fKamil Debskido { \ 703e2c3be2aff3358e485ed307cc3ad11a9c58c086fKamil Debski if (f && f->op) \ 704e2c3be2aff3358e485ed307cc3ad11a9c58c086fKamil Debski f->op(args); \ 705e2c3be2aff3358e485ed307cc3ad11a9c58c086fKamil Debski} while (0) 706e2c3be2aff3358e485ed307cc3ad11a9c58c086fKamil Debski 707af935746781088f28904601469671d244d2f653bKamil Debski#define fh_to_ctx(__fh) container_of(__fh, struct s5p_mfc_ctx, fh) 708af935746781088f28904601469671d244d2f653bKamil Debski#define ctrl_to_ctx(__ctrl) \ 709af935746781088f28904601469671d244d2f653bKamil Debski container_of((__ctrl)->handler, struct s5p_mfc_ctx, ctrl_handler) 710af935746781088f28904601469671d244d2f653bKamil Debski 7117fb89eca0f2ad21f6e77f3411cb220ed94f340dfAndrzej Hajdavoid clear_work_bit(struct s5p_mfc_ctx *ctx); 7127fb89eca0f2ad21f6e77f3411cb220ed94f340dfAndrzej Hajdavoid set_work_bit(struct s5p_mfc_ctx *ctx); 7137fb89eca0f2ad21f6e77f3411cb220ed94f340dfAndrzej Hajdavoid clear_work_bit_irqsave(struct s5p_mfc_ctx *ctx); 7147fb89eca0f2ad21f6e77f3411cb220ed94f340dfAndrzej Hajdavoid set_work_bit_irqsave(struct s5p_mfc_ctx *ctx); 7157fb89eca0f2ad21f6e77f3411cb220ed94f340dfAndrzej Hajda 716f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park#define HAS_PORTNUM(dev) (dev ? (dev->variant ? \ 717f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park (dev->variant->port_num ? 1 : 0) : 0) : 0) 718f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park#define IS_TWOPORT(dev) (dev->variant->port_num == 2 ? 1 : 0) 719722b979e555d002ca97c9254a91ff3bc5e83763cArun Kumar K#define IS_MFCV6_PLUS(dev) (dev->variant->version >= 0x60 ? 1 : 0) 720109b794c87487f3cb9da77b8252f4edb1a428217Arun Kumar K#define IS_MFCV7_PLUS(dev) (dev->variant->version >= 0x70 ? 1 : 0) 721e2b9deb2ad34c9ca6e11a6193bf29088716c2b62Kiran AVND#define IS_MFCV8(dev) (dev->variant->version >= 0x80 ? 1 : 0) 722f96f3cfa0bb8f777fe877d7f881bf7ee58bd162aJeongtae Park 7239aa5f0087a5c2aabbce5a475309d7d5caa1fab07Kamil Debski#define MFC_V5_BIT BIT(0) 7249aa5f0087a5c2aabbce5a475309d7d5caa1fab07Kamil Debski#define MFC_V6_BIT BIT(1) 7259aa5f0087a5c2aabbce5a475309d7d5caa1fab07Kamil Debski#define MFC_V7_BIT BIT(2) 726e2b9deb2ad34c9ca6e11a6193bf29088716c2b62Kiran AVND#define MFC_V8_BIT BIT(3) 7279aa5f0087a5c2aabbce5a475309d7d5caa1fab07Kamil Debski 7289aa5f0087a5c2aabbce5a475309d7d5caa1fab07Kamil Debski 729af935746781088f28904601469671d244d2f653bKamil Debski#endif /* S5P_MFC_COMMON_H_ */ 730