1/* 2 * ST Microelectronics MFD: stmpe's driver 3 * 4 * Copyright (C) ST-Ericsson SA 2010 5 * 6 * License Terms: GNU General Public License, version 2 7 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson 8 */ 9 10#include <linux/err.h> 11#include <linux/gpio.h> 12#include <linux/export.h> 13#include <linux/kernel.h> 14#include <linux/interrupt.h> 15#include <linux/irq.h> 16#include <linux/irqdomain.h> 17#include <linux/of.h> 18#include <linux/of_gpio.h> 19#include <linux/pm.h> 20#include <linux/slab.h> 21#include <linux/mfd/core.h> 22#include <linux/delay.h> 23#include <linux/regulator/consumer.h> 24#include "stmpe.h" 25 26static int __stmpe_enable(struct stmpe *stmpe, unsigned int blocks) 27{ 28 return stmpe->variant->enable(stmpe, blocks, true); 29} 30 31static int __stmpe_disable(struct stmpe *stmpe, unsigned int blocks) 32{ 33 return stmpe->variant->enable(stmpe, blocks, false); 34} 35 36static int __stmpe_reg_read(struct stmpe *stmpe, u8 reg) 37{ 38 int ret; 39 40 ret = stmpe->ci->read_byte(stmpe, reg); 41 if (ret < 0) 42 dev_err(stmpe->dev, "failed to read reg %#x: %d\n", reg, ret); 43 44 dev_vdbg(stmpe->dev, "rd: reg %#x => data %#x\n", reg, ret); 45 46 return ret; 47} 48 49static int __stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val) 50{ 51 int ret; 52 53 dev_vdbg(stmpe->dev, "wr: reg %#x <= %#x\n", reg, val); 54 55 ret = stmpe->ci->write_byte(stmpe, reg, val); 56 if (ret < 0) 57 dev_err(stmpe->dev, "failed to write reg %#x: %d\n", reg, ret); 58 59 return ret; 60} 61 62static int __stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val) 63{ 64 int ret; 65 66 ret = __stmpe_reg_read(stmpe, reg); 67 if (ret < 0) 68 return ret; 69 70 ret &= ~mask; 71 ret |= val; 72 73 return __stmpe_reg_write(stmpe, reg, ret); 74} 75 76static int __stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length, 77 u8 *values) 78{ 79 int ret; 80 81 ret = stmpe->ci->read_block(stmpe, reg, length, values); 82 if (ret < 0) 83 dev_err(stmpe->dev, "failed to read regs %#x: %d\n", reg, ret); 84 85 dev_vdbg(stmpe->dev, "rd: reg %#x (%d) => ret %#x\n", reg, length, ret); 86 stmpe_dump_bytes("stmpe rd: ", values, length); 87 88 return ret; 89} 90 91static int __stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length, 92 const u8 *values) 93{ 94 int ret; 95 96 dev_vdbg(stmpe->dev, "wr: regs %#x (%d)\n", reg, length); 97 stmpe_dump_bytes("stmpe wr: ", values, length); 98 99 ret = stmpe->ci->write_block(stmpe, reg, length, values); 100 if (ret < 0) 101 dev_err(stmpe->dev, "failed to write regs %#x: %d\n", reg, ret); 102 103 return ret; 104} 105 106/** 107 * stmpe_enable - enable blocks on an STMPE device 108 * @stmpe: Device to work on 109 * @blocks: Mask of blocks (enum stmpe_block values) to enable 110 */ 111int stmpe_enable(struct stmpe *stmpe, unsigned int blocks) 112{ 113 int ret; 114 115 mutex_lock(&stmpe->lock); 116 ret = __stmpe_enable(stmpe, blocks); 117 mutex_unlock(&stmpe->lock); 118 119 return ret; 120} 121EXPORT_SYMBOL_GPL(stmpe_enable); 122 123/** 124 * stmpe_disable - disable blocks on an STMPE device 125 * @stmpe: Device to work on 126 * @blocks: Mask of blocks (enum stmpe_block values) to enable 127 */ 128int stmpe_disable(struct stmpe *stmpe, unsigned int blocks) 129{ 130 int ret; 131 132 mutex_lock(&stmpe->lock); 133 ret = __stmpe_disable(stmpe, blocks); 134 mutex_unlock(&stmpe->lock); 135 136 return ret; 137} 138EXPORT_SYMBOL_GPL(stmpe_disable); 139 140/** 141 * stmpe_reg_read() - read a single STMPE register 142 * @stmpe: Device to read from 143 * @reg: Register to read 144 */ 145int stmpe_reg_read(struct stmpe *stmpe, u8 reg) 146{ 147 int ret; 148 149 mutex_lock(&stmpe->lock); 150 ret = __stmpe_reg_read(stmpe, reg); 151 mutex_unlock(&stmpe->lock); 152 153 return ret; 154} 155EXPORT_SYMBOL_GPL(stmpe_reg_read); 156 157/** 158 * stmpe_reg_write() - write a single STMPE register 159 * @stmpe: Device to write to 160 * @reg: Register to write 161 * @val: Value to write 162 */ 163int stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val) 164{ 165 int ret; 166 167 mutex_lock(&stmpe->lock); 168 ret = __stmpe_reg_write(stmpe, reg, val); 169 mutex_unlock(&stmpe->lock); 170 171 return ret; 172} 173EXPORT_SYMBOL_GPL(stmpe_reg_write); 174 175/** 176 * stmpe_set_bits() - set the value of a bitfield in a STMPE register 177 * @stmpe: Device to write to 178 * @reg: Register to write 179 * @mask: Mask of bits to set 180 * @val: Value to set 181 */ 182int stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val) 183{ 184 int ret; 185 186 mutex_lock(&stmpe->lock); 187 ret = __stmpe_set_bits(stmpe, reg, mask, val); 188 mutex_unlock(&stmpe->lock); 189 190 return ret; 191} 192EXPORT_SYMBOL_GPL(stmpe_set_bits); 193 194/** 195 * stmpe_block_read() - read multiple STMPE registers 196 * @stmpe: Device to read from 197 * @reg: First register 198 * @length: Number of registers 199 * @values: Buffer to write to 200 */ 201int stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length, u8 *values) 202{ 203 int ret; 204 205 mutex_lock(&stmpe->lock); 206 ret = __stmpe_block_read(stmpe, reg, length, values); 207 mutex_unlock(&stmpe->lock); 208 209 return ret; 210} 211EXPORT_SYMBOL_GPL(stmpe_block_read); 212 213/** 214 * stmpe_block_write() - write multiple STMPE registers 215 * @stmpe: Device to write to 216 * @reg: First register 217 * @length: Number of registers 218 * @values: Values to write 219 */ 220int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length, 221 const u8 *values) 222{ 223 int ret; 224 225 mutex_lock(&stmpe->lock); 226 ret = __stmpe_block_write(stmpe, reg, length, values); 227 mutex_unlock(&stmpe->lock); 228 229 return ret; 230} 231EXPORT_SYMBOL_GPL(stmpe_block_write); 232 233/** 234 * stmpe_set_altfunc()- set the alternate function for STMPE pins 235 * @stmpe: Device to configure 236 * @pins: Bitmask of pins to affect 237 * @block: block to enable alternate functions for 238 * 239 * @pins is assumed to have a bit set for each of the bits whose alternate 240 * function is to be changed, numbered according to the GPIOXY numbers. 241 * 242 * If the GPIO module is not enabled, this function automatically enables it in 243 * order to perform the change. 244 */ 245int stmpe_set_altfunc(struct stmpe *stmpe, u32 pins, enum stmpe_block block) 246{ 247 struct stmpe_variant_info *variant = stmpe->variant; 248 u8 regaddr = stmpe->regs[STMPE_IDX_GPAFR_U_MSB]; 249 int af_bits = variant->af_bits; 250 int numregs = DIV_ROUND_UP(stmpe->num_gpios * af_bits, 8); 251 int mask = (1 << af_bits) - 1; 252 u8 regs[8]; 253 int af, afperreg, ret; 254 255 if (!variant->get_altfunc) 256 return 0; 257 258 afperreg = 8 / af_bits; 259 mutex_lock(&stmpe->lock); 260 261 ret = __stmpe_enable(stmpe, STMPE_BLOCK_GPIO); 262 if (ret < 0) 263 goto out; 264 265 ret = __stmpe_block_read(stmpe, regaddr, numregs, regs); 266 if (ret < 0) 267 goto out; 268 269 af = variant->get_altfunc(stmpe, block); 270 271 while (pins) { 272 int pin = __ffs(pins); 273 int regoffset = numregs - (pin / afperreg) - 1; 274 int pos = (pin % afperreg) * (8 / afperreg); 275 276 regs[regoffset] &= ~(mask << pos); 277 regs[regoffset] |= af << pos; 278 279 pins &= ~(1 << pin); 280 } 281 282 ret = __stmpe_block_write(stmpe, regaddr, numregs, regs); 283 284out: 285 mutex_unlock(&stmpe->lock); 286 return ret; 287} 288EXPORT_SYMBOL_GPL(stmpe_set_altfunc); 289 290/* 291 * GPIO (all variants) 292 */ 293 294static struct resource stmpe_gpio_resources[] = { 295 /* Start and end filled dynamically */ 296 { 297 .flags = IORESOURCE_IRQ, 298 }, 299}; 300 301static const struct mfd_cell stmpe_gpio_cell = { 302 .name = "stmpe-gpio", 303 .of_compatible = "st,stmpe-gpio", 304 .resources = stmpe_gpio_resources, 305 .num_resources = ARRAY_SIZE(stmpe_gpio_resources), 306}; 307 308static const struct mfd_cell stmpe_gpio_cell_noirq = { 309 .name = "stmpe-gpio", 310 .of_compatible = "st,stmpe-gpio", 311 /* gpio cell resources consist of an irq only so no resources here */ 312}; 313 314/* 315 * Keypad (1601, 2401, 2403) 316 */ 317 318static struct resource stmpe_keypad_resources[] = { 319 { 320 .name = "KEYPAD", 321 .flags = IORESOURCE_IRQ, 322 }, 323 { 324 .name = "KEYPAD_OVER", 325 .flags = IORESOURCE_IRQ, 326 }, 327}; 328 329static const struct mfd_cell stmpe_keypad_cell = { 330 .name = "stmpe-keypad", 331 .of_compatible = "st,stmpe-keypad", 332 .resources = stmpe_keypad_resources, 333 .num_resources = ARRAY_SIZE(stmpe_keypad_resources), 334}; 335 336/* 337 * STMPE801 338 */ 339static const u8 stmpe801_regs[] = { 340 [STMPE_IDX_CHIP_ID] = STMPE801_REG_CHIP_ID, 341 [STMPE_IDX_ICR_LSB] = STMPE801_REG_SYS_CTRL, 342 [STMPE_IDX_GPMR_LSB] = STMPE801_REG_GPIO_MP_STA, 343 [STMPE_IDX_GPSR_LSB] = STMPE801_REG_GPIO_SET_PIN, 344 [STMPE_IDX_GPCR_LSB] = STMPE801_REG_GPIO_SET_PIN, 345 [STMPE_IDX_GPDR_LSB] = STMPE801_REG_GPIO_DIR, 346 [STMPE_IDX_IEGPIOR_LSB] = STMPE801_REG_GPIO_INT_EN, 347 [STMPE_IDX_ISGPIOR_MSB] = STMPE801_REG_GPIO_INT_STA, 348 349}; 350 351static struct stmpe_variant_block stmpe801_blocks[] = { 352 { 353 .cell = &stmpe_gpio_cell, 354 .irq = 0, 355 .block = STMPE_BLOCK_GPIO, 356 }, 357}; 358 359static struct stmpe_variant_block stmpe801_blocks_noirq[] = { 360 { 361 .cell = &stmpe_gpio_cell_noirq, 362 .block = STMPE_BLOCK_GPIO, 363 }, 364}; 365 366static int stmpe801_enable(struct stmpe *stmpe, unsigned int blocks, 367 bool enable) 368{ 369 if (blocks & STMPE_BLOCK_GPIO) 370 return 0; 371 else 372 return -EINVAL; 373} 374 375static struct stmpe_variant_info stmpe801 = { 376 .name = "stmpe801", 377 .id_val = STMPE801_ID, 378 .id_mask = 0xffff, 379 .num_gpios = 8, 380 .regs = stmpe801_regs, 381 .blocks = stmpe801_blocks, 382 .num_blocks = ARRAY_SIZE(stmpe801_blocks), 383 .num_irqs = STMPE801_NR_INTERNAL_IRQS, 384 .enable = stmpe801_enable, 385}; 386 387static struct stmpe_variant_info stmpe801_noirq = { 388 .name = "stmpe801", 389 .id_val = STMPE801_ID, 390 .id_mask = 0xffff, 391 .num_gpios = 8, 392 .regs = stmpe801_regs, 393 .blocks = stmpe801_blocks_noirq, 394 .num_blocks = ARRAY_SIZE(stmpe801_blocks_noirq), 395 .enable = stmpe801_enable, 396}; 397 398/* 399 * Touchscreen (STMPE811 or STMPE610) 400 */ 401 402static struct resource stmpe_ts_resources[] = { 403 { 404 .name = "TOUCH_DET", 405 .flags = IORESOURCE_IRQ, 406 }, 407 { 408 .name = "FIFO_TH", 409 .flags = IORESOURCE_IRQ, 410 }, 411}; 412 413static const struct mfd_cell stmpe_ts_cell = { 414 .name = "stmpe-ts", 415 .of_compatible = "st,stmpe-ts", 416 .resources = stmpe_ts_resources, 417 .num_resources = ARRAY_SIZE(stmpe_ts_resources), 418}; 419 420/* 421 * STMPE811 or STMPE610 422 */ 423 424static const u8 stmpe811_regs[] = { 425 [STMPE_IDX_CHIP_ID] = STMPE811_REG_CHIP_ID, 426 [STMPE_IDX_ICR_LSB] = STMPE811_REG_INT_CTRL, 427 [STMPE_IDX_IER_LSB] = STMPE811_REG_INT_EN, 428 [STMPE_IDX_ISR_MSB] = STMPE811_REG_INT_STA, 429 [STMPE_IDX_GPMR_LSB] = STMPE811_REG_GPIO_MP_STA, 430 [STMPE_IDX_GPSR_LSB] = STMPE811_REG_GPIO_SET_PIN, 431 [STMPE_IDX_GPCR_LSB] = STMPE811_REG_GPIO_CLR_PIN, 432 [STMPE_IDX_GPDR_LSB] = STMPE811_REG_GPIO_DIR, 433 [STMPE_IDX_GPRER_LSB] = STMPE811_REG_GPIO_RE, 434 [STMPE_IDX_GPFER_LSB] = STMPE811_REG_GPIO_FE, 435 [STMPE_IDX_GPAFR_U_MSB] = STMPE811_REG_GPIO_AF, 436 [STMPE_IDX_IEGPIOR_LSB] = STMPE811_REG_GPIO_INT_EN, 437 [STMPE_IDX_ISGPIOR_MSB] = STMPE811_REG_GPIO_INT_STA, 438 [STMPE_IDX_GPEDR_MSB] = STMPE811_REG_GPIO_ED, 439}; 440 441static struct stmpe_variant_block stmpe811_blocks[] = { 442 { 443 .cell = &stmpe_gpio_cell, 444 .irq = STMPE811_IRQ_GPIOC, 445 .block = STMPE_BLOCK_GPIO, 446 }, 447 { 448 .cell = &stmpe_ts_cell, 449 .irq = STMPE811_IRQ_TOUCH_DET, 450 .block = STMPE_BLOCK_TOUCHSCREEN, 451 }, 452}; 453 454static int stmpe811_enable(struct stmpe *stmpe, unsigned int blocks, 455 bool enable) 456{ 457 unsigned int mask = 0; 458 459 if (blocks & STMPE_BLOCK_GPIO) 460 mask |= STMPE811_SYS_CTRL2_GPIO_OFF; 461 462 if (blocks & STMPE_BLOCK_ADC) 463 mask |= STMPE811_SYS_CTRL2_ADC_OFF; 464 465 if (blocks & STMPE_BLOCK_TOUCHSCREEN) 466 mask |= STMPE811_SYS_CTRL2_TSC_OFF; 467 468 return __stmpe_set_bits(stmpe, STMPE811_REG_SYS_CTRL2, mask, 469 enable ? 0 : mask); 470} 471 472static int stmpe811_get_altfunc(struct stmpe *stmpe, enum stmpe_block block) 473{ 474 /* 0 for touchscreen, 1 for GPIO */ 475 return block != STMPE_BLOCK_TOUCHSCREEN; 476} 477 478static struct stmpe_variant_info stmpe811 = { 479 .name = "stmpe811", 480 .id_val = 0x0811, 481 .id_mask = 0xffff, 482 .num_gpios = 8, 483 .af_bits = 1, 484 .regs = stmpe811_regs, 485 .blocks = stmpe811_blocks, 486 .num_blocks = ARRAY_SIZE(stmpe811_blocks), 487 .num_irqs = STMPE811_NR_INTERNAL_IRQS, 488 .enable = stmpe811_enable, 489 .get_altfunc = stmpe811_get_altfunc, 490}; 491 492/* Similar to 811, except number of gpios */ 493static struct stmpe_variant_info stmpe610 = { 494 .name = "stmpe610", 495 .id_val = 0x0811, 496 .id_mask = 0xffff, 497 .num_gpios = 6, 498 .af_bits = 1, 499 .regs = stmpe811_regs, 500 .blocks = stmpe811_blocks, 501 .num_blocks = ARRAY_SIZE(stmpe811_blocks), 502 .num_irqs = STMPE811_NR_INTERNAL_IRQS, 503 .enable = stmpe811_enable, 504 .get_altfunc = stmpe811_get_altfunc, 505}; 506 507/* 508 * STMPE1601 509 */ 510 511static const u8 stmpe1601_regs[] = { 512 [STMPE_IDX_CHIP_ID] = STMPE1601_REG_CHIP_ID, 513 [STMPE_IDX_ICR_LSB] = STMPE1601_REG_ICR_LSB, 514 [STMPE_IDX_IER_LSB] = STMPE1601_REG_IER_LSB, 515 [STMPE_IDX_ISR_MSB] = STMPE1601_REG_ISR_MSB, 516 [STMPE_IDX_GPMR_LSB] = STMPE1601_REG_GPIO_MP_LSB, 517 [STMPE_IDX_GPSR_LSB] = STMPE1601_REG_GPIO_SET_LSB, 518 [STMPE_IDX_GPCR_LSB] = STMPE1601_REG_GPIO_CLR_LSB, 519 [STMPE_IDX_GPDR_LSB] = STMPE1601_REG_GPIO_SET_DIR_LSB, 520 [STMPE_IDX_GPRER_LSB] = STMPE1601_REG_GPIO_RE_LSB, 521 [STMPE_IDX_GPFER_LSB] = STMPE1601_REG_GPIO_FE_LSB, 522 [STMPE_IDX_GPAFR_U_MSB] = STMPE1601_REG_GPIO_AF_U_MSB, 523 [STMPE_IDX_IEGPIOR_LSB] = STMPE1601_REG_INT_EN_GPIO_MASK_LSB, 524 [STMPE_IDX_ISGPIOR_MSB] = STMPE1601_REG_INT_STA_GPIO_MSB, 525 [STMPE_IDX_GPEDR_MSB] = STMPE1601_REG_GPIO_ED_MSB, 526}; 527 528static struct stmpe_variant_block stmpe1601_blocks[] = { 529 { 530 .cell = &stmpe_gpio_cell, 531 .irq = STMPE1601_IRQ_GPIOC, 532 .block = STMPE_BLOCK_GPIO, 533 }, 534 { 535 .cell = &stmpe_keypad_cell, 536 .irq = STMPE1601_IRQ_KEYPAD, 537 .block = STMPE_BLOCK_KEYPAD, 538 }, 539}; 540 541/* supported autosleep timeout delay (in msecs) */ 542static const int stmpe_autosleep_delay[] = { 543 4, 16, 32, 64, 128, 256, 512, 1024, 544}; 545 546static int stmpe_round_timeout(int timeout) 547{ 548 int i; 549 550 for (i = 0; i < ARRAY_SIZE(stmpe_autosleep_delay); i++) { 551 if (stmpe_autosleep_delay[i] >= timeout) 552 return i; 553 } 554 555 /* 556 * requests for delays longer than supported should not return the 557 * longest supported delay 558 */ 559 return -EINVAL; 560} 561 562static int stmpe_autosleep(struct stmpe *stmpe, int autosleep_timeout) 563{ 564 int ret; 565 566 if (!stmpe->variant->enable_autosleep) 567 return -ENOSYS; 568 569 mutex_lock(&stmpe->lock); 570 ret = stmpe->variant->enable_autosleep(stmpe, autosleep_timeout); 571 mutex_unlock(&stmpe->lock); 572 573 return ret; 574} 575 576/* 577 * Both stmpe 1601/2403 support same layout for autosleep 578 */ 579static int stmpe1601_autosleep(struct stmpe *stmpe, 580 int autosleep_timeout) 581{ 582 int ret, timeout; 583 584 /* choose the best available timeout */ 585 timeout = stmpe_round_timeout(autosleep_timeout); 586 if (timeout < 0) { 587 dev_err(stmpe->dev, "invalid timeout\n"); 588 return timeout; 589 } 590 591 ret = __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2, 592 STMPE1601_AUTOSLEEP_TIMEOUT_MASK, 593 timeout); 594 if (ret < 0) 595 return ret; 596 597 return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2, 598 STPME1601_AUTOSLEEP_ENABLE, 599 STPME1601_AUTOSLEEP_ENABLE); 600} 601 602static int stmpe1601_enable(struct stmpe *stmpe, unsigned int blocks, 603 bool enable) 604{ 605 unsigned int mask = 0; 606 607 if (blocks & STMPE_BLOCK_GPIO) 608 mask |= STMPE1601_SYS_CTRL_ENABLE_GPIO; 609 else 610 mask &= ~STMPE1601_SYS_CTRL_ENABLE_GPIO; 611 612 if (blocks & STMPE_BLOCK_KEYPAD) 613 mask |= STMPE1601_SYS_CTRL_ENABLE_KPC; 614 else 615 mask &= ~STMPE1601_SYS_CTRL_ENABLE_KPC; 616 617 if (blocks & STMPE_BLOCK_PWM) 618 mask |= STMPE1601_SYS_CTRL_ENABLE_SPWM; 619 else 620 mask &= ~STMPE1601_SYS_CTRL_ENABLE_SPWM; 621 622 return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL, mask, 623 enable ? mask : 0); 624} 625 626static int stmpe1601_get_altfunc(struct stmpe *stmpe, enum stmpe_block block) 627{ 628 switch (block) { 629 case STMPE_BLOCK_PWM: 630 return 2; 631 632 case STMPE_BLOCK_KEYPAD: 633 return 1; 634 635 case STMPE_BLOCK_GPIO: 636 default: 637 return 0; 638 } 639} 640 641static struct stmpe_variant_info stmpe1601 = { 642 .name = "stmpe1601", 643 .id_val = 0x0210, 644 .id_mask = 0xfff0, /* at least 0x0210 and 0x0212 */ 645 .num_gpios = 16, 646 .af_bits = 2, 647 .regs = stmpe1601_regs, 648 .blocks = stmpe1601_blocks, 649 .num_blocks = ARRAY_SIZE(stmpe1601_blocks), 650 .num_irqs = STMPE1601_NR_INTERNAL_IRQS, 651 .enable = stmpe1601_enable, 652 .get_altfunc = stmpe1601_get_altfunc, 653 .enable_autosleep = stmpe1601_autosleep, 654}; 655 656/* 657 * STMPE1801 658 */ 659static const u8 stmpe1801_regs[] = { 660 [STMPE_IDX_CHIP_ID] = STMPE1801_REG_CHIP_ID, 661 [STMPE_IDX_ICR_LSB] = STMPE1801_REG_INT_CTRL_LOW, 662 [STMPE_IDX_IER_LSB] = STMPE1801_REG_INT_EN_MASK_LOW, 663 [STMPE_IDX_ISR_LSB] = STMPE1801_REG_INT_STA_LOW, 664 [STMPE_IDX_GPMR_LSB] = STMPE1801_REG_GPIO_MP_LOW, 665 [STMPE_IDX_GPSR_LSB] = STMPE1801_REG_GPIO_SET_LOW, 666 [STMPE_IDX_GPCR_LSB] = STMPE1801_REG_GPIO_CLR_LOW, 667 [STMPE_IDX_GPDR_LSB] = STMPE1801_REG_GPIO_SET_DIR_LOW, 668 [STMPE_IDX_GPRER_LSB] = STMPE1801_REG_GPIO_RE_LOW, 669 [STMPE_IDX_GPFER_LSB] = STMPE1801_REG_GPIO_FE_LOW, 670 [STMPE_IDX_IEGPIOR_LSB] = STMPE1801_REG_INT_EN_GPIO_MASK_LOW, 671 [STMPE_IDX_ISGPIOR_LSB] = STMPE1801_REG_INT_STA_GPIO_LOW, 672}; 673 674static struct stmpe_variant_block stmpe1801_blocks[] = { 675 { 676 .cell = &stmpe_gpio_cell, 677 .irq = STMPE1801_IRQ_GPIOC, 678 .block = STMPE_BLOCK_GPIO, 679 }, 680 { 681 .cell = &stmpe_keypad_cell, 682 .irq = STMPE1801_IRQ_KEYPAD, 683 .block = STMPE_BLOCK_KEYPAD, 684 }, 685}; 686 687static int stmpe1801_enable(struct stmpe *stmpe, unsigned int blocks, 688 bool enable) 689{ 690 unsigned int mask = 0; 691 if (blocks & STMPE_BLOCK_GPIO) 692 mask |= STMPE1801_MSK_INT_EN_GPIO; 693 694 if (blocks & STMPE_BLOCK_KEYPAD) 695 mask |= STMPE1801_MSK_INT_EN_KPC; 696 697 return __stmpe_set_bits(stmpe, STMPE1801_REG_INT_EN_MASK_LOW, mask, 698 enable ? mask : 0); 699} 700 701static int stmpe1801_reset(struct stmpe *stmpe) 702{ 703 unsigned long timeout; 704 int ret = 0; 705 706 ret = __stmpe_set_bits(stmpe, STMPE1801_REG_SYS_CTRL, 707 STMPE1801_MSK_SYS_CTRL_RESET, STMPE1801_MSK_SYS_CTRL_RESET); 708 if (ret < 0) 709 return ret; 710 711 timeout = jiffies + msecs_to_jiffies(100); 712 while (time_before(jiffies, timeout)) { 713 ret = __stmpe_reg_read(stmpe, STMPE1801_REG_SYS_CTRL); 714 if (ret < 0) 715 return ret; 716 if (!(ret & STMPE1801_MSK_SYS_CTRL_RESET)) 717 return 0; 718 usleep_range(100, 200); 719 } 720 return -EIO; 721} 722 723static struct stmpe_variant_info stmpe1801 = { 724 .name = "stmpe1801", 725 .id_val = STMPE1801_ID, 726 .id_mask = 0xfff0, 727 .num_gpios = 18, 728 .af_bits = 0, 729 .regs = stmpe1801_regs, 730 .blocks = stmpe1801_blocks, 731 .num_blocks = ARRAY_SIZE(stmpe1801_blocks), 732 .num_irqs = STMPE1801_NR_INTERNAL_IRQS, 733 .enable = stmpe1801_enable, 734 /* stmpe1801 do not have any gpio alternate function */ 735 .get_altfunc = NULL, 736}; 737 738/* 739 * STMPE24XX 740 */ 741 742static const u8 stmpe24xx_regs[] = { 743 [STMPE_IDX_CHIP_ID] = STMPE24XX_REG_CHIP_ID, 744 [STMPE_IDX_ICR_LSB] = STMPE24XX_REG_ICR_LSB, 745 [STMPE_IDX_IER_LSB] = STMPE24XX_REG_IER_LSB, 746 [STMPE_IDX_ISR_MSB] = STMPE24XX_REG_ISR_MSB, 747 [STMPE_IDX_GPMR_LSB] = STMPE24XX_REG_GPMR_LSB, 748 [STMPE_IDX_GPSR_LSB] = STMPE24XX_REG_GPSR_LSB, 749 [STMPE_IDX_GPCR_LSB] = STMPE24XX_REG_GPCR_LSB, 750 [STMPE_IDX_GPDR_LSB] = STMPE24XX_REG_GPDR_LSB, 751 [STMPE_IDX_GPRER_LSB] = STMPE24XX_REG_GPRER_LSB, 752 [STMPE_IDX_GPFER_LSB] = STMPE24XX_REG_GPFER_LSB, 753 [STMPE_IDX_GPAFR_U_MSB] = STMPE24XX_REG_GPAFR_U_MSB, 754 [STMPE_IDX_IEGPIOR_LSB] = STMPE24XX_REG_IEGPIOR_LSB, 755 [STMPE_IDX_ISGPIOR_MSB] = STMPE24XX_REG_ISGPIOR_MSB, 756 [STMPE_IDX_GPEDR_MSB] = STMPE24XX_REG_GPEDR_MSB, 757}; 758 759static struct stmpe_variant_block stmpe24xx_blocks[] = { 760 { 761 .cell = &stmpe_gpio_cell, 762 .irq = STMPE24XX_IRQ_GPIOC, 763 .block = STMPE_BLOCK_GPIO, 764 }, 765 { 766 .cell = &stmpe_keypad_cell, 767 .irq = STMPE24XX_IRQ_KEYPAD, 768 .block = STMPE_BLOCK_KEYPAD, 769 }, 770}; 771 772static int stmpe24xx_enable(struct stmpe *stmpe, unsigned int blocks, 773 bool enable) 774{ 775 unsigned int mask = 0; 776 777 if (blocks & STMPE_BLOCK_GPIO) 778 mask |= STMPE24XX_SYS_CTRL_ENABLE_GPIO; 779 780 if (blocks & STMPE_BLOCK_KEYPAD) 781 mask |= STMPE24XX_SYS_CTRL_ENABLE_KPC; 782 783 return __stmpe_set_bits(stmpe, STMPE24XX_REG_SYS_CTRL, mask, 784 enable ? mask : 0); 785} 786 787static int stmpe24xx_get_altfunc(struct stmpe *stmpe, enum stmpe_block block) 788{ 789 switch (block) { 790 case STMPE_BLOCK_ROTATOR: 791 return 2; 792 793 case STMPE_BLOCK_KEYPAD: 794 return 1; 795 796 case STMPE_BLOCK_GPIO: 797 default: 798 return 0; 799 } 800} 801 802static struct stmpe_variant_info stmpe2401 = { 803 .name = "stmpe2401", 804 .id_val = 0x0101, 805 .id_mask = 0xffff, 806 .num_gpios = 24, 807 .af_bits = 2, 808 .regs = stmpe24xx_regs, 809 .blocks = stmpe24xx_blocks, 810 .num_blocks = ARRAY_SIZE(stmpe24xx_blocks), 811 .num_irqs = STMPE24XX_NR_INTERNAL_IRQS, 812 .enable = stmpe24xx_enable, 813 .get_altfunc = stmpe24xx_get_altfunc, 814}; 815 816static struct stmpe_variant_info stmpe2403 = { 817 .name = "stmpe2403", 818 .id_val = 0x0120, 819 .id_mask = 0xffff, 820 .num_gpios = 24, 821 .af_bits = 2, 822 .regs = stmpe24xx_regs, 823 .blocks = stmpe24xx_blocks, 824 .num_blocks = ARRAY_SIZE(stmpe24xx_blocks), 825 .num_irqs = STMPE24XX_NR_INTERNAL_IRQS, 826 .enable = stmpe24xx_enable, 827 .get_altfunc = stmpe24xx_get_altfunc, 828 .enable_autosleep = stmpe1601_autosleep, /* same as stmpe1601 */ 829}; 830 831static struct stmpe_variant_info *stmpe_variant_info[STMPE_NBR_PARTS] = { 832 [STMPE610] = &stmpe610, 833 [STMPE801] = &stmpe801, 834 [STMPE811] = &stmpe811, 835 [STMPE1601] = &stmpe1601, 836 [STMPE1801] = &stmpe1801, 837 [STMPE2401] = &stmpe2401, 838 [STMPE2403] = &stmpe2403, 839}; 840 841/* 842 * These devices can be connected in a 'no-irq' configuration - the irq pin 843 * is not used and the device cannot interrupt the CPU. Here we only list 844 * devices which support this configuration - the driver will fail probing 845 * for any devices not listed here which are configured in this way. 846 */ 847static struct stmpe_variant_info *stmpe_noirq_variant_info[STMPE_NBR_PARTS] = { 848 [STMPE801] = &stmpe801_noirq, 849}; 850 851static irqreturn_t stmpe_irq(int irq, void *data) 852{ 853 struct stmpe *stmpe = data; 854 struct stmpe_variant_info *variant = stmpe->variant; 855 int num = DIV_ROUND_UP(variant->num_irqs, 8); 856 u8 israddr; 857 u8 isr[3]; 858 int ret; 859 int i; 860 861 if (variant->id_val == STMPE801_ID) { 862 int base = irq_create_mapping(stmpe->domain, 0); 863 864 handle_nested_irq(base); 865 return IRQ_HANDLED; 866 } 867 868 if (variant->id_val == STMPE1801_ID) 869 israddr = stmpe->regs[STMPE_IDX_ISR_LSB]; 870 else 871 israddr = stmpe->regs[STMPE_IDX_ISR_MSB]; 872 873 ret = stmpe_block_read(stmpe, israddr, num, isr); 874 if (ret < 0) 875 return IRQ_NONE; 876 877 for (i = 0; i < num; i++) { 878 int bank = num - i - 1; 879 u8 status = isr[i]; 880 u8 clear; 881 882 status &= stmpe->ier[bank]; 883 if (!status) 884 continue; 885 886 clear = status; 887 while (status) { 888 int bit = __ffs(status); 889 int line = bank * 8 + bit; 890 int nestedirq = irq_create_mapping(stmpe->domain, line); 891 892 handle_nested_irq(nestedirq); 893 status &= ~(1 << bit); 894 } 895 896 stmpe_reg_write(stmpe, israddr + i, clear); 897 } 898 899 return IRQ_HANDLED; 900} 901 902static void stmpe_irq_lock(struct irq_data *data) 903{ 904 struct stmpe *stmpe = irq_data_get_irq_chip_data(data); 905 906 mutex_lock(&stmpe->irq_lock); 907} 908 909static void stmpe_irq_sync_unlock(struct irq_data *data) 910{ 911 struct stmpe *stmpe = irq_data_get_irq_chip_data(data); 912 struct stmpe_variant_info *variant = stmpe->variant; 913 int num = DIV_ROUND_UP(variant->num_irqs, 8); 914 int i; 915 916 for (i = 0; i < num; i++) { 917 u8 new = stmpe->ier[i]; 918 u8 old = stmpe->oldier[i]; 919 920 if (new == old) 921 continue; 922 923 stmpe->oldier[i] = new; 924 stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_IER_LSB] - i, new); 925 } 926 927 mutex_unlock(&stmpe->irq_lock); 928} 929 930static void stmpe_irq_mask(struct irq_data *data) 931{ 932 struct stmpe *stmpe = irq_data_get_irq_chip_data(data); 933 int offset = data->hwirq; 934 int regoffset = offset / 8; 935 int mask = 1 << (offset % 8); 936 937 stmpe->ier[regoffset] &= ~mask; 938} 939 940static void stmpe_irq_unmask(struct irq_data *data) 941{ 942 struct stmpe *stmpe = irq_data_get_irq_chip_data(data); 943 int offset = data->hwirq; 944 int regoffset = offset / 8; 945 int mask = 1 << (offset % 8); 946 947 stmpe->ier[regoffset] |= mask; 948} 949 950static struct irq_chip stmpe_irq_chip = { 951 .name = "stmpe", 952 .irq_bus_lock = stmpe_irq_lock, 953 .irq_bus_sync_unlock = stmpe_irq_sync_unlock, 954 .irq_mask = stmpe_irq_mask, 955 .irq_unmask = stmpe_irq_unmask, 956}; 957 958static int stmpe_irq_map(struct irq_domain *d, unsigned int virq, 959 irq_hw_number_t hwirq) 960{ 961 struct stmpe *stmpe = d->host_data; 962 struct irq_chip *chip = NULL; 963 964 if (stmpe->variant->id_val != STMPE801_ID) 965 chip = &stmpe_irq_chip; 966 967 irq_set_chip_data(virq, stmpe); 968 irq_set_chip_and_handler(virq, chip, handle_edge_irq); 969 irq_set_nested_thread(virq, 1); 970#ifdef CONFIG_ARM 971 set_irq_flags(virq, IRQF_VALID); 972#else 973 irq_set_noprobe(virq); 974#endif 975 976 return 0; 977} 978 979static void stmpe_irq_unmap(struct irq_domain *d, unsigned int virq) 980{ 981#ifdef CONFIG_ARM 982 set_irq_flags(virq, 0); 983#endif 984 irq_set_chip_and_handler(virq, NULL, NULL); 985 irq_set_chip_data(virq, NULL); 986} 987 988static struct irq_domain_ops stmpe_irq_ops = { 989 .map = stmpe_irq_map, 990 .unmap = stmpe_irq_unmap, 991 .xlate = irq_domain_xlate_twocell, 992}; 993 994static int stmpe_irq_init(struct stmpe *stmpe, struct device_node *np) 995{ 996 int base = 0; 997 int num_irqs = stmpe->variant->num_irqs; 998 999 stmpe->domain = irq_domain_add_simple(np, num_irqs, base, 1000 &stmpe_irq_ops, stmpe); 1001 if (!stmpe->domain) { 1002 dev_err(stmpe->dev, "Failed to create irqdomain\n"); 1003 return -ENOSYS; 1004 } 1005 1006 return 0; 1007} 1008 1009static int stmpe_chip_init(struct stmpe *stmpe) 1010{ 1011 unsigned int irq_trigger = stmpe->pdata->irq_trigger; 1012 int autosleep_timeout = stmpe->pdata->autosleep_timeout; 1013 struct stmpe_variant_info *variant = stmpe->variant; 1014 u8 icr = 0; 1015 unsigned int id; 1016 u8 data[2]; 1017 int ret; 1018 1019 ret = stmpe_block_read(stmpe, stmpe->regs[STMPE_IDX_CHIP_ID], 1020 ARRAY_SIZE(data), data); 1021 if (ret < 0) 1022 return ret; 1023 1024 id = (data[0] << 8) | data[1]; 1025 if ((id & variant->id_mask) != variant->id_val) { 1026 dev_err(stmpe->dev, "unknown chip id: %#x\n", id); 1027 return -EINVAL; 1028 } 1029 1030 dev_info(stmpe->dev, "%s detected, chip id: %#x\n", variant->name, id); 1031 1032 /* Disable all modules -- subdrivers should enable what they need. */ 1033 ret = stmpe_disable(stmpe, ~0); 1034 if (ret) 1035 return ret; 1036 1037 if (id == STMPE1801_ID) { 1038 ret = stmpe1801_reset(stmpe); 1039 if (ret < 0) 1040 return ret; 1041 } 1042 1043 if (stmpe->irq >= 0) { 1044 if (id == STMPE801_ID) 1045 icr = STMPE801_REG_SYS_CTRL_INT_EN; 1046 else 1047 icr = STMPE_ICR_LSB_GIM; 1048 1049 /* STMPE801 doesn't support Edge interrupts */ 1050 if (id != STMPE801_ID) { 1051 if (irq_trigger == IRQF_TRIGGER_FALLING || 1052 irq_trigger == IRQF_TRIGGER_RISING) 1053 icr |= STMPE_ICR_LSB_EDGE; 1054 } 1055 1056 if (irq_trigger == IRQF_TRIGGER_RISING || 1057 irq_trigger == IRQF_TRIGGER_HIGH) { 1058 if (id == STMPE801_ID) 1059 icr |= STMPE801_REG_SYS_CTRL_INT_HI; 1060 else 1061 icr |= STMPE_ICR_LSB_HIGH; 1062 } 1063 } 1064 1065 if (stmpe->pdata->autosleep) { 1066 ret = stmpe_autosleep(stmpe, autosleep_timeout); 1067 if (ret) 1068 return ret; 1069 } 1070 1071 return stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_ICR_LSB], icr); 1072} 1073 1074static int stmpe_add_device(struct stmpe *stmpe, const struct mfd_cell *cell) 1075{ 1076 return mfd_add_devices(stmpe->dev, stmpe->pdata->id, cell, 1, 1077 NULL, 0, stmpe->domain); 1078} 1079 1080static int stmpe_devices_init(struct stmpe *stmpe) 1081{ 1082 struct stmpe_variant_info *variant = stmpe->variant; 1083 unsigned int platform_blocks = stmpe->pdata->blocks; 1084 int ret = -EINVAL; 1085 int i, j; 1086 1087 for (i = 0; i < variant->num_blocks; i++) { 1088 struct stmpe_variant_block *block = &variant->blocks[i]; 1089 1090 if (!(platform_blocks & block->block)) 1091 continue; 1092 1093 for (j = 0; j < block->cell->num_resources; j++) { 1094 struct resource *res = 1095 (struct resource *) &block->cell->resources[j]; 1096 1097 /* Dynamically fill in a variant's IRQ. */ 1098 if (res->flags & IORESOURCE_IRQ) 1099 res->start = res->end = block->irq + j; 1100 } 1101 1102 platform_blocks &= ~block->block; 1103 ret = stmpe_add_device(stmpe, block->cell); 1104 if (ret) 1105 return ret; 1106 } 1107 1108 if (platform_blocks) 1109 dev_warn(stmpe->dev, 1110 "platform wants blocks (%#x) not present on variant", 1111 platform_blocks); 1112 1113 return ret; 1114} 1115 1116static void stmpe_of_probe(struct stmpe_platform_data *pdata, 1117 struct device_node *np) 1118{ 1119 struct device_node *child; 1120 1121 pdata->id = of_alias_get_id(np, "stmpe-i2c"); 1122 if (pdata->id < 0) 1123 pdata->id = -1; 1124 1125 pdata->irq_gpio = of_get_named_gpio_flags(np, "irq-gpio", 0, 1126 &pdata->irq_trigger); 1127 if (gpio_is_valid(pdata->irq_gpio)) 1128 pdata->irq_over_gpio = 1; 1129 else 1130 pdata->irq_trigger = IRQF_TRIGGER_NONE; 1131 1132 of_property_read_u32(np, "st,autosleep-timeout", 1133 &pdata->autosleep_timeout); 1134 1135 pdata->autosleep = (pdata->autosleep_timeout) ? true : false; 1136 1137 for_each_child_of_node(np, child) { 1138 if (!strcmp(child->name, "stmpe_gpio")) { 1139 pdata->blocks |= STMPE_BLOCK_GPIO; 1140 } else if (!strcmp(child->name, "stmpe_keypad")) { 1141 pdata->blocks |= STMPE_BLOCK_KEYPAD; 1142 } else if (!strcmp(child->name, "stmpe_touchscreen")) { 1143 pdata->blocks |= STMPE_BLOCK_TOUCHSCREEN; 1144 } else if (!strcmp(child->name, "stmpe_adc")) { 1145 pdata->blocks |= STMPE_BLOCK_ADC; 1146 } else if (!strcmp(child->name, "stmpe_pwm")) { 1147 pdata->blocks |= STMPE_BLOCK_PWM; 1148 } else if (!strcmp(child->name, "stmpe_rotator")) { 1149 pdata->blocks |= STMPE_BLOCK_ROTATOR; 1150 } 1151 } 1152} 1153 1154/* Called from client specific probe routines */ 1155int stmpe_probe(struct stmpe_client_info *ci, enum stmpe_partnum partnum) 1156{ 1157 struct stmpe_platform_data *pdata = dev_get_platdata(ci->dev); 1158 struct device_node *np = ci->dev->of_node; 1159 struct stmpe *stmpe; 1160 int ret; 1161 1162 if (!pdata) { 1163 if (!np) 1164 return -EINVAL; 1165 1166 pdata = devm_kzalloc(ci->dev, sizeof(*pdata), GFP_KERNEL); 1167 if (!pdata) 1168 return -ENOMEM; 1169 1170 stmpe_of_probe(pdata, np); 1171 1172 if (of_find_property(np, "interrupts", NULL) == NULL) 1173 ci->irq = -1; 1174 } 1175 1176 stmpe = devm_kzalloc(ci->dev, sizeof(struct stmpe), GFP_KERNEL); 1177 if (!stmpe) 1178 return -ENOMEM; 1179 1180 mutex_init(&stmpe->irq_lock); 1181 mutex_init(&stmpe->lock); 1182 1183 stmpe->dev = ci->dev; 1184 stmpe->client = ci->client; 1185 stmpe->pdata = pdata; 1186 stmpe->ci = ci; 1187 stmpe->partnum = partnum; 1188 stmpe->variant = stmpe_variant_info[partnum]; 1189 stmpe->regs = stmpe->variant->regs; 1190 stmpe->num_gpios = stmpe->variant->num_gpios; 1191 stmpe->vcc = devm_regulator_get_optional(ci->dev, "vcc"); 1192 if (!IS_ERR(stmpe->vcc)) { 1193 ret = regulator_enable(stmpe->vcc); 1194 if (ret) 1195 dev_warn(ci->dev, "failed to enable VCC supply\n"); 1196 } 1197 stmpe->vio = devm_regulator_get_optional(ci->dev, "vio"); 1198 if (!IS_ERR(stmpe->vio)) { 1199 ret = regulator_enable(stmpe->vio); 1200 if (ret) 1201 dev_warn(ci->dev, "failed to enable VIO supply\n"); 1202 } 1203 dev_set_drvdata(stmpe->dev, stmpe); 1204 1205 if (ci->init) 1206 ci->init(stmpe); 1207 1208 if (pdata->irq_over_gpio) { 1209 ret = devm_gpio_request_one(ci->dev, pdata->irq_gpio, 1210 GPIOF_DIR_IN, "stmpe"); 1211 if (ret) { 1212 dev_err(stmpe->dev, "failed to request IRQ GPIO: %d\n", 1213 ret); 1214 return ret; 1215 } 1216 1217 stmpe->irq = gpio_to_irq(pdata->irq_gpio); 1218 } else { 1219 stmpe->irq = ci->irq; 1220 } 1221 1222 if (stmpe->irq < 0) { 1223 /* use alternate variant info for no-irq mode, if supported */ 1224 dev_info(stmpe->dev, 1225 "%s configured in no-irq mode by platform data\n", 1226 stmpe->variant->name); 1227 if (!stmpe_noirq_variant_info[stmpe->partnum]) { 1228 dev_err(stmpe->dev, 1229 "%s does not support no-irq mode!\n", 1230 stmpe->variant->name); 1231 return -ENODEV; 1232 } 1233 stmpe->variant = stmpe_noirq_variant_info[stmpe->partnum]; 1234 } else if (pdata->irq_trigger == IRQF_TRIGGER_NONE) { 1235 pdata->irq_trigger = irq_get_trigger_type(stmpe->irq); 1236 } 1237 1238 ret = stmpe_chip_init(stmpe); 1239 if (ret) 1240 return ret; 1241 1242 if (stmpe->irq >= 0) { 1243 ret = stmpe_irq_init(stmpe, np); 1244 if (ret) 1245 return ret; 1246 1247 ret = devm_request_threaded_irq(ci->dev, stmpe->irq, NULL, 1248 stmpe_irq, pdata->irq_trigger | IRQF_ONESHOT, 1249 "stmpe", stmpe); 1250 if (ret) { 1251 dev_err(stmpe->dev, "failed to request IRQ: %d\n", 1252 ret); 1253 return ret; 1254 } 1255 } 1256 1257 ret = stmpe_devices_init(stmpe); 1258 if (!ret) 1259 return 0; 1260 1261 dev_err(stmpe->dev, "failed to add children\n"); 1262 mfd_remove_devices(stmpe->dev); 1263 1264 return ret; 1265} 1266 1267int stmpe_remove(struct stmpe *stmpe) 1268{ 1269 if (!IS_ERR(stmpe->vio)) 1270 regulator_disable(stmpe->vio); 1271 if (!IS_ERR(stmpe->vcc)) 1272 regulator_disable(stmpe->vcc); 1273 1274 mfd_remove_devices(stmpe->dev); 1275 1276 return 0; 1277} 1278 1279#ifdef CONFIG_PM 1280static int stmpe_suspend(struct device *dev) 1281{ 1282 struct stmpe *stmpe = dev_get_drvdata(dev); 1283 1284 if (stmpe->irq >= 0 && device_may_wakeup(dev)) 1285 enable_irq_wake(stmpe->irq); 1286 1287 return 0; 1288} 1289 1290static int stmpe_resume(struct device *dev) 1291{ 1292 struct stmpe *stmpe = dev_get_drvdata(dev); 1293 1294 if (stmpe->irq >= 0 && device_may_wakeup(dev)) 1295 disable_irq_wake(stmpe->irq); 1296 1297 return 0; 1298} 1299 1300const struct dev_pm_ops stmpe_dev_pm_ops = { 1301 .suspend = stmpe_suspend, 1302 .resume = stmpe_resume, 1303}; 1304#endif 1305