1/* bnx2x_dcb.c: Broadcom Everest network driver. 2 * 3 * Copyright 2009-2013 Broadcom Corporation 4 * 5 * Unless you and Broadcom execute a separate written software license 6 * agreement governing use of this software, this software is licensed to you 7 * under the terms of the GNU General Public License version 2, available 8 * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL"). 9 * 10 * Notwithstanding the above, under no circumstances may you combine this 11 * software in any way with any other Broadcom software provided under a 12 * license other than the GPL, without Broadcom's express prior written 13 * consent. 14 * 15 * Maintained by: Ariel Elior <ariel.elior@qlogic.com> 16 * Written by: Dmitry Kravkov 17 * 18 */ 19 20#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 21 22#include <linux/netdevice.h> 23#include <linux/types.h> 24#include <linux/errno.h> 25#include <linux/rtnetlink.h> 26#include <net/dcbnl.h> 27 28#include "bnx2x.h" 29#include "bnx2x_cmn.h" 30#include "bnx2x_dcb.h" 31 32/* forward declarations of dcbx related functions */ 33static void bnx2x_pfc_set_pfc(struct bnx2x *bp); 34static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp); 35static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp, 36 u32 *set_configuration_ets_pg, 37 u32 *pri_pg_tbl); 38static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp, 39 u32 *pg_pri_orginal_spread, 40 struct pg_help_data *help_data); 41static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp, 42 struct pg_help_data *help_data, 43 struct dcbx_ets_feature *ets, 44 u32 *pg_pri_orginal_spread); 45static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp, 46 struct cos_help_data *cos_data, 47 u32 *pg_pri_orginal_spread, 48 struct dcbx_ets_feature *ets); 49static void bnx2x_dcbx_fw_struct(struct bnx2x *bp, 50 struct bnx2x_func_tx_start_params*); 51 52/* helpers: read/write len bytes from addr into buff by REG_RD/REG_WR */ 53static void bnx2x_read_data(struct bnx2x *bp, u32 *buff, 54 u32 addr, u32 len) 55{ 56 int i; 57 for (i = 0; i < len; i += 4, buff++) 58 *buff = REG_RD(bp, addr + i); 59} 60 61static void bnx2x_write_data(struct bnx2x *bp, u32 *buff, 62 u32 addr, u32 len) 63{ 64 int i; 65 for (i = 0; i < len; i += 4, buff++) 66 REG_WR(bp, addr + i, *buff); 67} 68 69static void bnx2x_pfc_set(struct bnx2x *bp) 70{ 71 struct bnx2x_nig_brb_pfc_port_params pfc_params = {0}; 72 u32 pri_bit, val = 0; 73 int i; 74 75 pfc_params.num_of_rx_cos_priority_mask = 76 bp->dcbx_port_params.ets.num_of_cos; 77 78 /* Tx COS configuration */ 79 for (i = 0; i < bp->dcbx_port_params.ets.num_of_cos; i++) 80 /* 81 * We configure only the pauseable bits (non pauseable aren't 82 * configured at all) it's done to avoid false pauses from 83 * network 84 */ 85 pfc_params.rx_cos_priority_mask[i] = 86 bp->dcbx_port_params.ets.cos_params[i].pri_bitmask 87 & DCBX_PFC_PRI_PAUSE_MASK(bp); 88 89 /* 90 * Rx COS configuration 91 * Changing PFC RX configuration . 92 * In RX COS0 will always be configured to lossless and COS1 to lossy 93 */ 94 for (i = 0 ; i < MAX_PFC_PRIORITIES ; i++) { 95 pri_bit = 1 << i; 96 97 if (!(pri_bit & DCBX_PFC_PRI_PAUSE_MASK(bp))) 98 val |= 1 << (i * 4); 99 } 100 101 pfc_params.pkt_priority_to_cos = val; 102 103 /* RX COS0 */ 104 pfc_params.llfc_low_priority_classes = DCBX_PFC_PRI_PAUSE_MASK(bp); 105 /* RX COS1 */ 106 pfc_params.llfc_high_priority_classes = 0; 107 108 bnx2x_acquire_phy_lock(bp); 109 bp->link_params.feature_config_flags |= FEATURE_CONFIG_PFC_ENABLED; 110 bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &pfc_params); 111 bnx2x_release_phy_lock(bp); 112} 113 114static void bnx2x_pfc_clear(struct bnx2x *bp) 115{ 116 struct bnx2x_nig_brb_pfc_port_params nig_params = {0}; 117 nig_params.pause_enable = 1; 118 bnx2x_acquire_phy_lock(bp); 119 bp->link_params.feature_config_flags &= ~FEATURE_CONFIG_PFC_ENABLED; 120 bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &nig_params); 121 bnx2x_release_phy_lock(bp); 122} 123 124static void bnx2x_dump_dcbx_drv_param(struct bnx2x *bp, 125 struct dcbx_features *features, 126 u32 error) 127{ 128 u8 i = 0; 129 DP(NETIF_MSG_LINK, "local_mib.error %x\n", error); 130 131 /* PG */ 132 DP(NETIF_MSG_LINK, 133 "local_mib.features.ets.enabled %x\n", features->ets.enabled); 134 for (i = 0; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++) 135 DP(NETIF_MSG_LINK, 136 "local_mib.features.ets.pg_bw_tbl[%d] %d\n", i, 137 DCBX_PG_BW_GET(features->ets.pg_bw_tbl, i)); 138 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) 139 DP(NETIF_MSG_LINK, 140 "local_mib.features.ets.pri_pg_tbl[%d] %d\n", i, 141 DCBX_PRI_PG_GET(features->ets.pri_pg_tbl, i)); 142 143 /* pfc */ 144 DP(BNX2X_MSG_DCB, "dcbx_features.pfc.pri_en_bitmap %x\n", 145 features->pfc.pri_en_bitmap); 146 DP(BNX2X_MSG_DCB, "dcbx_features.pfc.pfc_caps %x\n", 147 features->pfc.pfc_caps); 148 DP(BNX2X_MSG_DCB, "dcbx_features.pfc.enabled %x\n", 149 features->pfc.enabled); 150 151 DP(BNX2X_MSG_DCB, "dcbx_features.app.default_pri %x\n", 152 features->app.default_pri); 153 DP(BNX2X_MSG_DCB, "dcbx_features.app.tc_supported %x\n", 154 features->app.tc_supported); 155 DP(BNX2X_MSG_DCB, "dcbx_features.app.enabled %x\n", 156 features->app.enabled); 157 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 158 DP(BNX2X_MSG_DCB, 159 "dcbx_features.app.app_pri_tbl[%x].app_id %x\n", 160 i, features->app.app_pri_tbl[i].app_id); 161 DP(BNX2X_MSG_DCB, 162 "dcbx_features.app.app_pri_tbl[%x].pri_bitmap %x\n", 163 i, features->app.app_pri_tbl[i].pri_bitmap); 164 DP(BNX2X_MSG_DCB, 165 "dcbx_features.app.app_pri_tbl[%x].appBitfield %x\n", 166 i, features->app.app_pri_tbl[i].appBitfield); 167 } 168} 169 170static void bnx2x_dcbx_get_ap_priority(struct bnx2x *bp, 171 u8 pri_bitmap, 172 u8 llfc_traf_type) 173{ 174 u32 pri = MAX_PFC_PRIORITIES; 175 u32 index = MAX_PFC_PRIORITIES - 1; 176 u32 pri_mask; 177 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 178 179 /* Choose the highest priority */ 180 while ((MAX_PFC_PRIORITIES == pri) && (0 != index)) { 181 pri_mask = 1 << index; 182 if (GET_FLAGS(pri_bitmap, pri_mask)) 183 pri = index ; 184 index--; 185 } 186 187 if (pri < MAX_PFC_PRIORITIES) 188 ttp[llfc_traf_type] = max_t(u32, ttp[llfc_traf_type], pri); 189} 190 191static void bnx2x_dcbx_get_ap_feature(struct bnx2x *bp, 192 struct dcbx_app_priority_feature *app, 193 u32 error) { 194 u8 index; 195 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 196 197 if (GET_FLAGS(error, DCBX_LOCAL_APP_ERROR)) 198 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_ERROR\n"); 199 200 if (GET_FLAGS(error, DCBX_LOCAL_APP_MISMATCH)) 201 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_MISMATCH\n"); 202 203 if (GET_FLAGS(error, DCBX_REMOTE_APP_TLV_NOT_FOUND)) 204 DP(BNX2X_MSG_DCB, "DCBX_REMOTE_APP_TLV_NOT_FOUND\n"); 205 if (app->enabled && 206 !GET_FLAGS(error, DCBX_LOCAL_APP_ERROR | DCBX_LOCAL_APP_MISMATCH | 207 DCBX_REMOTE_APP_TLV_NOT_FOUND)) { 208 209 bp->dcbx_port_params.app.enabled = true; 210 211 for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++) 212 ttp[index] = 0; 213 214 if (app->default_pri < MAX_PFC_PRIORITIES) 215 ttp[LLFC_TRAFFIC_TYPE_NW] = app->default_pri; 216 217 for (index = 0 ; index < DCBX_MAX_APP_PROTOCOL; index++) { 218 struct dcbx_app_priority_entry *entry = 219 app->app_pri_tbl; 220 221 if (GET_FLAGS(entry[index].appBitfield, 222 DCBX_APP_SF_ETH_TYPE) && 223 ETH_TYPE_FCOE == entry[index].app_id) 224 bnx2x_dcbx_get_ap_priority(bp, 225 entry[index].pri_bitmap, 226 LLFC_TRAFFIC_TYPE_FCOE); 227 228 if (GET_FLAGS(entry[index].appBitfield, 229 DCBX_APP_SF_PORT) && 230 TCP_PORT_ISCSI == entry[index].app_id) 231 bnx2x_dcbx_get_ap_priority(bp, 232 entry[index].pri_bitmap, 233 LLFC_TRAFFIC_TYPE_ISCSI); 234 } 235 } else { 236 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_DISABLED\n"); 237 bp->dcbx_port_params.app.enabled = false; 238 for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++) 239 ttp[index] = INVALID_TRAFFIC_TYPE_PRIORITY; 240 } 241} 242 243static void bnx2x_dcbx_get_ets_feature(struct bnx2x *bp, 244 struct dcbx_ets_feature *ets, 245 u32 error) { 246 int i = 0; 247 u32 pg_pri_orginal_spread[DCBX_MAX_NUM_PG_BW_ENTRIES] = {0}; 248 struct pg_help_data pg_help_data; 249 struct bnx2x_dcbx_cos_params *cos_params = 250 bp->dcbx_port_params.ets.cos_params; 251 252 memset(&pg_help_data, 0, sizeof(struct pg_help_data)); 253 254 if (GET_FLAGS(error, DCBX_LOCAL_ETS_ERROR)) 255 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_ERROR\n"); 256 257 if (GET_FLAGS(error, DCBX_REMOTE_ETS_TLV_NOT_FOUND)) 258 DP(BNX2X_MSG_DCB, "DCBX_REMOTE_ETS_TLV_NOT_FOUND\n"); 259 260 /* Clean up old settings of ets on COS */ 261 for (i = 0; i < ARRAY_SIZE(bp->dcbx_port_params.ets.cos_params) ; i++) { 262 cos_params[i].pauseable = false; 263 cos_params[i].strict = BNX2X_DCBX_STRICT_INVALID; 264 cos_params[i].bw_tbl = DCBX_INVALID_COS_BW; 265 cos_params[i].pri_bitmask = 0; 266 } 267 268 if (bp->dcbx_port_params.app.enabled && ets->enabled && 269 !GET_FLAGS(error, 270 DCBX_LOCAL_ETS_ERROR | DCBX_REMOTE_ETS_TLV_NOT_FOUND)) { 271 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_ENABLE\n"); 272 bp->dcbx_port_params.ets.enabled = true; 273 274 bnx2x_dcbx_get_ets_pri_pg_tbl(bp, 275 pg_pri_orginal_spread, 276 ets->pri_pg_tbl); 277 278 bnx2x_dcbx_get_num_pg_traf_type(bp, 279 pg_pri_orginal_spread, 280 &pg_help_data); 281 282 bnx2x_dcbx_fill_cos_params(bp, &pg_help_data, 283 ets, pg_pri_orginal_spread); 284 285 } else { 286 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_DISABLED\n"); 287 bp->dcbx_port_params.ets.enabled = false; 288 ets->pri_pg_tbl[0] = 0; 289 290 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES ; i++) 291 DCBX_PG_BW_SET(ets->pg_bw_tbl, i, 1); 292 } 293} 294 295static void bnx2x_dcbx_get_pfc_feature(struct bnx2x *bp, 296 struct dcbx_pfc_feature *pfc, u32 error) 297{ 298 if (GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR)) 299 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_PFC_ERROR\n"); 300 301 if (GET_FLAGS(error, DCBX_REMOTE_PFC_TLV_NOT_FOUND)) 302 DP(BNX2X_MSG_DCB, "DCBX_REMOTE_PFC_TLV_NOT_FOUND\n"); 303 if (bp->dcbx_port_params.app.enabled && pfc->enabled && 304 !GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR | DCBX_LOCAL_PFC_MISMATCH | 305 DCBX_REMOTE_PFC_TLV_NOT_FOUND)) { 306 bp->dcbx_port_params.pfc.enabled = true; 307 bp->dcbx_port_params.pfc.priority_non_pauseable_mask = 308 ~(pfc->pri_en_bitmap); 309 } else { 310 DP(BNX2X_MSG_DCB, "DCBX_LOCAL_PFC_DISABLED\n"); 311 bp->dcbx_port_params.pfc.enabled = false; 312 bp->dcbx_port_params.pfc.priority_non_pauseable_mask = 0; 313 } 314} 315 316/* maps unmapped priorities to to the same COS as L2 */ 317static void bnx2x_dcbx_map_nw(struct bnx2x *bp) 318{ 319 int i; 320 u32 unmapped = (1 << MAX_PFC_PRIORITIES) - 1; /* all ones */ 321 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 322 u32 nw_prio = 1 << ttp[LLFC_TRAFFIC_TYPE_NW]; 323 struct bnx2x_dcbx_cos_params *cos_params = 324 bp->dcbx_port_params.ets.cos_params; 325 326 /* get unmapped priorities by clearing mapped bits */ 327 for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) 328 unmapped &= ~(1 << ttp[i]); 329 330 /* find cos for nw prio and extend it with unmapped */ 331 for (i = 0; i < ARRAY_SIZE(bp->dcbx_port_params.ets.cos_params); i++) { 332 if (cos_params[i].pri_bitmask & nw_prio) { 333 /* extend the bitmask with unmapped */ 334 DP(BNX2X_MSG_DCB, 335 "cos %d extended with 0x%08x\n", i, unmapped); 336 cos_params[i].pri_bitmask |= unmapped; 337 break; 338 } 339 } 340} 341 342static void bnx2x_get_dcbx_drv_param(struct bnx2x *bp, 343 struct dcbx_features *features, 344 u32 error) 345{ 346 bnx2x_dcbx_get_ap_feature(bp, &features->app, error); 347 348 bnx2x_dcbx_get_pfc_feature(bp, &features->pfc, error); 349 350 bnx2x_dcbx_get_ets_feature(bp, &features->ets, error); 351 352 bnx2x_dcbx_map_nw(bp); 353} 354 355#define DCBX_LOCAL_MIB_MAX_TRY_READ (100) 356static int bnx2x_dcbx_read_mib(struct bnx2x *bp, 357 u32 *base_mib_addr, 358 u32 offset, 359 int read_mib_type) 360{ 361 int max_try_read = 0; 362 u32 mib_size, prefix_seq_num, suffix_seq_num; 363 struct lldp_remote_mib *remote_mib ; 364 struct lldp_local_mib *local_mib; 365 366 switch (read_mib_type) { 367 case DCBX_READ_LOCAL_MIB: 368 mib_size = sizeof(struct lldp_local_mib); 369 break; 370 case DCBX_READ_REMOTE_MIB: 371 mib_size = sizeof(struct lldp_remote_mib); 372 break; 373 default: 374 return 1; /*error*/ 375 } 376 377 offset += BP_PORT(bp) * mib_size; 378 379 do { 380 bnx2x_read_data(bp, base_mib_addr, offset, mib_size); 381 382 max_try_read++; 383 384 switch (read_mib_type) { 385 case DCBX_READ_LOCAL_MIB: 386 local_mib = (struct lldp_local_mib *) base_mib_addr; 387 prefix_seq_num = local_mib->prefix_seq_num; 388 suffix_seq_num = local_mib->suffix_seq_num; 389 break; 390 case DCBX_READ_REMOTE_MIB: 391 remote_mib = (struct lldp_remote_mib *) base_mib_addr; 392 prefix_seq_num = remote_mib->prefix_seq_num; 393 suffix_seq_num = remote_mib->suffix_seq_num; 394 break; 395 default: 396 return 1; /*error*/ 397 } 398 } while ((prefix_seq_num != suffix_seq_num) && 399 (max_try_read < DCBX_LOCAL_MIB_MAX_TRY_READ)); 400 401 if (max_try_read >= DCBX_LOCAL_MIB_MAX_TRY_READ) { 402 BNX2X_ERR("MIB could not be read\n"); 403 return 1; 404 } 405 406 return 0; 407} 408 409static void bnx2x_pfc_set_pfc(struct bnx2x *bp) 410{ 411 int mfw_configured = SHMEM2_HAS(bp, drv_flags) && 412 GET_FLAGS(SHMEM2_RD(bp, drv_flags), 413 1 << DRV_FLAGS_DCB_MFW_CONFIGURED); 414 415 if (bp->dcbx_port_params.pfc.enabled && 416 (!(bp->dcbx_error & DCBX_REMOTE_MIB_ERROR) || mfw_configured)) 417 /* 418 * 1. Fills up common PFC structures if required 419 * 2. Configure NIG, MAC and BRB via the elink 420 */ 421 bnx2x_pfc_set(bp); 422 else 423 bnx2x_pfc_clear(bp); 424} 425 426int bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp) 427{ 428 struct bnx2x_func_state_params func_params = {NULL}; 429 int rc; 430 431 func_params.f_obj = &bp->func_obj; 432 func_params.cmd = BNX2X_F_CMD_TX_STOP; 433 434 __set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags); 435 __set_bit(RAMROD_RETRY, &func_params.ramrod_flags); 436 437 DP(BNX2X_MSG_DCB, "STOP TRAFFIC\n"); 438 439 rc = bnx2x_func_state_change(bp, &func_params); 440 if (rc) { 441 BNX2X_ERR("Unable to hold traffic for HW configuration\n"); 442 bnx2x_panic(); 443 } 444 445 return rc; 446} 447 448int bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp) 449{ 450 struct bnx2x_func_state_params func_params = {NULL}; 451 struct bnx2x_func_tx_start_params *tx_params = 452 &func_params.params.tx_start; 453 int rc; 454 455 func_params.f_obj = &bp->func_obj; 456 func_params.cmd = BNX2X_F_CMD_TX_START; 457 458 __set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags); 459 __set_bit(RAMROD_RETRY, &func_params.ramrod_flags); 460 461 bnx2x_dcbx_fw_struct(bp, tx_params); 462 463 DP(BNX2X_MSG_DCB, "START TRAFFIC\n"); 464 465 rc = bnx2x_func_state_change(bp, &func_params); 466 if (rc) { 467 BNX2X_ERR("Unable to resume traffic after HW configuration\n"); 468 bnx2x_panic(); 469 } 470 471 return rc; 472} 473 474static void bnx2x_dcbx_2cos_limit_update_ets_config(struct bnx2x *bp) 475{ 476 struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets); 477 int rc = 0; 478 479 if (ets->num_of_cos == 0 || ets->num_of_cos > DCBX_COS_MAX_NUM_E2) { 480 BNX2X_ERR("Illegal number of COSes %d\n", ets->num_of_cos); 481 return; 482 } 483 484 /* valid COS entries */ 485 if (ets->num_of_cos == 1) /* no ETS */ 486 return; 487 488 /* sanity */ 489 if (((BNX2X_DCBX_STRICT_INVALID == ets->cos_params[0].strict) && 490 (DCBX_INVALID_COS_BW == ets->cos_params[0].bw_tbl)) || 491 ((BNX2X_DCBX_STRICT_INVALID == ets->cos_params[1].strict) && 492 (DCBX_INVALID_COS_BW == ets->cos_params[1].bw_tbl))) { 493 BNX2X_ERR("all COS should have at least bw_limit or strict" 494 "ets->cos_params[0].strict= %x" 495 "ets->cos_params[0].bw_tbl= %x" 496 "ets->cos_params[1].strict= %x" 497 "ets->cos_params[1].bw_tbl= %x", 498 ets->cos_params[0].strict, 499 ets->cos_params[0].bw_tbl, 500 ets->cos_params[1].strict, 501 ets->cos_params[1].bw_tbl); 502 return; 503 } 504 /* If we join a group and there is bw_tbl and strict then bw rules */ 505 if ((DCBX_INVALID_COS_BW != ets->cos_params[0].bw_tbl) && 506 (DCBX_INVALID_COS_BW != ets->cos_params[1].bw_tbl)) { 507 u32 bw_tbl_0 = ets->cos_params[0].bw_tbl; 508 u32 bw_tbl_1 = ets->cos_params[1].bw_tbl; 509 /* Do not allow 0-100 configuration 510 * since PBF does not support it 511 * force 1-99 instead 512 */ 513 if (bw_tbl_0 == 0) { 514 bw_tbl_0 = 1; 515 bw_tbl_1 = 99; 516 } else if (bw_tbl_1 == 0) { 517 bw_tbl_1 = 1; 518 bw_tbl_0 = 99; 519 } 520 521 bnx2x_ets_bw_limit(&bp->link_params, bw_tbl_0, bw_tbl_1); 522 } else { 523 if (ets->cos_params[0].strict == BNX2X_DCBX_STRICT_COS_HIGHEST) 524 rc = bnx2x_ets_strict(&bp->link_params, 0); 525 else if (ets->cos_params[1].strict 526 == BNX2X_DCBX_STRICT_COS_HIGHEST) 527 rc = bnx2x_ets_strict(&bp->link_params, 1); 528 if (rc) 529 BNX2X_ERR("update_ets_params failed\n"); 530 } 531} 532 533/* 534 * In E3B0 the configuration may have more than 2 COS. 535 */ 536static void bnx2x_dcbx_update_ets_config(struct bnx2x *bp) 537{ 538 struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets); 539 struct bnx2x_ets_params ets_params = { 0 }; 540 u8 i; 541 542 ets_params.num_of_cos = ets->num_of_cos; 543 544 for (i = 0; i < ets->num_of_cos; i++) { 545 /* COS is SP */ 546 if (ets->cos_params[i].strict != BNX2X_DCBX_STRICT_INVALID) { 547 if (ets->cos_params[i].bw_tbl != DCBX_INVALID_COS_BW) { 548 BNX2X_ERR("COS can't be not BW and not SP\n"); 549 return; 550 } 551 552 ets_params.cos[i].state = bnx2x_cos_state_strict; 553 ets_params.cos[i].params.sp_params.pri = 554 ets->cos_params[i].strict; 555 } else { /* COS is BW */ 556 if (ets->cos_params[i].bw_tbl == DCBX_INVALID_COS_BW) { 557 BNX2X_ERR("COS can't be not BW and not SP\n"); 558 return; 559 } 560 ets_params.cos[i].state = bnx2x_cos_state_bw; 561 ets_params.cos[i].params.bw_params.bw = 562 (u8)ets->cos_params[i].bw_tbl; 563 } 564 } 565 566 /* Configure the ETS in HW */ 567 if (bnx2x_ets_e3b0_config(&bp->link_params, &bp->link_vars, 568 &ets_params)) { 569 BNX2X_ERR("bnx2x_ets_e3b0_config failed\n"); 570 bnx2x_ets_disabled(&bp->link_params, &bp->link_vars); 571 } 572} 573 574static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp) 575{ 576 int mfw_configured = SHMEM2_HAS(bp, drv_flags) && 577 GET_FLAGS(SHMEM2_RD(bp, drv_flags), 578 1 << DRV_FLAGS_DCB_MFW_CONFIGURED); 579 580 bnx2x_ets_disabled(&bp->link_params, &bp->link_vars); 581 582 if (!bp->dcbx_port_params.ets.enabled || 583 ((bp->dcbx_error & DCBX_REMOTE_MIB_ERROR) && !mfw_configured)) 584 return; 585 586 if (CHIP_IS_E3B0(bp)) 587 bnx2x_dcbx_update_ets_config(bp); 588 else 589 bnx2x_dcbx_2cos_limit_update_ets_config(bp); 590} 591 592#ifdef BCM_DCBNL 593static int bnx2x_dcbx_read_shmem_remote_mib(struct bnx2x *bp) 594{ 595 struct lldp_remote_mib remote_mib = {0}; 596 u32 dcbx_remote_mib_offset = SHMEM2_RD(bp, dcbx_remote_mib_offset); 597 int rc; 598 599 DP(BNX2X_MSG_DCB, "dcbx_remote_mib_offset 0x%x\n", 600 dcbx_remote_mib_offset); 601 602 if (SHMEM_DCBX_REMOTE_MIB_NONE == dcbx_remote_mib_offset) { 603 BNX2X_ERR("FW doesn't support dcbx_remote_mib_offset\n"); 604 return -EINVAL; 605 } 606 607 rc = bnx2x_dcbx_read_mib(bp, (u32 *)&remote_mib, dcbx_remote_mib_offset, 608 DCBX_READ_REMOTE_MIB); 609 610 if (rc) { 611 BNX2X_ERR("Failed to read remote mib from FW\n"); 612 return rc; 613 } 614 615 /* save features and flags */ 616 bp->dcbx_remote_feat = remote_mib.features; 617 bp->dcbx_remote_flags = remote_mib.flags; 618 return 0; 619} 620#endif 621 622static int bnx2x_dcbx_read_shmem_neg_results(struct bnx2x *bp) 623{ 624 struct lldp_local_mib local_mib = {0}; 625 u32 dcbx_neg_res_offset = SHMEM2_RD(bp, dcbx_neg_res_offset); 626 int rc; 627 628 DP(BNX2X_MSG_DCB, "dcbx_neg_res_offset 0x%x\n", dcbx_neg_res_offset); 629 630 if (SHMEM_DCBX_NEG_RES_NONE == dcbx_neg_res_offset) { 631 BNX2X_ERR("FW doesn't support dcbx_neg_res_offset\n"); 632 return -EINVAL; 633 } 634 635 rc = bnx2x_dcbx_read_mib(bp, (u32 *)&local_mib, dcbx_neg_res_offset, 636 DCBX_READ_LOCAL_MIB); 637 638 if (rc) { 639 BNX2X_ERR("Failed to read local mib from FW\n"); 640 return rc; 641 } 642 643 /* save features and error */ 644 bp->dcbx_local_feat = local_mib.features; 645 bp->dcbx_error = local_mib.error; 646 return 0; 647} 648 649#ifdef BCM_DCBNL 650static inline 651u8 bnx2x_dcbx_dcbnl_app_up(struct dcbx_app_priority_entry *ent) 652{ 653 u8 pri; 654 655 /* Choose the highest priority */ 656 for (pri = MAX_PFC_PRIORITIES - 1; pri > 0; pri--) 657 if (ent->pri_bitmap & (1 << pri)) 658 break; 659 return pri; 660} 661 662static inline 663u8 bnx2x_dcbx_dcbnl_app_idtype(struct dcbx_app_priority_entry *ent) 664{ 665 return ((ent->appBitfield & DCBX_APP_ENTRY_SF_MASK) == 666 DCBX_APP_SF_PORT) ? DCB_APP_IDTYPE_PORTNUM : 667 DCB_APP_IDTYPE_ETHTYPE; 668} 669 670int bnx2x_dcbnl_update_applist(struct bnx2x *bp, bool delall) 671{ 672 int i, err = 0; 673 674 for (i = 0; i < DCBX_MAX_APP_PROTOCOL && err == 0; i++) { 675 struct dcbx_app_priority_entry *ent = 676 &bp->dcbx_local_feat.app.app_pri_tbl[i]; 677 678 if (ent->appBitfield & DCBX_APP_ENTRY_VALID) { 679 u8 up = bnx2x_dcbx_dcbnl_app_up(ent); 680 681 /* avoid invalid user-priority */ 682 if (up) { 683 struct dcb_app app; 684 app.selector = bnx2x_dcbx_dcbnl_app_idtype(ent); 685 app.protocol = ent->app_id; 686 app.priority = delall ? 0 : up; 687 err = dcb_setapp(bp->dev, &app); 688 } 689 } 690 } 691 return err; 692} 693#endif 694 695static inline void bnx2x_dcbx_update_tc_mapping(struct bnx2x *bp) 696{ 697 u8 prio, cos; 698 for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++) { 699 for (prio = 0; prio < BNX2X_MAX_PRIORITY; prio++) { 700 if (bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask 701 & (1 << prio)) { 702 bp->prio_to_cos[prio] = cos; 703 DP(BNX2X_MSG_DCB, 704 "tx_mapping %d --> %d\n", prio, cos); 705 } 706 } 707 } 708 709 /* setup tc must be called under rtnl lock, but we can't take it here 710 * as we are handling an attention on a work queue which must be 711 * flushed at some rtnl-locked contexts (e.g. if down) 712 */ 713 bnx2x_schedule_sp_rtnl(bp, BNX2X_SP_RTNL_SETUP_TC, 0); 714} 715 716void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state) 717{ 718 switch (state) { 719 case BNX2X_DCBX_STATE_NEG_RECEIVED: 720 { 721 DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_NEG_RECEIVED\n"); 722#ifdef BCM_DCBNL 723 /** 724 * Delete app tlvs from dcbnl before reading new 725 * negotiation results 726 */ 727 bnx2x_dcbnl_update_applist(bp, true); 728 729 /* Read remote mib if dcbx is in the FW */ 730 if (bnx2x_dcbx_read_shmem_remote_mib(bp)) 731 return; 732#endif 733 /* Read neg results if dcbx is in the FW */ 734 if (bnx2x_dcbx_read_shmem_neg_results(bp)) 735 return; 736 737 bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat, 738 bp->dcbx_error); 739 740 bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat, 741 bp->dcbx_error); 742 743 /* mark DCBX result for PMF migration */ 744 bnx2x_update_drv_flags(bp, 745 1 << DRV_FLAGS_DCB_CONFIGURED, 746 1); 747#ifdef BCM_DCBNL 748 /* 749 * Add new app tlvs to dcbnl 750 */ 751 bnx2x_dcbnl_update_applist(bp, false); 752#endif 753 /* 754 * reconfigure the netdevice with the results of the new 755 * dcbx negotiation. 756 */ 757 bnx2x_dcbx_update_tc_mapping(bp); 758 759 /* 760 * allow other functions to update their netdevices 761 * accordingly 762 */ 763 if (IS_MF(bp)) 764 bnx2x_link_sync_notify(bp); 765 766 bnx2x_schedule_sp_rtnl(bp, BNX2X_SP_RTNL_TX_STOP, 0); 767 return; 768 } 769 case BNX2X_DCBX_STATE_TX_PAUSED: 770 DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_TX_PAUSED\n"); 771 bnx2x_pfc_set_pfc(bp); 772 773 bnx2x_dcbx_update_ets_params(bp); 774 775 /* ets may affect cmng configuration: reinit it in hw */ 776 bnx2x_set_local_cmng(bp); 777 return; 778 case BNX2X_DCBX_STATE_TX_RELEASED: 779 DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_TX_RELEASED\n"); 780 bnx2x_fw_command(bp, DRV_MSG_CODE_DCBX_PMF_DRV_OK, 0); 781#ifdef BCM_DCBNL 782 /* 783 * Send a notification for the new negotiated parameters 784 */ 785 dcbnl_cee_notify(bp->dev, RTM_GETDCB, DCB_CMD_CEE_GET, 0, 0); 786#endif 787 return; 788 default: 789 BNX2X_ERR("Unknown DCBX_STATE\n"); 790 } 791} 792 793#define LLDP_ADMIN_MIB_OFFSET(bp) (PORT_MAX*sizeof(struct lldp_params) + \ 794 BP_PORT(bp)*sizeof(struct lldp_admin_mib)) 795 796static void bnx2x_dcbx_admin_mib_updated_params(struct bnx2x *bp, 797 u32 dcbx_lldp_params_offset) 798{ 799 struct lldp_admin_mib admin_mib; 800 u32 i, other_traf_type = PREDEFINED_APP_IDX_MAX, traf_type = 0; 801 u32 offset = dcbx_lldp_params_offset + LLDP_ADMIN_MIB_OFFSET(bp); 802 803 /*shortcuts*/ 804 struct dcbx_features *af = &admin_mib.features; 805 struct bnx2x_config_dcbx_params *dp = &bp->dcbx_config_params; 806 807 memset(&admin_mib, 0, sizeof(struct lldp_admin_mib)); 808 809 /* Read the data first */ 810 bnx2x_read_data(bp, (u32 *)&admin_mib, offset, 811 sizeof(struct lldp_admin_mib)); 812 813 if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON) 814 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED); 815 else 816 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED); 817 818 if (dp->overwrite_settings == BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE) { 819 820 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_CEE_VERSION_MASK); 821 admin_mib.ver_cfg_flags |= 822 (dp->admin_dcbx_version << DCBX_CEE_VERSION_SHIFT) & 823 DCBX_CEE_VERSION_MASK; 824 825 af->ets.enabled = (u8)dp->admin_ets_enable; 826 827 af->pfc.enabled = (u8)dp->admin_pfc_enable; 828 829 /* FOR IEEE dp->admin_tc_supported_tx_enable */ 830 if (dp->admin_ets_configuration_tx_enable) 831 SET_FLAGS(admin_mib.ver_cfg_flags, 832 DCBX_ETS_CONFIG_TX_ENABLED); 833 else 834 RESET_FLAGS(admin_mib.ver_cfg_flags, 835 DCBX_ETS_CONFIG_TX_ENABLED); 836 /* For IEEE admin_ets_recommendation_tx_enable */ 837 if (dp->admin_pfc_tx_enable) 838 SET_FLAGS(admin_mib.ver_cfg_flags, 839 DCBX_PFC_CONFIG_TX_ENABLED); 840 else 841 RESET_FLAGS(admin_mib.ver_cfg_flags, 842 DCBX_PFC_CONFIG_TX_ENABLED); 843 844 if (dp->admin_application_priority_tx_enable) 845 SET_FLAGS(admin_mib.ver_cfg_flags, 846 DCBX_APP_CONFIG_TX_ENABLED); 847 else 848 RESET_FLAGS(admin_mib.ver_cfg_flags, 849 DCBX_APP_CONFIG_TX_ENABLED); 850 851 if (dp->admin_ets_willing) 852 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING); 853 else 854 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING); 855 /* For IEEE admin_ets_reco_valid */ 856 if (dp->admin_pfc_willing) 857 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING); 858 else 859 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING); 860 861 if (dp->admin_app_priority_willing) 862 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING); 863 else 864 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING); 865 866 for (i = 0 ; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++) { 867 DCBX_PG_BW_SET(af->ets.pg_bw_tbl, i, 868 (u8)dp->admin_configuration_bw_precentage[i]); 869 870 DP(BNX2X_MSG_DCB, "pg_bw_tbl[%d] = %02x\n", 871 i, DCBX_PG_BW_GET(af->ets.pg_bw_tbl, i)); 872 } 873 874 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) { 875 DCBX_PRI_PG_SET(af->ets.pri_pg_tbl, i, 876 (u8)dp->admin_configuration_ets_pg[i]); 877 878 DP(BNX2X_MSG_DCB, "pri_pg_tbl[%d] = %02x\n", 879 i, DCBX_PRI_PG_GET(af->ets.pri_pg_tbl, i)); 880 } 881 882 /*For IEEE admin_recommendation_bw_percentage 883 *For IEEE admin_recommendation_ets_pg */ 884 af->pfc.pri_en_bitmap = (u8)dp->admin_pfc_bitmap; 885 for (i = 0; i < DCBX_CONFIG_MAX_APP_PROTOCOL; i++) { 886 if (dp->admin_priority_app_table[i].valid) { 887 struct bnx2x_admin_priority_app_table *table = 888 dp->admin_priority_app_table; 889 if ((ETH_TYPE_FCOE == table[i].app_id) && 890 (TRAFFIC_TYPE_ETH == table[i].traffic_type)) 891 traf_type = FCOE_APP_IDX; 892 else if ((TCP_PORT_ISCSI == table[i].app_id) && 893 (TRAFFIC_TYPE_PORT == table[i].traffic_type)) 894 traf_type = ISCSI_APP_IDX; 895 else 896 traf_type = other_traf_type++; 897 898 af->app.app_pri_tbl[traf_type].app_id = 899 table[i].app_id; 900 901 af->app.app_pri_tbl[traf_type].pri_bitmap = 902 (u8)(1 << table[i].priority); 903 904 af->app.app_pri_tbl[traf_type].appBitfield = 905 (DCBX_APP_ENTRY_VALID); 906 907 af->app.app_pri_tbl[traf_type].appBitfield |= 908 (TRAFFIC_TYPE_ETH == table[i].traffic_type) ? 909 DCBX_APP_SF_ETH_TYPE : DCBX_APP_SF_PORT; 910 } 911 } 912 913 af->app.default_pri = (u8)dp->admin_default_priority; 914 } 915 916 /* Write the data. */ 917 bnx2x_write_data(bp, (u32 *)&admin_mib, offset, 918 sizeof(struct lldp_admin_mib)); 919} 920 921void bnx2x_dcbx_set_state(struct bnx2x *bp, bool dcb_on, u32 dcbx_enabled) 922{ 923 if (!CHIP_IS_E1x(bp)) { 924 bp->dcb_state = dcb_on; 925 bp->dcbx_enabled = dcbx_enabled; 926 } else { 927 bp->dcb_state = false; 928 bp->dcbx_enabled = BNX2X_DCBX_ENABLED_INVALID; 929 } 930 DP(BNX2X_MSG_DCB, "DCB state [%s:%s]\n", 931 dcb_on ? "ON" : "OFF", 932 dcbx_enabled == BNX2X_DCBX_ENABLED_OFF ? "user-mode" : 933 dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF ? "on-chip static" : 934 dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON ? 935 "on-chip with negotiation" : "invalid"); 936} 937 938void bnx2x_dcbx_init_params(struct bnx2x *bp) 939{ 940 bp->dcbx_config_params.admin_dcbx_version = 0x0; /* 0 - CEE; 1 - IEEE */ 941 bp->dcbx_config_params.admin_ets_willing = 1; 942 bp->dcbx_config_params.admin_pfc_willing = 1; 943 bp->dcbx_config_params.overwrite_settings = 1; 944 bp->dcbx_config_params.admin_ets_enable = 1; 945 bp->dcbx_config_params.admin_pfc_enable = 1; 946 bp->dcbx_config_params.admin_tc_supported_tx_enable = 1; 947 bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1; 948 bp->dcbx_config_params.admin_pfc_tx_enable = 1; 949 bp->dcbx_config_params.admin_application_priority_tx_enable = 1; 950 bp->dcbx_config_params.admin_ets_reco_valid = 1; 951 bp->dcbx_config_params.admin_app_priority_willing = 1; 952 bp->dcbx_config_params.admin_configuration_bw_precentage[0] = 100; 953 bp->dcbx_config_params.admin_configuration_bw_precentage[1] = 0; 954 bp->dcbx_config_params.admin_configuration_bw_precentage[2] = 0; 955 bp->dcbx_config_params.admin_configuration_bw_precentage[3] = 0; 956 bp->dcbx_config_params.admin_configuration_bw_precentage[4] = 0; 957 bp->dcbx_config_params.admin_configuration_bw_precentage[5] = 0; 958 bp->dcbx_config_params.admin_configuration_bw_precentage[6] = 0; 959 bp->dcbx_config_params.admin_configuration_bw_precentage[7] = 0; 960 bp->dcbx_config_params.admin_configuration_ets_pg[0] = 0; 961 bp->dcbx_config_params.admin_configuration_ets_pg[1] = 0; 962 bp->dcbx_config_params.admin_configuration_ets_pg[2] = 0; 963 bp->dcbx_config_params.admin_configuration_ets_pg[3] = 0; 964 bp->dcbx_config_params.admin_configuration_ets_pg[4] = 0; 965 bp->dcbx_config_params.admin_configuration_ets_pg[5] = 0; 966 bp->dcbx_config_params.admin_configuration_ets_pg[6] = 0; 967 bp->dcbx_config_params.admin_configuration_ets_pg[7] = 0; 968 bp->dcbx_config_params.admin_recommendation_bw_precentage[0] = 100; 969 bp->dcbx_config_params.admin_recommendation_bw_precentage[1] = 0; 970 bp->dcbx_config_params.admin_recommendation_bw_precentage[2] = 0; 971 bp->dcbx_config_params.admin_recommendation_bw_precentage[3] = 0; 972 bp->dcbx_config_params.admin_recommendation_bw_precentage[4] = 0; 973 bp->dcbx_config_params.admin_recommendation_bw_precentage[5] = 0; 974 bp->dcbx_config_params.admin_recommendation_bw_precentage[6] = 0; 975 bp->dcbx_config_params.admin_recommendation_bw_precentage[7] = 0; 976 bp->dcbx_config_params.admin_recommendation_ets_pg[0] = 0; 977 bp->dcbx_config_params.admin_recommendation_ets_pg[1] = 1; 978 bp->dcbx_config_params.admin_recommendation_ets_pg[2] = 2; 979 bp->dcbx_config_params.admin_recommendation_ets_pg[3] = 3; 980 bp->dcbx_config_params.admin_recommendation_ets_pg[4] = 4; 981 bp->dcbx_config_params.admin_recommendation_ets_pg[5] = 5; 982 bp->dcbx_config_params.admin_recommendation_ets_pg[6] = 6; 983 bp->dcbx_config_params.admin_recommendation_ets_pg[7] = 7; 984 bp->dcbx_config_params.admin_pfc_bitmap = 0x0; 985 bp->dcbx_config_params.admin_priority_app_table[0].valid = 0; 986 bp->dcbx_config_params.admin_priority_app_table[1].valid = 0; 987 bp->dcbx_config_params.admin_priority_app_table[2].valid = 0; 988 bp->dcbx_config_params.admin_priority_app_table[3].valid = 0; 989 bp->dcbx_config_params.admin_default_priority = 0; 990} 991 992void bnx2x_dcbx_init(struct bnx2x *bp, bool update_shmem) 993{ 994 u32 dcbx_lldp_params_offset = SHMEM_LLDP_DCBX_PARAMS_NONE; 995 996 /* only PMF can send ADMIN msg to MFW in old MFW versions */ 997 if ((!bp->port.pmf) && (!(bp->flags & BC_SUPPORTS_DCBX_MSG_NON_PMF))) 998 return; 999 1000 if (bp->dcbx_enabled <= 0) 1001 return; 1002 1003 /* validate: 1004 * chip of good for dcbx version, 1005 * dcb is wanted 1006 * shmem2 contains DCBX support fields 1007 */ 1008 DP(BNX2X_MSG_DCB, "dcb_state %d bp->port.pmf %d\n", 1009 bp->dcb_state, bp->port.pmf); 1010 1011 if (bp->dcb_state == BNX2X_DCB_STATE_ON && 1012 SHMEM2_HAS(bp, dcbx_lldp_params_offset)) { 1013 dcbx_lldp_params_offset = 1014 SHMEM2_RD(bp, dcbx_lldp_params_offset); 1015 1016 DP(BNX2X_MSG_DCB, "dcbx_lldp_params_offset 0x%x\n", 1017 dcbx_lldp_params_offset); 1018 1019 bnx2x_update_drv_flags(bp, 1 << DRV_FLAGS_DCB_CONFIGURED, 0); 1020 1021 if (SHMEM_LLDP_DCBX_PARAMS_NONE != dcbx_lldp_params_offset) { 1022 /* need HW lock to avoid scenario of two drivers 1023 * writing in parallel to shmem 1024 */ 1025 bnx2x_acquire_hw_lock(bp, 1026 HW_LOCK_RESOURCE_DCBX_ADMIN_MIB); 1027 if (update_shmem) 1028 bnx2x_dcbx_admin_mib_updated_params(bp, 1029 dcbx_lldp_params_offset); 1030 1031 /* Let HW start negotiation */ 1032 bnx2x_fw_command(bp, 1033 DRV_MSG_CODE_DCBX_ADMIN_PMF_MSG, 0); 1034 /* release HW lock only after MFW acks that it finished 1035 * reading values from shmem 1036 */ 1037 bnx2x_release_hw_lock(bp, 1038 HW_LOCK_RESOURCE_DCBX_ADMIN_MIB); 1039 } 1040 } 1041} 1042static void 1043bnx2x_dcbx_print_cos_params(struct bnx2x *bp, 1044 struct bnx2x_func_tx_start_params *pfc_fw_cfg) 1045{ 1046 u8 pri = 0; 1047 u8 cos = 0; 1048 1049 DP(BNX2X_MSG_DCB, 1050 "pfc_fw_cfg->dcb_version %x\n", pfc_fw_cfg->dcb_version); 1051 DP(BNX2X_MSG_DCB, 1052 "pdev->params.dcbx_port_params.pfc.priority_non_pauseable_mask %x\n", 1053 bp->dcbx_port_params.pfc.priority_non_pauseable_mask); 1054 1055 for (cos = 0 ; cos < bp->dcbx_port_params.ets.num_of_cos ; cos++) { 1056 DP(BNX2X_MSG_DCB, 1057 "pdev->params.dcbx_port_params.ets.cos_params[%d].pri_bitmask %x\n", 1058 cos, bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask); 1059 1060 DP(BNX2X_MSG_DCB, 1061 "pdev->params.dcbx_port_params.ets.cos_params[%d].bw_tbl %x\n", 1062 cos, bp->dcbx_port_params.ets.cos_params[cos].bw_tbl); 1063 1064 DP(BNX2X_MSG_DCB, 1065 "pdev->params.dcbx_port_params.ets.cos_params[%d].strict %x\n", 1066 cos, bp->dcbx_port_params.ets.cos_params[cos].strict); 1067 1068 DP(BNX2X_MSG_DCB, 1069 "pdev->params.dcbx_port_params.ets.cos_params[%d].pauseable %x\n", 1070 cos, bp->dcbx_port_params.ets.cos_params[cos].pauseable); 1071 } 1072 1073 for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) { 1074 DP(BNX2X_MSG_DCB, 1075 "pfc_fw_cfg->traffic_type_to_priority_cos[%d].priority %x\n", 1076 pri, pfc_fw_cfg->traffic_type_to_priority_cos[pri].priority); 1077 1078 DP(BNX2X_MSG_DCB, 1079 "pfc_fw_cfg->traffic_type_to_priority_cos[%d].cos %x\n", 1080 pri, pfc_fw_cfg->traffic_type_to_priority_cos[pri].cos); 1081 } 1082} 1083 1084/* fills help_data according to pg_info */ 1085static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp, 1086 u32 *pg_pri_orginal_spread, 1087 struct pg_help_data *help_data) 1088{ 1089 bool pg_found = false; 1090 u32 i, traf_type, add_traf_type, add_pg; 1091 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 1092 struct pg_entry_help_data *data = help_data->data; /*shortcut*/ 1093 1094 /* Set to invalid */ 1095 for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) 1096 data[i].pg = DCBX_ILLEGAL_PG; 1097 1098 for (add_traf_type = 0; 1099 add_traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX; add_traf_type++) { 1100 pg_found = false; 1101 if (ttp[add_traf_type] < MAX_PFC_PRIORITIES) { 1102 add_pg = (u8)pg_pri_orginal_spread[ttp[add_traf_type]]; 1103 for (traf_type = 0; 1104 traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX; 1105 traf_type++) { 1106 if (data[traf_type].pg == add_pg) { 1107 if (!(data[traf_type].pg_priority & 1108 (1 << ttp[add_traf_type]))) 1109 data[traf_type]. 1110 num_of_dif_pri++; 1111 data[traf_type].pg_priority |= 1112 (1 << ttp[add_traf_type]); 1113 pg_found = true; 1114 break; 1115 } 1116 } 1117 if (false == pg_found) { 1118 data[help_data->num_of_pg].pg = add_pg; 1119 data[help_data->num_of_pg].pg_priority = 1120 (1 << ttp[add_traf_type]); 1121 data[help_data->num_of_pg].num_of_dif_pri = 1; 1122 help_data->num_of_pg++; 1123 } 1124 } 1125 DP(BNX2X_MSG_DCB, 1126 "add_traf_type %d pg_found %s num_of_pg %d\n", 1127 add_traf_type, (false == pg_found) ? "NO" : "YES", 1128 help_data->num_of_pg); 1129 } 1130} 1131 1132static void bnx2x_dcbx_ets_disabled_entry_data(struct bnx2x *bp, 1133 struct cos_help_data *cos_data, 1134 u32 pri_join_mask) 1135{ 1136 /* Only one priority than only one COS */ 1137 cos_data->data[0].pausable = 1138 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask); 1139 cos_data->data[0].pri_join_mask = pri_join_mask; 1140 cos_data->data[0].cos_bw = 100; 1141 cos_data->num_of_cos = 1; 1142} 1143 1144static inline void bnx2x_dcbx_add_to_cos_bw(struct bnx2x *bp, 1145 struct cos_entry_help_data *data, 1146 u8 pg_bw) 1147{ 1148 if (data->cos_bw == DCBX_INVALID_COS_BW) 1149 data->cos_bw = pg_bw; 1150 else 1151 data->cos_bw += pg_bw; 1152} 1153 1154static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp, 1155 struct cos_help_data *cos_data, 1156 u32 *pg_pri_orginal_spread, 1157 struct dcbx_ets_feature *ets) 1158{ 1159 u32 pri_tested = 0; 1160 u8 i = 0; 1161 u8 entry = 0; 1162 u8 pg_entry = 0; 1163 u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX; 1164 1165 cos_data->data[0].pausable = true; 1166 cos_data->data[1].pausable = false; 1167 cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0; 1168 1169 for (i = 0 ; i < num_of_pri ; i++) { 1170 pri_tested = 1 << bp->dcbx_port_params. 1171 app.traffic_type_priority[i]; 1172 1173 if (pri_tested & DCBX_PFC_PRI_NON_PAUSE_MASK(bp)) { 1174 cos_data->data[1].pri_join_mask |= pri_tested; 1175 entry = 1; 1176 } else { 1177 cos_data->data[0].pri_join_mask |= pri_tested; 1178 entry = 0; 1179 } 1180 pg_entry = (u8)pg_pri_orginal_spread[bp->dcbx_port_params. 1181 app.traffic_type_priority[i]]; 1182 /* There can be only one strict pg */ 1183 if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES) 1184 bnx2x_dcbx_add_to_cos_bw(bp, &cos_data->data[entry], 1185 DCBX_PG_BW_GET(ets->pg_bw_tbl, pg_entry)); 1186 else 1187 /* If we join a group and one is strict 1188 * than the bw rules 1189 */ 1190 cos_data->data[entry].strict = 1191 BNX2X_DCBX_STRICT_COS_HIGHEST; 1192 } 1193 if ((0 == cos_data->data[0].pri_join_mask) && 1194 (0 == cos_data->data[1].pri_join_mask)) 1195 BNX2X_ERR("dcbx error: Both groups must have priorities\n"); 1196} 1197 1198#ifndef POWER_OF_2 1199#define POWER_OF_2(x) ((0 != x) && (0 == (x & (x-1)))) 1200#endif 1201 1202static void bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params(struct bnx2x *bp, 1203 struct pg_help_data *pg_help_data, 1204 struct cos_help_data *cos_data, 1205 u32 pri_join_mask, 1206 u8 num_of_dif_pri) 1207{ 1208 u8 i = 0; 1209 u32 pri_tested = 0; 1210 u32 pri_mask_without_pri = 0; 1211 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 1212 /*debug*/ 1213 if (num_of_dif_pri == 1) { 1214 bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data, pri_join_mask); 1215 return; 1216 } 1217 /* single priority group */ 1218 if (pg_help_data->data[0].pg < DCBX_MAX_NUM_PG_BW_ENTRIES) { 1219 /* If there are both pauseable and non-pauseable priorities, 1220 * the pauseable priorities go to the first queue and 1221 * the non-pauseable priorities go to the second queue. 1222 */ 1223 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) { 1224 /* Pauseable */ 1225 cos_data->data[0].pausable = true; 1226 /* Non pauseable.*/ 1227 cos_data->data[1].pausable = false; 1228 1229 if (2 == num_of_dif_pri) { 1230 cos_data->data[0].cos_bw = 50; 1231 cos_data->data[1].cos_bw = 50; 1232 } 1233 1234 if (3 == num_of_dif_pri) { 1235 if (POWER_OF_2(DCBX_PFC_PRI_GET_PAUSE(bp, 1236 pri_join_mask))) { 1237 cos_data->data[0].cos_bw = 33; 1238 cos_data->data[1].cos_bw = 67; 1239 } else { 1240 cos_data->data[0].cos_bw = 67; 1241 cos_data->data[1].cos_bw = 33; 1242 } 1243 } 1244 1245 } else if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask)) { 1246 /* If there are only pauseable priorities, 1247 * then one/two priorities go to the first queue 1248 * and one priority goes to the second queue. 1249 */ 1250 if (2 == num_of_dif_pri) { 1251 cos_data->data[0].cos_bw = 50; 1252 cos_data->data[1].cos_bw = 50; 1253 } else { 1254 cos_data->data[0].cos_bw = 67; 1255 cos_data->data[1].cos_bw = 33; 1256 } 1257 cos_data->data[1].pausable = true; 1258 cos_data->data[0].pausable = true; 1259 /* All priorities except FCOE */ 1260 cos_data->data[0].pri_join_mask = (pri_join_mask & 1261 ((u8)~(1 << ttp[LLFC_TRAFFIC_TYPE_FCOE]))); 1262 /* Only FCOE priority.*/ 1263 cos_data->data[1].pri_join_mask = 1264 (1 << ttp[LLFC_TRAFFIC_TYPE_FCOE]); 1265 } else 1266 /* If there are only non-pauseable priorities, 1267 * they will all go to the same queue. 1268 */ 1269 bnx2x_dcbx_ets_disabled_entry_data(bp, 1270 cos_data, pri_join_mask); 1271 } else { 1272 /* priority group which is not BW limited (PG#15):*/ 1273 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) { 1274 /* If there are both pauseable and non-pauseable 1275 * priorities, the pauseable priorities go to the first 1276 * queue and the non-pauseable priorities 1277 * go to the second queue. 1278 */ 1279 if (DCBX_PFC_PRI_GET_PAUSE(bp, pri_join_mask) > 1280 DCBX_PFC_PRI_GET_NON_PAUSE(bp, pri_join_mask)) { 1281 cos_data->data[0].strict = 1282 BNX2X_DCBX_STRICT_COS_HIGHEST; 1283 cos_data->data[1].strict = 1284 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI( 1285 BNX2X_DCBX_STRICT_COS_HIGHEST); 1286 } else { 1287 cos_data->data[0].strict = 1288 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI( 1289 BNX2X_DCBX_STRICT_COS_HIGHEST); 1290 cos_data->data[1].strict = 1291 BNX2X_DCBX_STRICT_COS_HIGHEST; 1292 } 1293 /* Pauseable */ 1294 cos_data->data[0].pausable = true; 1295 /* Non pause-able.*/ 1296 cos_data->data[1].pausable = false; 1297 } else { 1298 /* If there are only pauseable priorities or 1299 * only non-pauseable,* the lower priorities go 1300 * to the first queue and the higher priorities go 1301 * to the second queue. 1302 */ 1303 cos_data->data[0].pausable = 1304 cos_data->data[1].pausable = 1305 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask); 1306 1307 for (i = 0 ; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) { 1308 pri_tested = 1 << bp->dcbx_port_params. 1309 app.traffic_type_priority[i]; 1310 /* Remove priority tested */ 1311 pri_mask_without_pri = 1312 (pri_join_mask & ((u8)(~pri_tested))); 1313 if (pri_mask_without_pri < pri_tested) 1314 break; 1315 } 1316 1317 if (i == LLFC_DRIVER_TRAFFIC_TYPE_MAX) 1318 BNX2X_ERR("Invalid value for pri_join_mask - could not find a priority\n"); 1319 1320 cos_data->data[0].pri_join_mask = pri_mask_without_pri; 1321 cos_data->data[1].pri_join_mask = pri_tested; 1322 /* Both queues are strict priority, 1323 * and that with the highest priority 1324 * gets the highest strict priority in the arbiter. 1325 */ 1326 cos_data->data[0].strict = 1327 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI( 1328 BNX2X_DCBX_STRICT_COS_HIGHEST); 1329 cos_data->data[1].strict = 1330 BNX2X_DCBX_STRICT_COS_HIGHEST; 1331 } 1332 } 1333} 1334 1335static void bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params( 1336 struct bnx2x *bp, 1337 struct pg_help_data *pg_help_data, 1338 struct dcbx_ets_feature *ets, 1339 struct cos_help_data *cos_data, 1340 u32 *pg_pri_orginal_spread, 1341 u32 pri_join_mask, 1342 u8 num_of_dif_pri) 1343{ 1344 u8 i = 0; 1345 u8 pg[DCBX_COS_MAX_NUM_E2] = { 0 }; 1346 1347 /* If there are both pauseable and non-pauseable priorities, 1348 * the pauseable priorities go to the first queue and 1349 * the non-pauseable priorities go to the second queue. 1350 */ 1351 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) { 1352 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, 1353 pg_help_data->data[0].pg_priority) || 1354 IS_DCBX_PFC_PRI_MIX_PAUSE(bp, 1355 pg_help_data->data[1].pg_priority)) { 1356 /* If one PG contains both pauseable and 1357 * non-pauseable priorities then ETS is disabled. 1358 */ 1359 bnx2x_dcbx_separate_pauseable_from_non(bp, cos_data, 1360 pg_pri_orginal_spread, ets); 1361 bp->dcbx_port_params.ets.enabled = false; 1362 return; 1363 } 1364 1365 /* Pauseable */ 1366 cos_data->data[0].pausable = true; 1367 /* Non pauseable. */ 1368 cos_data->data[1].pausable = false; 1369 if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, 1370 pg_help_data->data[0].pg_priority)) { 1371 /* 0 is pauseable */ 1372 cos_data->data[0].pri_join_mask = 1373 pg_help_data->data[0].pg_priority; 1374 pg[0] = pg_help_data->data[0].pg; 1375 cos_data->data[1].pri_join_mask = 1376 pg_help_data->data[1].pg_priority; 1377 pg[1] = pg_help_data->data[1].pg; 1378 } else {/* 1 is pauseable */ 1379 cos_data->data[0].pri_join_mask = 1380 pg_help_data->data[1].pg_priority; 1381 pg[0] = pg_help_data->data[1].pg; 1382 cos_data->data[1].pri_join_mask = 1383 pg_help_data->data[0].pg_priority; 1384 pg[1] = pg_help_data->data[0].pg; 1385 } 1386 } else { 1387 /* If there are only pauseable priorities or 1388 * only non-pauseable, each PG goes to a queue. 1389 */ 1390 cos_data->data[0].pausable = cos_data->data[1].pausable = 1391 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask); 1392 cos_data->data[0].pri_join_mask = 1393 pg_help_data->data[0].pg_priority; 1394 pg[0] = pg_help_data->data[0].pg; 1395 cos_data->data[1].pri_join_mask = 1396 pg_help_data->data[1].pg_priority; 1397 pg[1] = pg_help_data->data[1].pg; 1398 } 1399 1400 /* There can be only one strict pg */ 1401 for (i = 0 ; i < ARRAY_SIZE(pg); i++) { 1402 if (pg[i] < DCBX_MAX_NUM_PG_BW_ENTRIES) 1403 cos_data->data[i].cos_bw = 1404 DCBX_PG_BW_GET(ets->pg_bw_tbl, pg[i]); 1405 else 1406 cos_data->data[i].strict = 1407 BNX2X_DCBX_STRICT_COS_HIGHEST; 1408 } 1409} 1410 1411static int bnx2x_dcbx_join_pgs( 1412 struct bnx2x *bp, 1413 struct dcbx_ets_feature *ets, 1414 struct pg_help_data *pg_help_data, 1415 u8 required_num_of_pg) 1416{ 1417 u8 entry_joined = pg_help_data->num_of_pg - 1; 1418 u8 entry_removed = entry_joined + 1; 1419 u8 pg_joined = 0; 1420 1421 if (required_num_of_pg == 0 || ARRAY_SIZE(pg_help_data->data) 1422 <= pg_help_data->num_of_pg) { 1423 1424 BNX2X_ERR("required_num_of_pg can't be zero\n"); 1425 return -EINVAL; 1426 } 1427 1428 while (required_num_of_pg < pg_help_data->num_of_pg) { 1429 entry_joined = pg_help_data->num_of_pg - 2; 1430 entry_removed = entry_joined + 1; 1431 /* protect index */ 1432 entry_removed %= ARRAY_SIZE(pg_help_data->data); 1433 1434 pg_help_data->data[entry_joined].pg_priority |= 1435 pg_help_data->data[entry_removed].pg_priority; 1436 1437 pg_help_data->data[entry_joined].num_of_dif_pri += 1438 pg_help_data->data[entry_removed].num_of_dif_pri; 1439 1440 if (pg_help_data->data[entry_joined].pg == DCBX_STRICT_PRI_PG || 1441 pg_help_data->data[entry_removed].pg == DCBX_STRICT_PRI_PG) 1442 /* Entries joined strict priority rules */ 1443 pg_help_data->data[entry_joined].pg = 1444 DCBX_STRICT_PRI_PG; 1445 else { 1446 /* Entries can be joined join BW */ 1447 pg_joined = DCBX_PG_BW_GET(ets->pg_bw_tbl, 1448 pg_help_data->data[entry_joined].pg) + 1449 DCBX_PG_BW_GET(ets->pg_bw_tbl, 1450 pg_help_data->data[entry_removed].pg); 1451 1452 DCBX_PG_BW_SET(ets->pg_bw_tbl, 1453 pg_help_data->data[entry_joined].pg, pg_joined); 1454 } 1455 /* Joined the entries */ 1456 pg_help_data->num_of_pg--; 1457 } 1458 1459 return 0; 1460} 1461 1462static void bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params( 1463 struct bnx2x *bp, 1464 struct pg_help_data *pg_help_data, 1465 struct dcbx_ets_feature *ets, 1466 struct cos_help_data *cos_data, 1467 u32 *pg_pri_orginal_spread, 1468 u32 pri_join_mask, 1469 u8 num_of_dif_pri) 1470{ 1471 u8 i = 0; 1472 u32 pri_tested = 0; 1473 u8 entry = 0; 1474 u8 pg_entry = 0; 1475 bool b_found_strict = false; 1476 u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX; 1477 1478 cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0; 1479 /* If there are both pauseable and non-pauseable priorities, 1480 * the pauseable priorities go to the first queue and the 1481 * non-pauseable priorities go to the second queue. 1482 */ 1483 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) 1484 bnx2x_dcbx_separate_pauseable_from_non(bp, 1485 cos_data, pg_pri_orginal_spread, ets); 1486 else { 1487 /* If two BW-limited PG-s were combined to one queue, 1488 * the BW is their sum. 1489 * 1490 * If there are only pauseable priorities or only non-pauseable, 1491 * and there are both BW-limited and non-BW-limited PG-s, 1492 * the BW-limited PG/s go to one queue and the non-BW-limited 1493 * PG/s go to the second queue. 1494 * 1495 * If there are only pauseable priorities or only non-pauseable 1496 * and all are BW limited, then two priorities go to the first 1497 * queue and one priority goes to the second queue. 1498 * 1499 * We will join this two cases: 1500 * if one is BW limited it will go to the second queue 1501 * otherwise the last priority will get it 1502 */ 1503 1504 cos_data->data[0].pausable = cos_data->data[1].pausable = 1505 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask); 1506 1507 for (i = 0 ; i < num_of_pri; i++) { 1508 pri_tested = 1 << bp->dcbx_port_params. 1509 app.traffic_type_priority[i]; 1510 pg_entry = (u8)pg_pri_orginal_spread[bp-> 1511 dcbx_port_params.app.traffic_type_priority[i]]; 1512 1513 if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES) { 1514 entry = 0; 1515 1516 if (i == (num_of_pri-1) && 1517 false == b_found_strict) 1518 /* last entry will be handled separately 1519 * If no priority is strict than last 1520 * entry goes to last queue. 1521 */ 1522 entry = 1; 1523 cos_data->data[entry].pri_join_mask |= 1524 pri_tested; 1525 bnx2x_dcbx_add_to_cos_bw(bp, 1526 &cos_data->data[entry], 1527 DCBX_PG_BW_GET(ets->pg_bw_tbl, 1528 pg_entry)); 1529 } else { 1530 b_found_strict = true; 1531 cos_data->data[1].pri_join_mask |= pri_tested; 1532 /* If we join a group and one is strict 1533 * than the bw rules 1534 */ 1535 cos_data->data[1].strict = 1536 BNX2X_DCBX_STRICT_COS_HIGHEST; 1537 } 1538 } 1539 } 1540} 1541 1542static void bnx2x_dcbx_2cos_limit_cee_fill_cos_params(struct bnx2x *bp, 1543 struct pg_help_data *help_data, 1544 struct dcbx_ets_feature *ets, 1545 struct cos_help_data *cos_data, 1546 u32 *pg_pri_orginal_spread, 1547 u32 pri_join_mask, 1548 u8 num_of_dif_pri) 1549{ 1550 /* default E2 settings */ 1551 cos_data->num_of_cos = DCBX_COS_MAX_NUM_E2; 1552 1553 switch (help_data->num_of_pg) { 1554 case 1: 1555 bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params( 1556 bp, 1557 help_data, 1558 cos_data, 1559 pri_join_mask, 1560 num_of_dif_pri); 1561 break; 1562 case 2: 1563 bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params( 1564 bp, 1565 help_data, 1566 ets, 1567 cos_data, 1568 pg_pri_orginal_spread, 1569 pri_join_mask, 1570 num_of_dif_pri); 1571 break; 1572 1573 case 3: 1574 bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params( 1575 bp, 1576 help_data, 1577 ets, 1578 cos_data, 1579 pg_pri_orginal_spread, 1580 pri_join_mask, 1581 num_of_dif_pri); 1582 break; 1583 default: 1584 BNX2X_ERR("Wrong pg_help_data.num_of_pg\n"); 1585 bnx2x_dcbx_ets_disabled_entry_data(bp, 1586 cos_data, pri_join_mask); 1587 } 1588} 1589 1590static int bnx2x_dcbx_spread_strict_pri(struct bnx2x *bp, 1591 struct cos_help_data *cos_data, 1592 u8 entry, 1593 u8 num_spread_of_entries, 1594 u8 strict_app_pris) 1595{ 1596 u8 strict_pri = BNX2X_DCBX_STRICT_COS_HIGHEST; 1597 u8 num_of_app_pri = MAX_PFC_PRIORITIES; 1598 u8 app_pri_bit = 0; 1599 1600 while (num_spread_of_entries && num_of_app_pri > 0) { 1601 app_pri_bit = 1 << (num_of_app_pri - 1); 1602 if (app_pri_bit & strict_app_pris) { 1603 struct cos_entry_help_data *data = &cos_data-> 1604 data[entry]; 1605 num_spread_of_entries--; 1606 if (num_spread_of_entries == 0) { 1607 /* last entry needed put all the entries left */ 1608 data->cos_bw = DCBX_INVALID_COS_BW; 1609 data->strict = strict_pri; 1610 data->pri_join_mask = strict_app_pris; 1611 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp, 1612 data->pri_join_mask); 1613 } else { 1614 strict_app_pris &= ~app_pri_bit; 1615 1616 data->cos_bw = DCBX_INVALID_COS_BW; 1617 data->strict = strict_pri; 1618 data->pri_join_mask = app_pri_bit; 1619 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp, 1620 data->pri_join_mask); 1621 } 1622 1623 strict_pri = 1624 BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(strict_pri); 1625 entry++; 1626 } 1627 1628 num_of_app_pri--; 1629 } 1630 1631 if (num_spread_of_entries) { 1632 BNX2X_ERR("Didn't succeed to spread strict priorities\n"); 1633 return -EINVAL; 1634 } 1635 1636 return 0; 1637} 1638 1639static u8 bnx2x_dcbx_cee_fill_strict_pri(struct bnx2x *bp, 1640 struct cos_help_data *cos_data, 1641 u8 entry, 1642 u8 num_spread_of_entries, 1643 u8 strict_app_pris) 1644{ 1645 if (bnx2x_dcbx_spread_strict_pri(bp, cos_data, entry, 1646 num_spread_of_entries, 1647 strict_app_pris)) { 1648 struct cos_entry_help_data *data = &cos_data-> 1649 data[entry]; 1650 /* Fill BW entry */ 1651 data->cos_bw = DCBX_INVALID_COS_BW; 1652 data->strict = BNX2X_DCBX_STRICT_COS_HIGHEST; 1653 data->pri_join_mask = strict_app_pris; 1654 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp, 1655 data->pri_join_mask); 1656 return 1; 1657 } 1658 1659 return num_spread_of_entries; 1660} 1661 1662static void bnx2x_dcbx_cee_fill_cos_params(struct bnx2x *bp, 1663 struct pg_help_data *help_data, 1664 struct dcbx_ets_feature *ets, 1665 struct cos_help_data *cos_data, 1666 u32 pri_join_mask) 1667 1668{ 1669 u8 need_num_of_entries = 0; 1670 u8 i = 0; 1671 u8 entry = 0; 1672 1673 /* 1674 * if the number of requested PG-s in CEE is greater than 3 1675 * then the results are not determined since this is a violation 1676 * of the standard. 1677 */ 1678 if (help_data->num_of_pg > DCBX_COS_MAX_NUM_E3B0) { 1679 if (bnx2x_dcbx_join_pgs(bp, ets, help_data, 1680 DCBX_COS_MAX_NUM_E3B0)) { 1681 BNX2X_ERR("Unable to reduce the number of PGs - we will disables ETS\n"); 1682 bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data, 1683 pri_join_mask); 1684 return; 1685 } 1686 } 1687 1688 for (i = 0 ; i < help_data->num_of_pg; i++) { 1689 struct pg_entry_help_data *pg = &help_data->data[i]; 1690 if (pg->pg < DCBX_MAX_NUM_PG_BW_ENTRIES) { 1691 struct cos_entry_help_data *data = &cos_data-> 1692 data[entry]; 1693 /* Fill BW entry */ 1694 data->cos_bw = DCBX_PG_BW_GET(ets->pg_bw_tbl, pg->pg); 1695 data->strict = BNX2X_DCBX_STRICT_INVALID; 1696 data->pri_join_mask = pg->pg_priority; 1697 data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp, 1698 data->pri_join_mask); 1699 1700 entry++; 1701 } else { 1702 need_num_of_entries = min_t(u8, 1703 (u8)pg->num_of_dif_pri, 1704 (u8)DCBX_COS_MAX_NUM_E3B0 - 1705 help_data->num_of_pg + 1); 1706 /* 1707 * If there are still VOQ-s which have no associated PG, 1708 * then associate these VOQ-s to PG15. These PG-s will 1709 * be used for SP between priorities on PG15. 1710 */ 1711 entry += bnx2x_dcbx_cee_fill_strict_pri(bp, cos_data, 1712 entry, need_num_of_entries, pg->pg_priority); 1713 } 1714 } 1715 1716 /* the entry will represent the number of COSes used */ 1717 cos_data->num_of_cos = entry; 1718} 1719static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp, 1720 struct pg_help_data *help_data, 1721 struct dcbx_ets_feature *ets, 1722 u32 *pg_pri_orginal_spread) 1723{ 1724 struct cos_help_data cos_data; 1725 u8 i = 0; 1726 u32 pri_join_mask = 0; 1727 u8 num_of_dif_pri = 0; 1728 1729 memset(&cos_data, 0, sizeof(cos_data)); 1730 1731 /* Validate the pg value */ 1732 for (i = 0; i < help_data->num_of_pg ; i++) { 1733 if (DCBX_STRICT_PRIORITY != help_data->data[i].pg && 1734 DCBX_MAX_NUM_PG_BW_ENTRIES <= help_data->data[i].pg) 1735 BNX2X_ERR("Invalid pg[%d] data %x\n", i, 1736 help_data->data[i].pg); 1737 pri_join_mask |= help_data->data[i].pg_priority; 1738 num_of_dif_pri += help_data->data[i].num_of_dif_pri; 1739 } 1740 1741 /* defaults */ 1742 cos_data.num_of_cos = 1; 1743 for (i = 0; i < ARRAY_SIZE(cos_data.data); i++) { 1744 cos_data.data[i].pri_join_mask = 0; 1745 cos_data.data[i].pausable = false; 1746 cos_data.data[i].strict = BNX2X_DCBX_STRICT_INVALID; 1747 cos_data.data[i].cos_bw = DCBX_INVALID_COS_BW; 1748 } 1749 1750 if (CHIP_IS_E3B0(bp)) 1751 bnx2x_dcbx_cee_fill_cos_params(bp, help_data, ets, 1752 &cos_data, pri_join_mask); 1753 else /* E2 + E3A0 */ 1754 bnx2x_dcbx_2cos_limit_cee_fill_cos_params(bp, 1755 help_data, ets, 1756 &cos_data, 1757 pg_pri_orginal_spread, 1758 pri_join_mask, 1759 num_of_dif_pri); 1760 1761 for (i = 0; i < cos_data.num_of_cos ; i++) { 1762 struct bnx2x_dcbx_cos_params *p = 1763 &bp->dcbx_port_params.ets.cos_params[i]; 1764 1765 p->strict = cos_data.data[i].strict; 1766 p->bw_tbl = cos_data.data[i].cos_bw; 1767 p->pri_bitmask = cos_data.data[i].pri_join_mask; 1768 p->pauseable = cos_data.data[i].pausable; 1769 1770 /* sanity */ 1771 if (p->bw_tbl != DCBX_INVALID_COS_BW || 1772 p->strict != BNX2X_DCBX_STRICT_INVALID) { 1773 if (p->pri_bitmask == 0) 1774 BNX2X_ERR("Invalid pri_bitmask for %d\n", i); 1775 1776 if (CHIP_IS_E2(bp) || CHIP_IS_E3A0(bp)) { 1777 1778 if (p->pauseable && 1779 DCBX_PFC_PRI_GET_NON_PAUSE(bp, 1780 p->pri_bitmask) != 0) 1781 BNX2X_ERR("Inconsistent config for pausable COS %d\n", 1782 i); 1783 1784 if (!p->pauseable && 1785 DCBX_PFC_PRI_GET_PAUSE(bp, 1786 p->pri_bitmask) != 0) 1787 BNX2X_ERR("Inconsistent config for nonpausable COS %d\n", 1788 i); 1789 } 1790 } 1791 1792 if (p->pauseable) 1793 DP(BNX2X_MSG_DCB, "COS %d PAUSABLE prijoinmask 0x%x\n", 1794 i, cos_data.data[i].pri_join_mask); 1795 else 1796 DP(BNX2X_MSG_DCB, 1797 "COS %d NONPAUSABLE prijoinmask 0x%x\n", 1798 i, cos_data.data[i].pri_join_mask); 1799 } 1800 1801 bp->dcbx_port_params.ets.num_of_cos = cos_data.num_of_cos ; 1802} 1803 1804static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp, 1805 u32 *set_configuration_ets_pg, 1806 u32 *pri_pg_tbl) 1807{ 1808 int i; 1809 1810 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) { 1811 set_configuration_ets_pg[i] = DCBX_PRI_PG_GET(pri_pg_tbl, i); 1812 1813 DP(BNX2X_MSG_DCB, "set_configuration_ets_pg[%d] = 0x%x\n", 1814 i, set_configuration_ets_pg[i]); 1815 } 1816} 1817 1818static void bnx2x_dcbx_fw_struct(struct bnx2x *bp, 1819 struct bnx2x_func_tx_start_params *pfc_fw_cfg) 1820{ 1821 u16 pri_bit = 0; 1822 u8 cos = 0, pri = 0; 1823 struct priority_cos *tt2cos; 1824 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; 1825 int mfw_configured = SHMEM2_HAS(bp, drv_flags) && 1826 GET_FLAGS(SHMEM2_RD(bp, drv_flags), 1827 1 << DRV_FLAGS_DCB_MFW_CONFIGURED); 1828 1829 memset(pfc_fw_cfg, 0, sizeof(*pfc_fw_cfg)); 1830 1831 /* to disable DCB - the structure must be zeroed */ 1832 if ((bp->dcbx_error & DCBX_REMOTE_MIB_ERROR) && !mfw_configured) 1833 return; 1834 1835 /*shortcut*/ 1836 tt2cos = pfc_fw_cfg->traffic_type_to_priority_cos; 1837 1838 /* Fw version should be incremented each update */ 1839 pfc_fw_cfg->dcb_version = ++bp->dcb_version; 1840 pfc_fw_cfg->dcb_enabled = 1; 1841 1842 /* Fill priority parameters */ 1843 for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) { 1844 tt2cos[pri].priority = ttp[pri]; 1845 pri_bit = 1 << tt2cos[pri].priority; 1846 1847 /* Fill COS parameters based on COS calculated to 1848 * make it more general for future use */ 1849 for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++) 1850 if (bp->dcbx_port_params.ets.cos_params[cos]. 1851 pri_bitmask & pri_bit) 1852 tt2cos[pri].cos = cos; 1853 } 1854 1855 /* we never want the FW to add a 0 vlan tag */ 1856 pfc_fw_cfg->dont_add_pri_0_en = 1; 1857 1858 bnx2x_dcbx_print_cos_params(bp, pfc_fw_cfg); 1859} 1860 1861void bnx2x_dcbx_pmf_update(struct bnx2x *bp) 1862{ 1863 /* if we need to synchronize DCBX result from prev PMF 1864 * read it from shmem and update bp and netdev accordingly 1865 */ 1866 if (SHMEM2_HAS(bp, drv_flags) && 1867 GET_FLAGS(SHMEM2_RD(bp, drv_flags), 1 << DRV_FLAGS_DCB_CONFIGURED)) { 1868 /* Read neg results if dcbx is in the FW */ 1869 if (bnx2x_dcbx_read_shmem_neg_results(bp)) 1870 return; 1871 1872 bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat, 1873 bp->dcbx_error); 1874 bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat, 1875 bp->dcbx_error); 1876#ifdef BCM_DCBNL 1877 /* 1878 * Add new app tlvs to dcbnl 1879 */ 1880 bnx2x_dcbnl_update_applist(bp, false); 1881 /* 1882 * Send a notification for the new negotiated parameters 1883 */ 1884 dcbnl_cee_notify(bp->dev, RTM_GETDCB, DCB_CMD_CEE_GET, 0, 0); 1885#endif 1886 /* 1887 * reconfigure the netdevice with the results of the new 1888 * dcbx negotiation. 1889 */ 1890 bnx2x_dcbx_update_tc_mapping(bp); 1891 } 1892} 1893 1894/* DCB netlink */ 1895#ifdef BCM_DCBNL 1896 1897#define BNX2X_DCBX_CAPS (DCB_CAP_DCBX_LLD_MANAGED | \ 1898 DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_STATIC) 1899 1900static inline bool bnx2x_dcbnl_set_valid(struct bnx2x *bp) 1901{ 1902 /* validate dcbnl call that may change HW state: 1903 * DCB is on and DCBX mode was SUCCESSFULLY set by the user. 1904 */ 1905 return bp->dcb_state && bp->dcbx_mode_uset; 1906} 1907 1908static u8 bnx2x_dcbnl_get_state(struct net_device *netdev) 1909{ 1910 struct bnx2x *bp = netdev_priv(netdev); 1911 DP(BNX2X_MSG_DCB, "state = %d\n", bp->dcb_state); 1912 return bp->dcb_state; 1913} 1914 1915static u8 bnx2x_dcbnl_set_state(struct net_device *netdev, u8 state) 1916{ 1917 struct bnx2x *bp = netdev_priv(netdev); 1918 DP(BNX2X_MSG_DCB, "state = %s\n", state ? "on" : "off"); 1919 1920 /* Fail to set state to "enabled" if dcbx is disabled in nvram */ 1921 if (state && ((bp->dcbx_enabled == BNX2X_DCBX_ENABLED_OFF) || 1922 (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_INVALID))) { 1923 DP(BNX2X_MSG_DCB, "Can not set dcbx to enabled while it is disabled in nvm\n"); 1924 return 1; 1925 } 1926 1927 bnx2x_dcbx_set_state(bp, (state ? true : false), bp->dcbx_enabled); 1928 return 0; 1929} 1930 1931static void bnx2x_dcbnl_get_perm_hw_addr(struct net_device *netdev, 1932 u8 *perm_addr) 1933{ 1934 struct bnx2x *bp = netdev_priv(netdev); 1935 DP(BNX2X_MSG_DCB, "GET-PERM-ADDR\n"); 1936 1937 /* first the HW mac address */ 1938 memcpy(perm_addr, netdev->dev_addr, netdev->addr_len); 1939 1940 if (CNIC_LOADED(bp)) 1941 /* second SAN address */ 1942 memcpy(perm_addr+netdev->addr_len, bp->fip_mac, 1943 netdev->addr_len); 1944} 1945 1946static void bnx2x_dcbnl_set_pg_tccfg_tx(struct net_device *netdev, int prio, 1947 u8 prio_type, u8 pgid, u8 bw_pct, 1948 u8 up_map) 1949{ 1950 struct bnx2x *bp = netdev_priv(netdev); 1951 1952 DP(BNX2X_MSG_DCB, "prio[%d] = %d\n", prio, pgid); 1953 if (!bnx2x_dcbnl_set_valid(bp) || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES) 1954 return; 1955 1956 /** 1957 * bw_pct ignored - band-width percentage devision between user 1958 * priorities within the same group is not 1959 * standard and hence not supported 1960 * 1961 * prio_type ignored - priority levels within the same group are not 1962 * standard and hence are not supported. According 1963 * to the standard pgid 15 is dedicated to strict 1964 * priority traffic (on the port level). 1965 * 1966 * up_map ignored 1967 */ 1968 1969 bp->dcbx_config_params.admin_configuration_ets_pg[prio] = pgid; 1970 bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1; 1971} 1972 1973static void bnx2x_dcbnl_set_pg_bwgcfg_tx(struct net_device *netdev, 1974 int pgid, u8 bw_pct) 1975{ 1976 struct bnx2x *bp = netdev_priv(netdev); 1977 DP(BNX2X_MSG_DCB, "pgid[%d] = %d\n", pgid, bw_pct); 1978 1979 if (!bnx2x_dcbnl_set_valid(bp) || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES) 1980 return; 1981 1982 bp->dcbx_config_params.admin_configuration_bw_precentage[pgid] = bw_pct; 1983 bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1; 1984} 1985 1986static void bnx2x_dcbnl_set_pg_tccfg_rx(struct net_device *netdev, int prio, 1987 u8 prio_type, u8 pgid, u8 bw_pct, 1988 u8 up_map) 1989{ 1990 struct bnx2x *bp = netdev_priv(netdev); 1991 DP(BNX2X_MSG_DCB, "Nothing to set; No RX support\n"); 1992} 1993 1994static void bnx2x_dcbnl_set_pg_bwgcfg_rx(struct net_device *netdev, 1995 int pgid, u8 bw_pct) 1996{ 1997 struct bnx2x *bp = netdev_priv(netdev); 1998 DP(BNX2X_MSG_DCB, "Nothing to set; No RX support\n"); 1999} 2000 2001static void bnx2x_dcbnl_get_pg_tccfg_tx(struct net_device *netdev, int prio, 2002 u8 *prio_type, u8 *pgid, u8 *bw_pct, 2003 u8 *up_map) 2004{ 2005 struct bnx2x *bp = netdev_priv(netdev); 2006 DP(BNX2X_MSG_DCB, "prio = %d\n", prio); 2007 2008 /** 2009 * bw_pct ignored - band-width percentage devision between user 2010 * priorities within the same group is not 2011 * standard and hence not supported 2012 * 2013 * prio_type ignored - priority levels within the same group are not 2014 * standard and hence are not supported. According 2015 * to the standard pgid 15 is dedicated to strict 2016 * priority traffic (on the port level). 2017 * 2018 * up_map ignored 2019 */ 2020 *up_map = *bw_pct = *prio_type = *pgid = 0; 2021 2022 if (!bp->dcb_state || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES) 2023 return; 2024 2025 *pgid = DCBX_PRI_PG_GET(bp->dcbx_local_feat.ets.pri_pg_tbl, prio); 2026} 2027 2028static void bnx2x_dcbnl_get_pg_bwgcfg_tx(struct net_device *netdev, 2029 int pgid, u8 *bw_pct) 2030{ 2031 struct bnx2x *bp = netdev_priv(netdev); 2032 DP(BNX2X_MSG_DCB, "pgid = %d\n", pgid); 2033 2034 *bw_pct = 0; 2035 2036 if (!bp->dcb_state || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES) 2037 return; 2038 2039 *bw_pct = DCBX_PG_BW_GET(bp->dcbx_local_feat.ets.pg_bw_tbl, pgid); 2040} 2041 2042static void bnx2x_dcbnl_get_pg_tccfg_rx(struct net_device *netdev, int prio, 2043 u8 *prio_type, u8 *pgid, u8 *bw_pct, 2044 u8 *up_map) 2045{ 2046 struct bnx2x *bp = netdev_priv(netdev); 2047 DP(BNX2X_MSG_DCB, "Nothing to get; No RX support\n"); 2048 2049 *prio_type = *pgid = *bw_pct = *up_map = 0; 2050} 2051 2052static void bnx2x_dcbnl_get_pg_bwgcfg_rx(struct net_device *netdev, 2053 int pgid, u8 *bw_pct) 2054{ 2055 struct bnx2x *bp = netdev_priv(netdev); 2056 DP(BNX2X_MSG_DCB, "Nothing to get; No RX support\n"); 2057 2058 *bw_pct = 0; 2059} 2060 2061static void bnx2x_dcbnl_set_pfc_cfg(struct net_device *netdev, int prio, 2062 u8 setting) 2063{ 2064 struct bnx2x *bp = netdev_priv(netdev); 2065 DP(BNX2X_MSG_DCB, "prio[%d] = %d\n", prio, setting); 2066 2067 if (!bnx2x_dcbnl_set_valid(bp) || prio >= MAX_PFC_PRIORITIES) 2068 return; 2069 2070 if (setting) { 2071 bp->dcbx_config_params.admin_pfc_bitmap |= (1 << prio); 2072 bp->dcbx_config_params.admin_pfc_tx_enable = 1; 2073 } else { 2074 bp->dcbx_config_params.admin_pfc_bitmap &= ~(1 << prio); 2075 } 2076} 2077 2078static void bnx2x_dcbnl_get_pfc_cfg(struct net_device *netdev, int prio, 2079 u8 *setting) 2080{ 2081 struct bnx2x *bp = netdev_priv(netdev); 2082 DP(BNX2X_MSG_DCB, "prio = %d\n", prio); 2083 2084 *setting = 0; 2085 2086 if (!bp->dcb_state || prio >= MAX_PFC_PRIORITIES) 2087 return; 2088 2089 *setting = (bp->dcbx_local_feat.pfc.pri_en_bitmap >> prio) & 0x1; 2090} 2091 2092static u8 bnx2x_dcbnl_set_all(struct net_device *netdev) 2093{ 2094 struct bnx2x *bp = netdev_priv(netdev); 2095 2096 DP(BNX2X_MSG_DCB, "SET-ALL\n"); 2097 2098 if (!bnx2x_dcbnl_set_valid(bp)) 2099 return 1; 2100 2101 if (bp->recovery_state != BNX2X_RECOVERY_DONE) { 2102 netdev_err(bp->dev, 2103 "Handling parity error recovery. Try again later\n"); 2104 return 1; 2105 } 2106 if (netif_running(bp->dev)) { 2107 bnx2x_update_drv_flags(bp, 2108 1 << DRV_FLAGS_DCB_MFW_CONFIGURED, 2109 1); 2110 bnx2x_dcbx_init(bp, true); 2111 } 2112 DP(BNX2X_MSG_DCB, "set_dcbx_params done\n"); 2113 2114 return 0; 2115} 2116 2117static u8 bnx2x_dcbnl_get_cap(struct net_device *netdev, int capid, u8 *cap) 2118{ 2119 struct bnx2x *bp = netdev_priv(netdev); 2120 u8 rval = 0; 2121 2122 if (bp->dcb_state) { 2123 switch (capid) { 2124 case DCB_CAP_ATTR_PG: 2125 *cap = true; 2126 break; 2127 case DCB_CAP_ATTR_PFC: 2128 *cap = true; 2129 break; 2130 case DCB_CAP_ATTR_UP2TC: 2131 *cap = false; 2132 break; 2133 case DCB_CAP_ATTR_PG_TCS: 2134 *cap = 0x80; /* 8 priorities for PGs */ 2135 break; 2136 case DCB_CAP_ATTR_PFC_TCS: 2137 *cap = 0x80; /* 8 priorities for PFC */ 2138 break; 2139 case DCB_CAP_ATTR_GSP: 2140 *cap = true; 2141 break; 2142 case DCB_CAP_ATTR_BCN: 2143 *cap = false; 2144 break; 2145 case DCB_CAP_ATTR_DCBX: 2146 *cap = BNX2X_DCBX_CAPS; 2147 break; 2148 default: 2149 BNX2X_ERR("Non valid capability ID\n"); 2150 rval = 1; 2151 break; 2152 } 2153 } else { 2154 DP(BNX2X_MSG_DCB, "DCB disabled\n"); 2155 rval = 1; 2156 } 2157 2158 DP(BNX2X_MSG_DCB, "capid %d:%x\n", capid, *cap); 2159 return rval; 2160} 2161 2162static int bnx2x_dcbnl_get_numtcs(struct net_device *netdev, int tcid, u8 *num) 2163{ 2164 struct bnx2x *bp = netdev_priv(netdev); 2165 u8 rval = 0; 2166 2167 DP(BNX2X_MSG_DCB, "tcid %d\n", tcid); 2168 2169 if (bp->dcb_state) { 2170 switch (tcid) { 2171 case DCB_NUMTCS_ATTR_PG: 2172 *num = CHIP_IS_E3B0(bp) ? DCBX_COS_MAX_NUM_E3B0 : 2173 DCBX_COS_MAX_NUM_E2; 2174 break; 2175 case DCB_NUMTCS_ATTR_PFC: 2176 *num = CHIP_IS_E3B0(bp) ? DCBX_COS_MAX_NUM_E3B0 : 2177 DCBX_COS_MAX_NUM_E2; 2178 break; 2179 default: 2180 BNX2X_ERR("Non valid TC-ID\n"); 2181 rval = 1; 2182 break; 2183 } 2184 } else { 2185 DP(BNX2X_MSG_DCB, "DCB disabled\n"); 2186 rval = 1; 2187 } 2188 2189 return rval; 2190} 2191 2192static int bnx2x_dcbnl_set_numtcs(struct net_device *netdev, int tcid, u8 num) 2193{ 2194 struct bnx2x *bp = netdev_priv(netdev); 2195 DP(BNX2X_MSG_DCB, "num tcs = %d; Not supported\n", num); 2196 return -EINVAL; 2197} 2198 2199static u8 bnx2x_dcbnl_get_pfc_state(struct net_device *netdev) 2200{ 2201 struct bnx2x *bp = netdev_priv(netdev); 2202 DP(BNX2X_MSG_DCB, "state = %d\n", bp->dcbx_local_feat.pfc.enabled); 2203 2204 if (!bp->dcb_state) 2205 return 0; 2206 2207 return bp->dcbx_local_feat.pfc.enabled; 2208} 2209 2210static void bnx2x_dcbnl_set_pfc_state(struct net_device *netdev, u8 state) 2211{ 2212 struct bnx2x *bp = netdev_priv(netdev); 2213 DP(BNX2X_MSG_DCB, "state = %s\n", state ? "on" : "off"); 2214 2215 if (!bnx2x_dcbnl_set_valid(bp)) 2216 return; 2217 2218 bp->dcbx_config_params.admin_pfc_tx_enable = 2219 bp->dcbx_config_params.admin_pfc_enable = (state ? 1 : 0); 2220} 2221 2222static void bnx2x_admin_app_set_ent( 2223 struct bnx2x_admin_priority_app_table *app_ent, 2224 u8 idtype, u16 idval, u8 up) 2225{ 2226 app_ent->valid = 1; 2227 2228 switch (idtype) { 2229 case DCB_APP_IDTYPE_ETHTYPE: 2230 app_ent->traffic_type = TRAFFIC_TYPE_ETH; 2231 break; 2232 case DCB_APP_IDTYPE_PORTNUM: 2233 app_ent->traffic_type = TRAFFIC_TYPE_PORT; 2234 break; 2235 default: 2236 break; /* never gets here */ 2237 } 2238 app_ent->app_id = idval; 2239 app_ent->priority = up; 2240} 2241 2242static bool bnx2x_admin_app_is_equal( 2243 struct bnx2x_admin_priority_app_table *app_ent, 2244 u8 idtype, u16 idval) 2245{ 2246 if (!app_ent->valid) 2247 return false; 2248 2249 switch (idtype) { 2250 case DCB_APP_IDTYPE_ETHTYPE: 2251 if (app_ent->traffic_type != TRAFFIC_TYPE_ETH) 2252 return false; 2253 break; 2254 case DCB_APP_IDTYPE_PORTNUM: 2255 if (app_ent->traffic_type != TRAFFIC_TYPE_PORT) 2256 return false; 2257 break; 2258 default: 2259 return false; 2260 } 2261 if (app_ent->app_id != idval) 2262 return false; 2263 2264 return true; 2265} 2266 2267static int bnx2x_set_admin_app_up(struct bnx2x *bp, u8 idtype, u16 idval, u8 up) 2268{ 2269 int i, ff; 2270 2271 /* iterate over the app entries looking for idtype and idval */ 2272 for (i = 0, ff = -1; i < DCBX_CONFIG_MAX_APP_PROTOCOL; i++) { 2273 struct bnx2x_admin_priority_app_table *app_ent = 2274 &bp->dcbx_config_params.admin_priority_app_table[i]; 2275 if (bnx2x_admin_app_is_equal(app_ent, idtype, idval)) 2276 break; 2277 2278 if (ff < 0 && !app_ent->valid) 2279 ff = i; 2280 } 2281 if (i < DCBX_CONFIG_MAX_APP_PROTOCOL) 2282 /* if found overwrite up */ 2283 bp->dcbx_config_params. 2284 admin_priority_app_table[i].priority = up; 2285 else if (ff >= 0) 2286 /* not found use first-free */ 2287 bnx2x_admin_app_set_ent( 2288 &bp->dcbx_config_params.admin_priority_app_table[ff], 2289 idtype, idval, up); 2290 else { 2291 /* app table is full */ 2292 BNX2X_ERR("Application table is too large\n"); 2293 return -EBUSY; 2294 } 2295 2296 /* up configured, if not 0 make sure feature is enabled */ 2297 if (up) 2298 bp->dcbx_config_params.admin_application_priority_tx_enable = 1; 2299 2300 return 0; 2301} 2302 2303static int bnx2x_dcbnl_set_app_up(struct net_device *netdev, u8 idtype, 2304 u16 idval, u8 up) 2305{ 2306 struct bnx2x *bp = netdev_priv(netdev); 2307 2308 DP(BNX2X_MSG_DCB, "app_type %d, app_id %x, prio bitmap %d\n", 2309 idtype, idval, up); 2310 2311 if (!bnx2x_dcbnl_set_valid(bp)) { 2312 DP(BNX2X_MSG_DCB, "dcbnl call not valid\n"); 2313 return -EINVAL; 2314 } 2315 2316 /* verify idtype */ 2317 switch (idtype) { 2318 case DCB_APP_IDTYPE_ETHTYPE: 2319 case DCB_APP_IDTYPE_PORTNUM: 2320 break; 2321 default: 2322 DP(BNX2X_MSG_DCB, "Wrong ID type\n"); 2323 return -EINVAL; 2324 } 2325 return bnx2x_set_admin_app_up(bp, idtype, idval, up); 2326} 2327 2328static u8 bnx2x_dcbnl_get_dcbx(struct net_device *netdev) 2329{ 2330 struct bnx2x *bp = netdev_priv(netdev); 2331 u8 state; 2332 2333 state = DCB_CAP_DCBX_LLD_MANAGED | DCB_CAP_DCBX_VER_CEE; 2334 2335 if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF) 2336 state |= DCB_CAP_DCBX_STATIC; 2337 2338 return state; 2339} 2340 2341static u8 bnx2x_dcbnl_set_dcbx(struct net_device *netdev, u8 state) 2342{ 2343 struct bnx2x *bp = netdev_priv(netdev); 2344 DP(BNX2X_MSG_DCB, "state = %02x\n", state); 2345 2346 /* set dcbx mode */ 2347 2348 if ((state & BNX2X_DCBX_CAPS) != state) { 2349 BNX2X_ERR("Requested DCBX mode %x is beyond advertised capabilities\n", 2350 state); 2351 return 1; 2352 } 2353 2354 if (bp->dcb_state != BNX2X_DCB_STATE_ON) { 2355 BNX2X_ERR("DCB turned off, DCBX configuration is invalid\n"); 2356 return 1; 2357 } 2358 2359 if (state & DCB_CAP_DCBX_STATIC) 2360 bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_OFF; 2361 else 2362 bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_ON; 2363 2364 bp->dcbx_mode_uset = true; 2365 return 0; 2366} 2367 2368static u8 bnx2x_dcbnl_get_featcfg(struct net_device *netdev, int featid, 2369 u8 *flags) 2370{ 2371 struct bnx2x *bp = netdev_priv(netdev); 2372 u8 rval = 0; 2373 2374 DP(BNX2X_MSG_DCB, "featid %d\n", featid); 2375 2376 if (bp->dcb_state) { 2377 *flags = 0; 2378 switch (featid) { 2379 case DCB_FEATCFG_ATTR_PG: 2380 if (bp->dcbx_local_feat.ets.enabled) 2381 *flags |= DCB_FEATCFG_ENABLE; 2382 if (bp->dcbx_error & (DCBX_LOCAL_ETS_ERROR | 2383 DCBX_REMOTE_MIB_ERROR)) 2384 *flags |= DCB_FEATCFG_ERROR; 2385 break; 2386 case DCB_FEATCFG_ATTR_PFC: 2387 if (bp->dcbx_local_feat.pfc.enabled) 2388 *flags |= DCB_FEATCFG_ENABLE; 2389 if (bp->dcbx_error & (DCBX_LOCAL_PFC_ERROR | 2390 DCBX_LOCAL_PFC_MISMATCH | 2391 DCBX_REMOTE_MIB_ERROR)) 2392 *flags |= DCB_FEATCFG_ERROR; 2393 break; 2394 case DCB_FEATCFG_ATTR_APP: 2395 if (bp->dcbx_local_feat.app.enabled) 2396 *flags |= DCB_FEATCFG_ENABLE; 2397 if (bp->dcbx_error & (DCBX_LOCAL_APP_ERROR | 2398 DCBX_LOCAL_APP_MISMATCH | 2399 DCBX_REMOTE_MIB_ERROR)) 2400 *flags |= DCB_FEATCFG_ERROR; 2401 break; 2402 default: 2403 BNX2X_ERR("Non valid feature-ID\n"); 2404 rval = 1; 2405 break; 2406 } 2407 } else { 2408 DP(BNX2X_MSG_DCB, "DCB disabled\n"); 2409 rval = 1; 2410 } 2411 2412 return rval; 2413} 2414 2415static u8 bnx2x_dcbnl_set_featcfg(struct net_device *netdev, int featid, 2416 u8 flags) 2417{ 2418 struct bnx2x *bp = netdev_priv(netdev); 2419 u8 rval = 0; 2420 2421 DP(BNX2X_MSG_DCB, "featid = %d flags = %02x\n", featid, flags); 2422 2423 /* ignore the 'advertise' flag */ 2424 if (bnx2x_dcbnl_set_valid(bp)) { 2425 switch (featid) { 2426 case DCB_FEATCFG_ATTR_PG: 2427 bp->dcbx_config_params.admin_ets_enable = 2428 flags & DCB_FEATCFG_ENABLE ? 1 : 0; 2429 bp->dcbx_config_params.admin_ets_willing = 2430 flags & DCB_FEATCFG_WILLING ? 1 : 0; 2431 break; 2432 case DCB_FEATCFG_ATTR_PFC: 2433 bp->dcbx_config_params.admin_pfc_enable = 2434 flags & DCB_FEATCFG_ENABLE ? 1 : 0; 2435 bp->dcbx_config_params.admin_pfc_willing = 2436 flags & DCB_FEATCFG_WILLING ? 1 : 0; 2437 break; 2438 case DCB_FEATCFG_ATTR_APP: 2439 /* ignore enable, always enabled */ 2440 bp->dcbx_config_params.admin_app_priority_willing = 2441 flags & DCB_FEATCFG_WILLING ? 1 : 0; 2442 break; 2443 default: 2444 BNX2X_ERR("Non valid feature-ID\n"); 2445 rval = 1; 2446 break; 2447 } 2448 } else { 2449 DP(BNX2X_MSG_DCB, "dcbnl call not valid\n"); 2450 rval = 1; 2451 } 2452 2453 return rval; 2454} 2455 2456static int bnx2x_peer_appinfo(struct net_device *netdev, 2457 struct dcb_peer_app_info *info, u16* app_count) 2458{ 2459 int i; 2460 struct bnx2x *bp = netdev_priv(netdev); 2461 2462 DP(BNX2X_MSG_DCB, "APP-INFO\n"); 2463 2464 info->willing = (bp->dcbx_remote_flags & DCBX_APP_REM_WILLING) ?: 0; 2465 info->error = (bp->dcbx_remote_flags & DCBX_APP_RX_ERROR) ?: 0; 2466 *app_count = 0; 2467 2468 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) 2469 if (bp->dcbx_remote_feat.app.app_pri_tbl[i].appBitfield & 2470 DCBX_APP_ENTRY_VALID) 2471 (*app_count)++; 2472 return 0; 2473} 2474 2475static int bnx2x_peer_apptable(struct net_device *netdev, 2476 struct dcb_app *table) 2477{ 2478 int i, j; 2479 struct bnx2x *bp = netdev_priv(netdev); 2480 2481 DP(BNX2X_MSG_DCB, "APP-TABLE\n"); 2482 2483 for (i = 0, j = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { 2484 struct dcbx_app_priority_entry *ent = 2485 &bp->dcbx_remote_feat.app.app_pri_tbl[i]; 2486 2487 if (ent->appBitfield & DCBX_APP_ENTRY_VALID) { 2488 table[j].selector = bnx2x_dcbx_dcbnl_app_idtype(ent); 2489 table[j].priority = bnx2x_dcbx_dcbnl_app_up(ent); 2490 table[j++].protocol = ent->app_id; 2491 } 2492 } 2493 return 0; 2494} 2495 2496static int bnx2x_cee_peer_getpg(struct net_device *netdev, struct cee_pg *pg) 2497{ 2498 int i; 2499 struct bnx2x *bp = netdev_priv(netdev); 2500 2501 pg->willing = (bp->dcbx_remote_flags & DCBX_ETS_REM_WILLING) ?: 0; 2502 2503 for (i = 0; i < CEE_DCBX_MAX_PGS; i++) { 2504 pg->pg_bw[i] = 2505 DCBX_PG_BW_GET(bp->dcbx_remote_feat.ets.pg_bw_tbl, i); 2506 pg->prio_pg[i] = 2507 DCBX_PRI_PG_GET(bp->dcbx_remote_feat.ets.pri_pg_tbl, i); 2508 } 2509 return 0; 2510} 2511 2512static int bnx2x_cee_peer_getpfc(struct net_device *netdev, 2513 struct cee_pfc *pfc) 2514{ 2515 struct bnx2x *bp = netdev_priv(netdev); 2516 pfc->tcs_supported = bp->dcbx_remote_feat.pfc.pfc_caps; 2517 pfc->pfc_en = bp->dcbx_remote_feat.pfc.pri_en_bitmap; 2518 return 0; 2519} 2520 2521const struct dcbnl_rtnl_ops bnx2x_dcbnl_ops = { 2522 .getstate = bnx2x_dcbnl_get_state, 2523 .setstate = bnx2x_dcbnl_set_state, 2524 .getpermhwaddr = bnx2x_dcbnl_get_perm_hw_addr, 2525 .setpgtccfgtx = bnx2x_dcbnl_set_pg_tccfg_tx, 2526 .setpgbwgcfgtx = bnx2x_dcbnl_set_pg_bwgcfg_tx, 2527 .setpgtccfgrx = bnx2x_dcbnl_set_pg_tccfg_rx, 2528 .setpgbwgcfgrx = bnx2x_dcbnl_set_pg_bwgcfg_rx, 2529 .getpgtccfgtx = bnx2x_dcbnl_get_pg_tccfg_tx, 2530 .getpgbwgcfgtx = bnx2x_dcbnl_get_pg_bwgcfg_tx, 2531 .getpgtccfgrx = bnx2x_dcbnl_get_pg_tccfg_rx, 2532 .getpgbwgcfgrx = bnx2x_dcbnl_get_pg_bwgcfg_rx, 2533 .setpfccfg = bnx2x_dcbnl_set_pfc_cfg, 2534 .getpfccfg = bnx2x_dcbnl_get_pfc_cfg, 2535 .setall = bnx2x_dcbnl_set_all, 2536 .getcap = bnx2x_dcbnl_get_cap, 2537 .getnumtcs = bnx2x_dcbnl_get_numtcs, 2538 .setnumtcs = bnx2x_dcbnl_set_numtcs, 2539 .getpfcstate = bnx2x_dcbnl_get_pfc_state, 2540 .setpfcstate = bnx2x_dcbnl_set_pfc_state, 2541 .setapp = bnx2x_dcbnl_set_app_up, 2542 .getdcbx = bnx2x_dcbnl_get_dcbx, 2543 .setdcbx = bnx2x_dcbnl_set_dcbx, 2544 .getfeatcfg = bnx2x_dcbnl_get_featcfg, 2545 .setfeatcfg = bnx2x_dcbnl_set_featcfg, 2546 .peer_getappinfo = bnx2x_peer_appinfo, 2547 .peer_getapptable = bnx2x_peer_apptable, 2548 .cee_peer_getpg = bnx2x_cee_peer_getpg, 2549 .cee_peer_getpfc = bnx2x_cee_peer_getpfc, 2550}; 2551 2552#endif /* BCM_DCBNL */ 2553