1 /* 2 * Copyright (c) 1997-2000 LAN Media Corporation (LMC) 3 * All rights reserved. www.lanmedia.com 4 * Generic HDLC port Copyright (C) 2008 Krzysztof Halasa <khc@pm.waw.pl> 5 * 6 * This code is written by: 7 * Andrew Stanley-Jones (asj@cban.com) 8 * Rob Braun (bbraun@vix.com), 9 * Michael Graff (explorer@vix.com) and 10 * Matt Thomas (matt@3am-software.com). 11 * 12 * With Help By: 13 * David Boggs 14 * Ron Crane 15 * Alan Cox 16 * 17 * This software may be used and distributed according to the terms 18 * of the GNU General Public License version 2, incorporated herein by reference. 19 * 20 * Driver for the LanMedia LMC5200, LMC5245, LMC1000, LMC1200 cards. 21 * 22 * To control link specific options lmcctl is required. 23 * It can be obtained from ftp.lanmedia.com. 24 * 25 * Linux driver notes: 26 * Linux uses the device struct lmc_private to pass private information 27 * around. 28 * 29 * The initialization portion of this driver (the lmc_reset() and the 30 * lmc_dec_reset() functions, as well as the led controls and the 31 * lmc_initcsrs() functions. 32 * 33 * The watchdog function runs every second and checks to see if 34 * we still have link, and that the timing source is what we expected 35 * it to be. If link is lost, the interface is marked down, and 36 * we no longer can transmit. 37 * 38 */ 39 40#include <linux/kernel.h> 41#include <linux/module.h> 42#include <linux/string.h> 43#include <linux/timer.h> 44#include <linux/ptrace.h> 45#include <linux/errno.h> 46#include <linux/ioport.h> 47#include <linux/slab.h> 48#include <linux/interrupt.h> 49#include <linux/pci.h> 50#include <linux/delay.h> 51#include <linux/hdlc.h> 52#include <linux/in.h> 53#include <linux/if_arp.h> 54#include <linux/netdevice.h> 55#include <linux/etherdevice.h> 56#include <linux/skbuff.h> 57#include <linux/inet.h> 58#include <linux/bitops.h> 59#include <asm/processor.h> /* Processor type for cache alignment. */ 60#include <asm/io.h> 61#include <asm/dma.h> 62#include <asm/uaccess.h> 63//#include <asm/spinlock.h> 64 65#define DRIVER_MAJOR_VERSION 1 66#define DRIVER_MINOR_VERSION 34 67#define DRIVER_SUB_VERSION 0 68 69#define DRIVER_VERSION ((DRIVER_MAJOR_VERSION << 8) + DRIVER_MINOR_VERSION) 70 71#include "lmc.h" 72#include "lmc_var.h" 73#include "lmc_ioctl.h" 74#include "lmc_debug.h" 75#include "lmc_proto.h" 76 77static int LMC_PKT_BUF_SZ = 1542; 78 79static const struct pci_device_id lmc_pci_tbl[] = { 80 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST, 81 PCI_VENDOR_ID_LMC, PCI_ANY_ID }, 82 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST, 83 PCI_ANY_ID, PCI_VENDOR_ID_LMC }, 84 { 0 } 85}; 86 87MODULE_DEVICE_TABLE(pci, lmc_pci_tbl); 88MODULE_LICENSE("GPL v2"); 89 90 91static netdev_tx_t lmc_start_xmit(struct sk_buff *skb, 92 struct net_device *dev); 93static int lmc_rx (struct net_device *dev); 94static int lmc_open(struct net_device *dev); 95static int lmc_close(struct net_device *dev); 96static struct net_device_stats *lmc_get_stats(struct net_device *dev); 97static irqreturn_t lmc_interrupt(int irq, void *dev_instance); 98static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, size_t csr_size); 99static void lmc_softreset(lmc_softc_t * const); 100static void lmc_running_reset(struct net_device *dev); 101static int lmc_ifdown(struct net_device * const); 102static void lmc_watchdog(unsigned long data); 103static void lmc_reset(lmc_softc_t * const sc); 104static void lmc_dec_reset(lmc_softc_t * const sc); 105static void lmc_driver_timeout(struct net_device *dev); 106 107/* 108 * linux reserves 16 device specific IOCTLs. We call them 109 * LMCIOC* to control various bits of our world. 110 */ 111int lmc_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) /*fold00*/ 112{ 113 lmc_softc_t *sc = dev_to_sc(dev); 114 lmc_ctl_t ctl; 115 int ret = -EOPNOTSUPP; 116 u16 regVal; 117 unsigned long flags; 118 119 lmc_trace(dev, "lmc_ioctl in"); 120 121 /* 122 * Most functions mess with the structure 123 * Disable interrupts while we do the polling 124 */ 125 126 switch (cmd) { 127 /* 128 * Return current driver state. Since we keep this up 129 * To date internally, just copy this out to the user. 130 */ 131 case LMCIOCGINFO: /*fold01*/ 132 if (copy_to_user(ifr->ifr_data, &sc->ictl, sizeof(lmc_ctl_t))) 133 ret = -EFAULT; 134 else 135 ret = 0; 136 break; 137 138 case LMCIOCSINFO: /*fold01*/ 139 if (!capable(CAP_NET_ADMIN)) { 140 ret = -EPERM; 141 break; 142 } 143 144 if(dev->flags & IFF_UP){ 145 ret = -EBUSY; 146 break; 147 } 148 149 if (copy_from_user(&ctl, ifr->ifr_data, sizeof(lmc_ctl_t))) { 150 ret = -EFAULT; 151 break; 152 } 153 154 spin_lock_irqsave(&sc->lmc_lock, flags); 155 sc->lmc_media->set_status (sc, &ctl); 156 157 if(ctl.crc_length != sc->ictl.crc_length) { 158 sc->lmc_media->set_crc_length(sc, ctl.crc_length); 159 if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16) 160 sc->TxDescriptControlInit |= LMC_TDES_ADD_CRC_DISABLE; 161 else 162 sc->TxDescriptControlInit &= ~LMC_TDES_ADD_CRC_DISABLE; 163 } 164 spin_unlock_irqrestore(&sc->lmc_lock, flags); 165 166 ret = 0; 167 break; 168 169 case LMCIOCIFTYPE: /*fold01*/ 170 { 171 u16 old_type = sc->if_type; 172 u16 new_type; 173 174 if (!capable(CAP_NET_ADMIN)) { 175 ret = -EPERM; 176 break; 177 } 178 179 if (copy_from_user(&new_type, ifr->ifr_data, sizeof(u16))) { 180 ret = -EFAULT; 181 break; 182 } 183 184 185 if (new_type == old_type) 186 { 187 ret = 0 ; 188 break; /* no change */ 189 } 190 191 spin_lock_irqsave(&sc->lmc_lock, flags); 192 lmc_proto_close(sc); 193 194 sc->if_type = new_type; 195 lmc_proto_attach(sc); 196 ret = lmc_proto_open(sc); 197 spin_unlock_irqrestore(&sc->lmc_lock, flags); 198 break; 199 } 200 201 case LMCIOCGETXINFO: /*fold01*/ 202 spin_lock_irqsave(&sc->lmc_lock, flags); 203 sc->lmc_xinfo.Magic0 = 0xBEEFCAFE; 204 205 sc->lmc_xinfo.PciCardType = sc->lmc_cardtype; 206 sc->lmc_xinfo.PciSlotNumber = 0; 207 sc->lmc_xinfo.DriverMajorVersion = DRIVER_MAJOR_VERSION; 208 sc->lmc_xinfo.DriverMinorVersion = DRIVER_MINOR_VERSION; 209 sc->lmc_xinfo.DriverSubVersion = DRIVER_SUB_VERSION; 210 sc->lmc_xinfo.XilinxRevisionNumber = 211 lmc_mii_readreg (sc, 0, 3) & 0xf; 212 sc->lmc_xinfo.MaxFrameSize = LMC_PKT_BUF_SZ; 213 sc->lmc_xinfo.link_status = sc->lmc_media->get_link_status (sc); 214 sc->lmc_xinfo.mii_reg16 = lmc_mii_readreg (sc, 0, 16); 215 spin_unlock_irqrestore(&sc->lmc_lock, flags); 216 217 sc->lmc_xinfo.Magic1 = 0xDEADBEEF; 218 219 if (copy_to_user(ifr->ifr_data, &sc->lmc_xinfo, 220 sizeof(struct lmc_xinfo))) 221 ret = -EFAULT; 222 else 223 ret = 0; 224 225 break; 226 227 case LMCIOCGETLMCSTATS: 228 spin_lock_irqsave(&sc->lmc_lock, flags); 229 if (sc->lmc_cardtype == LMC_CARDTYPE_T1) { 230 lmc_mii_writereg(sc, 0, 17, T1FRAMER_FERR_LSB); 231 sc->extra_stats.framingBitErrorCount += 232 lmc_mii_readreg(sc, 0, 18) & 0xff; 233 lmc_mii_writereg(sc, 0, 17, T1FRAMER_FERR_MSB); 234 sc->extra_stats.framingBitErrorCount += 235 (lmc_mii_readreg(sc, 0, 18) & 0xff) << 8; 236 lmc_mii_writereg(sc, 0, 17, T1FRAMER_LCV_LSB); 237 sc->extra_stats.lineCodeViolationCount += 238 lmc_mii_readreg(sc, 0, 18) & 0xff; 239 lmc_mii_writereg(sc, 0, 17, T1FRAMER_LCV_MSB); 240 sc->extra_stats.lineCodeViolationCount += 241 (lmc_mii_readreg(sc, 0, 18) & 0xff) << 8; 242 lmc_mii_writereg(sc, 0, 17, T1FRAMER_AERR); 243 regVal = lmc_mii_readreg(sc, 0, 18) & 0xff; 244 245 sc->extra_stats.lossOfFrameCount += 246 (regVal & T1FRAMER_LOF_MASK) >> 4; 247 sc->extra_stats.changeOfFrameAlignmentCount += 248 (regVal & T1FRAMER_COFA_MASK) >> 2; 249 sc->extra_stats.severelyErroredFrameCount += 250 regVal & T1FRAMER_SEF_MASK; 251 } 252 spin_unlock_irqrestore(&sc->lmc_lock, flags); 253 if (copy_to_user(ifr->ifr_data, &sc->lmc_device->stats, 254 sizeof(sc->lmc_device->stats)) || 255 copy_to_user(ifr->ifr_data + sizeof(sc->lmc_device->stats), 256 &sc->extra_stats, sizeof(sc->extra_stats))) 257 ret = -EFAULT; 258 else 259 ret = 0; 260 break; 261 262 case LMCIOCCLEARLMCSTATS: 263 if (!capable(CAP_NET_ADMIN)) { 264 ret = -EPERM; 265 break; 266 } 267 268 spin_lock_irqsave(&sc->lmc_lock, flags); 269 memset(&sc->lmc_device->stats, 0, sizeof(sc->lmc_device->stats)); 270 memset(&sc->extra_stats, 0, sizeof(sc->extra_stats)); 271 sc->extra_stats.check = STATCHECK; 272 sc->extra_stats.version_size = (DRIVER_VERSION << 16) + 273 sizeof(sc->lmc_device->stats) + sizeof(sc->extra_stats); 274 sc->extra_stats.lmc_cardtype = sc->lmc_cardtype; 275 spin_unlock_irqrestore(&sc->lmc_lock, flags); 276 ret = 0; 277 break; 278 279 case LMCIOCSETCIRCUIT: /*fold01*/ 280 if (!capable(CAP_NET_ADMIN)){ 281 ret = -EPERM; 282 break; 283 } 284 285 if(dev->flags & IFF_UP){ 286 ret = -EBUSY; 287 break; 288 } 289 290 if (copy_from_user(&ctl, ifr->ifr_data, sizeof(lmc_ctl_t))) { 291 ret = -EFAULT; 292 break; 293 } 294 spin_lock_irqsave(&sc->lmc_lock, flags); 295 sc->lmc_media->set_circuit_type(sc, ctl.circuit_type); 296 sc->ictl.circuit_type = ctl.circuit_type; 297 spin_unlock_irqrestore(&sc->lmc_lock, flags); 298 ret = 0; 299 300 break; 301 302 case LMCIOCRESET: /*fold01*/ 303 if (!capable(CAP_NET_ADMIN)){ 304 ret = -EPERM; 305 break; 306 } 307 308 spin_lock_irqsave(&sc->lmc_lock, flags); 309 /* Reset driver and bring back to current state */ 310 printk (" REG16 before reset +%04x\n", lmc_mii_readreg (sc, 0, 16)); 311 lmc_running_reset (dev); 312 printk (" REG16 after reset +%04x\n", lmc_mii_readreg (sc, 0, 16)); 313 314 LMC_EVENT_LOG(LMC_EVENT_FORCEDRESET, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16)); 315 spin_unlock_irqrestore(&sc->lmc_lock, flags); 316 317 ret = 0; 318 break; 319 320#ifdef DEBUG 321 case LMCIOCDUMPEVENTLOG: 322 if (copy_to_user(ifr->ifr_data, &lmcEventLogIndex, sizeof(u32))) { 323 ret = -EFAULT; 324 break; 325 } 326 if (copy_to_user(ifr->ifr_data + sizeof(u32), lmcEventLogBuf, 327 sizeof(lmcEventLogBuf))) 328 ret = -EFAULT; 329 else 330 ret = 0; 331 332 break; 333#endif /* end ifdef _DBG_EVENTLOG */ 334 case LMCIOCT1CONTROL: /*fold01*/ 335 if (sc->lmc_cardtype != LMC_CARDTYPE_T1){ 336 ret = -EOPNOTSUPP; 337 break; 338 } 339 break; 340 case LMCIOCXILINX: /*fold01*/ 341 { 342 struct lmc_xilinx_control xc; /*fold02*/ 343 344 if (!capable(CAP_NET_ADMIN)){ 345 ret = -EPERM; 346 break; 347 } 348 349 /* 350 * Stop the xwitter whlie we restart the hardware 351 */ 352 netif_stop_queue(dev); 353 354 if (copy_from_user(&xc, ifr->ifr_data, sizeof(struct lmc_xilinx_control))) { 355 ret = -EFAULT; 356 break; 357 } 358 switch(xc.command){ 359 case lmc_xilinx_reset: /*fold02*/ 360 { 361 u16 mii; 362 spin_lock_irqsave(&sc->lmc_lock, flags); 363 mii = lmc_mii_readreg (sc, 0, 16); 364 365 /* 366 * Make all of them 0 and make input 367 */ 368 lmc_gpio_mkinput(sc, 0xff); 369 370 /* 371 * make the reset output 372 */ 373 lmc_gpio_mkoutput(sc, LMC_GEP_RESET); 374 375 /* 376 * RESET low to force configuration. This also forces 377 * the transmitter clock to be internal, but we expect to reset 378 * that later anyway. 379 */ 380 381 sc->lmc_gpio &= ~LMC_GEP_RESET; 382 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio); 383 384 385 /* 386 * hold for more than 10 microseconds 387 */ 388 udelay(50); 389 390 sc->lmc_gpio |= LMC_GEP_RESET; 391 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio); 392 393 394 /* 395 * stop driving Xilinx-related signals 396 */ 397 lmc_gpio_mkinput(sc, 0xff); 398 399 /* Reset the frammer hardware */ 400 sc->lmc_media->set_link_status (sc, 1); 401 sc->lmc_media->set_status (sc, NULL); 402// lmc_softreset(sc); 403 404 { 405 int i; 406 for(i = 0; i < 5; i++){ 407 lmc_led_on(sc, LMC_DS3_LED0); 408 mdelay(100); 409 lmc_led_off(sc, LMC_DS3_LED0); 410 lmc_led_on(sc, LMC_DS3_LED1); 411 mdelay(100); 412 lmc_led_off(sc, LMC_DS3_LED1); 413 lmc_led_on(sc, LMC_DS3_LED3); 414 mdelay(100); 415 lmc_led_off(sc, LMC_DS3_LED3); 416 lmc_led_on(sc, LMC_DS3_LED2); 417 mdelay(100); 418 lmc_led_off(sc, LMC_DS3_LED2); 419 } 420 } 421 spin_unlock_irqrestore(&sc->lmc_lock, flags); 422 423 424 425 ret = 0x0; 426 427 } 428 429 break; 430 case lmc_xilinx_load_prom: /*fold02*/ 431 { 432 u16 mii; 433 int timeout = 500000; 434 spin_lock_irqsave(&sc->lmc_lock, flags); 435 mii = lmc_mii_readreg (sc, 0, 16); 436 437 /* 438 * Make all of them 0 and make input 439 */ 440 lmc_gpio_mkinput(sc, 0xff); 441 442 /* 443 * make the reset output 444 */ 445 lmc_gpio_mkoutput(sc, LMC_GEP_DP | LMC_GEP_RESET); 446 447 /* 448 * RESET low to force configuration. This also forces 449 * the transmitter clock to be internal, but we expect to reset 450 * that later anyway. 451 */ 452 453 sc->lmc_gpio &= ~(LMC_GEP_RESET | LMC_GEP_DP); 454 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio); 455 456 457 /* 458 * hold for more than 10 microseconds 459 */ 460 udelay(50); 461 462 sc->lmc_gpio |= LMC_GEP_DP | LMC_GEP_RESET; 463 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio); 464 465 /* 466 * busy wait for the chip to reset 467 */ 468 while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 && 469 (timeout-- > 0)) 470 cpu_relax(); 471 472 473 /* 474 * stop driving Xilinx-related signals 475 */ 476 lmc_gpio_mkinput(sc, 0xff); 477 spin_unlock_irqrestore(&sc->lmc_lock, flags); 478 479 ret = 0x0; 480 481 482 break; 483 484 } 485 486 case lmc_xilinx_load: /*fold02*/ 487 { 488 char *data; 489 int pos; 490 int timeout = 500000; 491 492 if (!xc.data) { 493 ret = -EINVAL; 494 break; 495 } 496 497 data = kmalloc(xc.len, GFP_KERNEL); 498 if (!data) { 499 ret = -ENOMEM; 500 break; 501 } 502 503 if(copy_from_user(data, xc.data, xc.len)) 504 { 505 kfree(data); 506 ret = -ENOMEM; 507 break; 508 } 509 510 printk("%s: Starting load of data Len: %d at 0x%p == 0x%p\n", dev->name, xc.len, xc.data, data); 511 512 spin_lock_irqsave(&sc->lmc_lock, flags); 513 lmc_gpio_mkinput(sc, 0xff); 514 515 /* 516 * Clear the Xilinx and start prgramming from the DEC 517 */ 518 519 /* 520 * Set ouput as: 521 * Reset: 0 (active) 522 * DP: 0 (active) 523 * Mode: 1 524 * 525 */ 526 sc->lmc_gpio = 0x00; 527 sc->lmc_gpio &= ~LMC_GEP_DP; 528 sc->lmc_gpio &= ~LMC_GEP_RESET; 529 sc->lmc_gpio |= LMC_GEP_MODE; 530 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio); 531 532 lmc_gpio_mkoutput(sc, LMC_GEP_MODE | LMC_GEP_DP | LMC_GEP_RESET); 533 534 /* 535 * Wait at least 10 us 20 to be safe 536 */ 537 udelay(50); 538 539 /* 540 * Clear reset and activate programming lines 541 * Reset: Input 542 * DP: Input 543 * Clock: Output 544 * Data: Output 545 * Mode: Output 546 */ 547 lmc_gpio_mkinput(sc, LMC_GEP_DP | LMC_GEP_RESET); 548 549 /* 550 * Set LOAD, DATA, Clock to 1 551 */ 552 sc->lmc_gpio = 0x00; 553 sc->lmc_gpio |= LMC_GEP_MODE; 554 sc->lmc_gpio |= LMC_GEP_DATA; 555 sc->lmc_gpio |= LMC_GEP_CLK; 556 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio); 557 558 lmc_gpio_mkoutput(sc, LMC_GEP_DATA | LMC_GEP_CLK | LMC_GEP_MODE ); 559 560 /* 561 * busy wait for the chip to reset 562 */ 563 while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 && 564 (timeout-- > 0)) 565 cpu_relax(); 566 567 printk(KERN_DEBUG "%s: Waited %d for the Xilinx to clear it's memory\n", dev->name, 500000-timeout); 568 569 for(pos = 0; pos < xc.len; pos++){ 570 switch(data[pos]){ 571 case 0: 572 sc->lmc_gpio &= ~LMC_GEP_DATA; /* Data is 0 */ 573 break; 574 case 1: 575 sc->lmc_gpio |= LMC_GEP_DATA; /* Data is 1 */ 576 break; 577 default: 578 printk(KERN_WARNING "%s Bad data in xilinx programming data at %d, got %d wanted 0 or 1\n", dev->name, pos, data[pos]); 579 sc->lmc_gpio |= LMC_GEP_DATA; /* Assume it's 1 */ 580 } 581 sc->lmc_gpio &= ~LMC_GEP_CLK; /* Clock to zero */ 582 sc->lmc_gpio |= LMC_GEP_MODE; 583 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio); 584 udelay(1); 585 586 sc->lmc_gpio |= LMC_GEP_CLK; /* Put the clack back to one */ 587 sc->lmc_gpio |= LMC_GEP_MODE; 588 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio); 589 udelay(1); 590 } 591 if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0){ 592 printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (corrupted data)\n", dev->name); 593 } 594 else if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_DP) == 0){ 595 printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (done)\n", dev->name); 596 } 597 else { 598 printk(KERN_DEBUG "%s: Done reprogramming Xilinx, %d bits, good luck!\n", dev->name, pos); 599 } 600 601 lmc_gpio_mkinput(sc, 0xff); 602 603 sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET; 604 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16); 605 606 sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET; 607 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16); 608 spin_unlock_irqrestore(&sc->lmc_lock, flags); 609 610 kfree(data); 611 612 ret = 0; 613 614 break; 615 } 616 default: /*fold02*/ 617 ret = -EBADE; 618 break; 619 } 620 621 netif_wake_queue(dev); 622 sc->lmc_txfull = 0; 623 624 } 625 break; 626 default: /*fold01*/ 627 /* If we don't know what to do, give the protocol a shot. */ 628 ret = lmc_proto_ioctl (sc, ifr, cmd); 629 break; 630 } 631 632 lmc_trace(dev, "lmc_ioctl out"); 633 634 return ret; 635} 636 637 638/* the watchdog process that cruises around */ 639static void lmc_watchdog (unsigned long data) /*fold00*/ 640{ 641 struct net_device *dev = (struct net_device *)data; 642 lmc_softc_t *sc = dev_to_sc(dev); 643 int link_status; 644 u32 ticks; 645 unsigned long flags; 646 647 lmc_trace(dev, "lmc_watchdog in"); 648 649 spin_lock_irqsave(&sc->lmc_lock, flags); 650 651 if(sc->check != 0xBEAFCAFE){ 652 printk("LMC: Corrupt net_device struct, breaking out\n"); 653 spin_unlock_irqrestore(&sc->lmc_lock, flags); 654 return; 655 } 656 657 658 /* Make sure the tx jabber and rx watchdog are off, 659 * and the transmit and receive processes are running. 660 */ 661 662 LMC_CSR_WRITE (sc, csr_15, 0x00000011); 663 sc->lmc_cmdmode |= TULIP_CMD_TXRUN | TULIP_CMD_RXRUN; 664 LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode); 665 666 if (sc->lmc_ok == 0) 667 goto kick_timer; 668 669 LMC_EVENT_LOG(LMC_EVENT_WATCHDOG, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16)); 670 671 /* --- begin time out check ----------------------------------- 672 * check for a transmit interrupt timeout 673 * Has the packet xmt vs xmt serviced threshold been exceeded */ 674 if (sc->lmc_taint_tx == sc->lastlmc_taint_tx && 675 sc->lmc_device->stats.tx_packets > sc->lasttx_packets && 676 sc->tx_TimeoutInd == 0) 677 { 678 679 /* wait for the watchdog to come around again */ 680 sc->tx_TimeoutInd = 1; 681 } 682 else if (sc->lmc_taint_tx == sc->lastlmc_taint_tx && 683 sc->lmc_device->stats.tx_packets > sc->lasttx_packets && 684 sc->tx_TimeoutInd) 685 { 686 687 LMC_EVENT_LOG(LMC_EVENT_XMTINTTMO, LMC_CSR_READ (sc, csr_status), 0); 688 689 sc->tx_TimeoutDisplay = 1; 690 sc->extra_stats.tx_TimeoutCnt++; 691 692 /* DEC chip is stuck, hit it with a RESET!!!! */ 693 lmc_running_reset (dev); 694 695 696 /* look at receive & transmit process state to make sure they are running */ 697 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0); 698 699 /* look at: DSR - 02 for Reg 16 700 * CTS - 08 701 * DCD - 10 702 * RI - 20 703 * for Reg 17 704 */ 705 LMC_EVENT_LOG(LMC_EVENT_RESET2, lmc_mii_readreg (sc, 0, 16), lmc_mii_readreg (sc, 0, 17)); 706 707 /* reset the transmit timeout detection flag */ 708 sc->tx_TimeoutInd = 0; 709 sc->lastlmc_taint_tx = sc->lmc_taint_tx; 710 sc->lasttx_packets = sc->lmc_device->stats.tx_packets; 711 } else { 712 sc->tx_TimeoutInd = 0; 713 sc->lastlmc_taint_tx = sc->lmc_taint_tx; 714 sc->lasttx_packets = sc->lmc_device->stats.tx_packets; 715 } 716 717 /* --- end time out check ----------------------------------- */ 718 719 720 link_status = sc->lmc_media->get_link_status (sc); 721 722 /* 723 * hardware level link lost, but the interface is marked as up. 724 * Mark it as down. 725 */ 726 if ((link_status == 0) && (sc->last_link_status != 0)) { 727 printk(KERN_WARNING "%s: hardware/physical link down\n", dev->name); 728 sc->last_link_status = 0; 729 /* lmc_reset (sc); Why reset??? The link can go down ok */ 730 731 /* Inform the world that link has been lost */ 732 netif_carrier_off(dev); 733 } 734 735 /* 736 * hardware link is up, but the interface is marked as down. 737 * Bring it back up again. 738 */ 739 if (link_status != 0 && sc->last_link_status == 0) { 740 printk(KERN_WARNING "%s: hardware/physical link up\n", dev->name); 741 sc->last_link_status = 1; 742 /* lmc_reset (sc); Again why reset??? */ 743 744 netif_carrier_on(dev); 745 } 746 747 /* Call media specific watchdog functions */ 748 sc->lmc_media->watchdog(sc); 749 750 /* 751 * Poke the transmitter to make sure it 752 * never stops, even if we run out of mem 753 */ 754 LMC_CSR_WRITE(sc, csr_rxpoll, 0); 755 756 /* 757 * Check for code that failed 758 * and try and fix it as appropriate 759 */ 760 if(sc->failed_ring == 1){ 761 /* 762 * Failed to setup the recv/xmit rin 763 * Try again 764 */ 765 sc->failed_ring = 0; 766 lmc_softreset(sc); 767 } 768 if(sc->failed_recv_alloc == 1){ 769 /* 770 * We failed to alloc mem in the 771 * interrupt handler, go through the rings 772 * and rebuild them 773 */ 774 sc->failed_recv_alloc = 0; 775 lmc_softreset(sc); 776 } 777 778 779 /* 780 * remember the timer value 781 */ 782kick_timer: 783 784 ticks = LMC_CSR_READ (sc, csr_gp_timer); 785 LMC_CSR_WRITE (sc, csr_gp_timer, 0xffffffffUL); 786 sc->ictl.ticks = 0x0000ffff - (ticks & 0x0000ffff); 787 788 /* 789 * restart this timer. 790 */ 791 sc->timer.expires = jiffies + (HZ); 792 add_timer (&sc->timer); 793 794 spin_unlock_irqrestore(&sc->lmc_lock, flags); 795 796 lmc_trace(dev, "lmc_watchdog out"); 797 798} 799 800static int lmc_attach(struct net_device *dev, unsigned short encoding, 801 unsigned short parity) 802{ 803 if (encoding == ENCODING_NRZ && parity == PARITY_CRC16_PR1_CCITT) 804 return 0; 805 return -EINVAL; 806} 807 808static const struct net_device_ops lmc_ops = { 809 .ndo_open = lmc_open, 810 .ndo_stop = lmc_close, 811 .ndo_change_mtu = hdlc_change_mtu, 812 .ndo_start_xmit = hdlc_start_xmit, 813 .ndo_do_ioctl = lmc_ioctl, 814 .ndo_tx_timeout = lmc_driver_timeout, 815 .ndo_get_stats = lmc_get_stats, 816}; 817 818static int lmc_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 819{ 820 lmc_softc_t *sc; 821 struct net_device *dev; 822 u16 subdevice; 823 u16 AdapModelNum; 824 int err; 825 static int cards_found; 826 827 /* lmc_trace(dev, "lmc_init_one in"); */ 828 829 err = pci_enable_device(pdev); 830 if (err) { 831 printk(KERN_ERR "lmc: pci enable failed: %d\n", err); 832 return err; 833 } 834 835 err = pci_request_regions(pdev, "lmc"); 836 if (err) { 837 printk(KERN_ERR "lmc: pci_request_region failed\n"); 838 goto err_req_io; 839 } 840 841 /* 842 * Allocate our own device structure 843 */ 844 sc = kzalloc(sizeof(lmc_softc_t), GFP_KERNEL); 845 if (!sc) { 846 err = -ENOMEM; 847 goto err_kzalloc; 848 } 849 850 dev = alloc_hdlcdev(sc); 851 if (!dev) { 852 printk(KERN_ERR "lmc:alloc_netdev for device failed\n"); 853 goto err_hdlcdev; 854 } 855 856 857 dev->type = ARPHRD_HDLC; 858 dev_to_hdlc(dev)->xmit = lmc_start_xmit; 859 dev_to_hdlc(dev)->attach = lmc_attach; 860 dev->netdev_ops = &lmc_ops; 861 dev->watchdog_timeo = HZ; /* 1 second */ 862 dev->tx_queue_len = 100; 863 sc->lmc_device = dev; 864 sc->name = dev->name; 865 sc->if_type = LMC_PPP; 866 sc->check = 0xBEAFCAFE; 867 dev->base_addr = pci_resource_start(pdev, 0); 868 dev->irq = pdev->irq; 869 pci_set_drvdata(pdev, dev); 870 SET_NETDEV_DEV(dev, &pdev->dev); 871 872 /* 873 * This will get the protocol layer ready and do any 1 time init's 874 * Must have a valid sc and dev structure 875 */ 876 lmc_proto_attach(sc); 877 878 /* Init the spin lock so can call it latter */ 879 880 spin_lock_init(&sc->lmc_lock); 881 pci_set_master(pdev); 882 883 printk(KERN_INFO "%s: detected at %lx, irq %d\n", dev->name, 884 dev->base_addr, dev->irq); 885 886 err = register_hdlc_device(dev); 887 if (err) { 888 printk(KERN_ERR "%s: register_netdev failed.\n", dev->name); 889 free_netdev(dev); 890 goto err_hdlcdev; 891 } 892 893 sc->lmc_cardtype = LMC_CARDTYPE_UNKNOWN; 894 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT; 895 896 /* 897 * 898 * Check either the subvendor or the subdevice, some systems reverse 899 * the setting in the bois, seems to be version and arch dependent? 900 * Fix the error, exchange the two values 901 */ 902 if ((subdevice = pdev->subsystem_device) == PCI_VENDOR_ID_LMC) 903 subdevice = pdev->subsystem_vendor; 904 905 switch (subdevice) { 906 case PCI_DEVICE_ID_LMC_HSSI: 907 printk(KERN_INFO "%s: LMC HSSI\n", dev->name); 908 sc->lmc_cardtype = LMC_CARDTYPE_HSSI; 909 sc->lmc_media = &lmc_hssi_media; 910 break; 911 case PCI_DEVICE_ID_LMC_DS3: 912 printk(KERN_INFO "%s: LMC DS3\n", dev->name); 913 sc->lmc_cardtype = LMC_CARDTYPE_DS3; 914 sc->lmc_media = &lmc_ds3_media; 915 break; 916 case PCI_DEVICE_ID_LMC_SSI: 917 printk(KERN_INFO "%s: LMC SSI\n", dev->name); 918 sc->lmc_cardtype = LMC_CARDTYPE_SSI; 919 sc->lmc_media = &lmc_ssi_media; 920 break; 921 case PCI_DEVICE_ID_LMC_T1: 922 printk(KERN_INFO "%s: LMC T1\n", dev->name); 923 sc->lmc_cardtype = LMC_CARDTYPE_T1; 924 sc->lmc_media = &lmc_t1_media; 925 break; 926 default: 927 printk(KERN_WARNING "%s: LMC UNKNOWN CARD!\n", dev->name); 928 break; 929 } 930 931 lmc_initcsrs (sc, dev->base_addr, 8); 932 933 lmc_gpio_mkinput (sc, 0xff); 934 sc->lmc_gpio = 0; /* drive no signals yet */ 935 936 sc->lmc_media->defaults (sc); 937 938 sc->lmc_media->set_link_status (sc, LMC_LINK_UP); 939 940 /* verify that the PCI Sub System ID matches the Adapter Model number 941 * from the MII register 942 */ 943 AdapModelNum = (lmc_mii_readreg (sc, 0, 3) & 0x3f0) >> 4; 944 945 if ((AdapModelNum != LMC_ADAP_T1 || /* detect LMC1200 */ 946 subdevice != PCI_DEVICE_ID_LMC_T1) && 947 (AdapModelNum != LMC_ADAP_SSI || /* detect LMC1000 */ 948 subdevice != PCI_DEVICE_ID_LMC_SSI) && 949 (AdapModelNum != LMC_ADAP_DS3 || /* detect LMC5245 */ 950 subdevice != PCI_DEVICE_ID_LMC_DS3) && 951 (AdapModelNum != LMC_ADAP_HSSI || /* detect LMC5200 */ 952 subdevice != PCI_DEVICE_ID_LMC_HSSI)) 953 printk(KERN_WARNING "%s: Model number (%d) miscompare for PCI" 954 " Subsystem ID = 0x%04x\n", 955 dev->name, AdapModelNum, subdevice); 956 957 /* 958 * reset clock 959 */ 960 LMC_CSR_WRITE (sc, csr_gp_timer, 0xFFFFFFFFUL); 961 962 sc->board_idx = cards_found++; 963 sc->extra_stats.check = STATCHECK; 964 sc->extra_stats.version_size = (DRIVER_VERSION << 16) + 965 sizeof(sc->lmc_device->stats) + sizeof(sc->extra_stats); 966 sc->extra_stats.lmc_cardtype = sc->lmc_cardtype; 967 968 sc->lmc_ok = 0; 969 sc->last_link_status = 0; 970 971 lmc_trace(dev, "lmc_init_one out"); 972 return 0; 973 974err_hdlcdev: 975 kfree(sc); 976err_kzalloc: 977 pci_release_regions(pdev); 978err_req_io: 979 pci_disable_device(pdev); 980 return err; 981} 982 983/* 984 * Called from pci when removing module. 985 */ 986static void lmc_remove_one(struct pci_dev *pdev) 987{ 988 struct net_device *dev = pci_get_drvdata(pdev); 989 990 if (dev) { 991 printk(KERN_DEBUG "%s: removing...\n", dev->name); 992 unregister_hdlc_device(dev); 993 free_netdev(dev); 994 pci_release_regions(pdev); 995 pci_disable_device(pdev); 996 } 997} 998 999/* After this is called, packets can be sent. 1000 * Does not initialize the addresses 1001 */ 1002static int lmc_open(struct net_device *dev) 1003{ 1004 lmc_softc_t *sc = dev_to_sc(dev); 1005 int err; 1006 1007 lmc_trace(dev, "lmc_open in"); 1008 1009 lmc_led_on(sc, LMC_DS3_LED0); 1010 1011 lmc_dec_reset(sc); 1012 lmc_reset(sc); 1013 1014 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ(sc, csr_status), 0); 1015 LMC_EVENT_LOG(LMC_EVENT_RESET2, lmc_mii_readreg(sc, 0, 16), 1016 lmc_mii_readreg(sc, 0, 17)); 1017 1018 if (sc->lmc_ok){ 1019 lmc_trace(dev, "lmc_open lmc_ok out"); 1020 return 0; 1021 } 1022 1023 lmc_softreset (sc); 1024 1025 /* Since we have to use PCI bus, this should work on x86,alpha,ppc */ 1026 if (request_irq (dev->irq, lmc_interrupt, IRQF_SHARED, dev->name, dev)){ 1027 printk(KERN_WARNING "%s: could not get irq: %d\n", dev->name, dev->irq); 1028 lmc_trace(dev, "lmc_open irq failed out"); 1029 return -EAGAIN; 1030 } 1031 sc->got_irq = 1; 1032 1033 /* Assert Terminal Active */ 1034 sc->lmc_miireg16 |= LMC_MII16_LED_ALL; 1035 sc->lmc_media->set_link_status (sc, LMC_LINK_UP); 1036 1037 /* 1038 * reset to last state. 1039 */ 1040 sc->lmc_media->set_status (sc, NULL); 1041 1042 /* setup default bits to be used in tulip_desc_t transmit descriptor 1043 * -baz */ 1044 sc->TxDescriptControlInit = ( 1045 LMC_TDES_INTERRUPT_ON_COMPLETION 1046 | LMC_TDES_FIRST_SEGMENT 1047 | LMC_TDES_LAST_SEGMENT 1048 | LMC_TDES_SECOND_ADDR_CHAINED 1049 | LMC_TDES_DISABLE_PADDING 1050 ); 1051 1052 if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16) { 1053 /* disable 32 bit CRC generated by ASIC */ 1054 sc->TxDescriptControlInit |= LMC_TDES_ADD_CRC_DISABLE; 1055 } 1056 sc->lmc_media->set_crc_length(sc, sc->ictl.crc_length); 1057 /* Acknoledge the Terminal Active and light LEDs */ 1058 1059 /* dev->flags |= IFF_UP; */ 1060 1061 if ((err = lmc_proto_open(sc)) != 0) 1062 return err; 1063 1064 netif_start_queue(dev); 1065 sc->extra_stats.tx_tbusy0++; 1066 1067 /* 1068 * select what interrupts we want to get 1069 */ 1070 sc->lmc_intrmask = 0; 1071 /* Should be using the default interrupt mask defined in the .h file. */ 1072 sc->lmc_intrmask |= (TULIP_STS_NORMALINTR 1073 | TULIP_STS_RXINTR 1074 | TULIP_STS_TXINTR 1075 | TULIP_STS_ABNRMLINTR 1076 | TULIP_STS_SYSERROR 1077 | TULIP_STS_TXSTOPPED 1078 | TULIP_STS_TXUNDERFLOW 1079 | TULIP_STS_RXSTOPPED 1080 | TULIP_STS_RXNOBUF 1081 ); 1082 LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask); 1083 1084 sc->lmc_cmdmode |= TULIP_CMD_TXRUN; 1085 sc->lmc_cmdmode |= TULIP_CMD_RXRUN; 1086 LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode); 1087 1088 sc->lmc_ok = 1; /* Run watchdog */ 1089 1090 /* 1091 * Set the if up now - pfb 1092 */ 1093 1094 sc->last_link_status = 1; 1095 1096 /* 1097 * Setup a timer for the watchdog on probe, and start it running. 1098 * Since lmc_ok == 0, it will be a NOP for now. 1099 */ 1100 init_timer (&sc->timer); 1101 sc->timer.expires = jiffies + HZ; 1102 sc->timer.data = (unsigned long) dev; 1103 sc->timer.function = lmc_watchdog; 1104 add_timer (&sc->timer); 1105 1106 lmc_trace(dev, "lmc_open out"); 1107 1108 return 0; 1109} 1110 1111/* Total reset to compensate for the AdTran DSU doing bad things 1112 * under heavy load 1113 */ 1114 1115static void lmc_running_reset (struct net_device *dev) /*fold00*/ 1116{ 1117 lmc_softc_t *sc = dev_to_sc(dev); 1118 1119 lmc_trace(dev, "lmc_running_reset in"); 1120 1121 /* stop interrupts */ 1122 /* Clear the interrupt mask */ 1123 LMC_CSR_WRITE (sc, csr_intr, 0x00000000); 1124 1125 lmc_dec_reset (sc); 1126 lmc_reset (sc); 1127 lmc_softreset (sc); 1128 /* sc->lmc_miireg16 |= LMC_MII16_LED_ALL; */ 1129 sc->lmc_media->set_link_status (sc, 1); 1130 sc->lmc_media->set_status (sc, NULL); 1131 1132 netif_wake_queue(dev); 1133 1134 sc->lmc_txfull = 0; 1135 sc->extra_stats.tx_tbusy0++; 1136 1137 sc->lmc_intrmask = TULIP_DEFAULT_INTR_MASK; 1138 LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask); 1139 1140 sc->lmc_cmdmode |= (TULIP_CMD_TXRUN | TULIP_CMD_RXRUN); 1141 LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode); 1142 1143 lmc_trace(dev, "lmc_runnin_reset_out"); 1144} 1145 1146 1147/* This is what is called when you ifconfig down a device. 1148 * This disables the timer for the watchdog and keepalives, 1149 * and disables the irq for dev. 1150 */ 1151static int lmc_close(struct net_device *dev) 1152{ 1153 /* not calling release_region() as we should */ 1154 lmc_softc_t *sc = dev_to_sc(dev); 1155 1156 lmc_trace(dev, "lmc_close in"); 1157 1158 sc->lmc_ok = 0; 1159 sc->lmc_media->set_link_status (sc, 0); 1160 del_timer (&sc->timer); 1161 lmc_proto_close(sc); 1162 lmc_ifdown (dev); 1163 1164 lmc_trace(dev, "lmc_close out"); 1165 1166 return 0; 1167} 1168 1169/* Ends the transfer of packets */ 1170/* When the interface goes down, this is called */ 1171static int lmc_ifdown (struct net_device *dev) /*fold00*/ 1172{ 1173 lmc_softc_t *sc = dev_to_sc(dev); 1174 u32 csr6; 1175 int i; 1176 1177 lmc_trace(dev, "lmc_ifdown in"); 1178 1179 /* Don't let anything else go on right now */ 1180 // dev->start = 0; 1181 netif_stop_queue(dev); 1182 sc->extra_stats.tx_tbusy1++; 1183 1184 /* stop interrupts */ 1185 /* Clear the interrupt mask */ 1186 LMC_CSR_WRITE (sc, csr_intr, 0x00000000); 1187 1188 /* Stop Tx and Rx on the chip */ 1189 csr6 = LMC_CSR_READ (sc, csr_command); 1190 csr6 &= ~LMC_DEC_ST; /* Turn off the Transmission bit */ 1191 csr6 &= ~LMC_DEC_SR; /* Turn off the Receive bit */ 1192 LMC_CSR_WRITE (sc, csr_command, csr6); 1193 1194 sc->lmc_device->stats.rx_missed_errors += 1195 LMC_CSR_READ(sc, csr_missed_frames) & 0xffff; 1196 1197 /* release the interrupt */ 1198 if(sc->got_irq == 1){ 1199 free_irq (dev->irq, dev); 1200 sc->got_irq = 0; 1201 } 1202 1203 /* free skbuffs in the Rx queue */ 1204 for (i = 0; i < LMC_RXDESCS; i++) 1205 { 1206 struct sk_buff *skb = sc->lmc_rxq[i]; 1207 sc->lmc_rxq[i] = NULL; 1208 sc->lmc_rxring[i].status = 0; 1209 sc->lmc_rxring[i].length = 0; 1210 sc->lmc_rxring[i].buffer1 = 0xDEADBEEF; 1211 if (skb != NULL) 1212 dev_kfree_skb(skb); 1213 sc->lmc_rxq[i] = NULL; 1214 } 1215 1216 for (i = 0; i < LMC_TXDESCS; i++) 1217 { 1218 if (sc->lmc_txq[i] != NULL) 1219 dev_kfree_skb(sc->lmc_txq[i]); 1220 sc->lmc_txq[i] = NULL; 1221 } 1222 1223 lmc_led_off (sc, LMC_MII16_LED_ALL); 1224 1225 netif_wake_queue(dev); 1226 sc->extra_stats.tx_tbusy0++; 1227 1228 lmc_trace(dev, "lmc_ifdown out"); 1229 1230 return 0; 1231} 1232 1233/* Interrupt handling routine. This will take an incoming packet, or clean 1234 * up after a trasmit. 1235 */ 1236static irqreturn_t lmc_interrupt (int irq, void *dev_instance) /*fold00*/ 1237{ 1238 struct net_device *dev = (struct net_device *) dev_instance; 1239 lmc_softc_t *sc = dev_to_sc(dev); 1240 u32 csr; 1241 int i; 1242 s32 stat; 1243 unsigned int badtx; 1244 u32 firstcsr; 1245 int max_work = LMC_RXDESCS; 1246 int handled = 0; 1247 1248 lmc_trace(dev, "lmc_interrupt in"); 1249 1250 spin_lock(&sc->lmc_lock); 1251 1252 /* 1253 * Read the csr to find what interrupts we have (if any) 1254 */ 1255 csr = LMC_CSR_READ (sc, csr_status); 1256 1257 /* 1258 * Make sure this is our interrupt 1259 */ 1260 if ( ! (csr & sc->lmc_intrmask)) { 1261 goto lmc_int_fail_out; 1262 } 1263 1264 firstcsr = csr; 1265 1266 /* always go through this loop at least once */ 1267 while (csr & sc->lmc_intrmask) { 1268 handled = 1; 1269 1270 /* 1271 * Clear interrupt bits, we handle all case below 1272 */ 1273 LMC_CSR_WRITE (sc, csr_status, csr); 1274 1275 /* 1276 * One of 1277 * - Transmit process timed out CSR5<1> 1278 * - Transmit jabber timeout CSR5<3> 1279 * - Transmit underflow CSR5<5> 1280 * - Transmit Receiver buffer unavailable CSR5<7> 1281 * - Receive process stopped CSR5<8> 1282 * - Receive watchdog timeout CSR5<9> 1283 * - Early transmit interrupt CSR5<10> 1284 * 1285 * Is this really right? Should we do a running reset for jabber? 1286 * (being a WAN card and all) 1287 */ 1288 if (csr & TULIP_STS_ABNRMLINTR){ 1289 lmc_running_reset (dev); 1290 break; 1291 } 1292 1293 if (csr & TULIP_STS_RXINTR){ 1294 lmc_trace(dev, "rx interrupt"); 1295 lmc_rx (dev); 1296 1297 } 1298 if (csr & (TULIP_STS_TXINTR | TULIP_STS_TXNOBUF | TULIP_STS_TXSTOPPED)) { 1299 1300 int n_compl = 0 ; 1301 /* reset the transmit timeout detection flag -baz */ 1302 sc->extra_stats.tx_NoCompleteCnt = 0; 1303 1304 badtx = sc->lmc_taint_tx; 1305 i = badtx % LMC_TXDESCS; 1306 1307 while ((badtx < sc->lmc_next_tx)) { 1308 stat = sc->lmc_txring[i].status; 1309 1310 LMC_EVENT_LOG (LMC_EVENT_XMTINT, stat, 1311 sc->lmc_txring[i].length); 1312 /* 1313 * If bit 31 is 1 the tulip owns it break out of the loop 1314 */ 1315 if (stat & 0x80000000) 1316 break; 1317 1318 n_compl++ ; /* i.e., have an empty slot in ring */ 1319 /* 1320 * If we have no skbuff or have cleared it 1321 * Already continue to the next buffer 1322 */ 1323 if (sc->lmc_txq[i] == NULL) 1324 continue; 1325 1326 /* 1327 * Check the total error summary to look for any errors 1328 */ 1329 if (stat & 0x8000) { 1330 sc->lmc_device->stats.tx_errors++; 1331 if (stat & 0x4104) 1332 sc->lmc_device->stats.tx_aborted_errors++; 1333 if (stat & 0x0C00) 1334 sc->lmc_device->stats.tx_carrier_errors++; 1335 if (stat & 0x0200) 1336 sc->lmc_device->stats.tx_window_errors++; 1337 if (stat & 0x0002) 1338 sc->lmc_device->stats.tx_fifo_errors++; 1339 } else { 1340 sc->lmc_device->stats.tx_bytes += sc->lmc_txring[i].length & 0x7ff; 1341 1342 sc->lmc_device->stats.tx_packets++; 1343 } 1344 1345 // dev_kfree_skb(sc->lmc_txq[i]); 1346 dev_kfree_skb_irq(sc->lmc_txq[i]); 1347 sc->lmc_txq[i] = NULL; 1348 1349 badtx++; 1350 i = badtx % LMC_TXDESCS; 1351 } 1352 1353 if (sc->lmc_next_tx - badtx > LMC_TXDESCS) 1354 { 1355 printk ("%s: out of sync pointer\n", dev->name); 1356 badtx += LMC_TXDESCS; 1357 } 1358 LMC_EVENT_LOG(LMC_EVENT_TBUSY0, n_compl, 0); 1359 sc->lmc_txfull = 0; 1360 netif_wake_queue(dev); 1361 sc->extra_stats.tx_tbusy0++; 1362 1363 1364#ifdef DEBUG 1365 sc->extra_stats.dirtyTx = badtx; 1366 sc->extra_stats.lmc_next_tx = sc->lmc_next_tx; 1367 sc->extra_stats.lmc_txfull = sc->lmc_txfull; 1368#endif 1369 sc->lmc_taint_tx = badtx; 1370 1371 /* 1372 * Why was there a break here??? 1373 */ 1374 } /* end handle transmit interrupt */ 1375 1376 if (csr & TULIP_STS_SYSERROR) { 1377 u32 error; 1378 printk (KERN_WARNING "%s: system bus error csr: %#8.8x\n", dev->name, csr); 1379 error = csr>>23 & 0x7; 1380 switch(error){ 1381 case 0x000: 1382 printk(KERN_WARNING "%s: Parity Fault (bad)\n", dev->name); 1383 break; 1384 case 0x001: 1385 printk(KERN_WARNING "%s: Master Abort (naughty)\n", dev->name); 1386 break; 1387 case 0x010: 1388 printk(KERN_WARNING "%s: Target Abort (not so naughty)\n", dev->name); 1389 break; 1390 default: 1391 printk(KERN_WARNING "%s: This bus error code was supposed to be reserved!\n", dev->name); 1392 } 1393 lmc_dec_reset (sc); 1394 lmc_reset (sc); 1395 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0); 1396 LMC_EVENT_LOG(LMC_EVENT_RESET2, 1397 lmc_mii_readreg (sc, 0, 16), 1398 lmc_mii_readreg (sc, 0, 17)); 1399 1400 } 1401 1402 1403 if(max_work-- <= 0) 1404 break; 1405 1406 /* 1407 * Get current csr status to make sure 1408 * we've cleared all interrupts 1409 */ 1410 csr = LMC_CSR_READ (sc, csr_status); 1411 } /* end interrupt loop */ 1412 LMC_EVENT_LOG(LMC_EVENT_INT, firstcsr, csr); 1413 1414lmc_int_fail_out: 1415 1416 spin_unlock(&sc->lmc_lock); 1417 1418 lmc_trace(dev, "lmc_interrupt out"); 1419 return IRQ_RETVAL(handled); 1420} 1421 1422static netdev_tx_t lmc_start_xmit(struct sk_buff *skb, 1423 struct net_device *dev) 1424{ 1425 lmc_softc_t *sc = dev_to_sc(dev); 1426 u32 flag; 1427 int entry; 1428 unsigned long flags; 1429 1430 lmc_trace(dev, "lmc_start_xmit in"); 1431 1432 spin_lock_irqsave(&sc->lmc_lock, flags); 1433 1434 /* normal path, tbusy known to be zero */ 1435 1436 entry = sc->lmc_next_tx % LMC_TXDESCS; 1437 1438 sc->lmc_txq[entry] = skb; 1439 sc->lmc_txring[entry].buffer1 = virt_to_bus (skb->data); 1440 1441 LMC_CONSOLE_LOG("xmit", skb->data, skb->len); 1442 1443#ifndef GCOM 1444 /* If the queue is less than half full, don't interrupt */ 1445 if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS / 2) 1446 { 1447 /* Do not interrupt on completion of this packet */ 1448 flag = 0x60000000; 1449 netif_wake_queue(dev); 1450 } 1451 else if (sc->lmc_next_tx - sc->lmc_taint_tx == LMC_TXDESCS / 2) 1452 { 1453 /* This generates an interrupt on completion of this packet */ 1454 flag = 0xe0000000; 1455 netif_wake_queue(dev); 1456 } 1457 else if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS - 1) 1458 { 1459 /* Do not interrupt on completion of this packet */ 1460 flag = 0x60000000; 1461 netif_wake_queue(dev); 1462 } 1463 else 1464 { 1465 /* This generates an interrupt on completion of this packet */ 1466 flag = 0xe0000000; 1467 sc->lmc_txfull = 1; 1468 netif_stop_queue(dev); 1469 } 1470#else 1471 flag = LMC_TDES_INTERRUPT_ON_COMPLETION; 1472 1473 if (sc->lmc_next_tx - sc->lmc_taint_tx >= LMC_TXDESCS - 1) 1474 { /* ring full, go busy */ 1475 sc->lmc_txfull = 1; 1476 netif_stop_queue(dev); 1477 sc->extra_stats.tx_tbusy1++; 1478 LMC_EVENT_LOG(LMC_EVENT_TBUSY1, entry, 0); 1479 } 1480#endif 1481 1482 1483 if (entry == LMC_TXDESCS - 1) /* last descriptor in ring */ 1484 flag |= LMC_TDES_END_OF_RING; /* flag as such for Tulip */ 1485 1486 /* don't pad small packets either */ 1487 flag = sc->lmc_txring[entry].length = (skb->len) | flag | 1488 sc->TxDescriptControlInit; 1489 1490 /* set the transmit timeout flag to be checked in 1491 * the watchdog timer handler. -baz 1492 */ 1493 1494 sc->extra_stats.tx_NoCompleteCnt++; 1495 sc->lmc_next_tx++; 1496 1497 /* give ownership to the chip */ 1498 LMC_EVENT_LOG(LMC_EVENT_XMT, flag, entry); 1499 sc->lmc_txring[entry].status = 0x80000000; 1500 1501 /* send now! */ 1502 LMC_CSR_WRITE (sc, csr_txpoll, 0); 1503 1504 spin_unlock_irqrestore(&sc->lmc_lock, flags); 1505 1506 lmc_trace(dev, "lmc_start_xmit_out"); 1507 return NETDEV_TX_OK; 1508} 1509 1510 1511static int lmc_rx(struct net_device *dev) 1512{ 1513 lmc_softc_t *sc = dev_to_sc(dev); 1514 int i; 1515 int rx_work_limit = LMC_RXDESCS; 1516 unsigned int next_rx; 1517 int rxIntLoopCnt; /* debug -baz */ 1518 int localLengthErrCnt = 0; 1519 long stat; 1520 struct sk_buff *skb, *nsb; 1521 u16 len; 1522 1523 lmc_trace(dev, "lmc_rx in"); 1524 1525 lmc_led_on(sc, LMC_DS3_LED3); 1526 1527 rxIntLoopCnt = 0; /* debug -baz */ 1528 1529 i = sc->lmc_next_rx % LMC_RXDESCS; 1530 next_rx = sc->lmc_next_rx; 1531 1532 while (((stat = sc->lmc_rxring[i].status) & LMC_RDES_OWN_BIT) != DESC_OWNED_BY_DC21X4) 1533 { 1534 rxIntLoopCnt++; /* debug -baz */ 1535 len = ((stat & LMC_RDES_FRAME_LENGTH) >> RDES_FRAME_LENGTH_BIT_NUMBER); 1536 if ((stat & 0x0300) != 0x0300) { /* Check first segment and last segment */ 1537 if ((stat & 0x0000ffff) != 0x7fff) { 1538 /* Oversized frame */ 1539 sc->lmc_device->stats.rx_length_errors++; 1540 goto skip_packet; 1541 } 1542 } 1543 1544 if (stat & 0x00000008) { /* Catch a dribbling bit error */ 1545 sc->lmc_device->stats.rx_errors++; 1546 sc->lmc_device->stats.rx_frame_errors++; 1547 goto skip_packet; 1548 } 1549 1550 1551 if (stat & 0x00000004) { /* Catch a CRC error by the Xilinx */ 1552 sc->lmc_device->stats.rx_errors++; 1553 sc->lmc_device->stats.rx_crc_errors++; 1554 goto skip_packet; 1555 } 1556 1557 if (len > LMC_PKT_BUF_SZ) { 1558 sc->lmc_device->stats.rx_length_errors++; 1559 localLengthErrCnt++; 1560 goto skip_packet; 1561 } 1562 1563 if (len < sc->lmc_crcSize + 2) { 1564 sc->lmc_device->stats.rx_length_errors++; 1565 sc->extra_stats.rx_SmallPktCnt++; 1566 localLengthErrCnt++; 1567 goto skip_packet; 1568 } 1569 1570 if(stat & 0x00004000){ 1571 printk(KERN_WARNING "%s: Receiver descriptor error, receiver out of sync?\n", dev->name); 1572 } 1573 1574 len -= sc->lmc_crcSize; 1575 1576 skb = sc->lmc_rxq[i]; 1577 1578 /* 1579 * We ran out of memory at some point 1580 * just allocate an skb buff and continue. 1581 */ 1582 1583 if (!skb) { 1584 nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2); 1585 if (nsb) { 1586 sc->lmc_rxq[i] = nsb; 1587 nsb->dev = dev; 1588 sc->lmc_rxring[i].buffer1 = virt_to_bus(skb_tail_pointer(nsb)); 1589 } 1590 sc->failed_recv_alloc = 1; 1591 goto skip_packet; 1592 } 1593 1594 sc->lmc_device->stats.rx_packets++; 1595 sc->lmc_device->stats.rx_bytes += len; 1596 1597 LMC_CONSOLE_LOG("recv", skb->data, len); 1598 1599 /* 1600 * I'm not sure of the sanity of this 1601 * Packets could be arriving at a constant 1602 * 44.210mbits/sec and we're going to copy 1603 * them into a new buffer?? 1604 */ 1605 1606 if(len > (LMC_MTU - (LMC_MTU>>2))){ /* len > LMC_MTU * 0.75 */ 1607 /* 1608 * If it's a large packet don't copy it just hand it up 1609 */ 1610 give_it_anyways: 1611 1612 sc->lmc_rxq[i] = NULL; 1613 sc->lmc_rxring[i].buffer1 = 0x0; 1614 1615 skb_put (skb, len); 1616 skb->protocol = lmc_proto_type(sc, skb); 1617 skb_reset_mac_header(skb); 1618 /* skb_reset_network_header(skb); */ 1619 skb->dev = dev; 1620 lmc_proto_netif(sc, skb); 1621 1622 /* 1623 * This skb will be destroyed by the upper layers, make a new one 1624 */ 1625 nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2); 1626 if (nsb) { 1627 sc->lmc_rxq[i] = nsb; 1628 nsb->dev = dev; 1629 sc->lmc_rxring[i].buffer1 = virt_to_bus(skb_tail_pointer(nsb)); 1630 /* Transferred to 21140 below */ 1631 } 1632 else { 1633 /* 1634 * We've run out of memory, stop trying to allocate 1635 * memory and exit the interrupt handler 1636 * 1637 * The chip may run out of receivers and stop 1638 * in which care we'll try to allocate the buffer 1639 * again. (once a second) 1640 */ 1641 sc->extra_stats.rx_BuffAllocErr++; 1642 LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len); 1643 sc->failed_recv_alloc = 1; 1644 goto skip_out_of_mem; 1645 } 1646 } 1647 else { 1648 nsb = dev_alloc_skb(len); 1649 if(!nsb) { 1650 goto give_it_anyways; 1651 } 1652 skb_copy_from_linear_data(skb, skb_put(nsb, len), len); 1653 1654 nsb->protocol = lmc_proto_type(sc, nsb); 1655 skb_reset_mac_header(nsb); 1656 /* skb_reset_network_header(nsb); */ 1657 nsb->dev = dev; 1658 lmc_proto_netif(sc, nsb); 1659 } 1660 1661 skip_packet: 1662 LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len); 1663 sc->lmc_rxring[i].status = DESC_OWNED_BY_DC21X4; 1664 1665 sc->lmc_next_rx++; 1666 i = sc->lmc_next_rx % LMC_RXDESCS; 1667 rx_work_limit--; 1668 if (rx_work_limit < 0) 1669 break; 1670 } 1671 1672 /* detect condition for LMC1000 where DSU cable attaches and fills 1673 * descriptors with bogus packets 1674 * 1675 if (localLengthErrCnt > LMC_RXDESCS - 3) { 1676 sc->extra_stats.rx_BadPktSurgeCnt++; 1677 LMC_EVENT_LOG(LMC_EVENT_BADPKTSURGE, localLengthErrCnt, 1678 sc->extra_stats.rx_BadPktSurgeCnt); 1679 } */ 1680 1681 /* save max count of receive descriptors serviced */ 1682 if (rxIntLoopCnt > sc->extra_stats.rxIntLoopCnt) 1683 sc->extra_stats.rxIntLoopCnt = rxIntLoopCnt; /* debug -baz */ 1684 1685#ifdef DEBUG 1686 if (rxIntLoopCnt == 0) 1687 { 1688 for (i = 0; i < LMC_RXDESCS; i++) 1689 { 1690 if ((sc->lmc_rxring[i].status & LMC_RDES_OWN_BIT) 1691 != DESC_OWNED_BY_DC21X4) 1692 { 1693 rxIntLoopCnt++; 1694 } 1695 } 1696 LMC_EVENT_LOG(LMC_EVENT_RCVEND, rxIntLoopCnt, 0); 1697 } 1698#endif 1699 1700 1701 lmc_led_off(sc, LMC_DS3_LED3); 1702 1703skip_out_of_mem: 1704 1705 lmc_trace(dev, "lmc_rx out"); 1706 1707 return 0; 1708} 1709 1710static struct net_device_stats *lmc_get_stats(struct net_device *dev) 1711{ 1712 lmc_softc_t *sc = dev_to_sc(dev); 1713 unsigned long flags; 1714 1715 lmc_trace(dev, "lmc_get_stats in"); 1716 1717 spin_lock_irqsave(&sc->lmc_lock, flags); 1718 1719 sc->lmc_device->stats.rx_missed_errors += LMC_CSR_READ(sc, csr_missed_frames) & 0xffff; 1720 1721 spin_unlock_irqrestore(&sc->lmc_lock, flags); 1722 1723 lmc_trace(dev, "lmc_get_stats out"); 1724 1725 return &sc->lmc_device->stats; 1726} 1727 1728static struct pci_driver lmc_driver = { 1729 .name = "lmc", 1730 .id_table = lmc_pci_tbl, 1731 .probe = lmc_init_one, 1732 .remove = lmc_remove_one, 1733}; 1734 1735module_pci_driver(lmc_driver); 1736 1737unsigned lmc_mii_readreg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno) /*fold00*/ 1738{ 1739 int i; 1740 int command = (0xf6 << 10) | (devaddr << 5) | regno; 1741 int retval = 0; 1742 1743 lmc_trace(sc->lmc_device, "lmc_mii_readreg in"); 1744 1745 LMC_MII_SYNC (sc); 1746 1747 lmc_trace(sc->lmc_device, "lmc_mii_readreg: done sync"); 1748 1749 for (i = 15; i >= 0; i--) 1750 { 1751 int dataval = (command & (1 << i)) ? 0x20000 : 0; 1752 1753 LMC_CSR_WRITE (sc, csr_9, dataval); 1754 lmc_delay (); 1755 /* __SLOW_DOWN_IO; */ 1756 LMC_CSR_WRITE (sc, csr_9, dataval | 0x10000); 1757 lmc_delay (); 1758 /* __SLOW_DOWN_IO; */ 1759 } 1760 1761 lmc_trace(sc->lmc_device, "lmc_mii_readreg: done1"); 1762 1763 for (i = 19; i > 0; i--) 1764 { 1765 LMC_CSR_WRITE (sc, csr_9, 0x40000); 1766 lmc_delay (); 1767 /* __SLOW_DOWN_IO; */ 1768 retval = (retval << 1) | ((LMC_CSR_READ (sc, csr_9) & 0x80000) ? 1 : 0); 1769 LMC_CSR_WRITE (sc, csr_9, 0x40000 | 0x10000); 1770 lmc_delay (); 1771 /* __SLOW_DOWN_IO; */ 1772 } 1773 1774 lmc_trace(sc->lmc_device, "lmc_mii_readreg out"); 1775 1776 return (retval >> 1) & 0xffff; 1777} 1778 1779void lmc_mii_writereg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno, unsigned data) /*fold00*/ 1780{ 1781 int i = 32; 1782 int command = (0x5002 << 16) | (devaddr << 23) | (regno << 18) | data; 1783 1784 lmc_trace(sc->lmc_device, "lmc_mii_writereg in"); 1785 1786 LMC_MII_SYNC (sc); 1787 1788 i = 31; 1789 while (i >= 0) 1790 { 1791 int datav; 1792 1793 if (command & (1 << i)) 1794 datav = 0x20000; 1795 else 1796 datav = 0x00000; 1797 1798 LMC_CSR_WRITE (sc, csr_9, datav); 1799 lmc_delay (); 1800 /* __SLOW_DOWN_IO; */ 1801 LMC_CSR_WRITE (sc, csr_9, (datav | 0x10000)); 1802 lmc_delay (); 1803 /* __SLOW_DOWN_IO; */ 1804 i--; 1805 } 1806 1807 i = 2; 1808 while (i > 0) 1809 { 1810 LMC_CSR_WRITE (sc, csr_9, 0x40000); 1811 lmc_delay (); 1812 /* __SLOW_DOWN_IO; */ 1813 LMC_CSR_WRITE (sc, csr_9, 0x50000); 1814 lmc_delay (); 1815 /* __SLOW_DOWN_IO; */ 1816 i--; 1817 } 1818 1819 lmc_trace(sc->lmc_device, "lmc_mii_writereg out"); 1820} 1821 1822static void lmc_softreset (lmc_softc_t * const sc) /*fold00*/ 1823{ 1824 int i; 1825 1826 lmc_trace(sc->lmc_device, "lmc_softreset in"); 1827 1828 /* Initialize the receive rings and buffers. */ 1829 sc->lmc_txfull = 0; 1830 sc->lmc_next_rx = 0; 1831 sc->lmc_next_tx = 0; 1832 sc->lmc_taint_rx = 0; 1833 sc->lmc_taint_tx = 0; 1834 1835 /* 1836 * Setup each one of the receiver buffers 1837 * allocate an skbuff for each one, setup the descriptor table 1838 * and point each buffer at the next one 1839 */ 1840 1841 for (i = 0; i < LMC_RXDESCS; i++) 1842 { 1843 struct sk_buff *skb; 1844 1845 if (sc->lmc_rxq[i] == NULL) 1846 { 1847 skb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2); 1848 if(skb == NULL){ 1849 printk(KERN_WARNING "%s: Failed to allocate receiver ring, will try again\n", sc->name); 1850 sc->failed_ring = 1; 1851 break; 1852 } 1853 else{ 1854 sc->lmc_rxq[i] = skb; 1855 } 1856 } 1857 else 1858 { 1859 skb = sc->lmc_rxq[i]; 1860 } 1861 1862 skb->dev = sc->lmc_device; 1863 1864 /* owned by 21140 */ 1865 sc->lmc_rxring[i].status = 0x80000000; 1866 1867 /* used to be PKT_BUF_SZ now uses skb since we lose some to head room */ 1868 sc->lmc_rxring[i].length = skb_tailroom(skb); 1869 1870 /* use to be tail which is dumb since you're thinking why write 1871 * to the end of the packj,et but since there's nothing there tail == data 1872 */ 1873 sc->lmc_rxring[i].buffer1 = virt_to_bus (skb->data); 1874 1875 /* This is fair since the structure is static and we have the next address */ 1876 sc->lmc_rxring[i].buffer2 = virt_to_bus (&sc->lmc_rxring[i + 1]); 1877 1878 } 1879 1880 /* 1881 * Sets end of ring 1882 */ 1883 if (i != 0) { 1884 sc->lmc_rxring[i - 1].length |= 0x02000000; /* Set end of buffers flag */ 1885 sc->lmc_rxring[i - 1].buffer2 = virt_to_bus(&sc->lmc_rxring[0]); /* Point back to the start */ 1886 } 1887 LMC_CSR_WRITE (sc, csr_rxlist, virt_to_bus (sc->lmc_rxring)); /* write base address */ 1888 1889 /* Initialize the transmit rings and buffers */ 1890 for (i = 0; i < LMC_TXDESCS; i++) 1891 { 1892 if (sc->lmc_txq[i] != NULL){ /* have buffer */ 1893 dev_kfree_skb(sc->lmc_txq[i]); /* free it */ 1894 sc->lmc_device->stats.tx_dropped++; /* We just dropped a packet */ 1895 } 1896 sc->lmc_txq[i] = NULL; 1897 sc->lmc_txring[i].status = 0x00000000; 1898 sc->lmc_txring[i].buffer2 = virt_to_bus (&sc->lmc_txring[i + 1]); 1899 } 1900 sc->lmc_txring[i - 1].buffer2 = virt_to_bus (&sc->lmc_txring[0]); 1901 LMC_CSR_WRITE (sc, csr_txlist, virt_to_bus (sc->lmc_txring)); 1902 1903 lmc_trace(sc->lmc_device, "lmc_softreset out"); 1904} 1905 1906void lmc_gpio_mkinput(lmc_softc_t * const sc, u32 bits) /*fold00*/ 1907{ 1908 lmc_trace(sc->lmc_device, "lmc_gpio_mkinput in"); 1909 sc->lmc_gpio_io &= ~bits; 1910 LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io)); 1911 lmc_trace(sc->lmc_device, "lmc_gpio_mkinput out"); 1912} 1913 1914void lmc_gpio_mkoutput(lmc_softc_t * const sc, u32 bits) /*fold00*/ 1915{ 1916 lmc_trace(sc->lmc_device, "lmc_gpio_mkoutput in"); 1917 sc->lmc_gpio_io |= bits; 1918 LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io)); 1919 lmc_trace(sc->lmc_device, "lmc_gpio_mkoutput out"); 1920} 1921 1922void lmc_led_on(lmc_softc_t * const sc, u32 led) /*fold00*/ 1923{ 1924 lmc_trace(sc->lmc_device, "lmc_led_on in"); 1925 if((~sc->lmc_miireg16) & led){ /* Already on! */ 1926 lmc_trace(sc->lmc_device, "lmc_led_on aon out"); 1927 return; 1928 } 1929 1930 sc->lmc_miireg16 &= ~led; 1931 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16); 1932 lmc_trace(sc->lmc_device, "lmc_led_on out"); 1933} 1934 1935void lmc_led_off(lmc_softc_t * const sc, u32 led) /*fold00*/ 1936{ 1937 lmc_trace(sc->lmc_device, "lmc_led_off in"); 1938 if(sc->lmc_miireg16 & led){ /* Already set don't do anything */ 1939 lmc_trace(sc->lmc_device, "lmc_led_off aoff out"); 1940 return; 1941 } 1942 1943 sc->lmc_miireg16 |= led; 1944 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16); 1945 lmc_trace(sc->lmc_device, "lmc_led_off out"); 1946} 1947 1948static void lmc_reset(lmc_softc_t * const sc) /*fold00*/ 1949{ 1950 lmc_trace(sc->lmc_device, "lmc_reset in"); 1951 sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET; 1952 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16); 1953 1954 sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET; 1955 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16); 1956 1957 /* 1958 * make some of the GPIO pins be outputs 1959 */ 1960 lmc_gpio_mkoutput(sc, LMC_GEP_RESET); 1961 1962 /* 1963 * RESET low to force state reset. This also forces 1964 * the transmitter clock to be internal, but we expect to reset 1965 * that later anyway. 1966 */ 1967 sc->lmc_gpio &= ~(LMC_GEP_RESET); 1968 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio); 1969 1970 /* 1971 * hold for more than 10 microseconds 1972 */ 1973 udelay(50); 1974 1975 /* 1976 * stop driving Xilinx-related signals 1977 */ 1978 lmc_gpio_mkinput(sc, LMC_GEP_RESET); 1979 1980 /* 1981 * Call media specific init routine 1982 */ 1983 sc->lmc_media->init(sc); 1984 1985 sc->extra_stats.resetCount++; 1986 lmc_trace(sc->lmc_device, "lmc_reset out"); 1987} 1988 1989static void lmc_dec_reset(lmc_softc_t * const sc) /*fold00*/ 1990{ 1991 u32 val; 1992 lmc_trace(sc->lmc_device, "lmc_dec_reset in"); 1993 1994 /* 1995 * disable all interrupts 1996 */ 1997 sc->lmc_intrmask = 0; 1998 LMC_CSR_WRITE(sc, csr_intr, sc->lmc_intrmask); 1999 2000 /* 2001 * Reset the chip with a software reset command. 2002 * Wait 10 microseconds (actually 50 PCI cycles but at 2003 * 33MHz that comes to two microseconds but wait a 2004 * bit longer anyways) 2005 */ 2006 LMC_CSR_WRITE(sc, csr_busmode, TULIP_BUSMODE_SWRESET); 2007 udelay(25); 2008#ifdef __sparc__ 2009 sc->lmc_busmode = LMC_CSR_READ(sc, csr_busmode); 2010 sc->lmc_busmode = 0x00100000; 2011 sc->lmc_busmode &= ~TULIP_BUSMODE_SWRESET; 2012 LMC_CSR_WRITE(sc, csr_busmode, sc->lmc_busmode); 2013#endif 2014 sc->lmc_cmdmode = LMC_CSR_READ(sc, csr_command); 2015 2016 /* 2017 * We want: 2018 * no ethernet address in frames we write 2019 * disable padding (txdesc, padding disable) 2020 * ignore runt frames (rdes0 bit 15) 2021 * no receiver watchdog or transmitter jabber timer 2022 * (csr15 bit 0,14 == 1) 2023 * if using 16-bit CRC, turn off CRC (trans desc, crc disable) 2024 */ 2025 2026 sc->lmc_cmdmode |= ( TULIP_CMD_PROMISCUOUS 2027 | TULIP_CMD_FULLDUPLEX 2028 | TULIP_CMD_PASSBADPKT 2029 | TULIP_CMD_NOHEARTBEAT 2030 | TULIP_CMD_PORTSELECT 2031 | TULIP_CMD_RECEIVEALL 2032 | TULIP_CMD_MUSTBEONE 2033 ); 2034 sc->lmc_cmdmode &= ~( TULIP_CMD_OPERMODE 2035 | TULIP_CMD_THRESHOLDCTL 2036 | TULIP_CMD_STOREFWD 2037 | TULIP_CMD_TXTHRSHLDCTL 2038 ); 2039 2040 LMC_CSR_WRITE(sc, csr_command, sc->lmc_cmdmode); 2041 2042 /* 2043 * disable receiver watchdog and transmit jabber 2044 */ 2045 val = LMC_CSR_READ(sc, csr_sia_general); 2046 val |= (TULIP_WATCHDOG_TXDISABLE | TULIP_WATCHDOG_RXDISABLE); 2047 LMC_CSR_WRITE(sc, csr_sia_general, val); 2048 2049 lmc_trace(sc->lmc_device, "lmc_dec_reset out"); 2050} 2051 2052static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, /*fold00*/ 2053 size_t csr_size) 2054{ 2055 lmc_trace(sc->lmc_device, "lmc_initcsrs in"); 2056 sc->lmc_csrs.csr_busmode = csr_base + 0 * csr_size; 2057 sc->lmc_csrs.csr_txpoll = csr_base + 1 * csr_size; 2058 sc->lmc_csrs.csr_rxpoll = csr_base + 2 * csr_size; 2059 sc->lmc_csrs.csr_rxlist = csr_base + 3 * csr_size; 2060 sc->lmc_csrs.csr_txlist = csr_base + 4 * csr_size; 2061 sc->lmc_csrs.csr_status = csr_base + 5 * csr_size; 2062 sc->lmc_csrs.csr_command = csr_base + 6 * csr_size; 2063 sc->lmc_csrs.csr_intr = csr_base + 7 * csr_size; 2064 sc->lmc_csrs.csr_missed_frames = csr_base + 8 * csr_size; 2065 sc->lmc_csrs.csr_9 = csr_base + 9 * csr_size; 2066 sc->lmc_csrs.csr_10 = csr_base + 10 * csr_size; 2067 sc->lmc_csrs.csr_11 = csr_base + 11 * csr_size; 2068 sc->lmc_csrs.csr_12 = csr_base + 12 * csr_size; 2069 sc->lmc_csrs.csr_13 = csr_base + 13 * csr_size; 2070 sc->lmc_csrs.csr_14 = csr_base + 14 * csr_size; 2071 sc->lmc_csrs.csr_15 = csr_base + 15 * csr_size; 2072 lmc_trace(sc->lmc_device, "lmc_initcsrs out"); 2073} 2074 2075static void lmc_driver_timeout(struct net_device *dev) 2076{ 2077 lmc_softc_t *sc = dev_to_sc(dev); 2078 u32 csr6; 2079 unsigned long flags; 2080 2081 lmc_trace(dev, "lmc_driver_timeout in"); 2082 2083 spin_lock_irqsave(&sc->lmc_lock, flags); 2084 2085 printk("%s: Xmitter busy|\n", dev->name); 2086 2087 sc->extra_stats.tx_tbusy_calls++; 2088 if (jiffies - dev_trans_start(dev) < TX_TIMEOUT) 2089 goto bug_out; 2090 2091 /* 2092 * Chip seems to have locked up 2093 * Reset it 2094 * This whips out all our decriptor 2095 * table and starts from scartch 2096 */ 2097 2098 LMC_EVENT_LOG(LMC_EVENT_XMTPRCTMO, 2099 LMC_CSR_READ (sc, csr_status), 2100 sc->extra_stats.tx_ProcTimeout); 2101 2102 lmc_running_reset (dev); 2103 2104 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0); 2105 LMC_EVENT_LOG(LMC_EVENT_RESET2, 2106 lmc_mii_readreg (sc, 0, 16), 2107 lmc_mii_readreg (sc, 0, 17)); 2108 2109 /* restart the tx processes */ 2110 csr6 = LMC_CSR_READ (sc, csr_command); 2111 LMC_CSR_WRITE (sc, csr_command, csr6 | 0x0002); 2112 LMC_CSR_WRITE (sc, csr_command, csr6 | 0x2002); 2113 2114 /* immediate transmit */ 2115 LMC_CSR_WRITE (sc, csr_txpoll, 0); 2116 2117 sc->lmc_device->stats.tx_errors++; 2118 sc->extra_stats.tx_ProcTimeout++; /* -baz */ 2119 2120 dev->trans_start = jiffies; /* prevent tx timeout */ 2121 2122bug_out: 2123 2124 spin_unlock_irqrestore(&sc->lmc_lock, flags); 2125 2126 lmc_trace(dev, "lmc_driver_timeout out"); 2127 2128 2129} 2130