[go: nahoru, domu]

1/*
2 * Copyright (c) 2010-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
18
19#include "htc.h"
20
21MODULE_AUTHOR("Atheros Communications");
22MODULE_LICENSE("Dual BSD/GPL");
23MODULE_DESCRIPTION("Atheros driver 802.11n HTC based wireless devices");
24
25static unsigned int ath9k_debug = ATH_DBG_DEFAULT;
26module_param_named(debug, ath9k_debug, uint, 0);
27MODULE_PARM_DESC(debug, "Debugging mask");
28
29int htc_modparam_nohwcrypt;
30module_param_named(nohwcrypt, htc_modparam_nohwcrypt, int, 0444);
31MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
32
33static int ath9k_htc_btcoex_enable;
34module_param_named(btcoex_enable, ath9k_htc_btcoex_enable, int, 0444);
35MODULE_PARM_DESC(btcoex_enable, "Enable wifi-BT coexistence");
36
37static int ath9k_ps_enable;
38module_param_named(ps_enable, ath9k_ps_enable, int, 0444);
39MODULE_PARM_DESC(ps_enable, "Enable WLAN PowerSave");
40
41#ifdef CONFIG_MAC80211_LEDS
42static const struct ieee80211_tpt_blink ath9k_htc_tpt_blink[] = {
43	{ .throughput = 0 * 1024, .blink_time = 334 },
44	{ .throughput = 1 * 1024, .blink_time = 260 },
45	{ .throughput = 5 * 1024, .blink_time = 220 },
46	{ .throughput = 10 * 1024, .blink_time = 190 },
47	{ .throughput = 20 * 1024, .blink_time = 170 },
48	{ .throughput = 50 * 1024, .blink_time = 150 },
49	{ .throughput = 70 * 1024, .blink_time = 130 },
50	{ .throughput = 100 * 1024, .blink_time = 110 },
51	{ .throughput = 200 * 1024, .blink_time = 80 },
52	{ .throughput = 300 * 1024, .blink_time = 50 },
53};
54#endif
55
56static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv)
57{
58	int time_left;
59
60	if (atomic_read(&priv->htc->tgt_ready) > 0) {
61		atomic_dec(&priv->htc->tgt_ready);
62		return 0;
63	}
64
65	/* Firmware can take up to 50ms to get ready, to be safe use 1 second */
66	time_left = wait_for_completion_timeout(&priv->htc->target_wait, HZ);
67	if (!time_left) {
68		dev_err(priv->dev, "ath9k_htc: Target is unresponsive\n");
69		return -ETIMEDOUT;
70	}
71
72	atomic_dec(&priv->htc->tgt_ready);
73
74	return 0;
75}
76
77static void ath9k_deinit_priv(struct ath9k_htc_priv *priv)
78{
79	ath9k_hw_deinit(priv->ah);
80	kfree(priv->ah);
81	priv->ah = NULL;
82}
83
84static void ath9k_deinit_device(struct ath9k_htc_priv *priv)
85{
86	struct ieee80211_hw *hw = priv->hw;
87
88	wiphy_rfkill_stop_polling(hw->wiphy);
89	ath9k_deinit_leds(priv);
90	ieee80211_unregister_hw(hw);
91	ath9k_rx_cleanup(priv);
92	ath9k_tx_cleanup(priv);
93	ath9k_deinit_priv(priv);
94}
95
96static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv,
97					u16 service_id,
98					void (*tx) (void *,
99						    struct sk_buff *,
100						    enum htc_endpoint_id,
101						    bool txok),
102					enum htc_endpoint_id *ep_id)
103{
104	struct htc_service_connreq req;
105
106	memset(&req, 0, sizeof(struct htc_service_connreq));
107
108	req.service_id = service_id;
109	req.ep_callbacks.priv = priv;
110	req.ep_callbacks.rx = ath9k_htc_rxep;
111	req.ep_callbacks.tx = tx;
112
113	return htc_connect_service(priv->htc, &req, ep_id);
114}
115
116static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid,
117				   u32 drv_info)
118{
119	int ret;
120
121	/* WMI CMD*/
122	ret = ath9k_wmi_connect(priv->htc, priv->wmi, &priv->wmi_cmd_ep);
123	if (ret)
124		goto err;
125
126	/* Beacon */
127	ret = ath9k_htc_connect_svc(priv, WMI_BEACON_SVC, ath9k_htc_beaconep,
128				    &priv->beacon_ep);
129	if (ret)
130		goto err;
131
132	/* CAB */
133	ret = ath9k_htc_connect_svc(priv, WMI_CAB_SVC, ath9k_htc_txep,
134				    &priv->cab_ep);
135	if (ret)
136		goto err;
137
138
139	/* UAPSD */
140	ret = ath9k_htc_connect_svc(priv, WMI_UAPSD_SVC, ath9k_htc_txep,
141				    &priv->uapsd_ep);
142	if (ret)
143		goto err;
144
145	/* MGMT */
146	ret = ath9k_htc_connect_svc(priv, WMI_MGMT_SVC, ath9k_htc_txep,
147				    &priv->mgmt_ep);
148	if (ret)
149		goto err;
150
151	/* DATA BE */
152	ret = ath9k_htc_connect_svc(priv, WMI_DATA_BE_SVC, ath9k_htc_txep,
153				    &priv->data_be_ep);
154	if (ret)
155		goto err;
156
157	/* DATA BK */
158	ret = ath9k_htc_connect_svc(priv, WMI_DATA_BK_SVC, ath9k_htc_txep,
159				    &priv->data_bk_ep);
160	if (ret)
161		goto err;
162
163	/* DATA VI */
164	ret = ath9k_htc_connect_svc(priv, WMI_DATA_VI_SVC, ath9k_htc_txep,
165				    &priv->data_vi_ep);
166	if (ret)
167		goto err;
168
169	/* DATA VO */
170	ret = ath9k_htc_connect_svc(priv, WMI_DATA_VO_SVC, ath9k_htc_txep,
171				    &priv->data_vo_ep);
172	if (ret)
173		goto err;
174
175	/*
176	 * Setup required credits before initializing HTC.
177	 * This is a bit hacky, but, since queuing is done in
178	 * the HIF layer, shouldn't matter much.
179	 */
180
181	if (IS_AR7010_DEVICE(drv_info))
182		priv->htc->credits = 45;
183	else
184		priv->htc->credits = 33;
185
186	ret = htc_init(priv->htc);
187	if (ret)
188		goto err;
189
190	dev_info(priv->dev, "ath9k_htc: HTC initialized with %d credits\n",
191		 priv->htc->credits);
192
193	return 0;
194
195err:
196	dev_err(priv->dev, "ath9k_htc: Unable to initialize HTC services\n");
197	return ret;
198}
199
200static void ath9k_reg_notifier(struct wiphy *wiphy,
201			       struct regulatory_request *request)
202{
203	struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
204	struct ath9k_htc_priv *priv = hw->priv;
205
206	ath_reg_notifier_apply(wiphy, request,
207			       ath9k_hw_regulatory(priv->ah));
208}
209
210static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset)
211{
212	struct ath_hw *ah = (struct ath_hw *) hw_priv;
213	struct ath_common *common = ath9k_hw_common(ah);
214	struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
215	__be32 val, reg = cpu_to_be32(reg_offset);
216	int r;
217
218	r = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
219			  (u8 *) &reg, sizeof(reg),
220			  (u8 *) &val, sizeof(val),
221			  100);
222	if (unlikely(r)) {
223		ath_dbg(common, WMI, "REGISTER READ FAILED: (0x%04x, %d)\n",
224			reg_offset, r);
225		return -EIO;
226	}
227
228	return be32_to_cpu(val);
229}
230
231static void ath9k_multi_regread(void *hw_priv, u32 *addr,
232				u32 *val, u16 count)
233{
234	struct ath_hw *ah = (struct ath_hw *) hw_priv;
235	struct ath_common *common = ath9k_hw_common(ah);
236	struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
237	__be32 tmpaddr[8];
238	__be32 tmpval[8];
239	int i, ret;
240
241       for (i = 0; i < count; i++) {
242	       tmpaddr[i] = cpu_to_be32(addr[i]);
243       }
244
245       ret = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
246			   (u8 *)tmpaddr , sizeof(u32) * count,
247			   (u8 *)tmpval, sizeof(u32) * count,
248			   100);
249	if (unlikely(ret)) {
250		ath_dbg(common, WMI,
251			"Multiple REGISTER READ FAILED (count: %d)\n", count);
252	}
253
254       for (i = 0; i < count; i++) {
255	       val[i] = be32_to_cpu(tmpval[i]);
256       }
257}
258
259static void ath9k_regwrite_multi(struct ath_common *common)
260{
261	struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
262	u32 rsp_status;
263	int r;
264
265	r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
266			  (u8 *) &priv->wmi->multi_write,
267			  sizeof(struct register_write) * priv->wmi->multi_write_idx,
268			  (u8 *) &rsp_status, sizeof(rsp_status),
269			  100);
270	if (unlikely(r)) {
271		ath_dbg(common, WMI,
272			"REGISTER WRITE FAILED, multi len: %d\n",
273			priv->wmi->multi_write_idx);
274	}
275	priv->wmi->multi_write_idx = 0;
276}
277
278static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset)
279{
280	struct ath_hw *ah = (struct ath_hw *) hw_priv;
281	struct ath_common *common = ath9k_hw_common(ah);
282	struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
283	const __be32 buf[2] = {
284		cpu_to_be32(reg_offset),
285		cpu_to_be32(val),
286	};
287	int r;
288
289	r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
290			  (u8 *) &buf, sizeof(buf),
291			  (u8 *) &val, sizeof(val),
292			  100);
293	if (unlikely(r)) {
294		ath_dbg(common, WMI, "REGISTER WRITE FAILED:(0x%04x, %d)\n",
295			reg_offset, r);
296	}
297}
298
299static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset)
300{
301	struct ath_hw *ah = (struct ath_hw *) hw_priv;
302	struct ath_common *common = ath9k_hw_common(ah);
303	struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
304
305	mutex_lock(&priv->wmi->multi_write_mutex);
306
307	/* Store the register/value */
308	priv->wmi->multi_write[priv->wmi->multi_write_idx].reg =
309		cpu_to_be32(reg_offset);
310	priv->wmi->multi_write[priv->wmi->multi_write_idx].val =
311		cpu_to_be32(val);
312
313	priv->wmi->multi_write_idx++;
314
315	/* If the buffer is full, send it out. */
316	if (priv->wmi->multi_write_idx == MAX_CMD_NUMBER)
317		ath9k_regwrite_multi(common);
318
319	mutex_unlock(&priv->wmi->multi_write_mutex);
320}
321
322static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset)
323{
324	struct ath_hw *ah = (struct ath_hw *) hw_priv;
325	struct ath_common *common = ath9k_hw_common(ah);
326	struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
327
328	if (atomic_read(&priv->wmi->mwrite_cnt))
329		ath9k_regwrite_buffer(hw_priv, val, reg_offset);
330	else
331		ath9k_regwrite_single(hw_priv, val, reg_offset);
332}
333
334static void ath9k_enable_regwrite_buffer(void *hw_priv)
335{
336	struct ath_hw *ah = (struct ath_hw *) hw_priv;
337	struct ath_common *common = ath9k_hw_common(ah);
338	struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
339
340	atomic_inc(&priv->wmi->mwrite_cnt);
341}
342
343static void ath9k_regwrite_flush(void *hw_priv)
344{
345	struct ath_hw *ah = (struct ath_hw *) hw_priv;
346	struct ath_common *common = ath9k_hw_common(ah);
347	struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
348
349	atomic_dec(&priv->wmi->mwrite_cnt);
350
351	mutex_lock(&priv->wmi->multi_write_mutex);
352
353	if (priv->wmi->multi_write_idx)
354		ath9k_regwrite_multi(common);
355
356	mutex_unlock(&priv->wmi->multi_write_mutex);
357}
358
359static u32 ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 clr)
360{
361	u32 val;
362
363	val = ath9k_regread(hw_priv, reg_offset);
364	val &= ~clr;
365	val |= set;
366	ath9k_regwrite(hw_priv, val, reg_offset);
367	return val;
368}
369
370static void ath_usb_read_cachesize(struct ath_common *common, int *csz)
371{
372	*csz = L1_CACHE_BYTES >> 2;
373}
374
375static bool ath_usb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
376{
377	struct ath_hw *ah = (struct ath_hw *) common->ah;
378
379	(void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
380
381	if (!ath9k_hw_wait(ah,
382			   AR_EEPROM_STATUS_DATA,
383			   AR_EEPROM_STATUS_DATA_BUSY |
384			   AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
385			   AH_WAIT_TIMEOUT))
386		return false;
387
388	*data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA),
389		   AR_EEPROM_STATUS_DATA_VAL);
390
391	return true;
392}
393
394static const struct ath_bus_ops ath9k_usb_bus_ops = {
395	.ath_bus_type = ATH_USB,
396	.read_cachesize = ath_usb_read_cachesize,
397	.eeprom_read = ath_usb_eeprom_read,
398};
399
400static int ath9k_init_queues(struct ath9k_htc_priv *priv)
401{
402	struct ath_common *common = ath9k_hw_common(priv->ah);
403	int i;
404
405	for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++)
406		priv->hwq_map[i] = -1;
407
408	priv->beacon.beaconq = ath9k_hw_beaconq_setup(priv->ah);
409	if (priv->beacon.beaconq == -1) {
410		ath_err(common, "Unable to setup BEACON xmit queue\n");
411		goto err;
412	}
413
414	priv->cabq = ath9k_htc_cabq_setup(priv);
415	if (priv->cabq == -1) {
416		ath_err(common, "Unable to setup CAB xmit queue\n");
417		goto err;
418	}
419
420	if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_BE)) {
421		ath_err(common, "Unable to setup xmit queue for BE traffic\n");
422		goto err;
423	}
424
425	if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_BK)) {
426		ath_err(common, "Unable to setup xmit queue for BK traffic\n");
427		goto err;
428	}
429	if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_VI)) {
430		ath_err(common, "Unable to setup xmit queue for VI traffic\n");
431		goto err;
432	}
433	if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_VO)) {
434		ath_err(common, "Unable to setup xmit queue for VO traffic\n");
435		goto err;
436	}
437
438	return 0;
439
440err:
441	return -EINVAL;
442}
443
444static void ath9k_init_misc(struct ath9k_htc_priv *priv)
445{
446	struct ath_common *common = ath9k_hw_common(priv->ah);
447
448	memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);
449
450	common->last_rssi = ATH_RSSI_DUMMY_MARKER;
451	priv->ah->opmode = NL80211_IFTYPE_STATION;
452}
453
454static int ath9k_init_priv(struct ath9k_htc_priv *priv,
455			   u16 devid, char *product,
456			   u32 drv_info)
457{
458	struct ath_hw *ah = NULL;
459	struct ath_common *common;
460	int i, ret = 0, csz = 0;
461
462	ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL);
463	if (!ah)
464		return -ENOMEM;
465
466	ah->dev = priv->dev;
467	ah->hw = priv->hw;
468	ah->hw_version.devid = devid;
469	ah->hw_version.usbdev = drv_info;
470	ah->ah_flags |= AH_USE_EEPROM;
471	ah->reg_ops.read = ath9k_regread;
472	ah->reg_ops.multi_read = ath9k_multi_regread;
473	ah->reg_ops.write = ath9k_regwrite;
474	ah->reg_ops.enable_write_buffer = ath9k_enable_regwrite_buffer;
475	ah->reg_ops.write_flush = ath9k_regwrite_flush;
476	ah->reg_ops.rmw = ath9k_reg_rmw;
477	priv->ah = ah;
478
479	common = ath9k_hw_common(ah);
480	common->ops = &ah->reg_ops;
481	common->bus_ops = &ath9k_usb_bus_ops;
482	common->ah = ah;
483	common->hw = priv->hw;
484	common->priv = priv;
485	common->debug_mask = ath9k_debug;
486	common->btcoex_enabled = ath9k_htc_btcoex_enable == 1;
487	set_bit(ATH_OP_INVALID, &common->op_flags);
488
489	spin_lock_init(&priv->beacon_lock);
490	spin_lock_init(&priv->tx.tx_lock);
491	mutex_init(&priv->mutex);
492	mutex_init(&priv->htc_pm_lock);
493	tasklet_init(&priv->rx_tasklet, ath9k_rx_tasklet,
494		     (unsigned long)priv);
495	tasklet_init(&priv->tx_failed_tasklet, ath9k_tx_failed_tasklet,
496		     (unsigned long)priv);
497	INIT_DELAYED_WORK(&priv->ani_work, ath9k_htc_ani_work);
498	INIT_WORK(&priv->ps_work, ath9k_ps_work);
499	INIT_WORK(&priv->fatal_work, ath9k_fatal_work);
500	setup_timer(&priv->tx.cleanup_timer, ath9k_htc_tx_cleanup_timer,
501		    (unsigned long)priv);
502
503	/*
504	 * Cache line size is used to size and align various
505	 * structures used to communicate with the hardware.
506	 */
507	ath_read_cachesize(common, &csz);
508	common->cachelsz = csz << 2; /* convert to bytes */
509
510	ret = ath9k_hw_init(ah);
511	if (ret) {
512		ath_err(common,
513			"Unable to initialize hardware; initialization status: %d\n",
514			ret);
515		goto err_hw;
516	}
517
518	ret = ath9k_init_queues(priv);
519	if (ret)
520		goto err_queues;
521
522	for (i = 0; i < ATH9K_HTC_MAX_BCN_VIF; i++)
523		priv->beacon.bslot[i] = NULL;
524	priv->beacon.slottime = ATH9K_SLOT_TIME_9;
525
526	ath9k_cmn_init_channels_rates(common);
527	ath9k_cmn_init_crypto(ah);
528	ath9k_init_misc(priv);
529	ath9k_htc_init_btcoex(priv, product);
530
531	return 0;
532
533err_queues:
534	ath9k_hw_deinit(ah);
535err_hw:
536
537	kfree(ah);
538	priv->ah = NULL;
539
540	return ret;
541}
542
543static const struct ieee80211_iface_limit if_limits[] = {
544	{ .max = 2,	.types = BIT(NL80211_IFTYPE_STATION) |
545				 BIT(NL80211_IFTYPE_P2P_CLIENT) },
546	{ .max = 2,	.types = BIT(NL80211_IFTYPE_AP) |
547#ifdef CONFIG_MAC80211_MESH
548				 BIT(NL80211_IFTYPE_MESH_POINT) |
549#endif
550				 BIT(NL80211_IFTYPE_P2P_GO) },
551};
552
553static const struct ieee80211_iface_combination if_comb = {
554	.limits = if_limits,
555	.n_limits = ARRAY_SIZE(if_limits),
556	.max_interfaces = 2,
557	.num_different_channels = 1,
558};
559
560static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv,
561			       struct ieee80211_hw *hw)
562{
563	struct ath_hw *ah = priv->ah;
564	struct ath_common *common = ath9k_hw_common(priv->ah);
565	struct base_eep_header *pBase;
566
567	hw->flags = IEEE80211_HW_SIGNAL_DBM |
568		IEEE80211_HW_AMPDU_AGGREGATION |
569		IEEE80211_HW_SPECTRUM_MGMT |
570		IEEE80211_HW_HAS_RATE_CONTROL |
571		IEEE80211_HW_RX_INCLUDES_FCS |
572		IEEE80211_HW_PS_NULLFUNC_STACK |
573		IEEE80211_HW_REPORTS_TX_ACK_STATUS |
574		IEEE80211_HW_MFP_CAPABLE |
575		IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING;
576
577	if (ath9k_ps_enable)
578		hw->flags |= IEEE80211_HW_SUPPORTS_PS;
579
580	hw->wiphy->interface_modes =
581		BIT(NL80211_IFTYPE_STATION) |
582		BIT(NL80211_IFTYPE_ADHOC) |
583		BIT(NL80211_IFTYPE_AP) |
584		BIT(NL80211_IFTYPE_P2P_GO) |
585		BIT(NL80211_IFTYPE_P2P_CLIENT) |
586		BIT(NL80211_IFTYPE_MESH_POINT);
587
588	hw->wiphy->iface_combinations = &if_comb;
589	hw->wiphy->n_iface_combinations = 1;
590
591	hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
592
593	hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN |
594			    WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL;
595
596	hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS;
597
598	hw->queues = 4;
599	hw->max_listen_interval = 1;
600
601	hw->vif_data_size = sizeof(struct ath9k_htc_vif);
602	hw->sta_data_size = sizeof(struct ath9k_htc_sta);
603
604	/* tx_frame_hdr is larger than tx_mgmt_hdr anyway */
605	hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) +
606		sizeof(struct htc_frame_hdr) + 4;
607
608	if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ)
609		hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
610			&common->sbands[IEEE80211_BAND_2GHZ];
611	if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
612		hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
613			&common->sbands[IEEE80211_BAND_5GHZ];
614
615	ath9k_cmn_reload_chainmask(ah);
616
617	pBase = ath9k_htc_get_eeprom_base(priv);
618	if (pBase) {
619		hw->wiphy->available_antennas_rx = pBase->rxMask;
620		hw->wiphy->available_antennas_tx = pBase->txMask;
621	}
622
623	SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
624}
625
626static int ath9k_init_firmware_version(struct ath9k_htc_priv *priv)
627{
628	struct ieee80211_hw *hw = priv->hw;
629	struct wmi_fw_version cmd_rsp;
630	int ret;
631
632	memset(&cmd_rsp, 0, sizeof(cmd_rsp));
633
634	WMI_CMD(WMI_GET_FW_VERSION);
635	if (ret)
636		return -EINVAL;
637
638	priv->fw_version_major = be16_to_cpu(cmd_rsp.major);
639	priv->fw_version_minor = be16_to_cpu(cmd_rsp.minor);
640
641	snprintf(hw->wiphy->fw_version, sizeof(hw->wiphy->fw_version), "%d.%d",
642		 priv->fw_version_major,
643		 priv->fw_version_minor);
644
645	dev_info(priv->dev, "ath9k_htc: FW Version: %d.%d\n",
646		 priv->fw_version_major,
647		 priv->fw_version_minor);
648
649	/*
650	 * Check if the available FW matches the driver's
651	 * required version.
652	 */
653	if (priv->fw_version_major != MAJOR_VERSION_REQ ||
654	    priv->fw_version_minor < MINOR_VERSION_REQ) {
655		dev_err(priv->dev, "ath9k_htc: Please upgrade to FW version %d.%d\n",
656			MAJOR_VERSION_REQ, MINOR_VERSION_REQ);
657		return -EINVAL;
658	}
659
660	return 0;
661}
662
663static int ath9k_init_device(struct ath9k_htc_priv *priv,
664			     u16 devid, char *product, u32 drv_info)
665{
666	struct ieee80211_hw *hw = priv->hw;
667	struct ath_common *common;
668	struct ath_hw *ah;
669	int error = 0;
670	struct ath_regulatory *reg;
671	char hw_name[64];
672
673	/* Bring up device */
674	error = ath9k_init_priv(priv, devid, product, drv_info);
675	if (error != 0)
676		goto err_init;
677
678	ah = priv->ah;
679	common = ath9k_hw_common(ah);
680	ath9k_set_hw_capab(priv, hw);
681
682	error = ath9k_init_firmware_version(priv);
683	if (error != 0)
684		goto err_fw;
685
686	/* Initialize regulatory */
687	error = ath_regd_init(&common->regulatory, priv->hw->wiphy,
688			      ath9k_reg_notifier);
689	if (error)
690		goto err_regd;
691
692	reg = &common->regulatory;
693
694	/* Setup TX */
695	error = ath9k_tx_init(priv);
696	if (error != 0)
697		goto err_tx;
698
699	/* Setup RX */
700	error = ath9k_rx_init(priv);
701	if (error != 0)
702		goto err_rx;
703
704	ath9k_hw_disable(priv->ah);
705#ifdef CONFIG_MAC80211_LEDS
706	/* must be initialized before ieee80211_register_hw */
707	priv->led_cdev.default_trigger = ieee80211_create_tpt_led_trigger(priv->hw,
708		IEEE80211_TPT_LEDTRIG_FL_RADIO, ath9k_htc_tpt_blink,
709		ARRAY_SIZE(ath9k_htc_tpt_blink));
710#endif
711
712	/* Register with mac80211 */
713	error = ieee80211_register_hw(hw);
714	if (error)
715		goto err_register;
716
717	/* Handle world regulatory */
718	if (!ath_is_world_regd(reg)) {
719		error = regulatory_hint(hw->wiphy, reg->alpha2);
720		if (error)
721			goto err_world;
722	}
723
724	error = ath9k_htc_init_debug(priv->ah);
725	if (error) {
726		ath_err(common, "Unable to create debugfs files\n");
727		goto err_world;
728	}
729
730	ath_dbg(common, CONFIG,
731		"WMI:%d, BCN:%d, CAB:%d, UAPSD:%d, MGMT:%d, BE:%d, BK:%d, VI:%d, VO:%d\n",
732		priv->wmi_cmd_ep,
733		priv->beacon_ep,
734		priv->cab_ep,
735		priv->uapsd_ep,
736		priv->mgmt_ep,
737		priv->data_be_ep,
738		priv->data_bk_ep,
739		priv->data_vi_ep,
740		priv->data_vo_ep);
741
742	ath9k_hw_name(priv->ah, hw_name, sizeof(hw_name));
743	wiphy_info(hw->wiphy, "%s\n", hw_name);
744
745	ath9k_init_leds(priv);
746	ath9k_start_rfkill_poll(priv);
747
748	return 0;
749
750err_world:
751	ieee80211_unregister_hw(hw);
752err_register:
753	ath9k_rx_cleanup(priv);
754err_rx:
755	ath9k_tx_cleanup(priv);
756err_tx:
757	/* Nothing */
758err_regd:
759	/* Nothing */
760err_fw:
761	ath9k_deinit_priv(priv);
762err_init:
763	return error;
764}
765
766int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev,
767			   u16 devid, char *product, u32 drv_info)
768{
769	struct ieee80211_hw *hw;
770	struct ath9k_htc_priv *priv;
771	int ret;
772
773	hw = ieee80211_alloc_hw(sizeof(struct ath9k_htc_priv), &ath9k_htc_ops);
774	if (!hw)
775		return -ENOMEM;
776
777	priv = hw->priv;
778	priv->hw = hw;
779	priv->htc = htc_handle;
780	priv->dev = dev;
781	htc_handle->drv_priv = priv;
782	SET_IEEE80211_DEV(hw, priv->dev);
783
784	ret = ath9k_htc_wait_for_target(priv);
785	if (ret)
786		goto err_free;
787
788	priv->wmi = ath9k_init_wmi(priv);
789	if (!priv->wmi) {
790		ret = -EINVAL;
791		goto err_free;
792	}
793
794	ret = ath9k_init_htc_services(priv, devid, drv_info);
795	if (ret)
796		goto err_init;
797
798	ret = ath9k_init_device(priv, devid, product, drv_info);
799	if (ret)
800		goto err_init;
801
802	return 0;
803
804err_init:
805	ath9k_deinit_wmi(priv);
806err_free:
807	ieee80211_free_hw(hw);
808	return ret;
809}
810
811void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug)
812{
813	if (htc_handle->drv_priv) {
814
815		/* Check if the device has been yanked out. */
816		if (hotunplug)
817			htc_handle->drv_priv->ah->ah_flags |= AH_UNPLUGGED;
818
819		ath9k_deinit_device(htc_handle->drv_priv);
820		ath9k_deinit_wmi(htc_handle->drv_priv);
821		ieee80211_free_hw(htc_handle->drv_priv->hw);
822	}
823}
824
825#ifdef CONFIG_PM
826
827void ath9k_htc_suspend(struct htc_target *htc_handle)
828{
829	ath9k_htc_setpower(htc_handle->drv_priv, ATH9K_PM_FULL_SLEEP);
830}
831
832int ath9k_htc_resume(struct htc_target *htc_handle)
833{
834	struct ath9k_htc_priv *priv = htc_handle->drv_priv;
835	int ret;
836
837	ret = ath9k_htc_wait_for_target(priv);
838	if (ret)
839		return ret;
840
841	ret = ath9k_init_htc_services(priv, priv->ah->hw_version.devid,
842				      priv->ah->hw_version.usbdev);
843	ath9k_configure_leds(priv);
844
845	return ret;
846}
847#endif
848
849static int __init ath9k_htc_init(void)
850{
851	if (ath9k_hif_usb_init() < 0) {
852		pr_err("No USB devices found, driver not installed\n");
853		return -ENODEV;
854	}
855
856	return 0;
857}
858module_init(ath9k_htc_init);
859
860static void __exit ath9k_htc_exit(void)
861{
862	ath9k_hif_usb_exit();
863	pr_info("Driver unloaded\n");
864}
865module_exit(ath9k_htc_exit);
866