[go: nahoru, domu]

1/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#ifndef _RX_DESC_H_
19#define _RX_DESC_H_
20
21enum rx_attention_flags {
22	RX_ATTENTION_FLAGS_FIRST_MPDU          = 1 << 0,
23	RX_ATTENTION_FLAGS_LAST_MPDU           = 1 << 1,
24	RX_ATTENTION_FLAGS_MCAST_BCAST         = 1 << 2,
25	RX_ATTENTION_FLAGS_PEER_IDX_INVALID    = 1 << 3,
26	RX_ATTENTION_FLAGS_PEER_IDX_TIMEOUT    = 1 << 4,
27	RX_ATTENTION_FLAGS_POWER_MGMT          = 1 << 5,
28	RX_ATTENTION_FLAGS_NON_QOS             = 1 << 6,
29	RX_ATTENTION_FLAGS_NULL_DATA           = 1 << 7,
30	RX_ATTENTION_FLAGS_MGMT_TYPE           = 1 << 8,
31	RX_ATTENTION_FLAGS_CTRL_TYPE           = 1 << 9,
32	RX_ATTENTION_FLAGS_MORE_DATA           = 1 << 10,
33	RX_ATTENTION_FLAGS_EOSP                = 1 << 11,
34	RX_ATTENTION_FLAGS_U_APSD_TRIGGER      = 1 << 12,
35	RX_ATTENTION_FLAGS_FRAGMENT            = 1 << 13,
36	RX_ATTENTION_FLAGS_ORDER               = 1 << 14,
37	RX_ATTENTION_FLAGS_CLASSIFICATION      = 1 << 15,
38	RX_ATTENTION_FLAGS_OVERFLOW_ERR        = 1 << 16,
39	RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR     = 1 << 17,
40	RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL = 1 << 18,
41	RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL      = 1 << 19,
42	RX_ATTENTION_FLAGS_SA_IDX_INVALID      = 1 << 20,
43	RX_ATTENTION_FLAGS_DA_IDX_INVALID      = 1 << 21,
44	RX_ATTENTION_FLAGS_SA_IDX_TIMEOUT      = 1 << 22,
45	RX_ATTENTION_FLAGS_DA_IDX_TIMEOUT      = 1 << 23,
46	RX_ATTENTION_FLAGS_ENCRYPT_REQUIRED    = 1 << 24,
47	RX_ATTENTION_FLAGS_DIRECTED            = 1 << 25,
48	RX_ATTENTION_FLAGS_BUFFER_FRAGMENT     = 1 << 26,
49	RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR     = 1 << 27,
50	RX_ATTENTION_FLAGS_TKIP_MIC_ERR        = 1 << 28,
51	RX_ATTENTION_FLAGS_DECRYPT_ERR         = 1 << 29,
52	RX_ATTENTION_FLAGS_FCS_ERR             = 1 << 30,
53	RX_ATTENTION_FLAGS_MSDU_DONE           = 1 << 31,
54};
55
56struct rx_attention {
57	__le32 flags; /* %RX_ATTENTION_FLAGS_ */
58} __packed;
59
60/*
61 * first_mpdu
62 *		Indicates the first MSDU of the PPDU.  If both first_mpdu
63 *		and last_mpdu are set in the MSDU then this is a not an
64 *		A-MPDU frame but a stand alone MPDU.  Interior MPDU in an
65 *		A-MPDU shall have both first_mpdu and last_mpdu bits set to
66 *		0.  The PPDU start status will only be valid when this bit
67 *		is set.
68 *
69 * last_mpdu
70 *		Indicates the last MSDU of the last MPDU of the PPDU.  The
71 *		PPDU end status will only be valid when this bit is set.
72 *
73 * mcast_bcast
74 *		Multicast / broadcast indicator.  Only set when the MAC
75 *		address 1 bit 0 is set indicating mcast/bcast and the BSSID
76 *		matches one of the 4 BSSID registers. Only set when
77 *		first_msdu is set.
78 *
79 * peer_idx_invalid
80 *		Indicates no matching entries within the the max search
81 *		count.  Only set when first_msdu is set.
82 *
83 * peer_idx_timeout
84 *		Indicates an unsuccessful search for the peer index due to
85 *		timeout.  Only set when first_msdu is set.
86 *
87 * power_mgmt
88 *		Power management bit set in the 802.11 header.  Only set
89 *		when first_msdu is set.
90 *
91 * non_qos
92 *		Set if packet is not a non-QoS data frame.  Only set when
93 *		first_msdu is set.
94 *
95 * null_data
96 *		Set if frame type indicates either null data or QoS null
97 *		data format.  Only set when first_msdu is set.
98 *
99 * mgmt_type
100 *		Set if packet is a management packet.  Only set when
101 *		first_msdu is set.
102 *
103 * ctrl_type
104 *		Set if packet is a control packet.  Only set when first_msdu
105 *		is set.
106 *
107 * more_data
108 *		Set if more bit in frame control is set.  Only set when
109 *		first_msdu is set.
110 *
111 * eosp
112 *		Set if the EOSP (end of service period) bit in the QoS
113 *		control field is set.  Only set when first_msdu is set.
114 *
115 * u_apsd_trigger
116 *		Set if packet is U-APSD trigger.  Key table will have bits
117 *		per TID to indicate U-APSD trigger.
118 *
119 * fragment
120 *		Indicates that this is an 802.11 fragment frame.  This is
121 *		set when either the more_frag bit is set in the frame
122 *		control or the fragment number is not zero.  Only set when
123 *		first_msdu is set.
124 *
125 * order
126 *		Set if the order bit in the frame control is set.  Only set
127 *		when first_msdu is set.
128 *
129 * classification
130 *		Indicates that this status has a corresponding MSDU that
131 *		requires FW processing.  The OLE will have classification
132 *		ring mask registers which will indicate the ring(s) for
133 *		packets and descriptors which need FW attention.
134 *
135 * overflow_err
136 *		PCU Receive FIFO does not have enough space to store the
137 *		full receive packet.  Enough space is reserved in the
138 *		receive FIFO for the status is written.  This MPDU remaining
139 *		packets in the PPDU will be filtered and no Ack response
140 *		will be transmitted.
141 *
142 * msdu_length_err
143 *		Indicates that the MSDU length from the 802.3 encapsulated
144 *		length field extends beyond the MPDU boundary.
145 *
146 * tcp_udp_chksum_fail
147 *		Indicates that the computed checksum (tcp_udp_chksum) did
148 *		not match the checksum in the TCP/UDP header.
149 *
150 * ip_chksum_fail
151 *		Indicates that the computed checksum did not match the
152 *		checksum in the IP header.
153 *
154 * sa_idx_invalid
155 *		Indicates no matching entry was found in the address search
156 *		table for the source MAC address.
157 *
158 * da_idx_invalid
159 *		Indicates no matching entry was found in the address search
160 *		table for the destination MAC address.
161 *
162 * sa_idx_timeout
163 *		Indicates an unsuccessful search for the source MAC address
164 *		due to the expiring of the search timer.
165 *
166 * da_idx_timeout
167 *		Indicates an unsuccessful search for the destination MAC
168 *		address due to the expiring of the search timer.
169 *
170 * encrypt_required
171 *		Indicates that this data type frame is not encrypted even if
172 *		the policy for this MPDU requires encryption as indicated in
173 *		the peer table key type.
174 *
175 * directed
176 *		MPDU is a directed packet which means that the RA matched
177 *		our STA addresses.  In proxySTA it means that the TA matched
178 *		an entry in our address search table with the corresponding
179 *		'no_ack' bit is the address search entry cleared.
180 *
181 * buffer_fragment
182 *		Indicates that at least one of the rx buffers has been
183 *		fragmented.  If set the FW should look at the rx_frag_info
184 *		descriptor described below.
185 *
186 * mpdu_length_err
187 *		Indicates that the MPDU was pre-maturely terminated
188 *		resulting in a truncated MPDU.  Don't trust the MPDU length
189 *		field.
190 *
191 * tkip_mic_err
192 *		Indicates that the MPDU Michael integrity check failed
193 *
194 * decrypt_err
195 *		Indicates that the MPDU decrypt integrity check failed
196 *
197 * fcs_err
198 *		Indicates that the MPDU FCS check failed
199 *
200 * msdu_done
201 *		If set indicates that the RX packet data, RX header data, RX
202 *		PPDU start descriptor, RX MPDU start/end descriptor, RX MSDU
203 *		start/end descriptors and RX Attention descriptor are all
204 *		valid.  This bit must be in the last octet of the
205 *		descriptor.
206 */
207
208struct rx_frag_info {
209	u8 ring0_more_count;
210	u8 ring1_more_count;
211	u8 ring2_more_count;
212	u8 ring3_more_count;
213} __packed;
214
215/*
216 * ring0_more_count
217 *		Indicates the number of more buffers associated with RX DMA
218 *		ring 0.  Field is filled in by the RX_DMA.
219 *
220 * ring1_more_count
221 *		Indicates the number of more buffers associated with RX DMA
222 *		ring 1. Field is filled in by the RX_DMA.
223 *
224 * ring2_more_count
225 *		Indicates the number of more buffers associated with RX DMA
226 *		ring 2. Field is filled in by the RX_DMA.
227 *
228 * ring3_more_count
229 *		Indicates the number of more buffers associated with RX DMA
230 *		ring 3. Field is filled in by the RX_DMA.
231 */
232
233enum htt_rx_mpdu_encrypt_type {
234	HTT_RX_MPDU_ENCRYPT_WEP40            = 0,
235	HTT_RX_MPDU_ENCRYPT_WEP104           = 1,
236	HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC = 2,
237	HTT_RX_MPDU_ENCRYPT_WEP128           = 3,
238	HTT_RX_MPDU_ENCRYPT_TKIP_WPA         = 4,
239	HTT_RX_MPDU_ENCRYPT_WAPI             = 5,
240	HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2     = 6,
241	HTT_RX_MPDU_ENCRYPT_NONE             = 7,
242};
243
244#define RX_MPDU_START_INFO0_PEER_IDX_MASK     0x000007ff
245#define RX_MPDU_START_INFO0_PEER_IDX_LSB      0
246#define RX_MPDU_START_INFO0_SEQ_NUM_MASK      0x0fff0000
247#define RX_MPDU_START_INFO0_SEQ_NUM_LSB       16
248#define RX_MPDU_START_INFO0_ENCRYPT_TYPE_MASK 0xf0000000
249#define RX_MPDU_START_INFO0_ENCRYPT_TYPE_LSB  28
250#define RX_MPDU_START_INFO0_FROM_DS           (1 << 11)
251#define RX_MPDU_START_INFO0_TO_DS             (1 << 12)
252#define RX_MPDU_START_INFO0_ENCRYPTED         (1 << 13)
253#define RX_MPDU_START_INFO0_RETRY             (1 << 14)
254#define RX_MPDU_START_INFO0_TXBF_H_INFO       (1 << 15)
255
256#define RX_MPDU_START_INFO1_TID_MASK 0xf0000000
257#define RX_MPDU_START_INFO1_TID_LSB  28
258#define RX_MPDU_START_INFO1_DIRECTED (1 << 16)
259
260struct rx_mpdu_start {
261	__le32 info0;
262	union {
263		struct {
264			__le32 pn31_0;
265			__le32 info1; /* %RX_MPDU_START_INFO1_ */
266		} __packed;
267		struct {
268			u8 pn[6];
269		} __packed;
270	} __packed;
271} __packed;
272
273/*
274 * peer_idx
275 *		The index of the address search table which associated with
276 *		the peer table entry corresponding to this MPDU.  Only valid
277 *		when first_msdu is set.
278 *
279 * fr_ds
280 *		Set if the from DS bit is set in the frame control.  Only
281 *		valid when first_msdu is set.
282 *
283 * to_ds
284 *		Set if the to DS bit is set in the frame control.  Only
285 *		valid when first_msdu is set.
286 *
287 * encrypted
288 *		Protected bit from the frame control.  Only valid when
289 *		first_msdu is set.
290 *
291 * retry
292 *		Retry bit from the frame control.  Only valid when
293 *		first_msdu is set.
294 *
295 * txbf_h_info
296 *		The MPDU data will contain H information.  Primarily used
297 *		for debug.
298 *
299 * seq_num
300 *		The sequence number from the 802.11 header.  Only valid when
301 *		first_msdu is set.
302 *
303 * encrypt_type
304 *		Indicates type of decrypt cipher used (as defined in the
305 *		peer table)
306 *		0: WEP40
307 *		1: WEP104
308 *		2: TKIP without MIC
309 *		3: WEP128
310 *		4: TKIP (WPA)
311 *		5: WAPI
312 *		6: AES-CCM (WPA2)
313 *		7: No cipher
314 *		Only valid when first_msdu_is set
315 *
316 * pn_31_0
317 *		Bits [31:0] of the PN number extracted from the IV field
318 *		WEP: IV = {key_id_octet, pn2, pn1, pn0}.  Only pn[23:0] is
319 *		valid.
320 *		TKIP: IV = {pn5, pn4, pn3, pn2, key_id_octet, pn0,
321 *		WEPSeed[1], pn1}.  Only pn[47:0] is valid.
322 *		AES-CCM: IV = {pn5, pn4, pn3, pn2, key_id_octet, 0x0, pn1,
323 *		pn0}.  Only pn[47:0] is valid.
324 *		WAPI: IV = {key_id_octet, 0x0, pn15, pn14, pn13, pn12, pn11,
325 *		pn10, pn9, pn8, pn7, pn6, pn5, pn4, pn3, pn2, pn1, pn0}.
326 *		The ext_wapi_pn[127:48] in the rx_msdu_misc descriptor and
327 *		pn[47:0] are valid.
328 *		Only valid when first_msdu is set.
329 *
330 * pn_47_32
331 *		Bits [47:32] of the PN number.   See description for
332 *		pn_31_0.  The remaining PN fields are in the rx_msdu_end
333 *		descriptor
334 *
335 * pn
336 *		Use this field to access the pn without worrying about
337 *		byte-order and bitmasking/bitshifting.
338 *
339 * directed
340 *		See definition in RX attention descriptor
341 *
342 * reserved_2
343 *		Reserved: HW should fill with zero.  FW should ignore.
344 *
345 * tid
346 *		The TID field in the QoS control field
347 */
348
349#define RX_MPDU_END_INFO0_RESERVED_0_MASK     0x00001fff
350#define RX_MPDU_END_INFO0_RESERVED_0_LSB      0
351#define RX_MPDU_END_INFO0_POST_DELIM_CNT_MASK 0x0fff0000
352#define RX_MPDU_END_INFO0_POST_DELIM_CNT_LSB  16
353#define RX_MPDU_END_INFO0_OVERFLOW_ERR        (1 << 13)
354#define RX_MPDU_END_INFO0_LAST_MPDU           (1 << 14)
355#define RX_MPDU_END_INFO0_POST_DELIM_ERR      (1 << 15)
356#define RX_MPDU_END_INFO0_MPDU_LENGTH_ERR     (1 << 28)
357#define RX_MPDU_END_INFO0_TKIP_MIC_ERR        (1 << 29)
358#define RX_MPDU_END_INFO0_DECRYPT_ERR         (1 << 30)
359#define RX_MPDU_END_INFO0_FCS_ERR             (1 << 31)
360
361struct rx_mpdu_end {
362	__le32 info0;
363} __packed;
364
365/*
366 * reserved_0
367 *		Reserved
368 *
369 * overflow_err
370 *		PCU Receive FIFO does not have enough space to store the
371 *		full receive packet.  Enough space is reserved in the
372 *		receive FIFO for the status is written.  This MPDU remaining
373 *		packets in the PPDU will be filtered and no Ack response
374 *		will be transmitted.
375 *
376 * last_mpdu
377 *		Indicates that this is the last MPDU of a PPDU.
378 *
379 * post_delim_err
380 *		Indicates that a delimiter FCS error occurred after this
381 *		MPDU before the next MPDU.  Only valid when last_msdu is
382 *		set.
383 *
384 * post_delim_cnt
385 *		Count of the delimiters after this MPDU.  This requires the
386 *		last MPDU to be held until all the EOF descriptors have been
387 *		received.  This may be inefficient in the future when
388 *		ML-MIMO is used.  Only valid when last_mpdu is set.
389 *
390 * mpdu_length_err
391 *		See definition in RX attention descriptor
392 *
393 * tkip_mic_err
394 *		See definition in RX attention descriptor
395 *
396 * decrypt_err
397 *		See definition in RX attention descriptor
398 *
399 * fcs_err
400 *		See definition in RX attention descriptor
401 */
402
403#define RX_MSDU_START_INFO0_MSDU_LENGTH_MASK    0x00003fff
404#define RX_MSDU_START_INFO0_MSDU_LENGTH_LSB     0
405#define RX_MSDU_START_INFO0_IP_OFFSET_MASK      0x000fc000
406#define RX_MSDU_START_INFO0_IP_OFFSET_LSB       14
407#define RX_MSDU_START_INFO0_RING_MASK_MASK      0x00f00000
408#define RX_MSDU_START_INFO0_RING_MASK_LSB       20
409#define RX_MSDU_START_INFO0_TCP_UDP_OFFSET_MASK 0x7f000000
410#define RX_MSDU_START_INFO0_TCP_UDP_OFFSET_LSB  24
411
412#define RX_MSDU_START_INFO1_MSDU_NUMBER_MASK    0x000000ff
413#define RX_MSDU_START_INFO1_MSDU_NUMBER_LSB     0
414#define RX_MSDU_START_INFO1_DECAP_FORMAT_MASK   0x00000300
415#define RX_MSDU_START_INFO1_DECAP_FORMAT_LSB    8
416#define RX_MSDU_START_INFO1_SA_IDX_MASK         0x07ff0000
417#define RX_MSDU_START_INFO1_SA_IDX_LSB          16
418#define RX_MSDU_START_INFO1_IPV4_PROTO          (1 << 10)
419#define RX_MSDU_START_INFO1_IPV6_PROTO          (1 << 11)
420#define RX_MSDU_START_INFO1_TCP_PROTO           (1 << 12)
421#define RX_MSDU_START_INFO1_UDP_PROTO           (1 << 13)
422#define RX_MSDU_START_INFO1_IP_FRAG             (1 << 14)
423#define RX_MSDU_START_INFO1_TCP_ONLY_ACK        (1 << 15)
424
425/* The decapped header (rx_hdr_status) contains the following:
426 *  a) 802.11 header
427 *  [padding to 4 bytes]
428 *  b) HW crypto parameter
429 *     - 0 bytes for no security
430 *     - 4 bytes for WEP
431 *     - 8 bytes for TKIP, AES
432 *  [padding to 4 bytes]
433 *  c) A-MSDU subframe header (14 bytes) if appliable
434 *  d) LLC/SNAP (RFC1042, 8 bytes)
435 *
436 * In case of A-MSDU only first frame in sequence contains (a) and (b). */
437enum rx_msdu_decap_format {
438	RX_MSDU_DECAP_RAW = 0,
439
440	/* Note: QoS frames are reported as non-QoS. The rx_hdr_status in
441	 * htt_rx_desc contains the original decapped 802.11 header. */
442	RX_MSDU_DECAP_NATIVE_WIFI = 1,
443
444	/* Payload contains an ethernet header (struct ethhdr). */
445	RX_MSDU_DECAP_ETHERNET2_DIX = 2,
446
447	/* Payload contains two 48-bit addresses and 2-byte length (14 bytes
448	 * total), followed by an RFC1042 header (8 bytes). */
449	RX_MSDU_DECAP_8023_SNAP_LLC = 3
450};
451
452struct rx_msdu_start {
453	__le32 info0; /* %RX_MSDU_START_INFO0_ */
454	__le32 flow_id_crc;
455	__le32 info1; /* %RX_MSDU_START_INFO1_ */
456} __packed;
457
458/*
459 * msdu_length
460 *		MSDU length in bytes after decapsulation.  This field is
461 *		still valid for MPDU frames without A-MSDU.  It still
462 *		represents MSDU length after decapsulation
463 *
464 * ip_offset
465 *		Indicates the IP offset in bytes from the start of the
466 *		packet after decapsulation.  Only valid if ipv4_proto or
467 *		ipv6_proto is set.
468 *
469 * ring_mask
470 *		Indicates the destination RX rings for this MSDU.
471 *
472 * tcp_udp_offset
473 *		Indicates the offset in bytes to the start of TCP or UDP
474 *		header from the start of the IP header after decapsulation.
475 *		Only valid if tcp_prot or udp_prot is set.  The value 0
476 *		indicates that the offset is longer than 127 bytes.
477 *
478 * reserved_0c
479 *		Reserved: HW should fill with zero.  FW should ignore.
480 *
481 * flow_id_crc
482 *		The flow_id_crc runs CRC32 on the following information:
483 *		IPv4 option: dest_addr[31:0], src_addr [31:0], {24'b0,
484 *		protocol[7:0]}.
485 *		IPv6 option: dest_addr[127:0], src_addr [127:0], {24'b0,
486 *		next_header[7:0]}
487 *		UDP case: sort_port[15:0], dest_port[15:0]
488 *		TCP case: sort_port[15:0], dest_port[15:0],
489 *		{header_length[3:0], 6'b0, flags[5:0], window_size[15:0]},
490 *		{16'b0, urgent_ptr[15:0]}, all options except 32-bit
491 *		timestamp.
492 *
493 * msdu_number
494 *		Indicates the MSDU number within a MPDU.  This value is
495 *		reset to zero at the start of each MPDU.  If the number of
496 *		MSDU exceeds 255 this number will wrap using modulo 256.
497 *
498 * decap_format
499 *		Indicates the format after decapsulation:
500 *		0: RAW: No decapsulation
501 *		1: Native WiFi
502 *		2: Ethernet 2 (DIX)
503 *		3: 802.3 (SNAP/LLC)
504 *
505 * ipv4_proto
506 *		Set if L2 layer indicates IPv4 protocol.
507 *
508 * ipv6_proto
509 *		Set if L2 layer indicates IPv6 protocol.
510 *
511 * tcp_proto
512 *		Set if the ipv4_proto or ipv6_proto are set and the IP
513 *		protocol indicates TCP.
514 *
515 * udp_proto
516 *		Set if the ipv4_proto or ipv6_proto are set and the IP
517 *			protocol indicates UDP.
518 *
519 * ip_frag
520 *		Indicates that either the IP More frag bit is set or IP frag
521 *		number is non-zero.  If set indicates that this is a
522 *		fragmented IP packet.
523 *
524 * tcp_only_ack
525 *		Set if only the TCP Ack bit is set in the TCP flags and if
526 *		the TCP payload is 0.
527 *
528 * sa_idx
529 *		The offset in the address table which matches the MAC source
530 *		address.
531 *
532 * reserved_2b
533 *		Reserved: HW should fill with zero.  FW should ignore.
534 */
535
536#define RX_MSDU_END_INFO0_REPORTED_MPDU_LENGTH_MASK 0x00003fff
537#define RX_MSDU_END_INFO0_REPORTED_MPDU_LENGTH_LSB  0
538#define RX_MSDU_END_INFO0_FIRST_MSDU                (1 << 14)
539#define RX_MSDU_END_INFO0_LAST_MSDU                 (1 << 15)
540#define RX_MSDU_END_INFO0_PRE_DELIM_ERR             (1 << 30)
541#define RX_MSDU_END_INFO0_RESERVED_3B               (1 << 31)
542
543struct rx_msdu_end {
544	__le16 ip_hdr_cksum;
545	__le16 tcp_hdr_cksum;
546	u8 key_id_octet;
547	u8 classification_filter;
548	u8 wapi_pn[10];
549	__le32 info0;
550} __packed;
551
552/*
553 *ip_hdr_chksum
554 *		This can include the IP header checksum or the pseudo header
555 *		checksum used by TCP/UDP checksum.
556 *
557 *tcp_udp_chksum
558 *		The value of the computed TCP/UDP checksum.  A mode bit
559 *		selects whether this checksum is the full checksum or the
560 *		partial checksum which does not include the pseudo header.
561 *
562 *key_id_octet
563 *		The key ID octet from the IV.  Only valid when first_msdu is
564 *		set.
565 *
566 *classification_filter
567 *		Indicates the number classification filter rule
568 *
569 *ext_wapi_pn_63_48
570 *		Extension PN (packet number) which is only used by WAPI.
571 *		This corresponds to WAPI PN bits [63:48] (pn6 and pn7).  The
572 *		WAPI PN bits [63:0] are in the pn field of the rx_mpdu_start
573 *		descriptor.
574 *
575 *ext_wapi_pn_95_64
576 *		Extension PN (packet number) which is only used by WAPI.
577 *		This corresponds to WAPI PN bits [95:64] (pn8, pn9, pn10 and
578 *		pn11).
579 *
580 *ext_wapi_pn_127_96
581 *		Extension PN (packet number) which is only used by WAPI.
582 *		This corresponds to WAPI PN bits [127:96] (pn12, pn13, pn14,
583 *		pn15).
584 *
585 *reported_mpdu_length
586 *		MPDU length before decapsulation.  Only valid when
587 *		first_msdu is set.  This field is taken directly from the
588 *		length field of the A-MPDU delimiter or the preamble length
589 *		field for non-A-MPDU frames.
590 *
591 *first_msdu
592 *		Indicates the first MSDU of A-MSDU.  If both first_msdu and
593 *		last_msdu are set in the MSDU then this is a non-aggregated
594 *		MSDU frame: normal MPDU.  Interior MSDU in an A-MSDU shall
595 *		have both first_mpdu and last_mpdu bits set to 0.
596 *
597 *last_msdu
598 *		Indicates the last MSDU of the A-MSDU.  MPDU end status is
599 *		only valid when last_msdu is set.
600 *
601 *reserved_3a
602 *		Reserved: HW should fill with zero.  FW should ignore.
603 *
604 *pre_delim_err
605 *		Indicates that the first delimiter had a FCS failure.  Only
606 *		valid when first_mpdu and first_msdu are set.
607 *
608 *reserved_3b
609 *		Reserved: HW should fill with zero.  FW should ignore.
610 */
611
612#define RX_PPDU_START_SIG_RATE_SELECT_OFDM 0
613#define RX_PPDU_START_SIG_RATE_SELECT_CCK  1
614
615#define RX_PPDU_START_SIG_RATE_OFDM_48 0
616#define RX_PPDU_START_SIG_RATE_OFDM_24 1
617#define RX_PPDU_START_SIG_RATE_OFDM_12 2
618#define RX_PPDU_START_SIG_RATE_OFDM_6  3
619#define RX_PPDU_START_SIG_RATE_OFDM_54 4
620#define RX_PPDU_START_SIG_RATE_OFDM_36 5
621#define RX_PPDU_START_SIG_RATE_OFDM_18 6
622#define RX_PPDU_START_SIG_RATE_OFDM_9  7
623
624#define RX_PPDU_START_SIG_RATE_CCK_LP_11  0
625#define RX_PPDU_START_SIG_RATE_CCK_LP_5_5 1
626#define RX_PPDU_START_SIG_RATE_CCK_LP_2   2
627#define RX_PPDU_START_SIG_RATE_CCK_LP_1   3
628#define RX_PPDU_START_SIG_RATE_CCK_SP_11  4
629#define RX_PPDU_START_SIG_RATE_CCK_SP_5_5 5
630#define RX_PPDU_START_SIG_RATE_CCK_SP_2   6
631
632#define HTT_RX_PPDU_START_PREAMBLE_LEGACY        0x04
633#define HTT_RX_PPDU_START_PREAMBLE_HT            0x08
634#define HTT_RX_PPDU_START_PREAMBLE_HT_WITH_TXBF  0x09
635#define HTT_RX_PPDU_START_PREAMBLE_VHT           0x0C
636#define HTT_RX_PPDU_START_PREAMBLE_VHT_WITH_TXBF 0x0D
637
638#define RX_PPDU_START_INFO0_IS_GREENFIELD (1 << 0)
639
640#define RX_PPDU_START_INFO1_L_SIG_RATE_MASK    0x0000000f
641#define RX_PPDU_START_INFO1_L_SIG_RATE_LSB     0
642#define RX_PPDU_START_INFO1_L_SIG_LENGTH_MASK  0x0001ffe0
643#define RX_PPDU_START_INFO1_L_SIG_LENGTH_LSB   5
644#define RX_PPDU_START_INFO1_L_SIG_TAIL_MASK    0x00fc0000
645#define RX_PPDU_START_INFO1_L_SIG_TAIL_LSB     18
646#define RX_PPDU_START_INFO1_PREAMBLE_TYPE_MASK 0xff000000
647#define RX_PPDU_START_INFO1_PREAMBLE_TYPE_LSB  24
648#define RX_PPDU_START_INFO1_L_SIG_RATE_SELECT  (1 << 4)
649#define RX_PPDU_START_INFO1_L_SIG_PARITY       (1 << 17)
650
651#define RX_PPDU_START_INFO2_HT_SIG_VHT_SIG_A_1_MASK 0x00ffffff
652#define RX_PPDU_START_INFO2_HT_SIG_VHT_SIG_A_1_LSB  0
653
654#define RX_PPDU_START_INFO3_HT_SIG_VHT_SIG_A_2_MASK 0x00ffffff
655#define RX_PPDU_START_INFO3_HT_SIG_VHT_SIG_A_2_LSB  0
656#define RX_PPDU_START_INFO3_TXBF_H_INFO             (1 << 24)
657
658#define RX_PPDU_START_INFO4_VHT_SIG_B_MASK 0x1fffffff
659#define RX_PPDU_START_INFO4_VHT_SIG_B_LSB  0
660
661#define RX_PPDU_START_INFO5_SERVICE_MASK 0x0000ffff
662#define RX_PPDU_START_INFO5_SERVICE_LSB  0
663
664struct rx_ppdu_start {
665	struct {
666		u8 pri20_mhz;
667		u8 ext20_mhz;
668		u8 ext40_mhz;
669		u8 ext80_mhz;
670	} rssi_chains[4];
671	u8 rssi_comb;
672	__le16 rsvd0;
673	u8 info0; /* %RX_PPDU_START_INFO0_ */
674	__le32 info1; /* %RX_PPDU_START_INFO1_ */
675	__le32 info2; /* %RX_PPDU_START_INFO2_ */
676	__le32 info3; /* %RX_PPDU_START_INFO3_ */
677	__le32 info4; /* %RX_PPDU_START_INFO4_ */
678	__le32 info5; /* %RX_PPDU_START_INFO5_ */
679} __packed;
680
681/*
682 * rssi_chain0_pri20
683 *		RSSI of RX PPDU on chain 0 of primary 20 MHz bandwidth.
684 *		Value of 0x80 indicates invalid.
685 *
686 * rssi_chain0_sec20
687 *		RSSI of RX PPDU on chain 0 of secondary 20 MHz bandwidth.
688 *		Value of 0x80 indicates invalid.
689 *
690 * rssi_chain0_sec40
691 *		RSSI of RX PPDU on chain 0 of secondary 40 MHz bandwidth.
692 *		Value of 0x80 indicates invalid.
693 *
694 * rssi_chain0_sec80
695 *		RSSI of RX PPDU on chain 0 of secondary 80 MHz bandwidth.
696 *		Value of 0x80 indicates invalid.
697 *
698 * rssi_chain1_pri20
699 *		RSSI of RX PPDU on chain 1 of primary 20 MHz bandwidth.
700 *		Value of 0x80 indicates invalid.
701 *
702 * rssi_chain1_sec20
703 *		RSSI of RX PPDU on chain 1 of secondary 20 MHz bandwidth.
704 *		Value of 0x80 indicates invalid.
705 *
706 * rssi_chain1_sec40
707 *		RSSI of RX PPDU on chain 1 of secondary 40 MHz bandwidth.
708 *		Value of 0x80 indicates invalid.
709 *
710 * rssi_chain1_sec80
711 *		RSSI of RX PPDU on chain 1 of secondary 80 MHz bandwidth.
712 *		Value of 0x80 indicates invalid.
713 *
714 * rssi_chain2_pri20
715 *		RSSI of RX PPDU on chain 2 of primary 20 MHz bandwidth.
716 *		Value of 0x80 indicates invalid.
717 *
718 * rssi_chain2_sec20
719 *		RSSI of RX PPDU on chain 2 of secondary 20 MHz bandwidth.
720 *		Value of 0x80 indicates invalid.
721 *
722 * rssi_chain2_sec40
723 *		RSSI of RX PPDU on chain 2 of secondary 40 MHz bandwidth.
724 *		Value of 0x80 indicates invalid.
725 *
726 * rssi_chain2_sec80
727 *		RSSI of RX PPDU on chain 2 of secondary 80 MHz bandwidth.
728 *		Value of 0x80 indicates invalid.
729 *
730 * rssi_chain3_pri20
731 *		RSSI of RX PPDU on chain 3 of primary 20 MHz bandwidth.
732 *		Value of 0x80 indicates invalid.
733 *
734 * rssi_chain3_sec20
735 *		RSSI of RX PPDU on chain 3 of secondary 20 MHz bandwidth.
736 *		Value of 0x80 indicates invalid.
737 *
738 * rssi_chain3_sec40
739 *		RSSI of RX PPDU on chain 3 of secondary 40 MHz bandwidth.
740 *		Value of 0x80 indicates invalid.
741 *
742 * rssi_chain3_sec80
743 *		RSSI of RX PPDU on chain 3 of secondary 80 MHz bandwidth.
744 *		Value of 0x80 indicates invalid.
745 *
746 * rssi_comb
747 *		The combined RSSI of RX PPDU of all active chains and
748 *		bandwidths.  Value of 0x80 indicates invalid.
749 *
750 * reserved_4a
751 *		Reserved: HW should fill with 0, FW should ignore.
752 *
753 * is_greenfield
754 *		Do we really support this?
755 *
756 * reserved_4b
757 *		Reserved: HW should fill with 0, FW should ignore.
758 *
759 * l_sig_rate
760 *		If l_sig_rate_select is 0:
761 *		0x8: OFDM 48 Mbps
762 *		0x9: OFDM 24 Mbps
763 *		0xA: OFDM 12 Mbps
764 *		0xB: OFDM 6 Mbps
765 *		0xC: OFDM 54 Mbps
766 *		0xD: OFDM 36 Mbps
767 *		0xE: OFDM 18 Mbps
768 *		0xF: OFDM 9 Mbps
769 *		If l_sig_rate_select is 1:
770 *		0x8: CCK 11 Mbps long preamble
771 *		0x9: CCK 5.5 Mbps long preamble
772 *		0xA: CCK 2 Mbps long preamble
773 *		0xB: CCK 1 Mbps long preamble
774 *		0xC: CCK 11 Mbps short preamble
775 *		0xD: CCK 5.5 Mbps short preamble
776 *		0xE: CCK 2 Mbps short preamble
777 *
778 * l_sig_rate_select
779 *		Legacy signal rate select.  If set then l_sig_rate indicates
780 *		CCK rates.  If clear then l_sig_rate indicates OFDM rates.
781 *
782 * l_sig_length
783 *		Length of legacy frame in octets.
784 *
785 * l_sig_parity
786 *		Odd parity over l_sig_rate and l_sig_length
787 *
788 * l_sig_tail
789 *		Tail bits for Viterbi decoder
790 *
791 * preamble_type
792 *		Indicates the type of preamble ahead:
793 *		0x4: Legacy (OFDM/CCK)
794 *		0x8: HT
795 *		0x9: HT with TxBF
796 *		0xC: VHT
797 *		0xD: VHT with TxBF
798 *		0x80 - 0xFF: Reserved for special baseband data types such
799 *		as radar and spectral scan.
800 *
801 * ht_sig_vht_sig_a_1
802 *		If preamble_type == 0x8 or 0x9
803 *		HT-SIG (first 24 bits)
804 *		If preamble_type == 0xC or 0xD
805 *		VHT-SIG A (first 24 bits)
806 *		Else
807 *		Reserved
808 *
809 * reserved_6
810 *		Reserved: HW should fill with 0, FW should ignore.
811 *
812 * ht_sig_vht_sig_a_2
813 *		If preamble_type == 0x8 or 0x9
814 *		HT-SIG (last 24 bits)
815 *		If preamble_type == 0xC or 0xD
816 *		VHT-SIG A (last 24 bits)
817 *		Else
818 *		Reserved
819 *
820 * txbf_h_info
821 *		Indicates that the packet data carries H information which
822 *		is used for TxBF debug.
823 *
824 * reserved_7
825 *		Reserved: HW should fill with 0, FW should ignore.
826 *
827 * vht_sig_b
828 *		WiFi 1.0 and WiFi 2.0 will likely have this field to be all
829 *		0s since the BB does not plan on decoding VHT SIG-B.
830 *
831 * reserved_8
832 *		Reserved: HW should fill with 0, FW should ignore.
833 *
834 * service
835 *		Service field from BB for OFDM, HT and VHT packets.  CCK
836 *		packets will have service field of 0.
837 *
838 * reserved_9
839 *		Reserved: HW should fill with 0, FW should ignore.
840*/
841
842#define RX_PPDU_END_FLAGS_PHY_ERR             (1 << 0)
843#define RX_PPDU_END_FLAGS_RX_LOCATION         (1 << 1)
844#define RX_PPDU_END_FLAGS_TXBF_H_INFO         (1 << 2)
845
846#define RX_PPDU_END_INFO0_RX_ANTENNA_MASK     0x00ffffff
847#define RX_PPDU_END_INFO0_RX_ANTENNA_LSB      0
848#define RX_PPDU_END_INFO0_FLAGS_TX_HT_VHT_ACK (1 << 24)
849#define RX_PPDU_END_INFO0_BB_CAPTURED_CHANNEL (1 << 25)
850
851#define RX_PPDU_END_INFO1_PPDU_DONE (1 << 15)
852
853struct rx_ppdu_end {
854	__le32 evm_p0;
855	__le32 evm_p1;
856	__le32 evm_p2;
857	__le32 evm_p3;
858	__le32 evm_p4;
859	__le32 evm_p5;
860	__le32 evm_p6;
861	__le32 evm_p7;
862	__le32 evm_p8;
863	__le32 evm_p9;
864	__le32 evm_p10;
865	__le32 evm_p11;
866	__le32 evm_p12;
867	__le32 evm_p13;
868	__le32 evm_p14;
869	__le32 evm_p15;
870	__le32 tsf_timestamp;
871	__le32 wb_timestamp;
872	u8 locationing_timestamp;
873	u8 phy_err_code;
874	__le16 flags; /* %RX_PPDU_END_FLAGS_ */
875	__le32 info0; /* %RX_PPDU_END_INFO0_ */
876	__le16 bb_length;
877	__le16 info1; /* %RX_PPDU_END_INFO1_ */
878} __packed;
879
880/*
881 * evm_p0
882 *		EVM for pilot 0.  Contain EVM for streams: 0, 1, 2 and 3.
883 *
884 * evm_p1
885 *		EVM for pilot 1.  Contain EVM for streams: 0, 1, 2 and 3.
886 *
887 * evm_p2
888 *		EVM for pilot 2.  Contain EVM for streams: 0, 1, 2 and 3.
889 *
890 * evm_p3
891 *		EVM for pilot 3.  Contain EVM for streams: 0, 1, 2 and 3.
892 *
893 * evm_p4
894 *		EVM for pilot 4.  Contain EVM for streams: 0, 1, 2 and 3.
895 *
896 * evm_p5
897 *		EVM for pilot 5.  Contain EVM for streams: 0, 1, 2 and 3.
898 *
899 * evm_p6
900 *		EVM for pilot 6.  Contain EVM for streams: 0, 1, 2 and 3.
901 *
902 * evm_p7
903 *		EVM for pilot 7.  Contain EVM for streams: 0, 1, 2 and 3.
904 *
905 * evm_p8
906 *		EVM for pilot 8.  Contain EVM for streams: 0, 1, 2 and 3.
907 *
908 * evm_p9
909 *		EVM for pilot 9.  Contain EVM for streams: 0, 1, 2 and 3.
910 *
911 * evm_p10
912 *		EVM for pilot 10.  Contain EVM for streams: 0, 1, 2 and 3.
913 *
914 * evm_p11
915 *		EVM for pilot 11.  Contain EVM for streams: 0, 1, 2 and 3.
916 *
917 * evm_p12
918 *		EVM for pilot 12.  Contain EVM for streams: 0, 1, 2 and 3.
919 *
920 * evm_p13
921 *		EVM for pilot 13.  Contain EVM for streams: 0, 1, 2 and 3.
922 *
923 * evm_p14
924 *		EVM for pilot 14.  Contain EVM for streams: 0, 1, 2 and 3.
925 *
926 * evm_p15
927 *		EVM for pilot 15.  Contain EVM for streams: 0, 1, 2 and 3.
928 *
929 * tsf_timestamp
930 *		Receive TSF timestamp sampled on the rising edge of
931 *		rx_clear.  For PHY errors this may be the current TSF when
932 *		phy_error is asserted if the rx_clear does not assert before
933 *		the end of the PHY error.
934 *
935 * wb_timestamp
936 *		WLAN/BT timestamp is a 1 usec resolution timestamp which
937 *		does not get updated based on receive beacon like TSF.  The
938 *		same rules for capturing tsf_timestamp are used to capture
939 *		the wb_timestamp.
940 *
941 * locationing_timestamp
942 *		Timestamp used for locationing.  This timestamp is used to
943 *		indicate fractions of usec.  For example if the MAC clock is
944 *		running at 80 MHz, the timestamp will increment every 12.5
945 *		nsec.  The value starts at 0 and increments to 79 and
946 *		returns to 0 and repeats.  This information is valid for
947 *		every PPDU.  This information can be used in conjunction
948 *		with wb_timestamp to capture large delta times.
949 *
950 * phy_err_code
951 *		See the 1.10.8.1.2 for the list of the PHY error codes.
952 *
953 * phy_err
954 *		Indicates a PHY error was detected for this PPDU.
955 *
956 * rx_location
957 *		Indicates that location information was requested.
958 *
959 * txbf_h_info
960 *		Indicates that the packet data carries H information which
961 *		is used for TxBF debug.
962 *
963 * reserved_18
964 *		Reserved: HW should fill with 0, FW should ignore.
965 *
966 * rx_antenna
967 *		Receive antenna value
968 *
969 * tx_ht_vht_ack
970 *		Indicates that a HT or VHT Ack/BA frame was transmitted in
971 *		response to this receive packet.
972 *
973 * bb_captured_channel
974 *		Indicates that the BB has captured a channel dump.  FW can
975 *		then read the channel dump memory.  This may indicate that
976 *		the channel was captured either based on PCU setting the
977 *		capture_channel bit  BB descriptor or FW setting the
978 *		capture_channel mode bit.
979 *
980 * reserved_19
981 *		Reserved: HW should fill with 0, FW should ignore.
982 *
983 * bb_length
984 *		Indicates the number of bytes of baseband information for
985 *		PPDUs where the BB descriptor preamble type is 0x80 to 0xFF
986 *		which indicates that this is not a normal PPDU but rather
987 *		contains baseband debug information.
988 *
989 * reserved_20
990 *		Reserved: HW should fill with 0, FW should ignore.
991 *
992 * ppdu_done
993 *		PPDU end status is only valid when ppdu_done bit is set.
994 *		Every time HW sets this bit in memory FW/SW must clear this
995 *		bit in memory.  FW will initialize all the ppdu_done dword
996 *		to 0.
997*/
998
999#define FW_RX_DESC_INFO0_DISCARD  (1 << 0)
1000#define FW_RX_DESC_INFO0_FORWARD  (1 << 1)
1001#define FW_RX_DESC_INFO0_INSPECT  (1 << 5)
1002#define FW_RX_DESC_INFO0_EXT_MASK 0xC0
1003#define FW_RX_DESC_INFO0_EXT_LSB  6
1004
1005struct fw_rx_desc_base {
1006	u8 info0;
1007} __packed;
1008
1009#endif /* _RX_DESC_H_ */
1010