1/* 2 * Mac80211 SPI driver for ST-Ericsson CW1200 device 3 * 4 * Copyright (c) 2011, Sagrad Inc. 5 * Author: Solomon Peachy <speachy@sagrad.com> 6 * 7 * Based on cw1200_sdio.c 8 * Copyright (c) 2010, ST-Ericsson 9 * Author: Dmitry Tarnyagin <dmitry.tarnyagin@lockless.no> 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License version 2 as 13 * published by the Free Software Foundation. 14 */ 15 16#include <linux/module.h> 17#include <linux/gpio.h> 18#include <linux/delay.h> 19#include <linux/spinlock.h> 20#include <linux/interrupt.h> 21#include <net/mac80211.h> 22 23#include <linux/spi/spi.h> 24#include <linux/device.h> 25 26#include "cw1200.h" 27#include "hwbus.h" 28#include <linux/platform_data/net-cw1200.h> 29#include "hwio.h" 30 31MODULE_AUTHOR("Solomon Peachy <speachy@sagrad.com>"); 32MODULE_DESCRIPTION("mac80211 ST-Ericsson CW1200 SPI driver"); 33MODULE_LICENSE("GPL"); 34MODULE_ALIAS("spi:cw1200_wlan_spi"); 35 36/* #define SPI_DEBUG */ 37 38struct hwbus_priv { 39 struct spi_device *func; 40 struct cw1200_common *core; 41 const struct cw1200_platform_data_spi *pdata; 42 spinlock_t lock; /* Serialize all bus operations */ 43 wait_queue_head_t wq; 44 int claimed; 45}; 46 47#define SDIO_TO_SPI_ADDR(addr) ((addr & 0x1f)>>2) 48#define SET_WRITE 0x7FFF /* usage: and operation */ 49#define SET_READ 0x8000 /* usage: or operation */ 50 51/* Notes on byte ordering: 52 LE: B0 B1 B2 B3 53 BE: B3 B2 B1 B0 54 55 Hardware expects 32-bit data to be written as 16-bit BE words: 56 57 B1 B0 B3 B2 58*/ 59 60static int cw1200_spi_memcpy_fromio(struct hwbus_priv *self, 61 unsigned int addr, 62 void *dst, int count) 63{ 64 int ret, i; 65 u16 regaddr; 66 struct spi_message m; 67 68 struct spi_transfer t_addr = { 69 .tx_buf = ®addr, 70 .len = sizeof(regaddr), 71 }; 72 struct spi_transfer t_msg = { 73 .rx_buf = dst, 74 .len = count, 75 }; 76 77 regaddr = (SDIO_TO_SPI_ADDR(addr))<<12; 78 regaddr |= SET_READ; 79 regaddr |= (count>>1); 80 81#ifdef SPI_DEBUG 82 pr_info("READ : %04d from 0x%02x (%04x)\n", count, addr, regaddr); 83#endif 84 85 /* Header is LE16 */ 86 regaddr = cpu_to_le16(regaddr); 87 88 /* We have to byteswap if the SPI bus is limited to 8b operation 89 or we are running on a Big Endian system 90 */ 91#if defined(__LITTLE_ENDIAN) 92 if (self->func->bits_per_word == 8) 93#endif 94 regaddr = swab16(regaddr); 95 96 spi_message_init(&m); 97 spi_message_add_tail(&t_addr, &m); 98 spi_message_add_tail(&t_msg, &m); 99 ret = spi_sync(self->func, &m); 100 101#ifdef SPI_DEBUG 102 pr_info("READ : "); 103 for (i = 0; i < t_addr.len; i++) 104 printk("%02x ", ((u8 *)t_addr.tx_buf)[i]); 105 printk(" : "); 106 for (i = 0; i < t_msg.len; i++) 107 printk("%02x ", ((u8 *)t_msg.rx_buf)[i]); 108 printk("\n"); 109#endif 110 111 /* We have to byteswap if the SPI bus is limited to 8b operation 112 or we are running on a Big Endian system 113 */ 114#if defined(__LITTLE_ENDIAN) 115 if (self->func->bits_per_word == 8) 116#endif 117 { 118 uint16_t *buf = (uint16_t *)dst; 119 for (i = 0; i < ((count + 1) >> 1); i++) 120 buf[i] = swab16(buf[i]); 121 } 122 123 return ret; 124} 125 126static int cw1200_spi_memcpy_toio(struct hwbus_priv *self, 127 unsigned int addr, 128 const void *src, int count) 129{ 130 int rval, i; 131 u16 regaddr; 132 struct spi_transfer t_addr = { 133 .tx_buf = ®addr, 134 .len = sizeof(regaddr), 135 }; 136 struct spi_transfer t_msg = { 137 .tx_buf = src, 138 .len = count, 139 }; 140 struct spi_message m; 141 142 regaddr = (SDIO_TO_SPI_ADDR(addr))<<12; 143 regaddr &= SET_WRITE; 144 regaddr |= (count>>1); 145 146#ifdef SPI_DEBUG 147 pr_info("WRITE: %04d to 0x%02x (%04x)\n", count, addr, regaddr); 148#endif 149 150 /* Header is LE16 */ 151 regaddr = cpu_to_le16(regaddr); 152 153 /* We have to byteswap if the SPI bus is limited to 8b operation 154 or we are running on a Big Endian system 155 */ 156#if defined(__LITTLE_ENDIAN) 157 if (self->func->bits_per_word == 8) 158#endif 159 { 160 uint16_t *buf = (uint16_t *)src; 161 regaddr = swab16(regaddr); 162 for (i = 0; i < ((count + 1) >> 1); i++) 163 buf[i] = swab16(buf[i]); 164 } 165 166#ifdef SPI_DEBUG 167 pr_info("WRITE: "); 168 for (i = 0; i < t_addr.len; i++) 169 printk("%02x ", ((u8 *)t_addr.tx_buf)[i]); 170 printk(" : "); 171 for (i = 0; i < t_msg.len; i++) 172 printk("%02x ", ((u8 *)t_msg.tx_buf)[i]); 173 printk("\n"); 174#endif 175 176 spi_message_init(&m); 177 spi_message_add_tail(&t_addr, &m); 178 spi_message_add_tail(&t_msg, &m); 179 rval = spi_sync(self->func, &m); 180 181#ifdef SPI_DEBUG 182 pr_info("WROTE: %d\n", m.actual_length); 183#endif 184 185#if defined(__LITTLE_ENDIAN) 186 /* We have to byteswap if the SPI bus is limited to 8b operation */ 187 if (self->func->bits_per_word == 8) 188#endif 189 { 190 uint16_t *buf = (uint16_t *)src; 191 for (i = 0; i < ((count + 1) >> 1); i++) 192 buf[i] = swab16(buf[i]); 193 } 194 return rval; 195} 196 197static void cw1200_spi_lock(struct hwbus_priv *self) 198{ 199 unsigned long flags; 200 201 DECLARE_WAITQUEUE(wait, current); 202 203 might_sleep(); 204 205 add_wait_queue(&self->wq, &wait); 206 spin_lock_irqsave(&self->lock, flags); 207 while (1) { 208 set_current_state(TASK_UNINTERRUPTIBLE); 209 if (!self->claimed) 210 break; 211 spin_unlock_irqrestore(&self->lock, flags); 212 schedule(); 213 spin_lock_irqsave(&self->lock, flags); 214 } 215 set_current_state(TASK_RUNNING); 216 self->claimed = 1; 217 spin_unlock_irqrestore(&self->lock, flags); 218 remove_wait_queue(&self->wq, &wait); 219 220 return; 221} 222 223static void cw1200_spi_unlock(struct hwbus_priv *self) 224{ 225 unsigned long flags; 226 227 spin_lock_irqsave(&self->lock, flags); 228 self->claimed = 0; 229 spin_unlock_irqrestore(&self->lock, flags); 230 wake_up(&self->wq); 231 232 return; 233} 234 235static irqreturn_t cw1200_spi_irq_handler(int irq, void *dev_id) 236{ 237 struct hwbus_priv *self = dev_id; 238 239 if (self->core) { 240 cw1200_spi_lock(self); 241 cw1200_irq_handler(self->core); 242 cw1200_spi_unlock(self); 243 return IRQ_HANDLED; 244 } else { 245 return IRQ_NONE; 246 } 247} 248 249static int cw1200_spi_irq_subscribe(struct hwbus_priv *self) 250{ 251 int ret; 252 253 pr_debug("SW IRQ subscribe\n"); 254 255 ret = request_threaded_irq(self->func->irq, NULL, 256 cw1200_spi_irq_handler, 257 IRQF_TRIGGER_HIGH | IRQF_ONESHOT, 258 "cw1200_wlan_irq", self); 259 if (WARN_ON(ret < 0)) 260 goto exit; 261 262 ret = enable_irq_wake(self->func->irq); 263 if (WARN_ON(ret)) 264 goto free_irq; 265 266 return 0; 267 268free_irq: 269 free_irq(self->func->irq, self); 270exit: 271 return ret; 272} 273 274static int cw1200_spi_irq_unsubscribe(struct hwbus_priv *self) 275{ 276 int ret = 0; 277 278 pr_debug("SW IRQ unsubscribe\n"); 279 disable_irq_wake(self->func->irq); 280 free_irq(self->func->irq, self); 281 282 return ret; 283} 284 285static int cw1200_spi_off(const struct cw1200_platform_data_spi *pdata) 286{ 287 if (pdata->reset) { 288 gpio_set_value(pdata->reset, 0); 289 msleep(30); /* Min is 2 * CLK32K cycles */ 290 gpio_free(pdata->reset); 291 } 292 293 if (pdata->power_ctrl) 294 pdata->power_ctrl(pdata, false); 295 if (pdata->clk_ctrl) 296 pdata->clk_ctrl(pdata, false); 297 298 return 0; 299} 300 301static int cw1200_spi_on(const struct cw1200_platform_data_spi *pdata) 302{ 303 /* Ensure I/Os are pulled low */ 304 if (pdata->reset) { 305 gpio_request(pdata->reset, "cw1200_wlan_reset"); 306 gpio_direction_output(pdata->reset, 0); 307 } 308 if (pdata->powerup) { 309 gpio_request(pdata->powerup, "cw1200_wlan_powerup"); 310 gpio_direction_output(pdata->powerup, 0); 311 } 312 if (pdata->reset || pdata->powerup) 313 msleep(10); /* Settle time? */ 314 315 /* Enable 3v3 and 1v8 to hardware */ 316 if (pdata->power_ctrl) { 317 if (pdata->power_ctrl(pdata, true)) { 318 pr_err("power_ctrl() failed!\n"); 319 return -1; 320 } 321 } 322 323 /* Enable CLK32K */ 324 if (pdata->clk_ctrl) { 325 if (pdata->clk_ctrl(pdata, true)) { 326 pr_err("clk_ctrl() failed!\n"); 327 return -1; 328 } 329 msleep(10); /* Delay until clock is stable for 2 cycles */ 330 } 331 332 /* Enable POWERUP signal */ 333 if (pdata->powerup) { 334 gpio_set_value(pdata->powerup, 1); 335 msleep(250); /* or more..? */ 336 } 337 /* Enable RSTn signal */ 338 if (pdata->reset) { 339 gpio_set_value(pdata->reset, 1); 340 msleep(50); /* Or more..? */ 341 } 342 return 0; 343} 344 345static size_t cw1200_spi_align_size(struct hwbus_priv *self, size_t size) 346{ 347 return size & 1 ? size + 1 : size; 348} 349 350static int cw1200_spi_pm(struct hwbus_priv *self, bool suspend) 351{ 352 return irq_set_irq_wake(self->func->irq, suspend); 353} 354 355static struct hwbus_ops cw1200_spi_hwbus_ops = { 356 .hwbus_memcpy_fromio = cw1200_spi_memcpy_fromio, 357 .hwbus_memcpy_toio = cw1200_spi_memcpy_toio, 358 .lock = cw1200_spi_lock, 359 .unlock = cw1200_spi_unlock, 360 .align_size = cw1200_spi_align_size, 361 .power_mgmt = cw1200_spi_pm, 362}; 363 364/* Probe Function to be called by SPI stack when device is discovered */ 365static int cw1200_spi_probe(struct spi_device *func) 366{ 367 const struct cw1200_platform_data_spi *plat_data = 368 dev_get_platdata(&func->dev); 369 struct hwbus_priv *self; 370 int status; 371 372 /* Sanity check speed */ 373 if (func->max_speed_hz > 52000000) 374 func->max_speed_hz = 52000000; 375 if (func->max_speed_hz < 1000000) 376 func->max_speed_hz = 1000000; 377 378 /* Fix up transfer size */ 379 if (plat_data->spi_bits_per_word) 380 func->bits_per_word = plat_data->spi_bits_per_word; 381 if (!func->bits_per_word) 382 func->bits_per_word = 16; 383 384 /* And finally.. */ 385 func->mode = SPI_MODE_0; 386 387 pr_info("cw1200_wlan_spi: Probe called (CS %d M %d BPW %d CLK %d)\n", 388 func->chip_select, func->mode, func->bits_per_word, 389 func->max_speed_hz); 390 391 if (cw1200_spi_on(plat_data)) { 392 pr_err("spi_on() failed!\n"); 393 return -1; 394 } 395 396 if (spi_setup(func)) { 397 pr_err("spi_setup() failed!\n"); 398 return -1; 399 } 400 401 self = devm_kzalloc(&func->dev, sizeof(*self), GFP_KERNEL); 402 if (!self) { 403 pr_err("Can't allocate SPI hwbus_priv."); 404 return -ENOMEM; 405 } 406 407 self->pdata = plat_data; 408 self->func = func; 409 spin_lock_init(&self->lock); 410 411 spi_set_drvdata(func, self); 412 413 init_waitqueue_head(&self->wq); 414 415 status = cw1200_spi_irq_subscribe(self); 416 417 status = cw1200_core_probe(&cw1200_spi_hwbus_ops, 418 self, &func->dev, &self->core, 419 self->pdata->ref_clk, 420 self->pdata->macaddr, 421 self->pdata->sdd_file, 422 self->pdata->have_5ghz); 423 424 if (status) { 425 cw1200_spi_irq_unsubscribe(self); 426 cw1200_spi_off(plat_data); 427 } 428 429 return status; 430} 431 432/* Disconnect Function to be called by SPI stack when device is disconnected */ 433static int cw1200_spi_disconnect(struct spi_device *func) 434{ 435 struct hwbus_priv *self = spi_get_drvdata(func); 436 437 if (self) { 438 cw1200_spi_irq_unsubscribe(self); 439 if (self->core) { 440 cw1200_core_release(self->core); 441 self->core = NULL; 442 } 443 } 444 cw1200_spi_off(dev_get_platdata(&func->dev)); 445 446 return 0; 447} 448 449#ifdef CONFIG_PM 450static int cw1200_spi_suspend(struct device *dev, pm_message_t state) 451{ 452 struct hwbus_priv *self = spi_get_drvdata(to_spi_device(dev)); 453 454 if (!cw1200_can_suspend(self->core)) 455 return -EAGAIN; 456 457 /* XXX notify host that we have to keep CW1200 powered on? */ 458 return 0; 459} 460 461static int cw1200_spi_resume(struct device *dev) 462{ 463 return 0; 464} 465#endif 466 467static struct spi_driver spi_driver = { 468 .probe = cw1200_spi_probe, 469 .remove = cw1200_spi_disconnect, 470 .driver = { 471 .name = "cw1200_wlan_spi", 472 .bus = &spi_bus_type, 473 .owner = THIS_MODULE, 474#ifdef CONFIG_PM 475 .suspend = cw1200_spi_suspend, 476 .resume = cw1200_spi_resume, 477#endif 478 }, 479}; 480 481module_spi_driver(spi_driver); 482