1/****************************************************************************** 2 * 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * GPL LICENSE SUMMARY 7 * 8 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved. 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of version 2 of the GNU General Public License as 12 * published by the Free Software Foundation. 13 * 14 * This program is distributed in the hope that it will be useful, but 15 * WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 17 * General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, 22 * USA 23 * 24 * The full GNU General Public License is included in this distribution 25 * in the file called COPYING. 26 * 27 * Contact Information: 28 * Intel Linux Wireless <ilw@linux.intel.com> 29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 30 * 31 * BSD LICENSE 32 * 33 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved. 34 * All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 40 * * Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * * Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in 44 * the documentation and/or other materials provided with the 45 * distribution. 46 * * Neither the name Intel Corporation nor the names of its 47 * contributors may be used to endorse or promote products derived 48 * from this software without specific prior written permission. 49 * 50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 51 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 52 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 53 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 54 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 55 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 61 * 62 *****************************************************************************/ 63/* 64 * Please use this file (commands.h) only for uCode API definitions. 65 * Please use iwl-xxxx-hw.h for hardware-related definitions. 66 * Please use dev.h for driver implementation definitions. 67 */ 68 69#ifndef __iwl_commands_h__ 70#define __iwl_commands_h__ 71 72#include <linux/ieee80211.h> 73#include <linux/types.h> 74 75 76enum { 77 REPLY_ALIVE = 0x1, 78 REPLY_ERROR = 0x2, 79 REPLY_ECHO = 0x3, /* test command */ 80 81 /* RXON and QOS commands */ 82 REPLY_RXON = 0x10, 83 REPLY_RXON_ASSOC = 0x11, 84 REPLY_QOS_PARAM = 0x13, 85 REPLY_RXON_TIMING = 0x14, 86 87 /* Multi-Station support */ 88 REPLY_ADD_STA = 0x18, 89 REPLY_REMOVE_STA = 0x19, 90 REPLY_REMOVE_ALL_STA = 0x1a, /* not used */ 91 REPLY_TXFIFO_FLUSH = 0x1e, 92 93 /* Security */ 94 REPLY_WEPKEY = 0x20, 95 96 /* RX, TX, LEDs */ 97 REPLY_TX = 0x1c, 98 REPLY_LEDS_CMD = 0x48, 99 REPLY_TX_LINK_QUALITY_CMD = 0x4e, 100 101 /* WiMAX coexistence */ 102 COEX_PRIORITY_TABLE_CMD = 0x5a, 103 COEX_MEDIUM_NOTIFICATION = 0x5b, 104 COEX_EVENT_CMD = 0x5c, 105 106 /* Calibration */ 107 TEMPERATURE_NOTIFICATION = 0x62, 108 CALIBRATION_CFG_CMD = 0x65, 109 CALIBRATION_RES_NOTIFICATION = 0x66, 110 CALIBRATION_COMPLETE_NOTIFICATION = 0x67, 111 112 /* 802.11h related */ 113 REPLY_QUIET_CMD = 0x71, /* not used */ 114 REPLY_CHANNEL_SWITCH = 0x72, 115 CHANNEL_SWITCH_NOTIFICATION = 0x73, 116 REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74, 117 SPECTRUM_MEASURE_NOTIFICATION = 0x75, 118 119 /* Power Management */ 120 POWER_TABLE_CMD = 0x77, 121 PM_SLEEP_NOTIFICATION = 0x7A, 122 PM_DEBUG_STATISTIC_NOTIFIC = 0x7B, 123 124 /* Scan commands and notifications */ 125 REPLY_SCAN_CMD = 0x80, 126 REPLY_SCAN_ABORT_CMD = 0x81, 127 SCAN_START_NOTIFICATION = 0x82, 128 SCAN_RESULTS_NOTIFICATION = 0x83, 129 SCAN_COMPLETE_NOTIFICATION = 0x84, 130 131 /* IBSS/AP commands */ 132 BEACON_NOTIFICATION = 0x90, 133 REPLY_TX_BEACON = 0x91, 134 WHO_IS_AWAKE_NOTIFICATION = 0x94, /* not used */ 135 136 /* Miscellaneous commands */ 137 REPLY_TX_POWER_DBM_CMD = 0x95, 138 QUIET_NOTIFICATION = 0x96, /* not used */ 139 REPLY_TX_PWR_TABLE_CMD = 0x97, 140 REPLY_TX_POWER_DBM_CMD_V1 = 0x98, /* old version of API */ 141 TX_ANT_CONFIGURATION_CMD = 0x98, 142 MEASURE_ABORT_NOTIFICATION = 0x99, /* not used */ 143 144 /* Bluetooth device coexistence config command */ 145 REPLY_BT_CONFIG = 0x9b, 146 147 /* Statistics */ 148 REPLY_STATISTICS_CMD = 0x9c, 149 STATISTICS_NOTIFICATION = 0x9d, 150 151 /* RF-KILL commands and notifications */ 152 REPLY_CARD_STATE_CMD = 0xa0, 153 CARD_STATE_NOTIFICATION = 0xa1, 154 155 /* Missed beacons notification */ 156 MISSED_BEACONS_NOTIFICATION = 0xa2, 157 158 REPLY_CT_KILL_CONFIG_CMD = 0xa4, 159 SENSITIVITY_CMD = 0xa8, 160 REPLY_PHY_CALIBRATION_CMD = 0xb0, 161 REPLY_RX_PHY_CMD = 0xc0, 162 REPLY_RX_MPDU_CMD = 0xc1, 163 REPLY_RX = 0xc3, 164 REPLY_COMPRESSED_BA = 0xc5, 165 166 /* BT Coex */ 167 REPLY_BT_COEX_PRIO_TABLE = 0xcc, 168 REPLY_BT_COEX_PROT_ENV = 0xcd, 169 REPLY_BT_COEX_PROFILE_NOTIF = 0xce, 170 171 /* PAN commands */ 172 REPLY_WIPAN_PARAMS = 0xb2, 173 REPLY_WIPAN_RXON = 0xb3, /* use REPLY_RXON structure */ 174 REPLY_WIPAN_RXON_TIMING = 0xb4, /* use REPLY_RXON_TIMING structure */ 175 REPLY_WIPAN_RXON_ASSOC = 0xb6, /* use REPLY_RXON_ASSOC structure */ 176 REPLY_WIPAN_QOS_PARAM = 0xb7, /* use REPLY_QOS_PARAM structure */ 177 REPLY_WIPAN_WEPKEY = 0xb8, /* use REPLY_WEPKEY structure */ 178 REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9, 179 REPLY_WIPAN_NOA_NOTIFICATION = 0xbc, 180 REPLY_WIPAN_DEACTIVATION_COMPLETE = 0xbd, 181 182 REPLY_WOWLAN_PATTERNS = 0xe0, 183 REPLY_WOWLAN_WAKEUP_FILTER = 0xe1, 184 REPLY_WOWLAN_TSC_RSC_PARAMS = 0xe2, 185 REPLY_WOWLAN_TKIP_PARAMS = 0xe3, 186 REPLY_WOWLAN_KEK_KCK_MATERIAL = 0xe4, 187 REPLY_WOWLAN_GET_STATUS = 0xe5, 188 REPLY_D3_CONFIG = 0xd3, 189 190 REPLY_MAX = 0xff 191}; 192 193/* 194 * Minimum number of queues. MAX_NUM is defined in hw specific files. 195 * Set the minimum to accommodate 196 * - 4 standard TX queues 197 * - the command queue 198 * - 4 PAN TX queues 199 * - the PAN multicast queue, and 200 * - the AUX (TX during scan dwell) queue. 201 */ 202#define IWL_MIN_NUM_QUEUES 11 203 204/* 205 * Command queue depends on iPAN support. 206 */ 207#define IWL_DEFAULT_CMD_QUEUE_NUM 4 208#define IWL_IPAN_CMD_QUEUE_NUM 9 209 210#define IWL_TX_FIFO_BK 0 /* shared */ 211#define IWL_TX_FIFO_BE 1 212#define IWL_TX_FIFO_VI 2 /* shared */ 213#define IWL_TX_FIFO_VO 3 214#define IWL_TX_FIFO_BK_IPAN IWL_TX_FIFO_BK 215#define IWL_TX_FIFO_BE_IPAN 4 216#define IWL_TX_FIFO_VI_IPAN IWL_TX_FIFO_VI 217#define IWL_TX_FIFO_VO_IPAN 5 218/* re-uses the VO FIFO, uCode will properly flush/schedule */ 219#define IWL_TX_FIFO_AUX 5 220#define IWL_TX_FIFO_UNUSED 255 221 222#define IWLAGN_CMD_FIFO_NUM 7 223 224/* 225 * This queue number is required for proper operation 226 * because the ucode will stop/start the scheduler as 227 * required. 228 */ 229#define IWL_IPAN_MCAST_QUEUE 8 230 231/****************************************************************************** 232 * (0) 233 * Commonly used structures and definitions: 234 * Command header, rate_n_flags, txpower 235 * 236 *****************************************************************************/ 237 238/** 239 * iwlagn rate_n_flags bit fields 240 * 241 * rate_n_flags format is used in following iwlagn commands: 242 * REPLY_RX (response only) 243 * REPLY_RX_MPDU (response only) 244 * REPLY_TX (both command and response) 245 * REPLY_TX_LINK_QUALITY_CMD 246 * 247 * High-throughput (HT) rate format for bits 7:0 (bit 8 must be "1"): 248 * 2-0: 0) 6 Mbps 249 * 1) 12 Mbps 250 * 2) 18 Mbps 251 * 3) 24 Mbps 252 * 4) 36 Mbps 253 * 5) 48 Mbps 254 * 6) 54 Mbps 255 * 7) 60 Mbps 256 * 257 * 4-3: 0) Single stream (SISO) 258 * 1) Dual stream (MIMO) 259 * 2) Triple stream (MIMO) 260 * 261 * 5: Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data 262 * 263 * Legacy OFDM rate format for bits 7:0 (bit 8 must be "0", bit 9 "0"): 264 * 3-0: 0xD) 6 Mbps 265 * 0xF) 9 Mbps 266 * 0x5) 12 Mbps 267 * 0x7) 18 Mbps 268 * 0x9) 24 Mbps 269 * 0xB) 36 Mbps 270 * 0x1) 48 Mbps 271 * 0x3) 54 Mbps 272 * 273 * Legacy CCK rate format for bits 7:0 (bit 8 must be "0", bit 9 "1"): 274 * 6-0: 10) 1 Mbps 275 * 20) 2 Mbps 276 * 55) 5.5 Mbps 277 * 110) 11 Mbps 278 */ 279#define RATE_MCS_CODE_MSK 0x7 280#define RATE_MCS_SPATIAL_POS 3 281#define RATE_MCS_SPATIAL_MSK 0x18 282#define RATE_MCS_HT_DUP_POS 5 283#define RATE_MCS_HT_DUP_MSK 0x20 284/* Both legacy and HT use bits 7:0 as the CCK/OFDM rate or HT MCS */ 285#define RATE_MCS_RATE_MSK 0xff 286 287/* Bit 8: (1) HT format, (0) legacy format in bits 7:0 */ 288#define RATE_MCS_FLAGS_POS 8 289#define RATE_MCS_HT_POS 8 290#define RATE_MCS_HT_MSK 0x100 291 292/* Bit 9: (1) CCK, (0) OFDM. HT (bit 8) must be "0" for this bit to be valid */ 293#define RATE_MCS_CCK_POS 9 294#define RATE_MCS_CCK_MSK 0x200 295 296/* Bit 10: (1) Use Green Field preamble */ 297#define RATE_MCS_GF_POS 10 298#define RATE_MCS_GF_MSK 0x400 299 300/* Bit 11: (1) Use 40Mhz HT40 chnl width, (0) use 20 MHz legacy chnl width */ 301#define RATE_MCS_HT40_POS 11 302#define RATE_MCS_HT40_MSK 0x800 303 304/* Bit 12: (1) Duplicate data on both 20MHz chnls. HT40 (bit 11) must be set. */ 305#define RATE_MCS_DUP_POS 12 306#define RATE_MCS_DUP_MSK 0x1000 307 308/* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */ 309#define RATE_MCS_SGI_POS 13 310#define RATE_MCS_SGI_MSK 0x2000 311 312/** 313 * rate_n_flags Tx antenna masks 314 * 4965 has 2 transmitters 315 * 5100 has 1 transmitter B 316 * 5150 has 1 transmitter A 317 * 5300 has 3 transmitters 318 * 5350 has 3 transmitters 319 * bit14:16 320 */ 321#define RATE_MCS_ANT_POS 14 322#define RATE_MCS_ANT_A_MSK 0x04000 323#define RATE_MCS_ANT_B_MSK 0x08000 324#define RATE_MCS_ANT_C_MSK 0x10000 325#define RATE_MCS_ANT_AB_MSK (RATE_MCS_ANT_A_MSK | RATE_MCS_ANT_B_MSK) 326#define RATE_MCS_ANT_ABC_MSK (RATE_MCS_ANT_AB_MSK | RATE_MCS_ANT_C_MSK) 327#define RATE_ANT_NUM 3 328 329#define POWER_TABLE_NUM_ENTRIES 33 330#define POWER_TABLE_NUM_HT_OFDM_ENTRIES 32 331#define POWER_TABLE_CCK_ENTRY 32 332 333#define IWL_PWR_NUM_HT_OFDM_ENTRIES 24 334#define IWL_PWR_CCK_ENTRIES 2 335 336/** 337 * struct tx_power_dual_stream 338 * 339 * Table entries in REPLY_TX_PWR_TABLE_CMD, REPLY_CHANNEL_SWITCH 340 * 341 * Same format as iwl_tx_power_dual_stream, but __le32 342 */ 343struct tx_power_dual_stream { 344 __le32 dw; 345} __packed; 346 347/** 348 * Command REPLY_TX_POWER_DBM_CMD = 0x98 349 * struct iwlagn_tx_power_dbm_cmd 350 */ 351#define IWLAGN_TX_POWER_AUTO 0x7f 352#define IWLAGN_TX_POWER_NO_CLOSED (0x1 << 6) 353 354struct iwlagn_tx_power_dbm_cmd { 355 s8 global_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */ 356 u8 flags; 357 s8 srv_chan_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */ 358 u8 reserved; 359} __packed; 360 361/** 362 * Command TX_ANT_CONFIGURATION_CMD = 0x98 363 * This command is used to configure valid Tx antenna. 364 * By default uCode concludes the valid antenna according to the radio flavor. 365 * This command enables the driver to override/modify this conclusion. 366 */ 367struct iwl_tx_ant_config_cmd { 368 __le32 valid; 369} __packed; 370 371/****************************************************************************** 372 * (0a) 373 * Alive and Error Commands & Responses: 374 * 375 *****************************************************************************/ 376 377#define UCODE_VALID_OK cpu_to_le32(0x1) 378 379/** 380 * REPLY_ALIVE = 0x1 (response only, not a command) 381 * 382 * uCode issues this "alive" notification once the runtime image is ready 383 * to receive commands from the driver. This is the *second* "alive" 384 * notification that the driver will receive after rebooting uCode; 385 * this "alive" is indicated by subtype field != 9. 386 * 387 * See comments documenting "BSM" (bootstrap state machine). 388 * 389 * This response includes two pointers to structures within the device's 390 * data SRAM (access via HBUS_TARG_MEM_* regs) that are useful for debugging: 391 * 392 * 1) log_event_table_ptr indicates base of the event log. This traces 393 * a 256-entry history of uCode execution within a circular buffer. 394 * Its header format is: 395 * 396 * __le32 log_size; log capacity (in number of entries) 397 * __le32 type; (1) timestamp with each entry, (0) no timestamp 398 * __le32 wraps; # times uCode has wrapped to top of circular buffer 399 * __le32 write_index; next circular buffer entry that uCode would fill 400 * 401 * The header is followed by the circular buffer of log entries. Entries 402 * with timestamps have the following format: 403 * 404 * __le32 event_id; range 0 - 1500 405 * __le32 timestamp; low 32 bits of TSF (of network, if associated) 406 * __le32 data; event_id-specific data value 407 * 408 * Entries without timestamps contain only event_id and data. 409 * 410 * 411 * 2) error_event_table_ptr indicates base of the error log. This contains 412 * information about any uCode error that occurs. For agn, the format 413 * of the error log is defined by struct iwl_error_event_table. 414 * 415 * The Linux driver can print both logs to the system log when a uCode error 416 * occurs. 417 */ 418 419/* 420 * Note: This structure is read from the device with IO accesses, 421 * and the reading already does the endian conversion. As it is 422 * read with u32-sized accesses, any members with a different size 423 * need to be ordered correctly though! 424 */ 425struct iwl_error_event_table { 426 u32 valid; /* (nonzero) valid, (0) log is empty */ 427 u32 error_id; /* type of error */ 428 u32 pc; /* program counter */ 429 u32 blink1; /* branch link */ 430 u32 blink2; /* branch link */ 431 u32 ilink1; /* interrupt link */ 432 u32 ilink2; /* interrupt link */ 433 u32 data1; /* error-specific data */ 434 u32 data2; /* error-specific data */ 435 u32 line; /* source code line of error */ 436 u32 bcon_time; /* beacon timer */ 437 u32 tsf_low; /* network timestamp function timer */ 438 u32 tsf_hi; /* network timestamp function timer */ 439 u32 gp1; /* GP1 timer register */ 440 u32 gp2; /* GP2 timer register */ 441 u32 gp3; /* GP3 timer register */ 442 u32 ucode_ver; /* uCode version */ 443 u32 hw_ver; /* HW Silicon version */ 444 u32 brd_ver; /* HW board version */ 445 u32 log_pc; /* log program counter */ 446 u32 frame_ptr; /* frame pointer */ 447 u32 stack_ptr; /* stack pointer */ 448 u32 hcmd; /* last host command header */ 449 u32 isr0; /* isr status register LMPM_NIC_ISR0: 450 * rxtx_flag */ 451 u32 isr1; /* isr status register LMPM_NIC_ISR1: 452 * host_flag */ 453 u32 isr2; /* isr status register LMPM_NIC_ISR2: 454 * enc_flag */ 455 u32 isr3; /* isr status register LMPM_NIC_ISR3: 456 * time_flag */ 457 u32 isr4; /* isr status register LMPM_NIC_ISR4: 458 * wico interrupt */ 459 u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */ 460 u32 wait_event; /* wait event() caller address */ 461 u32 l2p_control; /* L2pControlField */ 462 u32 l2p_duration; /* L2pDurationField */ 463 u32 l2p_mhvalid; /* L2pMhValidBits */ 464 u32 l2p_addr_match; /* L2pAddrMatchStat */ 465 u32 lmpm_pmg_sel; /* indicate which clocks are turned on 466 * (LMPM_PMG_SEL) */ 467 u32 u_timestamp; /* indicate when the date and time of the 468 * compilation */ 469 u32 flow_handler; /* FH read/write pointers, RX credit */ 470} __packed; 471 472struct iwl_alive_resp { 473 u8 ucode_minor; 474 u8 ucode_major; 475 __le16 reserved1; 476 u8 sw_rev[8]; 477 u8 ver_type; 478 u8 ver_subtype; /* not "9" for runtime alive */ 479 __le16 reserved2; 480 __le32 log_event_table_ptr; /* SRAM address for event log */ 481 __le32 error_event_table_ptr; /* SRAM address for error log */ 482 __le32 timestamp; 483 __le32 is_valid; 484} __packed; 485 486/* 487 * REPLY_ERROR = 0x2 (response only, not a command) 488 */ 489struct iwl_error_resp { 490 __le32 error_type; 491 u8 cmd_id; 492 u8 reserved1; 493 __le16 bad_cmd_seq_num; 494 __le32 error_info; 495 __le64 timestamp; 496} __packed; 497 498/****************************************************************************** 499 * (1) 500 * RXON Commands & Responses: 501 * 502 *****************************************************************************/ 503 504/* 505 * Rx config defines & structure 506 */ 507/* rx_config device types */ 508enum { 509 RXON_DEV_TYPE_AP = 1, 510 RXON_DEV_TYPE_ESS = 3, 511 RXON_DEV_TYPE_IBSS = 4, 512 RXON_DEV_TYPE_SNIFFER = 6, 513 RXON_DEV_TYPE_CP = 7, 514 RXON_DEV_TYPE_2STA = 8, 515 RXON_DEV_TYPE_P2P = 9, 516}; 517 518 519#define RXON_RX_CHAIN_DRIVER_FORCE_MSK cpu_to_le16(0x1 << 0) 520#define RXON_RX_CHAIN_DRIVER_FORCE_POS (0) 521#define RXON_RX_CHAIN_VALID_MSK cpu_to_le16(0x7 << 1) 522#define RXON_RX_CHAIN_VALID_POS (1) 523#define RXON_RX_CHAIN_FORCE_SEL_MSK cpu_to_le16(0x7 << 4) 524#define RXON_RX_CHAIN_FORCE_SEL_POS (4) 525#define RXON_RX_CHAIN_FORCE_MIMO_SEL_MSK cpu_to_le16(0x7 << 7) 526#define RXON_RX_CHAIN_FORCE_MIMO_SEL_POS (7) 527#define RXON_RX_CHAIN_CNT_MSK cpu_to_le16(0x3 << 10) 528#define RXON_RX_CHAIN_CNT_POS (10) 529#define RXON_RX_CHAIN_MIMO_CNT_MSK cpu_to_le16(0x3 << 12) 530#define RXON_RX_CHAIN_MIMO_CNT_POS (12) 531#define RXON_RX_CHAIN_MIMO_FORCE_MSK cpu_to_le16(0x1 << 14) 532#define RXON_RX_CHAIN_MIMO_FORCE_POS (14) 533 534/* rx_config flags */ 535/* band & modulation selection */ 536#define RXON_FLG_BAND_24G_MSK cpu_to_le32(1 << 0) 537#define RXON_FLG_CCK_MSK cpu_to_le32(1 << 1) 538/* auto detection enable */ 539#define RXON_FLG_AUTO_DETECT_MSK cpu_to_le32(1 << 2) 540/* TGg protection when tx */ 541#define RXON_FLG_TGG_PROTECT_MSK cpu_to_le32(1 << 3) 542/* cck short slot & preamble */ 543#define RXON_FLG_SHORT_SLOT_MSK cpu_to_le32(1 << 4) 544#define RXON_FLG_SHORT_PREAMBLE_MSK cpu_to_le32(1 << 5) 545/* antenna selection */ 546#define RXON_FLG_DIS_DIV_MSK cpu_to_le32(1 << 7) 547#define RXON_FLG_ANT_SEL_MSK cpu_to_le32(0x0f00) 548#define RXON_FLG_ANT_A_MSK cpu_to_le32(1 << 8) 549#define RXON_FLG_ANT_B_MSK cpu_to_le32(1 << 9) 550/* radar detection enable */ 551#define RXON_FLG_RADAR_DETECT_MSK cpu_to_le32(1 << 12) 552#define RXON_FLG_TGJ_NARROW_BAND_MSK cpu_to_le32(1 << 13) 553/* rx response to host with 8-byte TSF 554* (according to ON_AIR deassertion) */ 555#define RXON_FLG_TSF2HOST_MSK cpu_to_le32(1 << 15) 556 557 558/* HT flags */ 559#define RXON_FLG_CTRL_CHANNEL_LOC_POS (22) 560#define RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK cpu_to_le32(0x1 << 22) 561 562#define RXON_FLG_HT_OPERATING_MODE_POS (23) 563 564#define RXON_FLG_HT_PROT_MSK cpu_to_le32(0x1 << 23) 565#define RXON_FLG_HT40_PROT_MSK cpu_to_le32(0x2 << 23) 566 567#define RXON_FLG_CHANNEL_MODE_POS (25) 568#define RXON_FLG_CHANNEL_MODE_MSK cpu_to_le32(0x3 << 25) 569 570/* channel mode */ 571enum { 572 CHANNEL_MODE_LEGACY = 0, 573 CHANNEL_MODE_PURE_40 = 1, 574 CHANNEL_MODE_MIXED = 2, 575 CHANNEL_MODE_RESERVED = 3, 576}; 577#define RXON_FLG_CHANNEL_MODE_LEGACY cpu_to_le32(CHANNEL_MODE_LEGACY << RXON_FLG_CHANNEL_MODE_POS) 578#define RXON_FLG_CHANNEL_MODE_PURE_40 cpu_to_le32(CHANNEL_MODE_PURE_40 << RXON_FLG_CHANNEL_MODE_POS) 579#define RXON_FLG_CHANNEL_MODE_MIXED cpu_to_le32(CHANNEL_MODE_MIXED << RXON_FLG_CHANNEL_MODE_POS) 580 581/* CTS to self (if spec allows) flag */ 582#define RXON_FLG_SELF_CTS_EN cpu_to_le32(0x1<<30) 583 584/* rx_config filter flags */ 585/* accept all data frames */ 586#define RXON_FILTER_PROMISC_MSK cpu_to_le32(1 << 0) 587/* pass control & management to host */ 588#define RXON_FILTER_CTL2HOST_MSK cpu_to_le32(1 << 1) 589/* accept multi-cast */ 590#define RXON_FILTER_ACCEPT_GRP_MSK cpu_to_le32(1 << 2) 591/* don't decrypt uni-cast frames */ 592#define RXON_FILTER_DIS_DECRYPT_MSK cpu_to_le32(1 << 3) 593/* don't decrypt multi-cast frames */ 594#define RXON_FILTER_DIS_GRP_DECRYPT_MSK cpu_to_le32(1 << 4) 595/* STA is associated */ 596#define RXON_FILTER_ASSOC_MSK cpu_to_le32(1 << 5) 597/* transfer to host non bssid beacons in associated state */ 598#define RXON_FILTER_BCON_AWARE_MSK cpu_to_le32(1 << 6) 599 600/** 601 * REPLY_RXON = 0x10 (command, has simple generic response) 602 * 603 * RXON tunes the radio tuner to a service channel, and sets up a number 604 * of parameters that are used primarily for Rx, but also for Tx operations. 605 * 606 * NOTE: When tuning to a new channel, driver must set the 607 * RXON_FILTER_ASSOC_MSK to 0. This will clear station-dependent 608 * info within the device, including the station tables, tx retry 609 * rate tables, and txpower tables. Driver must build a new station 610 * table and txpower table before transmitting anything on the RXON 611 * channel. 612 * 613 * NOTE: All RXONs wipe clean the internal txpower table. Driver must 614 * issue a new REPLY_TX_PWR_TABLE_CMD after each REPLY_RXON (0x10), 615 * regardless of whether RXON_FILTER_ASSOC_MSK is set. 616 */ 617 618struct iwl_rxon_cmd { 619 u8 node_addr[6]; 620 __le16 reserved1; 621 u8 bssid_addr[6]; 622 __le16 reserved2; 623 u8 wlap_bssid_addr[6]; 624 __le16 reserved3; 625 u8 dev_type; 626 u8 air_propagation; 627 __le16 rx_chain; 628 u8 ofdm_basic_rates; 629 u8 cck_basic_rates; 630 __le16 assoc_id; 631 __le32 flags; 632 __le32 filter_flags; 633 __le16 channel; 634 u8 ofdm_ht_single_stream_basic_rates; 635 u8 ofdm_ht_dual_stream_basic_rates; 636 u8 ofdm_ht_triple_stream_basic_rates; 637 u8 reserved5; 638 __le16 acquisition_data; 639 __le16 reserved6; 640} __packed; 641 642/* 643 * REPLY_RXON_ASSOC = 0x11 (command, has simple generic response) 644 */ 645struct iwl_rxon_assoc_cmd { 646 __le32 flags; 647 __le32 filter_flags; 648 u8 ofdm_basic_rates; 649 u8 cck_basic_rates; 650 __le16 reserved1; 651 u8 ofdm_ht_single_stream_basic_rates; 652 u8 ofdm_ht_dual_stream_basic_rates; 653 u8 ofdm_ht_triple_stream_basic_rates; 654 u8 reserved2; 655 __le16 rx_chain_select_flags; 656 __le16 acquisition_data; 657 __le32 reserved3; 658} __packed; 659 660#define IWL_CONN_MAX_LISTEN_INTERVAL 10 661#define IWL_MAX_UCODE_BEACON_INTERVAL 4 /* 4096 */ 662 663/* 664 * REPLY_RXON_TIMING = 0x14 (command, has simple generic response) 665 */ 666struct iwl_rxon_time_cmd { 667 __le64 timestamp; 668 __le16 beacon_interval; 669 __le16 atim_window; 670 __le32 beacon_init_val; 671 __le16 listen_interval; 672 u8 dtim_period; 673 u8 delta_cp_bss_tbtts; 674} __packed; 675 676/* 677 * REPLY_CHANNEL_SWITCH = 0x72 (command, has simple generic response) 678 */ 679/** 680 * struct iwl5000_channel_switch_cmd 681 * @band: 0- 5.2GHz, 1- 2.4GHz 682 * @expect_beacon: 0- resume transmits after channel switch 683 * 1- wait for beacon to resume transmits 684 * @channel: new channel number 685 * @rxon_flags: Rx on flags 686 * @rxon_filter_flags: filtering parameters 687 * @switch_time: switch time in extended beacon format 688 * @reserved: reserved bytes 689 */ 690struct iwl5000_channel_switch_cmd { 691 u8 band; 692 u8 expect_beacon; 693 __le16 channel; 694 __le32 rxon_flags; 695 __le32 rxon_filter_flags; 696 __le32 switch_time; 697 __le32 reserved[2][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES]; 698} __packed; 699 700/** 701 * struct iwl6000_channel_switch_cmd 702 * @band: 0- 5.2GHz, 1- 2.4GHz 703 * @expect_beacon: 0- resume transmits after channel switch 704 * 1- wait for beacon to resume transmits 705 * @channel: new channel number 706 * @rxon_flags: Rx on flags 707 * @rxon_filter_flags: filtering parameters 708 * @switch_time: switch time in extended beacon format 709 * @reserved: reserved bytes 710 */ 711struct iwl6000_channel_switch_cmd { 712 u8 band; 713 u8 expect_beacon; 714 __le16 channel; 715 __le32 rxon_flags; 716 __le32 rxon_filter_flags; 717 __le32 switch_time; 718 __le32 reserved[3][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES]; 719} __packed; 720 721/* 722 * CHANNEL_SWITCH_NOTIFICATION = 0x73 (notification only, not a command) 723 */ 724struct iwl_csa_notification { 725 __le16 band; 726 __le16 channel; 727 __le32 status; /* 0 - OK, 1 - fail */ 728} __packed; 729 730/****************************************************************************** 731 * (2) 732 * Quality-of-Service (QOS) Commands & Responses: 733 * 734 *****************************************************************************/ 735 736/** 737 * struct iwl_ac_qos -- QOS timing params for REPLY_QOS_PARAM 738 * One for each of 4 EDCA access categories in struct iwl_qosparam_cmd 739 * 740 * @cw_min: Contention window, start value in numbers of slots. 741 * Should be a power-of-2, minus 1. Device's default is 0x0f. 742 * @cw_max: Contention window, max value in numbers of slots. 743 * Should be a power-of-2, minus 1. Device's default is 0x3f. 744 * @aifsn: Number of slots in Arbitration Interframe Space (before 745 * performing random backoff timing prior to Tx). Device default 1. 746 * @edca_txop: Length of Tx opportunity, in uSecs. Device default is 0. 747 * 748 * Device will automatically increase contention window by (2*CW) + 1 for each 749 * transmission retry. Device uses cw_max as a bit mask, ANDed with new CW 750 * value, to cap the CW value. 751 */ 752struct iwl_ac_qos { 753 __le16 cw_min; 754 __le16 cw_max; 755 u8 aifsn; 756 u8 reserved1; 757 __le16 edca_txop; 758} __packed; 759 760/* QoS flags defines */ 761#define QOS_PARAM_FLG_UPDATE_EDCA_MSK cpu_to_le32(0x01) 762#define QOS_PARAM_FLG_TGN_MSK cpu_to_le32(0x02) 763#define QOS_PARAM_FLG_TXOP_TYPE_MSK cpu_to_le32(0x10) 764 765/* Number of Access Categories (AC) (EDCA), queues 0..3 */ 766#define AC_NUM 4 767 768/* 769 * REPLY_QOS_PARAM = 0x13 (command, has simple generic response) 770 * 771 * This command sets up timings for each of the 4 prioritized EDCA Tx FIFOs 772 * 0: Background, 1: Best Effort, 2: Video, 3: Voice. 773 */ 774struct iwl_qosparam_cmd { 775 __le32 qos_flags; 776 struct iwl_ac_qos ac[AC_NUM]; 777} __packed; 778 779/****************************************************************************** 780 * (3) 781 * Add/Modify Stations Commands & Responses: 782 * 783 *****************************************************************************/ 784/* 785 * Multi station support 786 */ 787 788/* Special, dedicated locations within device's station table */ 789#define IWL_AP_ID 0 790#define IWL_AP_ID_PAN 1 791#define IWL_STA_ID 2 792#define IWLAGN_PAN_BCAST_ID 14 793#define IWLAGN_BROADCAST_ID 15 794#define IWLAGN_STATION_COUNT 16 795 796#define IWL_TID_NON_QOS IWL_MAX_TID_COUNT 797 798#define STA_FLG_TX_RATE_MSK cpu_to_le32(1 << 2) 799#define STA_FLG_PWR_SAVE_MSK cpu_to_le32(1 << 8) 800#define STA_FLG_PAN_STATION cpu_to_le32(1 << 13) 801#define STA_FLG_RTS_MIMO_PROT_MSK cpu_to_le32(1 << 17) 802#define STA_FLG_AGG_MPDU_8US_MSK cpu_to_le32(1 << 18) 803#define STA_FLG_MAX_AGG_SIZE_POS (19) 804#define STA_FLG_MAX_AGG_SIZE_MSK cpu_to_le32(3 << 19) 805#define STA_FLG_HT40_EN_MSK cpu_to_le32(1 << 21) 806#define STA_FLG_MIMO_DIS_MSK cpu_to_le32(1 << 22) 807#define STA_FLG_AGG_MPDU_DENSITY_POS (23) 808#define STA_FLG_AGG_MPDU_DENSITY_MSK cpu_to_le32(7 << 23) 809 810/* Use in mode field. 1: modify existing entry, 0: add new station entry */ 811#define STA_CONTROL_MODIFY_MSK 0x01 812 813/* key flags __le16*/ 814#define STA_KEY_FLG_ENCRYPT_MSK cpu_to_le16(0x0007) 815#define STA_KEY_FLG_NO_ENC cpu_to_le16(0x0000) 816#define STA_KEY_FLG_WEP cpu_to_le16(0x0001) 817#define STA_KEY_FLG_CCMP cpu_to_le16(0x0002) 818#define STA_KEY_FLG_TKIP cpu_to_le16(0x0003) 819 820#define STA_KEY_FLG_KEYID_POS 8 821#define STA_KEY_FLG_INVALID cpu_to_le16(0x0800) 822/* wep key is either from global key (0) or from station info array (1) */ 823#define STA_KEY_FLG_MAP_KEY_MSK cpu_to_le16(0x0008) 824 825/* wep key in STA: 5-bytes (0) or 13-bytes (1) */ 826#define STA_KEY_FLG_KEY_SIZE_MSK cpu_to_le16(0x1000) 827#define STA_KEY_MULTICAST_MSK cpu_to_le16(0x4000) 828#define STA_KEY_MAX_NUM 8 829#define STA_KEY_MAX_NUM_PAN 16 830/* must not match WEP_INVALID_OFFSET */ 831#define IWLAGN_HW_KEY_DEFAULT 0xfe 832 833/* Flags indicate whether to modify vs. don't change various station params */ 834#define STA_MODIFY_KEY_MASK 0x01 835#define STA_MODIFY_TID_DISABLE_TX 0x02 836#define STA_MODIFY_TX_RATE_MSK 0x04 837#define STA_MODIFY_ADDBA_TID_MSK 0x08 838#define STA_MODIFY_DELBA_TID_MSK 0x10 839#define STA_MODIFY_SLEEP_TX_COUNT_MSK 0x20 840 841/* agn */ 842struct iwl_keyinfo { 843 __le16 key_flags; 844 u8 tkip_rx_tsc_byte2; /* TSC[2] for key mix ph1 detection */ 845 u8 reserved1; 846 __le16 tkip_rx_ttak[5]; /* 10-byte unicast TKIP TTAK */ 847 u8 key_offset; 848 u8 reserved2; 849 u8 key[16]; /* 16-byte unicast decryption key */ 850 __le64 tx_secur_seq_cnt; 851 __le64 hw_tkip_mic_rx_key; 852 __le64 hw_tkip_mic_tx_key; 853} __packed; 854 855/** 856 * struct sta_id_modify 857 * @addr[ETH_ALEN]: station's MAC address 858 * @sta_id: index of station in uCode's station table 859 * @modify_mask: STA_MODIFY_*, 1: modify, 0: don't change 860 * 861 * Driver selects unused table index when adding new station, 862 * or the index to a pre-existing station entry when modifying that station. 863 * Some indexes have special purposes (IWL_AP_ID, index 0, is for AP). 864 * 865 * modify_mask flags select which parameters to modify vs. leave alone. 866 */ 867struct sta_id_modify { 868 u8 addr[ETH_ALEN]; 869 __le16 reserved1; 870 u8 sta_id; 871 u8 modify_mask; 872 __le16 reserved2; 873} __packed; 874 875/* 876 * REPLY_ADD_STA = 0x18 (command) 877 * 878 * The device contains an internal table of per-station information, 879 * with info on security keys, aggregation parameters, and Tx rates for 880 * initial Tx attempt and any retries (agn devices uses 881 * REPLY_TX_LINK_QUALITY_CMD, 882 * 883 * REPLY_ADD_STA sets up the table entry for one station, either creating 884 * a new entry, or modifying a pre-existing one. 885 * 886 * NOTE: RXON command (without "associated" bit set) wipes the station table 887 * clean. Moving into RF_KILL state does this also. Driver must set up 888 * new station table before transmitting anything on the RXON channel 889 * (except active scans or active measurements; those commands carry 890 * their own txpower/rate setup data). 891 * 892 * When getting started on a new channel, driver must set up the 893 * IWL_BROADCAST_ID entry (last entry in the table). For a client 894 * station in a BSS, once an AP is selected, driver sets up the AP STA 895 * in the IWL_AP_ID entry (1st entry in the table). BROADCAST and AP 896 * are all that are needed for a BSS client station. If the device is 897 * used as AP, or in an IBSS network, driver must set up station table 898 * entries for all STAs in network, starting with index IWL_STA_ID. 899 */ 900 901struct iwl_addsta_cmd { 902 u8 mode; /* 1: modify existing, 0: add new station */ 903 u8 reserved[3]; 904 struct sta_id_modify sta; 905 struct iwl_keyinfo key; 906 __le32 station_flags; /* STA_FLG_* */ 907 __le32 station_flags_msk; /* STA_FLG_* */ 908 909 /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID) 910 * corresponding to bit (e.g. bit 5 controls TID 5). 911 * Set modify_mask bit STA_MODIFY_TID_DISABLE_TX to use this field. */ 912 __le16 tid_disable_tx; 913 __le16 legacy_reserved; 914 915 /* TID for which to add block-ack support. 916 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */ 917 u8 add_immediate_ba_tid; 918 919 /* TID for which to remove block-ack support. 920 * Set modify_mask bit STA_MODIFY_DELBA_TID_MSK to use this field. */ 921 u8 remove_immediate_ba_tid; 922 923 /* Starting Sequence Number for added block-ack support. 924 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */ 925 __le16 add_immediate_ba_ssn; 926 927 /* 928 * Number of packets OK to transmit to station even though 929 * it is asleep -- used to synchronise PS-poll and u-APSD 930 * responses while ucode keeps track of STA sleep state. 931 */ 932 __le16 sleep_tx_count; 933 934 __le16 reserved2; 935} __packed; 936 937 938#define ADD_STA_SUCCESS_MSK 0x1 939#define ADD_STA_NO_ROOM_IN_TABLE 0x2 940#define ADD_STA_NO_BLOCK_ACK_RESOURCE 0x4 941#define ADD_STA_MODIFY_NON_EXIST_STA 0x8 942/* 943 * REPLY_ADD_STA = 0x18 (response) 944 */ 945struct iwl_add_sta_resp { 946 u8 status; /* ADD_STA_* */ 947} __packed; 948 949#define REM_STA_SUCCESS_MSK 0x1 950/* 951 * REPLY_REM_STA = 0x19 (response) 952 */ 953struct iwl_rem_sta_resp { 954 u8 status; 955} __packed; 956 957/* 958 * REPLY_REM_STA = 0x19 (command) 959 */ 960struct iwl_rem_sta_cmd { 961 u8 num_sta; /* number of removed stations */ 962 u8 reserved[3]; 963 u8 addr[ETH_ALEN]; /* MAC addr of the first station */ 964 u8 reserved2[2]; 965} __packed; 966 967 968/* WiFi queues mask */ 969#define IWL_SCD_BK_MSK cpu_to_le32(BIT(0)) 970#define IWL_SCD_BE_MSK cpu_to_le32(BIT(1)) 971#define IWL_SCD_VI_MSK cpu_to_le32(BIT(2)) 972#define IWL_SCD_VO_MSK cpu_to_le32(BIT(3)) 973#define IWL_SCD_MGMT_MSK cpu_to_le32(BIT(3)) 974 975/* PAN queues mask */ 976#define IWL_PAN_SCD_BK_MSK cpu_to_le32(BIT(4)) 977#define IWL_PAN_SCD_BE_MSK cpu_to_le32(BIT(5)) 978#define IWL_PAN_SCD_VI_MSK cpu_to_le32(BIT(6)) 979#define IWL_PAN_SCD_VO_MSK cpu_to_le32(BIT(7)) 980#define IWL_PAN_SCD_MGMT_MSK cpu_to_le32(BIT(7)) 981#define IWL_PAN_SCD_MULTICAST_MSK cpu_to_le32(BIT(8)) 982 983#define IWL_AGG_TX_QUEUE_MSK cpu_to_le32(0xffc00) 984 985#define IWL_DROP_ALL BIT(1) 986 987/* 988 * REPLY_TXFIFO_FLUSH = 0x1e(command and response) 989 * 990 * When using full FIFO flush this command checks the scheduler HW block WR/RD 991 * pointers to check if all the frames were transferred by DMA into the 992 * relevant TX FIFO queue. Only when the DMA is finished and the queue is 993 * empty the command can finish. 994 * This command is used to flush the TXFIFO from transmit commands, it may 995 * operate on single or multiple queues, the command queue can't be flushed by 996 * this command. The command response is returned when all the queue flush 997 * operations are done. Each TX command flushed return response with the FLUSH 998 * status set in the TX response status. When FIFO flush operation is used, 999 * the flush operation ends when both the scheduler DMA done and TXFIFO empty 1000 * are set. 1001 * 1002 * @queue_control: bit mask for which queues to flush 1003 * @flush_control: flush controls 1004 * 0: Dump single MSDU 1005 * 1: Dump multiple MSDU according to PS, INVALID STA, TTL, TID disable. 1006 * 2: Dump all FIFO 1007 */ 1008struct iwl_txfifo_flush_cmd { 1009 __le32 queue_control; 1010 __le16 flush_control; 1011 __le16 reserved; 1012} __packed; 1013 1014/* 1015 * REPLY_WEP_KEY = 0x20 1016 */ 1017struct iwl_wep_key { 1018 u8 key_index; 1019 u8 key_offset; 1020 u8 reserved1[2]; 1021 u8 key_size; 1022 u8 reserved2[3]; 1023 u8 key[16]; 1024} __packed; 1025 1026struct iwl_wep_cmd { 1027 u8 num_keys; 1028 u8 global_key_type; 1029 u8 flags; 1030 u8 reserved; 1031 struct iwl_wep_key key[0]; 1032} __packed; 1033 1034#define WEP_KEY_WEP_TYPE 1 1035#define WEP_KEYS_MAX 4 1036#define WEP_INVALID_OFFSET 0xff 1037#define WEP_KEY_LEN_64 5 1038#define WEP_KEY_LEN_128 13 1039 1040/****************************************************************************** 1041 * (4) 1042 * Rx Responses: 1043 * 1044 *****************************************************************************/ 1045 1046#define RX_RES_STATUS_NO_CRC32_ERROR cpu_to_le32(1 << 0) 1047#define RX_RES_STATUS_NO_RXE_OVERFLOW cpu_to_le32(1 << 1) 1048 1049#define RX_RES_PHY_FLAGS_BAND_24_MSK cpu_to_le16(1 << 0) 1050#define RX_RES_PHY_FLAGS_MOD_CCK_MSK cpu_to_le16(1 << 1) 1051#define RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK cpu_to_le16(1 << 2) 1052#define RX_RES_PHY_FLAGS_NARROW_BAND_MSK cpu_to_le16(1 << 3) 1053#define RX_RES_PHY_FLAGS_ANTENNA_MSK 0x70 1054#define RX_RES_PHY_FLAGS_ANTENNA_POS 4 1055#define RX_RES_PHY_FLAGS_AGG_MSK cpu_to_le16(1 << 7) 1056 1057#define RX_RES_STATUS_SEC_TYPE_MSK (0x7 << 8) 1058#define RX_RES_STATUS_SEC_TYPE_NONE (0x0 << 8) 1059#define RX_RES_STATUS_SEC_TYPE_WEP (0x1 << 8) 1060#define RX_RES_STATUS_SEC_TYPE_CCMP (0x2 << 8) 1061#define RX_RES_STATUS_SEC_TYPE_TKIP (0x3 << 8) 1062#define RX_RES_STATUS_SEC_TYPE_ERR (0x7 << 8) 1063 1064#define RX_RES_STATUS_STATION_FOUND (1<<6) 1065#define RX_RES_STATUS_NO_STATION_INFO_MISMATCH (1<<7) 1066 1067#define RX_RES_STATUS_DECRYPT_TYPE_MSK (0x3 << 11) 1068#define RX_RES_STATUS_NOT_DECRYPT (0x0 << 11) 1069#define RX_RES_STATUS_DECRYPT_OK (0x3 << 11) 1070#define RX_RES_STATUS_BAD_ICV_MIC (0x1 << 11) 1071#define RX_RES_STATUS_BAD_KEY_TTAK (0x2 << 11) 1072 1073#define RX_MPDU_RES_STATUS_ICV_OK (0x20) 1074#define RX_MPDU_RES_STATUS_MIC_OK (0x40) 1075#define RX_MPDU_RES_STATUS_TTAK_OK (1 << 7) 1076#define RX_MPDU_RES_STATUS_DEC_DONE_MSK (0x800) 1077 1078 1079#define IWLAGN_RX_RES_PHY_CNT 8 1080#define IWLAGN_RX_RES_AGC_IDX 1 1081#define IWLAGN_RX_RES_RSSI_AB_IDX 2 1082#define IWLAGN_RX_RES_RSSI_C_IDX 3 1083#define IWLAGN_OFDM_AGC_MSK 0xfe00 1084#define IWLAGN_OFDM_AGC_BIT_POS 9 1085#define IWLAGN_OFDM_RSSI_INBAND_A_BITMSK 0x00ff 1086#define IWLAGN_OFDM_RSSI_ALLBAND_A_BITMSK 0xff00 1087#define IWLAGN_OFDM_RSSI_A_BIT_POS 0 1088#define IWLAGN_OFDM_RSSI_INBAND_B_BITMSK 0xff0000 1089#define IWLAGN_OFDM_RSSI_ALLBAND_B_BITMSK 0xff000000 1090#define IWLAGN_OFDM_RSSI_B_BIT_POS 16 1091#define IWLAGN_OFDM_RSSI_INBAND_C_BITMSK 0x00ff 1092#define IWLAGN_OFDM_RSSI_ALLBAND_C_BITMSK 0xff00 1093#define IWLAGN_OFDM_RSSI_C_BIT_POS 0 1094 1095struct iwlagn_non_cfg_phy { 1096 __le32 non_cfg_phy[IWLAGN_RX_RES_PHY_CNT]; /* up to 8 phy entries */ 1097} __packed; 1098 1099 1100/* 1101 * REPLY_RX = 0xc3 (response only, not a command) 1102 * Used only for legacy (non 11n) frames. 1103 */ 1104struct iwl_rx_phy_res { 1105 u8 non_cfg_phy_cnt; /* non configurable DSP phy data byte count */ 1106 u8 cfg_phy_cnt; /* configurable DSP phy data byte count */ 1107 u8 stat_id; /* configurable DSP phy data set ID */ 1108 u8 reserved1; 1109 __le64 timestamp; /* TSF at on air rise */ 1110 __le32 beacon_time_stamp; /* beacon at on-air rise */ 1111 __le16 phy_flags; /* general phy flags: band, modulation, ... */ 1112 __le16 channel; /* channel number */ 1113 u8 non_cfg_phy_buf[32]; /* for various implementations of non_cfg_phy */ 1114 __le32 rate_n_flags; /* RATE_MCS_* */ 1115 __le16 byte_count; /* frame's byte-count */ 1116 __le16 frame_time; /* frame's time on the air */ 1117} __packed; 1118 1119struct iwl_rx_mpdu_res_start { 1120 __le16 byte_count; 1121 __le16 reserved; 1122} __packed; 1123 1124 1125/****************************************************************************** 1126 * (5) 1127 * Tx Commands & Responses: 1128 * 1129 * Driver must place each REPLY_TX command into one of the prioritized Tx 1130 * queues in host DRAM, shared between driver and device (see comments for 1131 * SCD registers and Tx/Rx Queues). When the device's Tx scheduler and uCode 1132 * are preparing to transmit, the device pulls the Tx command over the PCI 1133 * bus via one of the device's Tx DMA channels, to fill an internal FIFO 1134 * from which data will be transmitted. 1135 * 1136 * uCode handles all timing and protocol related to control frames 1137 * (RTS/CTS/ACK), based on flags in the Tx command. uCode and Tx scheduler 1138 * handle reception of block-acks; uCode updates the host driver via 1139 * REPLY_COMPRESSED_BA. 1140 * 1141 * uCode handles retrying Tx when an ACK is expected but not received. 1142 * This includes trying lower data rates than the one requested in the Tx 1143 * command, as set up by the REPLY_TX_LINK_QUALITY_CMD (agn). 1144 * 1145 * Driver sets up transmit power for various rates via REPLY_TX_PWR_TABLE_CMD. 1146 * This command must be executed after every RXON command, before Tx can occur. 1147 *****************************************************************************/ 1148 1149/* REPLY_TX Tx flags field */ 1150 1151/* 1152 * 1: Use RTS/CTS protocol or CTS-to-self if spec allows it 1153 * before this frame. if CTS-to-self required check 1154 * RXON_FLG_SELF_CTS_EN status. 1155 */ 1156#define TX_CMD_FLG_PROT_REQUIRE_MSK cpu_to_le32(1 << 0) 1157 1158/* 1: Expect ACK from receiving station 1159 * 0: Don't expect ACK (MAC header's duration field s/b 0) 1160 * Set this for unicast frames, but not broadcast/multicast. */ 1161#define TX_CMD_FLG_ACK_MSK cpu_to_le32(1 << 3) 1162 1163/* For agn devices: 1164 * 1: Use rate scale table (see REPLY_TX_LINK_QUALITY_CMD). 1165 * Tx command's initial_rate_index indicates first rate to try; 1166 * uCode walks through table for additional Tx attempts. 1167 * 0: Use Tx rate/MCS from Tx command's rate_n_flags field. 1168 * This rate will be used for all Tx attempts; it will not be scaled. */ 1169#define TX_CMD_FLG_STA_RATE_MSK cpu_to_le32(1 << 4) 1170 1171/* 1: Expect immediate block-ack. 1172 * Set when Txing a block-ack request frame. Also set TX_CMD_FLG_ACK_MSK. */ 1173#define TX_CMD_FLG_IMM_BA_RSP_MASK cpu_to_le32(1 << 6) 1174 1175/* Tx antenna selection field; reserved (0) for agn devices. */ 1176#define TX_CMD_FLG_ANT_SEL_MSK cpu_to_le32(0xf00) 1177 1178/* 1: Ignore Bluetooth priority for this frame. 1179 * 0: Delay Tx until Bluetooth device is done (normal usage). */ 1180#define TX_CMD_FLG_IGNORE_BT cpu_to_le32(1 << 12) 1181 1182/* 1: uCode overrides sequence control field in MAC header. 1183 * 0: Driver provides sequence control field in MAC header. 1184 * Set this for management frames, non-QOS data frames, non-unicast frames, 1185 * and also in Tx command embedded in REPLY_SCAN_CMD for active scans. */ 1186#define TX_CMD_FLG_SEQ_CTL_MSK cpu_to_le32(1 << 13) 1187 1188/* 1: This frame is non-last MPDU; more fragments are coming. 1189 * 0: Last fragment, or not using fragmentation. */ 1190#define TX_CMD_FLG_MORE_FRAG_MSK cpu_to_le32(1 << 14) 1191 1192/* 1: uCode calculates and inserts Timestamp Function (TSF) in outgoing frame. 1193 * 0: No TSF required in outgoing frame. 1194 * Set this for transmitting beacons and probe responses. */ 1195#define TX_CMD_FLG_TSF_MSK cpu_to_le32(1 << 16) 1196 1197/* 1: Driver inserted 2 bytes pad after the MAC header, for (required) dword 1198 * alignment of frame's payload data field. 1199 * 0: No pad 1200 * Set this for MAC headers with 26 or 30 bytes, i.e. those with QOS or ADDR4 1201 * field (but not both). Driver must align frame data (i.e. data following 1202 * MAC header) to DWORD boundary. */ 1203#define TX_CMD_FLG_MH_PAD_MSK cpu_to_le32(1 << 20) 1204 1205/* accelerate aggregation support 1206 * 0 - no CCMP encryption; 1 - CCMP encryption */ 1207#define TX_CMD_FLG_AGG_CCMP_MSK cpu_to_le32(1 << 22) 1208 1209/* HCCA-AP - disable duration overwriting. */ 1210#define TX_CMD_FLG_DUR_MSK cpu_to_le32(1 << 25) 1211 1212 1213/* 1214 * TX command security control 1215 */ 1216#define TX_CMD_SEC_WEP 0x01 1217#define TX_CMD_SEC_CCM 0x02 1218#define TX_CMD_SEC_TKIP 0x03 1219#define TX_CMD_SEC_MSK 0x03 1220#define TX_CMD_SEC_SHIFT 6 1221#define TX_CMD_SEC_KEY128 0x08 1222 1223/* 1224 * REPLY_TX = 0x1c (command) 1225 */ 1226 1227/* 1228 * 4965 uCode updates these Tx attempt count values in host DRAM. 1229 * Used for managing Tx retries when expecting block-acks. 1230 * Driver should set these fields to 0. 1231 */ 1232struct iwl_dram_scratch { 1233 u8 try_cnt; /* Tx attempts */ 1234 u8 bt_kill_cnt; /* Tx attempts blocked by Bluetooth device */ 1235 __le16 reserved; 1236} __packed; 1237 1238struct iwl_tx_cmd { 1239 /* 1240 * MPDU byte count: 1241 * MAC header (24/26/30/32 bytes) + 2 bytes pad if 26/30 header size, 1242 * + 8 byte IV for CCM or TKIP (not used for WEP) 1243 * + Data payload 1244 * + 8-byte MIC (not used for CCM/WEP) 1245 * NOTE: Does not include Tx command bytes, post-MAC pad bytes, 1246 * MIC (CCM) 8 bytes, ICV (WEP/TKIP/CKIP) 4 bytes, CRC 4 bytes.i 1247 * Range: 14-2342 bytes. 1248 */ 1249 __le16 len; 1250 1251 /* 1252 * MPDU or MSDU byte count for next frame. 1253 * Used for fragmentation and bursting, but not 11n aggregation. 1254 * Same as "len", but for next frame. Set to 0 if not applicable. 1255 */ 1256 __le16 next_frame_len; 1257 1258 __le32 tx_flags; /* TX_CMD_FLG_* */ 1259 1260 /* uCode may modify this field of the Tx command (in host DRAM!). 1261 * Driver must also set dram_lsb_ptr and dram_msb_ptr in this cmd. */ 1262 struct iwl_dram_scratch scratch; 1263 1264 /* Rate for *all* Tx attempts, if TX_CMD_FLG_STA_RATE_MSK is cleared. */ 1265 __le32 rate_n_flags; /* RATE_MCS_* */ 1266 1267 /* Index of destination station in uCode's station table */ 1268 u8 sta_id; 1269 1270 /* Type of security encryption: CCM or TKIP */ 1271 u8 sec_ctl; /* TX_CMD_SEC_* */ 1272 1273 /* 1274 * Index into rate table (see REPLY_TX_LINK_QUALITY_CMD) for initial 1275 * Tx attempt, if TX_CMD_FLG_STA_RATE_MSK is set. Normally "0" for 1276 * data frames, this field may be used to selectively reduce initial 1277 * rate (via non-0 value) for special frames (e.g. management), while 1278 * still supporting rate scaling for all frames. 1279 */ 1280 u8 initial_rate_index; 1281 u8 reserved; 1282 u8 key[16]; 1283 __le16 next_frame_flags; 1284 __le16 reserved2; 1285 union { 1286 __le32 life_time; 1287 __le32 attempt; 1288 } stop_time; 1289 1290 /* Host DRAM physical address pointer to "scratch" in this command. 1291 * Must be dword aligned. "0" in dram_lsb_ptr disables usage. */ 1292 __le32 dram_lsb_ptr; 1293 u8 dram_msb_ptr; 1294 1295 u8 rts_retry_limit; /*byte 50 */ 1296 u8 data_retry_limit; /*byte 51 */ 1297 u8 tid_tspec; 1298 union { 1299 __le16 pm_frame_timeout; 1300 __le16 attempt_duration; 1301 } timeout; 1302 1303 /* 1304 * Duration of EDCA burst Tx Opportunity, in 32-usec units. 1305 * Set this if txop time is not specified by HCCA protocol (e.g. by AP). 1306 */ 1307 __le16 driver_txop; 1308 1309 /* 1310 * MAC header goes here, followed by 2 bytes padding if MAC header 1311 * length is 26 or 30 bytes, followed by payload data 1312 */ 1313 u8 payload[0]; 1314 struct ieee80211_hdr hdr[0]; 1315} __packed; 1316 1317/* 1318 * TX command response is sent after *agn* transmission attempts. 1319 * 1320 * both postpone and abort status are expected behavior from uCode. there is 1321 * no special operation required from driver; except for RFKILL_FLUSH, 1322 * which required tx flush host command to flush all the tx frames in queues 1323 */ 1324enum { 1325 TX_STATUS_SUCCESS = 0x01, 1326 TX_STATUS_DIRECT_DONE = 0x02, 1327 /* postpone TX */ 1328 TX_STATUS_POSTPONE_DELAY = 0x40, 1329 TX_STATUS_POSTPONE_FEW_BYTES = 0x41, 1330 TX_STATUS_POSTPONE_BT_PRIO = 0x42, 1331 TX_STATUS_POSTPONE_QUIET_PERIOD = 0x43, 1332 TX_STATUS_POSTPONE_CALC_TTAK = 0x44, 1333 /* abort TX */ 1334 TX_STATUS_FAIL_INTERNAL_CROSSED_RETRY = 0x81, 1335 TX_STATUS_FAIL_SHORT_LIMIT = 0x82, 1336 TX_STATUS_FAIL_LONG_LIMIT = 0x83, 1337 TX_STATUS_FAIL_FIFO_UNDERRUN = 0x84, 1338 TX_STATUS_FAIL_DRAIN_FLOW = 0x85, 1339 TX_STATUS_FAIL_RFKILL_FLUSH = 0x86, 1340 TX_STATUS_FAIL_LIFE_EXPIRE = 0x87, 1341 TX_STATUS_FAIL_DEST_PS = 0x88, 1342 TX_STATUS_FAIL_HOST_ABORTED = 0x89, 1343 TX_STATUS_FAIL_BT_RETRY = 0x8a, 1344 TX_STATUS_FAIL_STA_INVALID = 0x8b, 1345 TX_STATUS_FAIL_FRAG_DROPPED = 0x8c, 1346 TX_STATUS_FAIL_TID_DISABLE = 0x8d, 1347 TX_STATUS_FAIL_FIFO_FLUSHED = 0x8e, 1348 TX_STATUS_FAIL_INSUFFICIENT_CF_POLL = 0x8f, 1349 TX_STATUS_FAIL_PASSIVE_NO_RX = 0x90, 1350 TX_STATUS_FAIL_NO_BEACON_ON_RADAR = 0x91, 1351}; 1352 1353#define TX_PACKET_MODE_REGULAR 0x0000 1354#define TX_PACKET_MODE_BURST_SEQ 0x0100 1355#define TX_PACKET_MODE_BURST_FIRST 0x0200 1356 1357enum { 1358 TX_POWER_PA_NOT_ACTIVE = 0x0, 1359}; 1360 1361enum { 1362 TX_STATUS_MSK = 0x000000ff, /* bits 0:7 */ 1363 TX_STATUS_DELAY_MSK = 0x00000040, 1364 TX_STATUS_ABORT_MSK = 0x00000080, 1365 TX_PACKET_MODE_MSK = 0x0000ff00, /* bits 8:15 */ 1366 TX_FIFO_NUMBER_MSK = 0x00070000, /* bits 16:18 */ 1367 TX_RESERVED = 0x00780000, /* bits 19:22 */ 1368 TX_POWER_PA_DETECT_MSK = 0x7f800000, /* bits 23:30 */ 1369 TX_ABORT_REQUIRED_MSK = 0x80000000, /* bits 31:31 */ 1370}; 1371 1372/* ******************************* 1373 * TX aggregation status 1374 ******************************* */ 1375 1376enum { 1377 AGG_TX_STATE_TRANSMITTED = 0x00, 1378 AGG_TX_STATE_UNDERRUN_MSK = 0x01, 1379 AGG_TX_STATE_BT_PRIO_MSK = 0x02, 1380 AGG_TX_STATE_FEW_BYTES_MSK = 0x04, 1381 AGG_TX_STATE_ABORT_MSK = 0x08, 1382 AGG_TX_STATE_LAST_SENT_TTL_MSK = 0x10, 1383 AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK = 0x20, 1384 AGG_TX_STATE_LAST_SENT_BT_KILL_MSK = 0x40, 1385 AGG_TX_STATE_SCD_QUERY_MSK = 0x80, 1386 AGG_TX_STATE_TEST_BAD_CRC32_MSK = 0x100, 1387 AGG_TX_STATE_RESPONSE_MSK = 0x1ff, 1388 AGG_TX_STATE_DUMP_TX_MSK = 0x200, 1389 AGG_TX_STATE_DELAY_TX_MSK = 0x400 1390}; 1391 1392#define AGG_TX_STATUS_MSK 0x00000fff /* bits 0:11 */ 1393#define AGG_TX_TRY_MSK 0x0000f000 /* bits 12:15 */ 1394#define AGG_TX_TRY_POS 12 1395 1396#define AGG_TX_STATE_LAST_SENT_MSK (AGG_TX_STATE_LAST_SENT_TTL_MSK | \ 1397 AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK | \ 1398 AGG_TX_STATE_LAST_SENT_BT_KILL_MSK) 1399 1400/* # tx attempts for first frame in aggregation */ 1401#define AGG_TX_STATE_TRY_CNT_POS 12 1402#define AGG_TX_STATE_TRY_CNT_MSK 0xf000 1403 1404/* Command ID and sequence number of Tx command for this frame */ 1405#define AGG_TX_STATE_SEQ_NUM_POS 16 1406#define AGG_TX_STATE_SEQ_NUM_MSK 0xffff0000 1407 1408/* 1409 * REPLY_TX = 0x1c (response) 1410 * 1411 * This response may be in one of two slightly different formats, indicated 1412 * by the frame_count field: 1413 * 1414 * 1) No aggregation (frame_count == 1). This reports Tx results for 1415 * a single frame. Multiple attempts, at various bit rates, may have 1416 * been made for this frame. 1417 * 1418 * 2) Aggregation (frame_count > 1). This reports Tx results for 1419 * 2 or more frames that used block-acknowledge. All frames were 1420 * transmitted at same rate. Rate scaling may have been used if first 1421 * frame in this new agg block failed in previous agg block(s). 1422 * 1423 * Note that, for aggregation, ACK (block-ack) status is not delivered here; 1424 * block-ack has not been received by the time the agn device records 1425 * this status. 1426 * This status relates to reasons the tx might have been blocked or aborted 1427 * within the sending station (this agn device), rather than whether it was 1428 * received successfully by the destination station. 1429 */ 1430struct agg_tx_status { 1431 __le16 status; 1432 __le16 sequence; 1433} __packed; 1434 1435/* 1436 * definitions for initial rate index field 1437 * bits [3:0] initial rate index 1438 * bits [6:4] rate table color, used for the initial rate 1439 * bit-7 invalid rate indication 1440 * i.e. rate was not chosen from rate table 1441 * or rate table color was changed during frame retries 1442 * refer tlc rate info 1443 */ 1444 1445#define IWL50_TX_RES_INIT_RATE_INDEX_POS 0 1446#define IWL50_TX_RES_INIT_RATE_INDEX_MSK 0x0f 1447#define IWL50_TX_RES_RATE_TABLE_COLOR_POS 4 1448#define IWL50_TX_RES_RATE_TABLE_COLOR_MSK 0x70 1449#define IWL50_TX_RES_INV_RATE_INDEX_MSK 0x80 1450 1451/* refer to ra_tid */ 1452#define IWLAGN_TX_RES_TID_POS 0 1453#define IWLAGN_TX_RES_TID_MSK 0x0f 1454#define IWLAGN_TX_RES_RA_POS 4 1455#define IWLAGN_TX_RES_RA_MSK 0xf0 1456 1457struct iwlagn_tx_resp { 1458 u8 frame_count; /* 1 no aggregation, >1 aggregation */ 1459 u8 bt_kill_count; /* # blocked by bluetooth (unused for agg) */ 1460 u8 failure_rts; /* # failures due to unsuccessful RTS */ 1461 u8 failure_frame; /* # failures due to no ACK (unused for agg) */ 1462 1463 /* For non-agg: Rate at which frame was successful. 1464 * For agg: Rate at which all frames were transmitted. */ 1465 __le32 rate_n_flags; /* RATE_MCS_* */ 1466 1467 /* For non-agg: RTS + CTS + frame tx attempts time + ACK. 1468 * For agg: RTS + CTS + aggregation tx time + block-ack time. */ 1469 __le16 wireless_media_time; /* uSecs */ 1470 1471 u8 pa_status; /* RF power amplifier measurement (not used) */ 1472 u8 pa_integ_res_a[3]; 1473 u8 pa_integ_res_b[3]; 1474 u8 pa_integ_res_C[3]; 1475 1476 __le32 tfd_info; 1477 __le16 seq_ctl; 1478 __le16 byte_cnt; 1479 u8 tlc_info; 1480 u8 ra_tid; /* tid (0:3), sta_id (4:7) */ 1481 __le16 frame_ctrl; 1482 /* 1483 * For non-agg: frame status TX_STATUS_* 1484 * For agg: status of 1st frame, AGG_TX_STATE_*; other frame status 1485 * fields follow this one, up to frame_count. 1486 * Bit fields: 1487 * 11- 0: AGG_TX_STATE_* status code 1488 * 15-12: Retry count for 1st frame in aggregation (retries 1489 * occur if tx failed for this frame when it was a 1490 * member of a previous aggregation block). If rate 1491 * scaling is used, retry count indicates the rate 1492 * table entry used for all frames in the new agg. 1493 * 31-16: Sequence # for this frame's Tx cmd (not SSN!) 1494 */ 1495 struct agg_tx_status status; /* TX status (in aggregation - 1496 * status of 1st frame) */ 1497} __packed; 1498/* 1499 * REPLY_COMPRESSED_BA = 0xc5 (response only, not a command) 1500 * 1501 * Reports Block-Acknowledge from recipient station 1502 */ 1503struct iwl_compressed_ba_resp { 1504 __le32 sta_addr_lo32; 1505 __le16 sta_addr_hi16; 1506 __le16 reserved; 1507 1508 /* Index of recipient (BA-sending) station in uCode's station table */ 1509 u8 sta_id; 1510 u8 tid; 1511 __le16 seq_ctl; 1512 __le64 bitmap; 1513 __le16 scd_flow; 1514 __le16 scd_ssn; 1515 u8 txed; /* number of frames sent */ 1516 u8 txed_2_done; /* number of frames acked */ 1517 __le16 reserved1; 1518} __packed; 1519 1520/* 1521 * REPLY_TX_PWR_TABLE_CMD = 0x97 (command, has simple generic response) 1522 * 1523 */ 1524 1525/*RS_NEW_API: only TLC_RTS remains and moved to bit 0 */ 1526#define LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK (1 << 0) 1527 1528/* # of EDCA prioritized tx fifos */ 1529#define LINK_QUAL_AC_NUM AC_NUM 1530 1531/* # entries in rate scale table to support Tx retries */ 1532#define LINK_QUAL_MAX_RETRY_NUM 16 1533 1534/* Tx antenna selection values */ 1535#define LINK_QUAL_ANT_A_MSK (1 << 0) 1536#define LINK_QUAL_ANT_B_MSK (1 << 1) 1537#define LINK_QUAL_ANT_MSK (LINK_QUAL_ANT_A_MSK|LINK_QUAL_ANT_B_MSK) 1538 1539 1540/** 1541 * struct iwl_link_qual_general_params 1542 * 1543 * Used in REPLY_TX_LINK_QUALITY_CMD 1544 */ 1545struct iwl_link_qual_general_params { 1546 u8 flags; 1547 1548 /* No entries at or above this (driver chosen) index contain MIMO */ 1549 u8 mimo_delimiter; 1550 1551 /* Best single antenna to use for single stream (legacy, SISO). */ 1552 u8 single_stream_ant_msk; /* LINK_QUAL_ANT_* */ 1553 1554 /* Best antennas to use for MIMO (unused for 4965, assumes both). */ 1555 u8 dual_stream_ant_msk; /* LINK_QUAL_ANT_* */ 1556 1557 /* 1558 * If driver needs to use different initial rates for different 1559 * EDCA QOS access categories (as implemented by tx fifos 0-3), 1560 * this table will set that up, by indicating the indexes in the 1561 * rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table at which to start. 1562 * Otherwise, driver should set all entries to 0. 1563 * 1564 * Entry usage: 1565 * 0 = Background, 1 = Best Effort (normal), 2 = Video, 3 = Voice 1566 * TX FIFOs above 3 use same value (typically 0) as TX FIFO 3. 1567 */ 1568 u8 start_rate_index[LINK_QUAL_AC_NUM]; 1569} __packed; 1570 1571#define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000) /* 4 milliseconds */ 1572#define LINK_QUAL_AGG_TIME_LIMIT_MAX (8000) 1573#define LINK_QUAL_AGG_TIME_LIMIT_MIN (100) 1574 1575#define LINK_QUAL_AGG_DISABLE_START_DEF (3) 1576#define LINK_QUAL_AGG_DISABLE_START_MAX (255) 1577#define LINK_QUAL_AGG_DISABLE_START_MIN (0) 1578 1579#define LINK_QUAL_AGG_FRAME_LIMIT_DEF (63) 1580#define LINK_QUAL_AGG_FRAME_LIMIT_MAX (63) 1581#define LINK_QUAL_AGG_FRAME_LIMIT_MIN (0) 1582 1583/** 1584 * struct iwl_link_qual_agg_params 1585 * 1586 * Used in REPLY_TX_LINK_QUALITY_CMD 1587 */ 1588struct iwl_link_qual_agg_params { 1589 1590 /* 1591 *Maximum number of uSec in aggregation. 1592 * default set to 4000 (4 milliseconds) if not configured in .cfg 1593 */ 1594 __le16 agg_time_limit; 1595 1596 /* 1597 * Number of Tx retries allowed for a frame, before that frame will 1598 * no longer be considered for the start of an aggregation sequence 1599 * (scheduler will then try to tx it as single frame). 1600 * Driver should set this to 3. 1601 */ 1602 u8 agg_dis_start_th; 1603 1604 /* 1605 * Maximum number of frames in aggregation. 1606 * 0 = no limit (default). 1 = no aggregation. 1607 * Other values = max # frames in aggregation. 1608 */ 1609 u8 agg_frame_cnt_limit; 1610 1611 __le32 reserved; 1612} __packed; 1613 1614/* 1615 * REPLY_TX_LINK_QUALITY_CMD = 0x4e (command, has simple generic response) 1616 * 1617 * For agn devices 1618 * 1619 * Each station in the agn device's internal station table has its own table 1620 * of 16 1621 * Tx rates and modulation modes (e.g. legacy/SISO/MIMO) for retrying Tx when 1622 * an ACK is not received. This command replaces the entire table for 1623 * one station. 1624 * 1625 * NOTE: Station must already be in agn device's station table. 1626 * Use REPLY_ADD_STA. 1627 * 1628 * The rate scaling procedures described below work well. Of course, other 1629 * procedures are possible, and may work better for particular environments. 1630 * 1631 * 1632 * FILLING THE RATE TABLE 1633 * 1634 * Given a particular initial rate and mode, as determined by the rate 1635 * scaling algorithm described below, the Linux driver uses the following 1636 * formula to fill the rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table in the 1637 * Link Quality command: 1638 * 1639 * 1640 * 1) If using High-throughput (HT) (SISO or MIMO) initial rate: 1641 * a) Use this same initial rate for first 3 entries. 1642 * b) Find next lower available rate using same mode (SISO or MIMO), 1643 * use for next 3 entries. If no lower rate available, switch to 1644 * legacy mode (no HT40 channel, no MIMO, no short guard interval). 1645 * c) If using MIMO, set command's mimo_delimiter to number of entries 1646 * using MIMO (3 or 6). 1647 * d) After trying 2 HT rates, switch to legacy mode (no HT40 channel, 1648 * no MIMO, no short guard interval), at the next lower bit rate 1649 * (e.g. if second HT bit rate was 54, try 48 legacy), and follow 1650 * legacy procedure for remaining table entries. 1651 * 1652 * 2) If using legacy initial rate: 1653 * a) Use the initial rate for only one entry. 1654 * b) For each following entry, reduce the rate to next lower available 1655 * rate, until reaching the lowest available rate. 1656 * c) When reducing rate, also switch antenna selection. 1657 * d) Once lowest available rate is reached, repeat this rate until 1658 * rate table is filled (16 entries), switching antenna each entry. 1659 * 1660 * 1661 * ACCUMULATING HISTORY 1662 * 1663 * The rate scaling algorithm for agn devices, as implemented in Linux driver, 1664 * uses two sets of frame Tx success history: One for the current/active 1665 * modulation mode, and one for a speculative/search mode that is being 1666 * attempted. If the speculative mode turns out to be more effective (i.e. 1667 * actual transfer rate is better), then the driver continues to use the 1668 * speculative mode as the new current active mode. 1669 * 1670 * Each history set contains, separately for each possible rate, data for a 1671 * sliding window of the 62 most recent tx attempts at that rate. The data 1672 * includes a shifting bitmap of success(1)/failure(0), and sums of successful 1673 * and attempted frames, from which the driver can additionally calculate a 1674 * success ratio (success / attempted) and number of failures 1675 * (attempted - success), and control the size of the window (attempted). 1676 * The driver uses the bit map to remove successes from the success sum, as 1677 * the oldest tx attempts fall out of the window. 1678 * 1679 * When the agn device makes multiple tx attempts for a given frame, each 1680 * attempt might be at a different rate, and have different modulation 1681 * characteristics (e.g. antenna, fat channel, short guard interval), as set 1682 * up in the rate scaling table in the Link Quality command. The driver must 1683 * determine which rate table entry was used for each tx attempt, to determine 1684 * which rate-specific history to update, and record only those attempts that 1685 * match the modulation characteristics of the history set. 1686 * 1687 * When using block-ack (aggregation), all frames are transmitted at the same 1688 * rate, since there is no per-attempt acknowledgment from the destination 1689 * station. The Tx response struct iwl_tx_resp indicates the Tx rate in 1690 * rate_n_flags field. After receiving a block-ack, the driver can update 1691 * history for the entire block all at once. 1692 * 1693 * 1694 * FINDING BEST STARTING RATE: 1695 * 1696 * When working with a selected initial modulation mode (see below), the 1697 * driver attempts to find a best initial rate. The initial rate is the 1698 * first entry in the Link Quality command's rate table. 1699 * 1700 * 1) Calculate actual throughput (success ratio * expected throughput, see 1701 * table below) for current initial rate. Do this only if enough frames 1702 * have been attempted to make the value meaningful: at least 6 failed 1703 * tx attempts, or at least 8 successes. If not enough, don't try rate 1704 * scaling yet. 1705 * 1706 * 2) Find available rates adjacent to current initial rate. Available means: 1707 * a) supported by hardware && 1708 * b) supported by association && 1709 * c) within any constraints selected by user 1710 * 1711 * 3) Gather measured throughputs for adjacent rates. These might not have 1712 * enough history to calculate a throughput. That's okay, we might try 1713 * using one of them anyway! 1714 * 1715 * 4) Try decreasing rate if, for current rate: 1716 * a) success ratio is < 15% || 1717 * b) lower adjacent rate has better measured throughput || 1718 * c) higher adjacent rate has worse throughput, and lower is unmeasured 1719 * 1720 * As a sanity check, if decrease was determined above, leave rate 1721 * unchanged if: 1722 * a) lower rate unavailable 1723 * b) success ratio at current rate > 85% (very good) 1724 * c) current measured throughput is better than expected throughput 1725 * of lower rate (under perfect 100% tx conditions, see table below) 1726 * 1727 * 5) Try increasing rate if, for current rate: 1728 * a) success ratio is < 15% || 1729 * b) both adjacent rates' throughputs are unmeasured (try it!) || 1730 * b) higher adjacent rate has better measured throughput || 1731 * c) lower adjacent rate has worse throughput, and higher is unmeasured 1732 * 1733 * As a sanity check, if increase was determined above, leave rate 1734 * unchanged if: 1735 * a) success ratio at current rate < 70%. This is not particularly 1736 * good performance; higher rate is sure to have poorer success. 1737 * 1738 * 6) Re-evaluate the rate after each tx frame. If working with block- 1739 * acknowledge, history and statistics may be calculated for the entire 1740 * block (including prior history that fits within the history windows), 1741 * before re-evaluation. 1742 * 1743 * FINDING BEST STARTING MODULATION MODE: 1744 * 1745 * After working with a modulation mode for a "while" (and doing rate scaling), 1746 * the driver searches for a new initial mode in an attempt to improve 1747 * throughput. The "while" is measured by numbers of attempted frames: 1748 * 1749 * For legacy mode, search for new mode after: 1750 * 480 successful frames, or 160 failed frames 1751 * For high-throughput modes (SISO or MIMO), search for new mode after: 1752 * 4500 successful frames, or 400 failed frames 1753 * 1754 * Mode switch possibilities are (3 for each mode): 1755 * 1756 * For legacy: 1757 * Change antenna, try SISO (if HT association), try MIMO (if HT association) 1758 * For SISO: 1759 * Change antenna, try MIMO, try shortened guard interval (SGI) 1760 * For MIMO: 1761 * Try SISO antenna A, SISO antenna B, try shortened guard interval (SGI) 1762 * 1763 * When trying a new mode, use the same bit rate as the old/current mode when 1764 * trying antenna switches and shortened guard interval. When switching to 1765 * SISO from MIMO or legacy, or to MIMO from SISO or legacy, use a rate 1766 * for which the expected throughput (under perfect conditions) is about the 1767 * same or slightly better than the actual measured throughput delivered by 1768 * the old/current mode. 1769 * 1770 * Actual throughput can be estimated by multiplying the expected throughput 1771 * by the success ratio (successful / attempted tx frames). Frame size is 1772 * not considered in this calculation; it assumes that frame size will average 1773 * out to be fairly consistent over several samples. The following are 1774 * metric values for expected throughput assuming 100% success ratio. 1775 * Only G band has support for CCK rates: 1776 * 1777 * RATE: 1 2 5 11 6 9 12 18 24 36 48 54 60 1778 * 1779 * G: 7 13 35 58 40 57 72 98 121 154 177 186 186 1780 * A: 0 0 0 0 40 57 72 98 121 154 177 186 186 1781 * SISO 20MHz: 0 0 0 0 42 42 76 102 124 159 183 193 202 1782 * SGI SISO 20MHz: 0 0 0 0 46 46 82 110 132 168 192 202 211 1783 * MIMO 20MHz: 0 0 0 0 74 74 123 155 179 214 236 244 251 1784 * SGI MIMO 20MHz: 0 0 0 0 81 81 131 164 188 222 243 251 257 1785 * SISO 40MHz: 0 0 0 0 77 77 127 160 184 220 242 250 257 1786 * SGI SISO 40MHz: 0 0 0 0 83 83 135 169 193 229 250 257 264 1787 * MIMO 40MHz: 0 0 0 0 123 123 182 214 235 264 279 285 289 1788 * SGI MIMO 40MHz: 0 0 0 0 131 131 191 222 242 270 284 289 293 1789 * 1790 * After the new mode has been tried for a short while (minimum of 6 failed 1791 * frames or 8 successful frames), compare success ratio and actual throughput 1792 * estimate of the new mode with the old. If either is better with the new 1793 * mode, continue to use the new mode. 1794 * 1795 * Continue comparing modes until all 3 possibilities have been tried. 1796 * If moving from legacy to HT, try all 3 possibilities from the new HT 1797 * mode. After trying all 3, a best mode is found. Continue to use this mode 1798 * for the longer "while" described above (e.g. 480 successful frames for 1799 * legacy), and then repeat the search process. 1800 * 1801 */ 1802struct iwl_link_quality_cmd { 1803 1804 /* Index of destination/recipient station in uCode's station table */ 1805 u8 sta_id; 1806 u8 reserved1; 1807 __le16 control; /* not used */ 1808 struct iwl_link_qual_general_params general_params; 1809 struct iwl_link_qual_agg_params agg_params; 1810 1811 /* 1812 * Rate info; when using rate-scaling, Tx command's initial_rate_index 1813 * specifies 1st Tx rate attempted, via index into this table. 1814 * agn devices works its way through table when retrying Tx. 1815 */ 1816 struct { 1817 __le32 rate_n_flags; /* RATE_MCS_*, IWL_RATE_* */ 1818 } rs_table[LINK_QUAL_MAX_RETRY_NUM]; 1819 __le32 reserved2; 1820} __packed; 1821 1822/* 1823 * BT configuration enable flags: 1824 * bit 0 - 1: BT channel announcement enabled 1825 * 0: disable 1826 * bit 1 - 1: priority of BT device enabled 1827 * 0: disable 1828 * bit 2 - 1: BT 2 wire support enabled 1829 * 0: disable 1830 */ 1831#define BT_COEX_DISABLE (0x0) 1832#define BT_ENABLE_CHANNEL_ANNOUNCE BIT(0) 1833#define BT_ENABLE_PRIORITY BIT(1) 1834#define BT_ENABLE_2_WIRE BIT(2) 1835 1836#define BT_COEX_DISABLE (0x0) 1837#define BT_COEX_ENABLE (BT_ENABLE_CHANNEL_ANNOUNCE | BT_ENABLE_PRIORITY) 1838 1839#define BT_LEAD_TIME_MIN (0x0) 1840#define BT_LEAD_TIME_DEF (0x1E) 1841#define BT_LEAD_TIME_MAX (0xFF) 1842 1843#define BT_MAX_KILL_MIN (0x1) 1844#define BT_MAX_KILL_DEF (0x5) 1845#define BT_MAX_KILL_MAX (0xFF) 1846 1847#define BT_DURATION_LIMIT_DEF 625 1848#define BT_DURATION_LIMIT_MAX 1250 1849#define BT_DURATION_LIMIT_MIN 625 1850 1851#define BT_ON_THRESHOLD_DEF 4 1852#define BT_ON_THRESHOLD_MAX 1000 1853#define BT_ON_THRESHOLD_MIN 1 1854 1855#define BT_FRAG_THRESHOLD_DEF 0 1856#define BT_FRAG_THRESHOLD_MAX 0 1857#define BT_FRAG_THRESHOLD_MIN 0 1858 1859#define BT_AGG_THRESHOLD_DEF 1200 1860#define BT_AGG_THRESHOLD_MAX 8000 1861#define BT_AGG_THRESHOLD_MIN 400 1862 1863/* 1864 * REPLY_BT_CONFIG = 0x9b (command, has simple generic response) 1865 * 1866 * agn devices support hardware handshake with Bluetooth device on 1867 * same platform. Bluetooth device alerts wireless device when it will Tx; 1868 * wireless device can delay or kill its own Tx to accommodate. 1869 */ 1870struct iwl_bt_cmd { 1871 u8 flags; 1872 u8 lead_time; 1873 u8 max_kill; 1874 u8 reserved; 1875 __le32 kill_ack_mask; 1876 __le32 kill_cts_mask; 1877} __packed; 1878 1879#define IWLAGN_BT_FLAG_CHANNEL_INHIBITION BIT(0) 1880 1881#define IWLAGN_BT_FLAG_COEX_MODE_MASK (BIT(3)|BIT(4)|BIT(5)) 1882#define IWLAGN_BT_FLAG_COEX_MODE_SHIFT 3 1883#define IWLAGN_BT_FLAG_COEX_MODE_DISABLED 0 1884#define IWLAGN_BT_FLAG_COEX_MODE_LEGACY_2W 1 1885#define IWLAGN_BT_FLAG_COEX_MODE_3W 2 1886#define IWLAGN_BT_FLAG_COEX_MODE_4W 3 1887 1888#define IWLAGN_BT_FLAG_UCODE_DEFAULT BIT(6) 1889/* Disable Sync PSPoll on SCO/eSCO */ 1890#define IWLAGN_BT_FLAG_SYNC_2_BT_DISABLE BIT(7) 1891 1892#define IWLAGN_BT_PSP_MIN_RSSI_THRESHOLD -75 /* dBm */ 1893#define IWLAGN_BT_PSP_MAX_RSSI_THRESHOLD -65 /* dBm */ 1894 1895#define IWLAGN_BT_PRIO_BOOST_MAX 0xFF 1896#define IWLAGN_BT_PRIO_BOOST_MIN 0x00 1897#define IWLAGN_BT_PRIO_BOOST_DEFAULT 0xF0 1898#define IWLAGN_BT_PRIO_BOOST_DEFAULT32 0xF0F0F0F0 1899 1900#define IWLAGN_BT_MAX_KILL_DEFAULT 5 1901 1902#define IWLAGN_BT3_T7_DEFAULT 1 1903 1904enum iwl_bt_kill_idx { 1905 IWL_BT_KILL_DEFAULT = 0, 1906 IWL_BT_KILL_OVERRIDE = 1, 1907 IWL_BT_KILL_REDUCE = 2, 1908}; 1909 1910#define IWLAGN_BT_KILL_ACK_MASK_DEFAULT cpu_to_le32(0xffff0000) 1911#define IWLAGN_BT_KILL_CTS_MASK_DEFAULT cpu_to_le32(0xffff0000) 1912#define IWLAGN_BT_KILL_ACK_CTS_MASK_SCO cpu_to_le32(0xffffffff) 1913#define IWLAGN_BT_KILL_ACK_CTS_MASK_REDUCE cpu_to_le32(0) 1914 1915#define IWLAGN_BT3_PRIO_SAMPLE_DEFAULT 2 1916 1917#define IWLAGN_BT3_T2_DEFAULT 0xc 1918 1919#define IWLAGN_BT_VALID_ENABLE_FLAGS cpu_to_le16(BIT(0)) 1920#define IWLAGN_BT_VALID_BOOST cpu_to_le16(BIT(1)) 1921#define IWLAGN_BT_VALID_MAX_KILL cpu_to_le16(BIT(2)) 1922#define IWLAGN_BT_VALID_3W_TIMERS cpu_to_le16(BIT(3)) 1923#define IWLAGN_BT_VALID_KILL_ACK_MASK cpu_to_le16(BIT(4)) 1924#define IWLAGN_BT_VALID_KILL_CTS_MASK cpu_to_le16(BIT(5)) 1925#define IWLAGN_BT_VALID_REDUCED_TX_PWR cpu_to_le16(BIT(6)) 1926#define IWLAGN_BT_VALID_3W_LUT cpu_to_le16(BIT(7)) 1927 1928#define IWLAGN_BT_ALL_VALID_MSK (IWLAGN_BT_VALID_ENABLE_FLAGS | \ 1929 IWLAGN_BT_VALID_BOOST | \ 1930 IWLAGN_BT_VALID_MAX_KILL | \ 1931 IWLAGN_BT_VALID_3W_TIMERS | \ 1932 IWLAGN_BT_VALID_KILL_ACK_MASK | \ 1933 IWLAGN_BT_VALID_KILL_CTS_MASK | \ 1934 IWLAGN_BT_VALID_REDUCED_TX_PWR | \ 1935 IWLAGN_BT_VALID_3W_LUT) 1936 1937#define IWLAGN_BT_REDUCED_TX_PWR BIT(0) 1938 1939#define IWLAGN_BT_DECISION_LUT_SIZE 12 1940 1941struct iwl_basic_bt_cmd { 1942 u8 flags; 1943 u8 ledtime; /* unused */ 1944 u8 max_kill; 1945 u8 bt3_timer_t7_value; 1946 __le32 kill_ack_mask; 1947 __le32 kill_cts_mask; 1948 u8 bt3_prio_sample_time; 1949 u8 bt3_timer_t2_value; 1950 __le16 bt4_reaction_time; /* unused */ 1951 __le32 bt3_lookup_table[IWLAGN_BT_DECISION_LUT_SIZE]; 1952 /* 1953 * bit 0: use reduced tx power for control frame 1954 * bit 1 - 7: reserved 1955 */ 1956 u8 reduce_txpower; 1957 u8 reserved; 1958 __le16 valid; 1959}; 1960 1961struct iwl_bt_cmd_v1 { 1962 struct iwl_basic_bt_cmd basic; 1963 u8 prio_boost; 1964 /* 1965 * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask 1966 * if configure the following patterns 1967 */ 1968 u8 tx_prio_boost; /* SW boost of WiFi tx priority */ 1969 __le16 rx_prio_boost; /* SW boost of WiFi rx priority */ 1970}; 1971 1972struct iwl_bt_cmd_v2 { 1973 struct iwl_basic_bt_cmd basic; 1974 __le32 prio_boost; 1975 /* 1976 * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask 1977 * if configure the following patterns 1978 */ 1979 u8 reserved; 1980 u8 tx_prio_boost; /* SW boost of WiFi tx priority */ 1981 __le16 rx_prio_boost; /* SW boost of WiFi rx priority */ 1982}; 1983 1984#define IWLAGN_BT_SCO_ACTIVE cpu_to_le32(BIT(0)) 1985 1986struct iwlagn_bt_sco_cmd { 1987 __le32 flags; 1988}; 1989 1990/****************************************************************************** 1991 * (6) 1992 * Spectrum Management (802.11h) Commands, Responses, Notifications: 1993 * 1994 *****************************************************************************/ 1995 1996/* 1997 * Spectrum Management 1998 */ 1999#define MEASUREMENT_FILTER_FLAG (RXON_FILTER_PROMISC_MSK | \ 2000 RXON_FILTER_CTL2HOST_MSK | \ 2001 RXON_FILTER_ACCEPT_GRP_MSK | \ 2002 RXON_FILTER_DIS_DECRYPT_MSK | \ 2003 RXON_FILTER_DIS_GRP_DECRYPT_MSK | \ 2004 RXON_FILTER_ASSOC_MSK | \ 2005 RXON_FILTER_BCON_AWARE_MSK) 2006 2007struct iwl_measure_channel { 2008 __le32 duration; /* measurement duration in extended beacon 2009 * format */ 2010 u8 channel; /* channel to measure */ 2011 u8 type; /* see enum iwl_measure_type */ 2012 __le16 reserved; 2013} __packed; 2014 2015/* 2016 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (command) 2017 */ 2018struct iwl_spectrum_cmd { 2019 __le16 len; /* number of bytes starting from token */ 2020 u8 token; /* token id */ 2021 u8 id; /* measurement id -- 0 or 1 */ 2022 u8 origin; /* 0 = TGh, 1 = other, 2 = TGk */ 2023 u8 periodic; /* 1 = periodic */ 2024 __le16 path_loss_timeout; 2025 __le32 start_time; /* start time in extended beacon format */ 2026 __le32 reserved2; 2027 __le32 flags; /* rxon flags */ 2028 __le32 filter_flags; /* rxon filter flags */ 2029 __le16 channel_count; /* minimum 1, maximum 10 */ 2030 __le16 reserved3; 2031 struct iwl_measure_channel channels[10]; 2032} __packed; 2033 2034/* 2035 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (response) 2036 */ 2037struct iwl_spectrum_resp { 2038 u8 token; 2039 u8 id; /* id of the prior command replaced, or 0xff */ 2040 __le16 status; /* 0 - command will be handled 2041 * 1 - cannot handle (conflicts with another 2042 * measurement) */ 2043} __packed; 2044 2045enum iwl_measurement_state { 2046 IWL_MEASUREMENT_START = 0, 2047 IWL_MEASUREMENT_STOP = 1, 2048}; 2049 2050enum iwl_measurement_status { 2051 IWL_MEASUREMENT_OK = 0, 2052 IWL_MEASUREMENT_CONCURRENT = 1, 2053 IWL_MEASUREMENT_CSA_CONFLICT = 2, 2054 IWL_MEASUREMENT_TGH_CONFLICT = 3, 2055 /* 4-5 reserved */ 2056 IWL_MEASUREMENT_STOPPED = 6, 2057 IWL_MEASUREMENT_TIMEOUT = 7, 2058 IWL_MEASUREMENT_PERIODIC_FAILED = 8, 2059}; 2060 2061#define NUM_ELEMENTS_IN_HISTOGRAM 8 2062 2063struct iwl_measurement_histogram { 2064 __le32 ofdm[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 0.8usec counts */ 2065 __le32 cck[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 1usec counts */ 2066} __packed; 2067 2068/* clear channel availability counters */ 2069struct iwl_measurement_cca_counters { 2070 __le32 ofdm; 2071 __le32 cck; 2072} __packed; 2073 2074enum iwl_measure_type { 2075 IWL_MEASURE_BASIC = (1 << 0), 2076 IWL_MEASURE_CHANNEL_LOAD = (1 << 1), 2077 IWL_MEASURE_HISTOGRAM_RPI = (1 << 2), 2078 IWL_MEASURE_HISTOGRAM_NOISE = (1 << 3), 2079 IWL_MEASURE_FRAME = (1 << 4), 2080 /* bits 5:6 are reserved */ 2081 IWL_MEASURE_IDLE = (1 << 7), 2082}; 2083 2084/* 2085 * SPECTRUM_MEASURE_NOTIFICATION = 0x75 (notification only, not a command) 2086 */ 2087struct iwl_spectrum_notification { 2088 u8 id; /* measurement id -- 0 or 1 */ 2089 u8 token; 2090 u8 channel_index; /* index in measurement channel list */ 2091 u8 state; /* 0 - start, 1 - stop */ 2092 __le32 start_time; /* lower 32-bits of TSF */ 2093 u8 band; /* 0 - 5.2GHz, 1 - 2.4GHz */ 2094 u8 channel; 2095 u8 type; /* see enum iwl_measurement_type */ 2096 u8 reserved1; 2097 /* NOTE: cca_ofdm, cca_cck, basic_type, and histogram are only only 2098 * valid if applicable for measurement type requested. */ 2099 __le32 cca_ofdm; /* cca fraction time in 40Mhz clock periods */ 2100 __le32 cca_cck; /* cca fraction time in 44Mhz clock periods */ 2101 __le32 cca_time; /* channel load time in usecs */ 2102 u8 basic_type; /* 0 - bss, 1 - ofdm preamble, 2 - 2103 * unidentified */ 2104 u8 reserved2[3]; 2105 struct iwl_measurement_histogram histogram; 2106 __le32 stop_time; /* lower 32-bits of TSF */ 2107 __le32 status; /* see iwl_measurement_status */ 2108} __packed; 2109 2110/****************************************************************************** 2111 * (7) 2112 * Power Management Commands, Responses, Notifications: 2113 * 2114 *****************************************************************************/ 2115 2116/** 2117 * struct iwl_powertable_cmd - Power Table Command 2118 * @flags: See below: 2119 * 2120 * POWER_TABLE_CMD = 0x77 (command, has simple generic response) 2121 * 2122 * PM allow: 2123 * bit 0 - '0' Driver not allow power management 2124 * '1' Driver allow PM (use rest of parameters) 2125 * 2126 * uCode send sleep notifications: 2127 * bit 1 - '0' Don't send sleep notification 2128 * '1' send sleep notification (SEND_PM_NOTIFICATION) 2129 * 2130 * Sleep over DTIM 2131 * bit 2 - '0' PM have to walk up every DTIM 2132 * '1' PM could sleep over DTIM till listen Interval. 2133 * 2134 * PCI power managed 2135 * bit 3 - '0' (PCI_CFG_LINK_CTRL & 0x1) 2136 * '1' !(PCI_CFG_LINK_CTRL & 0x1) 2137 * 2138 * Fast PD 2139 * bit 4 - '1' Put radio to sleep when receiving frame for others 2140 * 2141 * Force sleep Modes 2142 * bit 31/30- '00' use both mac/xtal sleeps 2143 * '01' force Mac sleep 2144 * '10' force xtal sleep 2145 * '11' Illegal set 2146 * 2147 * NOTE: if sleep_interval[SLEEP_INTRVL_TABLE_SIZE-1] > DTIM period then 2148 * ucode assume sleep over DTIM is allowed and we don't need to wake up 2149 * for every DTIM. 2150 */ 2151#define IWL_POWER_VEC_SIZE 5 2152 2153#define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK cpu_to_le16(BIT(0)) 2154#define IWL_POWER_POWER_SAVE_ENA_MSK cpu_to_le16(BIT(0)) 2155#define IWL_POWER_POWER_MANAGEMENT_ENA_MSK cpu_to_le16(BIT(1)) 2156#define IWL_POWER_SLEEP_OVER_DTIM_MSK cpu_to_le16(BIT(2)) 2157#define IWL_POWER_PCI_PM_MSK cpu_to_le16(BIT(3)) 2158#define IWL_POWER_FAST_PD cpu_to_le16(BIT(4)) 2159#define IWL_POWER_BEACON_FILTERING cpu_to_le16(BIT(5)) 2160#define IWL_POWER_SHADOW_REG_ENA cpu_to_le16(BIT(6)) 2161#define IWL_POWER_CT_KILL_SET cpu_to_le16(BIT(7)) 2162#define IWL_POWER_BT_SCO_ENA cpu_to_le16(BIT(8)) 2163#define IWL_POWER_ADVANCE_PM_ENA_MSK cpu_to_le16(BIT(9)) 2164 2165struct iwl_powertable_cmd { 2166 __le16 flags; 2167 u8 keep_alive_seconds; 2168 u8 debug_flags; 2169 __le32 rx_data_timeout; 2170 __le32 tx_data_timeout; 2171 __le32 sleep_interval[IWL_POWER_VEC_SIZE]; 2172 __le32 keep_alive_beacons; 2173} __packed; 2174 2175/* 2176 * PM_SLEEP_NOTIFICATION = 0x7A (notification only, not a command) 2177 * all devices identical. 2178 */ 2179struct iwl_sleep_notification { 2180 u8 pm_sleep_mode; 2181 u8 pm_wakeup_src; 2182 __le16 reserved; 2183 __le32 sleep_time; 2184 __le32 tsf_low; 2185 __le32 bcon_timer; 2186} __packed; 2187 2188/* Sleep states. all devices identical. */ 2189enum { 2190 IWL_PM_NO_SLEEP = 0, 2191 IWL_PM_SLP_MAC = 1, 2192 IWL_PM_SLP_FULL_MAC_UNASSOCIATE = 2, 2193 IWL_PM_SLP_FULL_MAC_CARD_STATE = 3, 2194 IWL_PM_SLP_PHY = 4, 2195 IWL_PM_SLP_REPENT = 5, 2196 IWL_PM_WAKEUP_BY_TIMER = 6, 2197 IWL_PM_WAKEUP_BY_DRIVER = 7, 2198 IWL_PM_WAKEUP_BY_RFKILL = 8, 2199 /* 3 reserved */ 2200 IWL_PM_NUM_OF_MODES = 12, 2201}; 2202 2203/* 2204 * REPLY_CARD_STATE_CMD = 0xa0 (command, has simple generic response) 2205 */ 2206#define CARD_STATE_CMD_DISABLE 0x00 /* Put card to sleep */ 2207#define CARD_STATE_CMD_ENABLE 0x01 /* Wake up card */ 2208#define CARD_STATE_CMD_HALT 0x02 /* Power down permanently */ 2209struct iwl_card_state_cmd { 2210 __le32 status; /* CARD_STATE_CMD_* request new power state */ 2211} __packed; 2212 2213/* 2214 * CARD_STATE_NOTIFICATION = 0xa1 (notification only, not a command) 2215 */ 2216struct iwl_card_state_notif { 2217 __le32 flags; 2218} __packed; 2219 2220#define HW_CARD_DISABLED 0x01 2221#define SW_CARD_DISABLED 0x02 2222#define CT_CARD_DISABLED 0x04 2223#define RXON_CARD_DISABLED 0x10 2224 2225struct iwl_ct_kill_config { 2226 __le32 reserved; 2227 __le32 critical_temperature_M; 2228 __le32 critical_temperature_R; 2229} __packed; 2230 2231/* 1000, and 6x00 */ 2232struct iwl_ct_kill_throttling_config { 2233 __le32 critical_temperature_exit; 2234 __le32 reserved; 2235 __le32 critical_temperature_enter; 2236} __packed; 2237 2238/****************************************************************************** 2239 * (8) 2240 * Scan Commands, Responses, Notifications: 2241 * 2242 *****************************************************************************/ 2243 2244#define SCAN_CHANNEL_TYPE_PASSIVE cpu_to_le32(0) 2245#define SCAN_CHANNEL_TYPE_ACTIVE cpu_to_le32(1) 2246 2247/** 2248 * struct iwl_scan_channel - entry in REPLY_SCAN_CMD channel table 2249 * 2250 * One for each channel in the scan list. 2251 * Each channel can independently select: 2252 * 1) SSID for directed active scans 2253 * 2) Txpower setting (for rate specified within Tx command) 2254 * 3) How long to stay on-channel (behavior may be modified by quiet_time, 2255 * quiet_plcp_th, good_CRC_th) 2256 * 2257 * To avoid uCode errors, make sure the following are true (see comments 2258 * under struct iwl_scan_cmd about max_out_time and quiet_time): 2259 * 1) If using passive_dwell (i.e. passive_dwell != 0): 2260 * active_dwell <= passive_dwell (< max_out_time if max_out_time != 0) 2261 * 2) quiet_time <= active_dwell 2262 * 3) If restricting off-channel time (i.e. max_out_time !=0): 2263 * passive_dwell < max_out_time 2264 * active_dwell < max_out_time 2265 */ 2266 2267struct iwl_scan_channel { 2268 /* 2269 * type is defined as: 2270 * 0:0 1 = active, 0 = passive 2271 * 1:20 SSID direct bit map; if a bit is set, then corresponding 2272 * SSID IE is transmitted in probe request. 2273 * 21:31 reserved 2274 */ 2275 __le32 type; 2276 __le16 channel; /* band is selected by iwl_scan_cmd "flags" field */ 2277 u8 tx_gain; /* gain for analog radio */ 2278 u8 dsp_atten; /* gain for DSP */ 2279 __le16 active_dwell; /* in 1024-uSec TU (time units), typ 5-50 */ 2280 __le16 passive_dwell; /* in 1024-uSec TU (time units), typ 20-500 */ 2281} __packed; 2282 2283/* set number of direct probes __le32 type */ 2284#define IWL_SCAN_PROBE_MASK(n) cpu_to_le32((BIT(n) | (BIT(n) - BIT(1)))) 2285 2286/** 2287 * struct iwl_ssid_ie - directed scan network information element 2288 * 2289 * Up to 20 of these may appear in REPLY_SCAN_CMD, 2290 * selected by "type" bit field in struct iwl_scan_channel; 2291 * each channel may select different ssids from among the 20 entries. 2292 * SSID IEs get transmitted in reverse order of entry. 2293 */ 2294struct iwl_ssid_ie { 2295 u8 id; 2296 u8 len; 2297 u8 ssid[32]; 2298} __packed; 2299 2300#define PROBE_OPTION_MAX 20 2301#define TX_CMD_LIFE_TIME_INFINITE cpu_to_le32(0xFFFFFFFF) 2302#define IWL_GOOD_CRC_TH_DISABLED 0 2303#define IWL_GOOD_CRC_TH_DEFAULT cpu_to_le16(1) 2304#define IWL_GOOD_CRC_TH_NEVER cpu_to_le16(0xffff) 2305#define IWL_MAX_CMD_SIZE 4096 2306 2307/* 2308 * REPLY_SCAN_CMD = 0x80 (command) 2309 * 2310 * The hardware scan command is very powerful; the driver can set it up to 2311 * maintain (relatively) normal network traffic while doing a scan in the 2312 * background. The max_out_time and suspend_time control the ratio of how 2313 * long the device stays on an associated network channel ("service channel") 2314 * vs. how long it's away from the service channel, i.e. tuned to other channels 2315 * for scanning. 2316 * 2317 * max_out_time is the max time off-channel (in usec), and suspend_time 2318 * is how long (in "extended beacon" format) that the scan is "suspended" 2319 * after returning to the service channel. That is, suspend_time is the 2320 * time that we stay on the service channel, doing normal work, between 2321 * scan segments. The driver may set these parameters differently to support 2322 * scanning when associated vs. not associated, and light vs. heavy traffic 2323 * loads when associated. 2324 * 2325 * After receiving this command, the device's scan engine does the following; 2326 * 2327 * 1) Sends SCAN_START notification to driver 2328 * 2) Checks to see if it has time to do scan for one channel 2329 * 3) Sends NULL packet, with power-save (PS) bit set to 1, 2330 * to tell AP that we're going off-channel 2331 * 4) Tunes to first channel in scan list, does active or passive scan 2332 * 5) Sends SCAN_RESULT notification to driver 2333 * 6) Checks to see if it has time to do scan on *next* channel in list 2334 * 7) Repeats 4-6 until it no longer has time to scan the next channel 2335 * before max_out_time expires 2336 * 8) Returns to service channel 2337 * 9) Sends NULL packet with PS=0 to tell AP that we're back 2338 * 10) Stays on service channel until suspend_time expires 2339 * 11) Repeats entire process 2-10 until list is complete 2340 * 12) Sends SCAN_COMPLETE notification 2341 * 2342 * For fast, efficient scans, the scan command also has support for staying on 2343 * a channel for just a short time, if doing active scanning and getting no 2344 * responses to the transmitted probe request. This time is controlled by 2345 * quiet_time, and the number of received packets below which a channel is 2346 * considered "quiet" is controlled by quiet_plcp_threshold. 2347 * 2348 * For active scanning on channels that have regulatory restrictions against 2349 * blindly transmitting, the scan can listen before transmitting, to make sure 2350 * that there is already legitimate activity on the channel. If enough 2351 * packets are cleanly received on the channel (controlled by good_CRC_th, 2352 * typical value 1), the scan engine starts transmitting probe requests. 2353 * 2354 * Driver must use separate scan commands for 2.4 vs. 5 GHz bands. 2355 * 2356 * To avoid uCode errors, see timing restrictions described under 2357 * struct iwl_scan_channel. 2358 */ 2359 2360enum iwl_scan_flags { 2361 /* BIT(0) currently unused */ 2362 IWL_SCAN_FLAGS_ACTION_FRAME_TX = BIT(1), 2363 /* bits 2-7 reserved */ 2364}; 2365 2366struct iwl_scan_cmd { 2367 __le16 len; 2368 u8 scan_flags; /* scan flags: see enum iwl_scan_flags */ 2369 u8 channel_count; /* # channels in channel list */ 2370 __le16 quiet_time; /* dwell only this # millisecs on quiet channel 2371 * (only for active scan) */ 2372 __le16 quiet_plcp_th; /* quiet chnl is < this # pkts (typ. 1) */ 2373 __le16 good_CRC_th; /* passive -> active promotion threshold */ 2374 __le16 rx_chain; /* RXON_RX_CHAIN_* */ 2375 __le32 max_out_time; /* max usec to be away from associated (service) 2376 * channel */ 2377 __le32 suspend_time; /* pause scan this long (in "extended beacon 2378 * format") when returning to service chnl: 2379 */ 2380 __le32 flags; /* RXON_FLG_* */ 2381 __le32 filter_flags; /* RXON_FILTER_* */ 2382 2383 /* For active scans (set to all-0s for passive scans). 2384 * Does not include payload. Must specify Tx rate; no rate scaling. */ 2385 struct iwl_tx_cmd tx_cmd; 2386 2387 /* For directed active scans (set to all-0s otherwise) */ 2388 struct iwl_ssid_ie direct_scan[PROBE_OPTION_MAX]; 2389 2390 /* 2391 * Probe request frame, followed by channel list. 2392 * 2393 * Size of probe request frame is specified by byte count in tx_cmd. 2394 * Channel list follows immediately after probe request frame. 2395 * Number of channels in list is specified by channel_count. 2396 * Each channel in list is of type: 2397 * 2398 * struct iwl_scan_channel channels[0]; 2399 * 2400 * NOTE: Only one band of channels can be scanned per pass. You 2401 * must not mix 2.4GHz channels and 5.2GHz channels, and you must wait 2402 * for one scan to complete (i.e. receive SCAN_COMPLETE_NOTIFICATION) 2403 * before requesting another scan. 2404 */ 2405 u8 data[0]; 2406} __packed; 2407 2408/* Can abort will notify by complete notification with abort status. */ 2409#define CAN_ABORT_STATUS cpu_to_le32(0x1) 2410/* complete notification statuses */ 2411#define ABORT_STATUS 0x2 2412 2413/* 2414 * REPLY_SCAN_CMD = 0x80 (response) 2415 */ 2416struct iwl_scanreq_notification { 2417 __le32 status; /* 1: okay, 2: cannot fulfill request */ 2418} __packed; 2419 2420/* 2421 * SCAN_START_NOTIFICATION = 0x82 (notification only, not a command) 2422 */ 2423struct iwl_scanstart_notification { 2424 __le32 tsf_low; 2425 __le32 tsf_high; 2426 __le32 beacon_timer; 2427 u8 channel; 2428 u8 band; 2429 u8 reserved[2]; 2430 __le32 status; 2431} __packed; 2432 2433#define SCAN_OWNER_STATUS 0x1 2434#define MEASURE_OWNER_STATUS 0x2 2435 2436#define IWL_PROBE_STATUS_OK 0 2437#define IWL_PROBE_STATUS_TX_FAILED BIT(0) 2438/* error statuses combined with TX_FAILED */ 2439#define IWL_PROBE_STATUS_FAIL_TTL BIT(1) 2440#define IWL_PROBE_STATUS_FAIL_BT BIT(2) 2441 2442#define NUMBER_OF_STATISTICS 1 /* first __le32 is good CRC */ 2443/* 2444 * SCAN_RESULTS_NOTIFICATION = 0x83 (notification only, not a command) 2445 */ 2446struct iwl_scanresults_notification { 2447 u8 channel; 2448 u8 band; 2449 u8 probe_status; 2450 u8 num_probe_not_sent; /* not enough time to send */ 2451 __le32 tsf_low; 2452 __le32 tsf_high; 2453 __le32 statistics[NUMBER_OF_STATISTICS]; 2454} __packed; 2455 2456/* 2457 * SCAN_COMPLETE_NOTIFICATION = 0x84 (notification only, not a command) 2458 */ 2459struct iwl_scancomplete_notification { 2460 u8 scanned_channels; 2461 u8 status; 2462 u8 bt_status; /* BT On/Off status */ 2463 u8 last_channel; 2464 __le32 tsf_low; 2465 __le32 tsf_high; 2466} __packed; 2467 2468 2469/****************************************************************************** 2470 * (9) 2471 * IBSS/AP Commands and Notifications: 2472 * 2473 *****************************************************************************/ 2474 2475enum iwl_ibss_manager { 2476 IWL_NOT_IBSS_MANAGER = 0, 2477 IWL_IBSS_MANAGER = 1, 2478}; 2479 2480/* 2481 * BEACON_NOTIFICATION = 0x90 (notification only, not a command) 2482 */ 2483 2484struct iwlagn_beacon_notif { 2485 struct iwlagn_tx_resp beacon_notify_hdr; 2486 __le32 low_tsf; 2487 __le32 high_tsf; 2488 __le32 ibss_mgr_status; 2489} __packed; 2490 2491/* 2492 * REPLY_TX_BEACON = 0x91 (command, has simple generic response) 2493 */ 2494 2495struct iwl_tx_beacon_cmd { 2496 struct iwl_tx_cmd tx; 2497 __le16 tim_idx; 2498 u8 tim_size; 2499 u8 reserved1; 2500 struct ieee80211_hdr frame[0]; /* beacon frame */ 2501} __packed; 2502 2503/****************************************************************************** 2504 * (10) 2505 * Statistics Commands and Notifications: 2506 * 2507 *****************************************************************************/ 2508 2509#define IWL_TEMP_CONVERT 260 2510 2511#define SUP_RATE_11A_MAX_NUM_CHANNELS 8 2512#define SUP_RATE_11B_MAX_NUM_CHANNELS 4 2513#define SUP_RATE_11G_MAX_NUM_CHANNELS 12 2514 2515/* Used for passing to driver number of successes and failures per rate */ 2516struct rate_histogram { 2517 union { 2518 __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS]; 2519 __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS]; 2520 __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS]; 2521 } success; 2522 union { 2523 __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS]; 2524 __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS]; 2525 __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS]; 2526 } failed; 2527} __packed; 2528 2529/* statistics command response */ 2530 2531struct statistics_dbg { 2532 __le32 burst_check; 2533 __le32 burst_count; 2534 __le32 wait_for_silence_timeout_cnt; 2535 __le32 reserved[3]; 2536} __packed; 2537 2538struct statistics_rx_phy { 2539 __le32 ina_cnt; 2540 __le32 fina_cnt; 2541 __le32 plcp_err; 2542 __le32 crc32_err; 2543 __le32 overrun_err; 2544 __le32 early_overrun_err; 2545 __le32 crc32_good; 2546 __le32 false_alarm_cnt; 2547 __le32 fina_sync_err_cnt; 2548 __le32 sfd_timeout; 2549 __le32 fina_timeout; 2550 __le32 unresponded_rts; 2551 __le32 rxe_frame_limit_overrun; 2552 __le32 sent_ack_cnt; 2553 __le32 sent_cts_cnt; 2554 __le32 sent_ba_rsp_cnt; 2555 __le32 dsp_self_kill; 2556 __le32 mh_format_err; 2557 __le32 re_acq_main_rssi_sum; 2558 __le32 reserved3; 2559} __packed; 2560 2561struct statistics_rx_ht_phy { 2562 __le32 plcp_err; 2563 __le32 overrun_err; 2564 __le32 early_overrun_err; 2565 __le32 crc32_good; 2566 __le32 crc32_err; 2567 __le32 mh_format_err; 2568 __le32 agg_crc32_good; 2569 __le32 agg_mpdu_cnt; 2570 __le32 agg_cnt; 2571 __le32 unsupport_mcs; 2572} __packed; 2573 2574#define INTERFERENCE_DATA_AVAILABLE cpu_to_le32(1) 2575 2576struct statistics_rx_non_phy { 2577 __le32 bogus_cts; /* CTS received when not expecting CTS */ 2578 __le32 bogus_ack; /* ACK received when not expecting ACK */ 2579 __le32 non_bssid_frames; /* number of frames with BSSID that 2580 * doesn't belong to the STA BSSID */ 2581 __le32 filtered_frames; /* count frames that were dumped in the 2582 * filtering process */ 2583 __le32 non_channel_beacons; /* beacons with our bss id but not on 2584 * our serving channel */ 2585 __le32 channel_beacons; /* beacons with our bss id and in our 2586 * serving channel */ 2587 __le32 num_missed_bcon; /* number of missed beacons */ 2588 __le32 adc_rx_saturation_time; /* count in 0.8us units the time the 2589 * ADC was in saturation */ 2590 __le32 ina_detection_search_time;/* total time (in 0.8us) searched 2591 * for INA */ 2592 __le32 beacon_silence_rssi_a; /* RSSI silence after beacon frame */ 2593 __le32 beacon_silence_rssi_b; /* RSSI silence after beacon frame */ 2594 __le32 beacon_silence_rssi_c; /* RSSI silence after beacon frame */ 2595 __le32 interference_data_flag; /* flag for interference data 2596 * availability. 1 when data is 2597 * available. */ 2598 __le32 channel_load; /* counts RX Enable time in uSec */ 2599 __le32 dsp_false_alarms; /* DSP false alarm (both OFDM 2600 * and CCK) counter */ 2601 __le32 beacon_rssi_a; 2602 __le32 beacon_rssi_b; 2603 __le32 beacon_rssi_c; 2604 __le32 beacon_energy_a; 2605 __le32 beacon_energy_b; 2606 __le32 beacon_energy_c; 2607} __packed; 2608 2609struct statistics_rx_non_phy_bt { 2610 struct statistics_rx_non_phy common; 2611 /* additional stats for bt */ 2612 __le32 num_bt_kills; 2613 __le32 reserved[2]; 2614} __packed; 2615 2616struct statistics_rx { 2617 struct statistics_rx_phy ofdm; 2618 struct statistics_rx_phy cck; 2619 struct statistics_rx_non_phy general; 2620 struct statistics_rx_ht_phy ofdm_ht; 2621} __packed; 2622 2623struct statistics_rx_bt { 2624 struct statistics_rx_phy ofdm; 2625 struct statistics_rx_phy cck; 2626 struct statistics_rx_non_phy_bt general; 2627 struct statistics_rx_ht_phy ofdm_ht; 2628} __packed; 2629 2630/** 2631 * struct statistics_tx_power - current tx power 2632 * 2633 * @ant_a: current tx power on chain a in 1/2 dB step 2634 * @ant_b: current tx power on chain b in 1/2 dB step 2635 * @ant_c: current tx power on chain c in 1/2 dB step 2636 */ 2637struct statistics_tx_power { 2638 u8 ant_a; 2639 u8 ant_b; 2640 u8 ant_c; 2641 u8 reserved; 2642} __packed; 2643 2644struct statistics_tx_non_phy_agg { 2645 __le32 ba_timeout; 2646 __le32 ba_reschedule_frames; 2647 __le32 scd_query_agg_frame_cnt; 2648 __le32 scd_query_no_agg; 2649 __le32 scd_query_agg; 2650 __le32 scd_query_mismatch; 2651 __le32 frame_not_ready; 2652 __le32 underrun; 2653 __le32 bt_prio_kill; 2654 __le32 rx_ba_rsp_cnt; 2655} __packed; 2656 2657struct statistics_tx { 2658 __le32 preamble_cnt; 2659 __le32 rx_detected_cnt; 2660 __le32 bt_prio_defer_cnt; 2661 __le32 bt_prio_kill_cnt; 2662 __le32 few_bytes_cnt; 2663 __le32 cts_timeout; 2664 __le32 ack_timeout; 2665 __le32 expected_ack_cnt; 2666 __le32 actual_ack_cnt; 2667 __le32 dump_msdu_cnt; 2668 __le32 burst_abort_next_frame_mismatch_cnt; 2669 __le32 burst_abort_missing_next_frame_cnt; 2670 __le32 cts_timeout_collision; 2671 __le32 ack_or_ba_timeout_collision; 2672 struct statistics_tx_non_phy_agg agg; 2673 /* 2674 * "tx_power" are optional parameters provided by uCode, 2675 * 6000 series is the only device provide the information, 2676 * Those are reserved fields for all the other devices 2677 */ 2678 struct statistics_tx_power tx_power; 2679 __le32 reserved1; 2680} __packed; 2681 2682 2683struct statistics_div { 2684 __le32 tx_on_a; 2685 __le32 tx_on_b; 2686 __le32 exec_time; 2687 __le32 probe_time; 2688 __le32 reserved1; 2689 __le32 reserved2; 2690} __packed; 2691 2692struct statistics_general_common { 2693 __le32 temperature; /* radio temperature */ 2694 __le32 temperature_m; /* radio voltage */ 2695 struct statistics_dbg dbg; 2696 __le32 sleep_time; 2697 __le32 slots_out; 2698 __le32 slots_idle; 2699 __le32 ttl_timestamp; 2700 struct statistics_div div; 2701 __le32 rx_enable_counter; 2702 /* 2703 * num_of_sos_states: 2704 * count the number of times we have to re-tune 2705 * in order to get out of bad PHY status 2706 */ 2707 __le32 num_of_sos_states; 2708} __packed; 2709 2710struct statistics_bt_activity { 2711 /* Tx statistics */ 2712 __le32 hi_priority_tx_req_cnt; 2713 __le32 hi_priority_tx_denied_cnt; 2714 __le32 lo_priority_tx_req_cnt; 2715 __le32 lo_priority_tx_denied_cnt; 2716 /* Rx statistics */ 2717 __le32 hi_priority_rx_req_cnt; 2718 __le32 hi_priority_rx_denied_cnt; 2719 __le32 lo_priority_rx_req_cnt; 2720 __le32 lo_priority_rx_denied_cnt; 2721} __packed; 2722 2723struct statistics_general { 2724 struct statistics_general_common common; 2725 __le32 reserved2; 2726 __le32 reserved3; 2727} __packed; 2728 2729struct statistics_general_bt { 2730 struct statistics_general_common common; 2731 struct statistics_bt_activity activity; 2732 __le32 reserved2; 2733 __le32 reserved3; 2734} __packed; 2735 2736#define UCODE_STATISTICS_CLEAR_MSK (0x1 << 0) 2737#define UCODE_STATISTICS_FREQUENCY_MSK (0x1 << 1) 2738#define UCODE_STATISTICS_NARROW_BAND_MSK (0x1 << 2) 2739 2740/* 2741 * REPLY_STATISTICS_CMD = 0x9c, 2742 * all devices identical. 2743 * 2744 * This command triggers an immediate response containing uCode statistics. 2745 * The response is in the same format as STATISTICS_NOTIFICATION 0x9d, below. 2746 * 2747 * If the CLEAR_STATS configuration flag is set, uCode will clear its 2748 * internal copy of the statistics (counters) after issuing the response. 2749 * This flag does not affect STATISTICS_NOTIFICATIONs after beacons (see below). 2750 * 2751 * If the DISABLE_NOTIF configuration flag is set, uCode will not issue 2752 * STATISTICS_NOTIFICATIONs after received beacons (see below). This flag 2753 * does not affect the response to the REPLY_STATISTICS_CMD 0x9c itself. 2754 */ 2755#define IWL_STATS_CONF_CLEAR_STATS cpu_to_le32(0x1) /* see above */ 2756#define IWL_STATS_CONF_DISABLE_NOTIF cpu_to_le32(0x2)/* see above */ 2757struct iwl_statistics_cmd { 2758 __le32 configuration_flags; /* IWL_STATS_CONF_* */ 2759} __packed; 2760 2761/* 2762 * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command) 2763 * 2764 * By default, uCode issues this notification after receiving a beacon 2765 * while associated. To disable this behavior, set DISABLE_NOTIF flag in the 2766 * REPLY_STATISTICS_CMD 0x9c, above. 2767 * 2768 * Statistics counters continue to increment beacon after beacon, but are 2769 * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD 2770 * 0x9c with CLEAR_STATS bit set (see above). 2771 * 2772 * uCode also issues this notification during scans. uCode clears statistics 2773 * appropriately so that each notification contains statistics for only the 2774 * one channel that has just been scanned. 2775 */ 2776#define STATISTICS_REPLY_FLG_BAND_24G_MSK cpu_to_le32(0x2) 2777#define STATISTICS_REPLY_FLG_HT40_MODE_MSK cpu_to_le32(0x8) 2778 2779struct iwl_notif_statistics { 2780 __le32 flag; 2781 struct statistics_rx rx; 2782 struct statistics_tx tx; 2783 struct statistics_general general; 2784} __packed; 2785 2786struct iwl_bt_notif_statistics { 2787 __le32 flag; 2788 struct statistics_rx_bt rx; 2789 struct statistics_tx tx; 2790 struct statistics_general_bt general; 2791} __packed; 2792 2793/* 2794 * MISSED_BEACONS_NOTIFICATION = 0xa2 (notification only, not a command) 2795 * 2796 * uCode send MISSED_BEACONS_NOTIFICATION to driver when detect beacon missed 2797 * in regardless of how many missed beacons, which mean when driver receive the 2798 * notification, inside the command, it can find all the beacons information 2799 * which include number of total missed beacons, number of consecutive missed 2800 * beacons, number of beacons received and number of beacons expected to 2801 * receive. 2802 * 2803 * If uCode detected consecutive_missed_beacons > 5, it will reset the radio 2804 * in order to bring the radio/PHY back to working state; which has no relation 2805 * to when driver will perform sensitivity calibration. 2806 * 2807 * Driver should set it own missed_beacon_threshold to decide when to perform 2808 * sensitivity calibration based on number of consecutive missed beacons in 2809 * order to improve overall performance, especially in noisy environment. 2810 * 2811 */ 2812 2813#define IWL_MISSED_BEACON_THRESHOLD_MIN (1) 2814#define IWL_MISSED_BEACON_THRESHOLD_DEF (5) 2815#define IWL_MISSED_BEACON_THRESHOLD_MAX IWL_MISSED_BEACON_THRESHOLD_DEF 2816 2817struct iwl_missed_beacon_notif { 2818 __le32 consecutive_missed_beacons; 2819 __le32 total_missed_becons; 2820 __le32 num_expected_beacons; 2821 __le32 num_recvd_beacons; 2822} __packed; 2823 2824 2825/****************************************************************************** 2826 * (11) 2827 * Rx Calibration Commands: 2828 * 2829 * With the uCode used for open source drivers, most Tx calibration (except 2830 * for Tx Power) and most Rx calibration is done by uCode during the 2831 * "initialize" phase of uCode boot. Driver must calibrate only: 2832 * 2833 * 1) Tx power (depends on temperature), described elsewhere 2834 * 2) Receiver gain balance (optimize MIMO, and detect disconnected antennas) 2835 * 3) Receiver sensitivity (to optimize signal detection) 2836 * 2837 *****************************************************************************/ 2838 2839/** 2840 * SENSITIVITY_CMD = 0xa8 (command, has simple generic response) 2841 * 2842 * This command sets up the Rx signal detector for a sensitivity level that 2843 * is high enough to lock onto all signals within the associated network, 2844 * but low enough to ignore signals that are below a certain threshold, so as 2845 * not to have too many "false alarms". False alarms are signals that the 2846 * Rx DSP tries to lock onto, but then discards after determining that they 2847 * are noise. 2848 * 2849 * The optimum number of false alarms is between 5 and 50 per 200 TUs 2850 * (200 * 1024 uSecs, i.e. 204.8 milliseconds) of actual Rx time (i.e. 2851 * time listening, not transmitting). Driver must adjust sensitivity so that 2852 * the ratio of actual false alarms to actual Rx time falls within this range. 2853 * 2854 * While associated, uCode delivers STATISTICS_NOTIFICATIONs after each 2855 * received beacon. These provide information to the driver to analyze the 2856 * sensitivity. Don't analyze statistics that come in from scanning, or any 2857 * other non-associated-network source. Pertinent statistics include: 2858 * 2859 * From "general" statistics (struct statistics_rx_non_phy): 2860 * 2861 * (beacon_energy_[abc] & 0x0FF00) >> 8 (unsigned, higher value is lower level) 2862 * Measure of energy of desired signal. Used for establishing a level 2863 * below which the device does not detect signals. 2864 * 2865 * (beacon_silence_rssi_[abc] & 0x0FF00) >> 8 (unsigned, units in dB) 2866 * Measure of background noise in silent period after beacon. 2867 * 2868 * channel_load 2869 * uSecs of actual Rx time during beacon period (varies according to 2870 * how much time was spent transmitting). 2871 * 2872 * From "cck" and "ofdm" statistics (struct statistics_rx_phy), separately: 2873 * 2874 * false_alarm_cnt 2875 * Signal locks abandoned early (before phy-level header). 2876 * 2877 * plcp_err 2878 * Signal locks abandoned late (during phy-level header). 2879 * 2880 * NOTE: Both false_alarm_cnt and plcp_err increment monotonically from 2881 * beacon to beacon, i.e. each value is an accumulation of all errors 2882 * before and including the latest beacon. Values will wrap around to 0 2883 * after counting up to 2^32 - 1. Driver must differentiate vs. 2884 * previous beacon's values to determine # false alarms in the current 2885 * beacon period. 2886 * 2887 * Total number of false alarms = false_alarms + plcp_errs 2888 * 2889 * For OFDM, adjust the following table entries in struct iwl_sensitivity_cmd 2890 * (notice that the start points for OFDM are at or close to settings for 2891 * maximum sensitivity): 2892 * 2893 * START / MIN / MAX 2894 * HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX 90 / 85 / 120 2895 * HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX 170 / 170 / 210 2896 * HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX 105 / 105 / 140 2897 * HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX 220 / 220 / 270 2898 * 2899 * If actual rate of OFDM false alarms (+ plcp_errors) is too high 2900 * (greater than 50 for each 204.8 msecs listening), reduce sensitivity 2901 * by *adding* 1 to all 4 of the table entries above, up to the max for 2902 * each entry. Conversely, if false alarm rate is too low (less than 5 2903 * for each 204.8 msecs listening), *subtract* 1 from each entry to 2904 * increase sensitivity. 2905 * 2906 * For CCK sensitivity, keep track of the following: 2907 * 2908 * 1). 20-beacon history of maximum background noise, indicated by 2909 * (beacon_silence_rssi_[abc] & 0x0FF00), units in dB, across the 2910 * 3 receivers. For any given beacon, the "silence reference" is 2911 * the maximum of last 60 samples (20 beacons * 3 receivers). 2912 * 2913 * 2). 10-beacon history of strongest signal level, as indicated 2914 * by (beacon_energy_[abc] & 0x0FF00) >> 8, across the 3 receivers, 2915 * i.e. the strength of the signal through the best receiver at the 2916 * moment. These measurements are "upside down", with lower values 2917 * for stronger signals, so max energy will be *minimum* value. 2918 * 2919 * Then for any given beacon, the driver must determine the *weakest* 2920 * of the strongest signals; this is the minimum level that needs to be 2921 * successfully detected, when using the best receiver at the moment. 2922 * "Max cck energy" is the maximum (higher value means lower energy!) 2923 * of the last 10 minima. Once this is determined, driver must add 2924 * a little margin by adding "6" to it. 2925 * 2926 * 3). Number of consecutive beacon periods with too few false alarms. 2927 * Reset this to 0 at the first beacon period that falls within the 2928 * "good" range (5 to 50 false alarms per 204.8 milliseconds rx). 2929 * 2930 * Then, adjust the following CCK table entries in struct iwl_sensitivity_cmd 2931 * (notice that the start points for CCK are at maximum sensitivity): 2932 * 2933 * START / MIN / MAX 2934 * HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX 125 / 125 / 200 2935 * HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX 200 / 200 / 400 2936 * HD_MIN_ENERGY_CCK_DET_INDEX 100 / 0 / 100 2937 * 2938 * If actual rate of CCK false alarms (+ plcp_errors) is too high 2939 * (greater than 50 for each 204.8 msecs listening), method for reducing 2940 * sensitivity is: 2941 * 2942 * 1) *Add* 3 to value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX, 2943 * up to max 400. 2944 * 2945 * 2) If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is < 160, 2946 * sensitivity has been reduced a significant amount; bring it up to 2947 * a moderate 161. Otherwise, *add* 3, up to max 200. 2948 * 2949 * 3) a) If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is > 160, 2950 * sensitivity has been reduced only a moderate or small amount; 2951 * *subtract* 2 from value in HD_MIN_ENERGY_CCK_DET_INDEX, 2952 * down to min 0. Otherwise (if gain has been significantly reduced), 2953 * don't change the HD_MIN_ENERGY_CCK_DET_INDEX value. 2954 * 2955 * b) Save a snapshot of the "silence reference". 2956 * 2957 * If actual rate of CCK false alarms (+ plcp_errors) is too low 2958 * (less than 5 for each 204.8 msecs listening), method for increasing 2959 * sensitivity is used only if: 2960 * 2961 * 1a) Previous beacon did not have too many false alarms 2962 * 1b) AND difference between previous "silence reference" and current 2963 * "silence reference" (prev - current) is 2 or more, 2964 * OR 2) 100 or more consecutive beacon periods have had rate of 2965 * less than 5 false alarms per 204.8 milliseconds rx time. 2966 * 2967 * Method for increasing sensitivity: 2968 * 2969 * 1) *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX, 2970 * down to min 125. 2971 * 2972 * 2) *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX, 2973 * down to min 200. 2974 * 2975 * 3) *Add* 2 to value in HD_MIN_ENERGY_CCK_DET_INDEX, up to max 100. 2976 * 2977 * If actual rate of CCK false alarms (+ plcp_errors) is within good range 2978 * (between 5 and 50 for each 204.8 msecs listening): 2979 * 2980 * 1) Save a snapshot of the silence reference. 2981 * 2982 * 2) If previous beacon had too many CCK false alarms (+ plcp_errors), 2983 * give some extra margin to energy threshold by *subtracting* 8 2984 * from value in HD_MIN_ENERGY_CCK_DET_INDEX. 2985 * 2986 * For all cases (too few, too many, good range), make sure that the CCK 2987 * detection threshold (energy) is below the energy level for robust 2988 * detection over the past 10 beacon periods, the "Max cck energy". 2989 * Lower values mean higher energy; this means making sure that the value 2990 * in HD_MIN_ENERGY_CCK_DET_INDEX is at or *above* "Max cck energy". 2991 * 2992 */ 2993 2994/* 2995 * Table entries in SENSITIVITY_CMD (struct iwl_sensitivity_cmd) 2996 */ 2997#define HD_TABLE_SIZE (11) /* number of entries */ 2998#define HD_MIN_ENERGY_CCK_DET_INDEX (0) /* table indexes */ 2999#define HD_MIN_ENERGY_OFDM_DET_INDEX (1) 3000#define HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX (2) 3001#define HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX (3) 3002#define HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX (4) 3003#define HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX (5) 3004#define HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX (6) 3005#define HD_BARKER_CORR_TH_ADD_MIN_INDEX (7) 3006#define HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX (8) 3007#define HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX (9) 3008#define HD_OFDM_ENERGY_TH_IN_INDEX (10) 3009 3010/* 3011 * Additional table entries in enhance SENSITIVITY_CMD 3012 */ 3013#define HD_INA_NON_SQUARE_DET_OFDM_INDEX (11) 3014#define HD_INA_NON_SQUARE_DET_CCK_INDEX (12) 3015#define HD_CORR_11_INSTEAD_OF_CORR_9_EN_INDEX (13) 3016#define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_INDEX (14) 3017#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (15) 3018#define HD_OFDM_NON_SQUARE_DET_SLOPE_INDEX (16) 3019#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_INDEX (17) 3020#define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_INDEX (18) 3021#define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (19) 3022#define HD_CCK_NON_SQUARE_DET_SLOPE_INDEX (20) 3023#define HD_CCK_NON_SQUARE_DET_INTERCEPT_INDEX (21) 3024#define HD_RESERVED (22) 3025 3026/* number of entries for enhanced tbl */ 3027#define ENHANCE_HD_TABLE_SIZE (23) 3028 3029/* number of additional entries for enhanced tbl */ 3030#define ENHANCE_HD_TABLE_ENTRIES (ENHANCE_HD_TABLE_SIZE - HD_TABLE_SIZE) 3031 3032#define HD_INA_NON_SQUARE_DET_OFDM_DATA_V1 cpu_to_le16(0) 3033#define HD_INA_NON_SQUARE_DET_CCK_DATA_V1 cpu_to_le16(0) 3034#define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA_V1 cpu_to_le16(0) 3035#define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA_V1 cpu_to_le16(668) 3036#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V1 cpu_to_le16(4) 3037#define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA_V1 cpu_to_le16(486) 3038#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA_V1 cpu_to_le16(37) 3039#define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA_V1 cpu_to_le16(853) 3040#define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V1 cpu_to_le16(4) 3041#define HD_CCK_NON_SQUARE_DET_SLOPE_DATA_V1 cpu_to_le16(476) 3042#define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA_V1 cpu_to_le16(99) 3043 3044#define HD_INA_NON_SQUARE_DET_OFDM_DATA_V2 cpu_to_le16(1) 3045#define HD_INA_NON_SQUARE_DET_CCK_DATA_V2 cpu_to_le16(1) 3046#define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA_V2 cpu_to_le16(1) 3047#define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA_V2 cpu_to_le16(600) 3048#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V2 cpu_to_le16(40) 3049#define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA_V2 cpu_to_le16(486) 3050#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA_V2 cpu_to_le16(45) 3051#define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA_V2 cpu_to_le16(853) 3052#define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V2 cpu_to_le16(60) 3053#define HD_CCK_NON_SQUARE_DET_SLOPE_DATA_V2 cpu_to_le16(476) 3054#define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA_V2 cpu_to_le16(99) 3055 3056 3057/* Control field in struct iwl_sensitivity_cmd */ 3058#define SENSITIVITY_CMD_CONTROL_DEFAULT_TABLE cpu_to_le16(0) 3059#define SENSITIVITY_CMD_CONTROL_WORK_TABLE cpu_to_le16(1) 3060 3061/** 3062 * struct iwl_sensitivity_cmd 3063 * @control: (1) updates working table, (0) updates default table 3064 * @table: energy threshold values, use HD_* as index into table 3065 * 3066 * Always use "1" in "control" to update uCode's working table and DSP. 3067 */ 3068struct iwl_sensitivity_cmd { 3069 __le16 control; /* always use "1" */ 3070 __le16 table[HD_TABLE_SIZE]; /* use HD_* as index */ 3071} __packed; 3072 3073/* 3074 * 3075 */ 3076struct iwl_enhance_sensitivity_cmd { 3077 __le16 control; /* always use "1" */ 3078 __le16 enhance_table[ENHANCE_HD_TABLE_SIZE]; /* use HD_* as index */ 3079} __packed; 3080 3081 3082/** 3083 * REPLY_PHY_CALIBRATION_CMD = 0xb0 (command, has simple generic response) 3084 * 3085 * This command sets the relative gains of agn device's 3 radio receiver chains. 3086 * 3087 * After the first association, driver should accumulate signal and noise 3088 * statistics from the STATISTICS_NOTIFICATIONs that follow the first 20 3089 * beacons from the associated network (don't collect statistics that come 3090 * in from scanning, or any other non-network source). 3091 * 3092 * DISCONNECTED ANTENNA: 3093 * 3094 * Driver should determine which antennas are actually connected, by comparing 3095 * average beacon signal levels for the 3 Rx chains. Accumulate (add) the 3096 * following values over 20 beacons, one accumulator for each of the chains 3097 * a/b/c, from struct statistics_rx_non_phy: 3098 * 3099 * beacon_rssi_[abc] & 0x0FF (unsigned, units in dB) 3100 * 3101 * Find the strongest signal from among a/b/c. Compare the other two to the 3102 * strongest. If any signal is more than 15 dB (times 20, unless you 3103 * divide the accumulated values by 20) below the strongest, the driver 3104 * considers that antenna to be disconnected, and should not try to use that 3105 * antenna/chain for Rx or Tx. If both A and B seem to be disconnected, 3106 * driver should declare the stronger one as connected, and attempt to use it 3107 * (A and B are the only 2 Tx chains!). 3108 * 3109 * 3110 * RX BALANCE: 3111 * 3112 * Driver should balance the 3 receivers (but just the ones that are connected 3113 * to antennas, see above) for gain, by comparing the average signal levels 3114 * detected during the silence after each beacon (background noise). 3115 * Accumulate (add) the following values over 20 beacons, one accumulator for 3116 * each of the chains a/b/c, from struct statistics_rx_non_phy: 3117 * 3118 * beacon_silence_rssi_[abc] & 0x0FF (unsigned, units in dB) 3119 * 3120 * Find the weakest background noise level from among a/b/c. This Rx chain 3121 * will be the reference, with 0 gain adjustment. Attenuate other channels by 3122 * finding noise difference: 3123 * 3124 * (accum_noise[i] - accum_noise[reference]) / 30 3125 * 3126 * The "30" adjusts the dB in the 20 accumulated samples to units of 1.5 dB. 3127 * For use in diff_gain_[abc] fields of struct iwl_calibration_cmd, the 3128 * driver should limit the difference results to a range of 0-3 (0-4.5 dB), 3129 * and set bit 2 to indicate "reduce gain". The value for the reference 3130 * (weakest) chain should be "0". 3131 * 3132 * diff_gain_[abc] bit fields: 3133 * 2: (1) reduce gain, (0) increase gain 3134 * 1-0: amount of gain, units of 1.5 dB 3135 */ 3136 3137/* Phy calibration command for series */ 3138enum { 3139 IWL_PHY_CALIBRATE_DC_CMD = 8, 3140 IWL_PHY_CALIBRATE_LO_CMD = 9, 3141 IWL_PHY_CALIBRATE_TX_IQ_CMD = 11, 3142 IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD = 15, 3143 IWL_PHY_CALIBRATE_BASE_BAND_CMD = 16, 3144 IWL_PHY_CALIBRATE_TX_IQ_PERD_CMD = 17, 3145 IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD = 18, 3146}; 3147 3148/* This enum defines the bitmap of various calibrations to enable in both 3149 * init ucode and runtime ucode through CALIBRATION_CFG_CMD. 3150 */ 3151enum iwl_ucode_calib_cfg { 3152 IWL_CALIB_CFG_RX_BB_IDX = BIT(0), 3153 IWL_CALIB_CFG_DC_IDX = BIT(1), 3154 IWL_CALIB_CFG_LO_IDX = BIT(2), 3155 IWL_CALIB_CFG_TX_IQ_IDX = BIT(3), 3156 IWL_CALIB_CFG_RX_IQ_IDX = BIT(4), 3157 IWL_CALIB_CFG_NOISE_IDX = BIT(5), 3158 IWL_CALIB_CFG_CRYSTAL_IDX = BIT(6), 3159 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(7), 3160 IWL_CALIB_CFG_PAPD_IDX = BIT(8), 3161 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(9), 3162 IWL_CALIB_CFG_TX_PWR_IDX = BIT(10), 3163}; 3164 3165#define IWL_CALIB_INIT_CFG_ALL cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX | \ 3166 IWL_CALIB_CFG_DC_IDX | \ 3167 IWL_CALIB_CFG_LO_IDX | \ 3168 IWL_CALIB_CFG_TX_IQ_IDX | \ 3169 IWL_CALIB_CFG_RX_IQ_IDX | \ 3170 IWL_CALIB_CFG_CRYSTAL_IDX) 3171 3172#define IWL_CALIB_RT_CFG_ALL cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX | \ 3173 IWL_CALIB_CFG_DC_IDX | \ 3174 IWL_CALIB_CFG_LO_IDX | \ 3175 IWL_CALIB_CFG_TX_IQ_IDX | \ 3176 IWL_CALIB_CFG_RX_IQ_IDX | \ 3177 IWL_CALIB_CFG_TEMPERATURE_IDX | \ 3178 IWL_CALIB_CFG_PAPD_IDX | \ 3179 IWL_CALIB_CFG_TX_PWR_IDX | \ 3180 IWL_CALIB_CFG_CRYSTAL_IDX) 3181 3182#define IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK cpu_to_le32(BIT(0)) 3183 3184struct iwl_calib_cfg_elmnt_s { 3185 __le32 is_enable; 3186 __le32 start; 3187 __le32 send_res; 3188 __le32 apply_res; 3189 __le32 reserved; 3190} __packed; 3191 3192struct iwl_calib_cfg_status_s { 3193 struct iwl_calib_cfg_elmnt_s once; 3194 struct iwl_calib_cfg_elmnt_s perd; 3195 __le32 flags; 3196} __packed; 3197 3198struct iwl_calib_cfg_cmd { 3199 struct iwl_calib_cfg_status_s ucd_calib_cfg; 3200 struct iwl_calib_cfg_status_s drv_calib_cfg; 3201 __le32 reserved1; 3202} __packed; 3203 3204struct iwl_calib_hdr { 3205 u8 op_code; 3206 u8 first_group; 3207 u8 groups_num; 3208 u8 data_valid; 3209} __packed; 3210 3211struct iwl_calib_cmd { 3212 struct iwl_calib_hdr hdr; 3213 u8 data[0]; 3214} __packed; 3215 3216struct iwl_calib_xtal_freq_cmd { 3217 struct iwl_calib_hdr hdr; 3218 u8 cap_pin1; 3219 u8 cap_pin2; 3220 u8 pad[2]; 3221} __packed; 3222 3223#define DEFAULT_RADIO_SENSOR_OFFSET cpu_to_le16(2700) 3224struct iwl_calib_temperature_offset_cmd { 3225 struct iwl_calib_hdr hdr; 3226 __le16 radio_sensor_offset; 3227 __le16 reserved; 3228} __packed; 3229 3230struct iwl_calib_temperature_offset_v2_cmd { 3231 struct iwl_calib_hdr hdr; 3232 __le16 radio_sensor_offset_high; 3233 __le16 radio_sensor_offset_low; 3234 __le16 burntVoltageRef; 3235 __le16 reserved; 3236} __packed; 3237 3238/* IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD */ 3239struct iwl_calib_chain_noise_reset_cmd { 3240 struct iwl_calib_hdr hdr; 3241 u8 data[0]; 3242}; 3243 3244/* IWL_PHY_CALIBRATE_CHAIN_NOISE_GAIN_CMD */ 3245struct iwl_calib_chain_noise_gain_cmd { 3246 struct iwl_calib_hdr hdr; 3247 u8 delta_gain_1; 3248 u8 delta_gain_2; 3249 u8 pad[2]; 3250} __packed; 3251 3252/****************************************************************************** 3253 * (12) 3254 * Miscellaneous Commands: 3255 * 3256 *****************************************************************************/ 3257 3258/* 3259 * LEDs Command & Response 3260 * REPLY_LEDS_CMD = 0x48 (command, has simple generic response) 3261 * 3262 * For each of 3 possible LEDs (Activity/Link/Tech, selected by "id" field), 3263 * this command turns it on or off, or sets up a periodic blinking cycle. 3264 */ 3265struct iwl_led_cmd { 3266 __le32 interval; /* "interval" in uSec */ 3267 u8 id; /* 1: Activity, 2: Link, 3: Tech */ 3268 u8 off; /* # intervals off while blinking; 3269 * "0", with >0 "on" value, turns LED on */ 3270 u8 on; /* # intervals on while blinking; 3271 * "0", regardless of "off", turns LED off */ 3272 u8 reserved; 3273} __packed; 3274 3275/* 3276 * station priority table entries 3277 * also used as potential "events" value for both 3278 * COEX_MEDIUM_NOTIFICATION and COEX_EVENT_CMD 3279 */ 3280 3281/* 3282 * COEX events entry flag masks 3283 * RP - Requested Priority 3284 * WP - Win Medium Priority: priority assigned when the contention has been won 3285 */ 3286#define COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG (0x1) 3287#define COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG (0x2) 3288#define COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG (0x4) 3289 3290#define COEX_CU_UNASSOC_IDLE_RP 4 3291#define COEX_CU_UNASSOC_MANUAL_SCAN_RP 4 3292#define COEX_CU_UNASSOC_AUTO_SCAN_RP 4 3293#define COEX_CU_CALIBRATION_RP 4 3294#define COEX_CU_PERIODIC_CALIBRATION_RP 4 3295#define COEX_CU_CONNECTION_ESTAB_RP 4 3296#define COEX_CU_ASSOCIATED_IDLE_RP 4 3297#define COEX_CU_ASSOC_MANUAL_SCAN_RP 4 3298#define COEX_CU_ASSOC_AUTO_SCAN_RP 4 3299#define COEX_CU_ASSOC_ACTIVE_LEVEL_RP 4 3300#define COEX_CU_RF_ON_RP 6 3301#define COEX_CU_RF_OFF_RP 4 3302#define COEX_CU_STAND_ALONE_DEBUG_RP 6 3303#define COEX_CU_IPAN_ASSOC_LEVEL_RP 4 3304#define COEX_CU_RSRVD1_RP 4 3305#define COEX_CU_RSRVD2_RP 4 3306 3307#define COEX_CU_UNASSOC_IDLE_WP 3 3308#define COEX_CU_UNASSOC_MANUAL_SCAN_WP 3 3309#define COEX_CU_UNASSOC_AUTO_SCAN_WP 3 3310#define COEX_CU_CALIBRATION_WP 3 3311#define COEX_CU_PERIODIC_CALIBRATION_WP 3 3312#define COEX_CU_CONNECTION_ESTAB_WP 3 3313#define COEX_CU_ASSOCIATED_IDLE_WP 3 3314#define COEX_CU_ASSOC_MANUAL_SCAN_WP 3 3315#define COEX_CU_ASSOC_AUTO_SCAN_WP 3 3316#define COEX_CU_ASSOC_ACTIVE_LEVEL_WP 3 3317#define COEX_CU_RF_ON_WP 3 3318#define COEX_CU_RF_OFF_WP 3 3319#define COEX_CU_STAND_ALONE_DEBUG_WP 6 3320#define COEX_CU_IPAN_ASSOC_LEVEL_WP 3 3321#define COEX_CU_RSRVD1_WP 3 3322#define COEX_CU_RSRVD2_WP 3 3323 3324#define COEX_UNASSOC_IDLE_FLAGS 0 3325#define COEX_UNASSOC_MANUAL_SCAN_FLAGS \ 3326 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3327 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) 3328#define COEX_UNASSOC_AUTO_SCAN_FLAGS \ 3329 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3330 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) 3331#define COEX_CALIBRATION_FLAGS \ 3332 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3333 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) 3334#define COEX_PERIODIC_CALIBRATION_FLAGS 0 3335/* 3336 * COEX_CONNECTION_ESTAB: 3337 * we need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network. 3338 */ 3339#define COEX_CONNECTION_ESTAB_FLAGS \ 3340 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3341 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \ 3342 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG) 3343#define COEX_ASSOCIATED_IDLE_FLAGS 0 3344#define COEX_ASSOC_MANUAL_SCAN_FLAGS \ 3345 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3346 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) 3347#define COEX_ASSOC_AUTO_SCAN_FLAGS \ 3348 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3349 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) 3350#define COEX_ASSOC_ACTIVE_LEVEL_FLAGS 0 3351#define COEX_RF_ON_FLAGS 0 3352#define COEX_RF_OFF_FLAGS 0 3353#define COEX_STAND_ALONE_DEBUG_FLAGS \ 3354 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3355 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) 3356#define COEX_IPAN_ASSOC_LEVEL_FLAGS \ 3357 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3358 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \ 3359 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG) 3360#define COEX_RSRVD1_FLAGS 0 3361#define COEX_RSRVD2_FLAGS 0 3362/* 3363 * COEX_CU_RF_ON is the event wrapping all radio ownership. 3364 * We need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network. 3365 */ 3366#define COEX_CU_RF_ON_FLAGS \ 3367 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3368 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \ 3369 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG) 3370 3371 3372enum { 3373 /* un-association part */ 3374 COEX_UNASSOC_IDLE = 0, 3375 COEX_UNASSOC_MANUAL_SCAN = 1, 3376 COEX_UNASSOC_AUTO_SCAN = 2, 3377 /* calibration */ 3378 COEX_CALIBRATION = 3, 3379 COEX_PERIODIC_CALIBRATION = 4, 3380 /* connection */ 3381 COEX_CONNECTION_ESTAB = 5, 3382 /* association part */ 3383 COEX_ASSOCIATED_IDLE = 6, 3384 COEX_ASSOC_MANUAL_SCAN = 7, 3385 COEX_ASSOC_AUTO_SCAN = 8, 3386 COEX_ASSOC_ACTIVE_LEVEL = 9, 3387 /* RF ON/OFF */ 3388 COEX_RF_ON = 10, 3389 COEX_RF_OFF = 11, 3390 COEX_STAND_ALONE_DEBUG = 12, 3391 /* IPAN */ 3392 COEX_IPAN_ASSOC_LEVEL = 13, 3393 /* reserved */ 3394 COEX_RSRVD1 = 14, 3395 COEX_RSRVD2 = 15, 3396 COEX_NUM_OF_EVENTS = 16 3397}; 3398 3399/* 3400 * Coexistence WIFI/WIMAX Command 3401 * COEX_PRIORITY_TABLE_CMD = 0x5a 3402 * 3403 */ 3404struct iwl_wimax_coex_event_entry { 3405 u8 request_prio; 3406 u8 win_medium_prio; 3407 u8 reserved; 3408 u8 flags; 3409} __packed; 3410 3411/* COEX flag masks */ 3412 3413/* Station table is valid */ 3414#define COEX_FLAGS_STA_TABLE_VALID_MSK (0x1) 3415/* UnMask wake up src at unassociated sleep */ 3416#define COEX_FLAGS_UNASSOC_WA_UNMASK_MSK (0x4) 3417/* UnMask wake up src at associated sleep */ 3418#define COEX_FLAGS_ASSOC_WA_UNMASK_MSK (0x8) 3419/* Enable CoEx feature. */ 3420#define COEX_FLAGS_COEX_ENABLE_MSK (0x80) 3421 3422struct iwl_wimax_coex_cmd { 3423 u8 flags; 3424 u8 reserved[3]; 3425 struct iwl_wimax_coex_event_entry sta_prio[COEX_NUM_OF_EVENTS]; 3426} __packed; 3427 3428/* 3429 * Coexistence MEDIUM NOTIFICATION 3430 * COEX_MEDIUM_NOTIFICATION = 0x5b 3431 * 3432 * notification from uCode to host to indicate medium changes 3433 * 3434 */ 3435/* 3436 * status field 3437 * bit 0 - 2: medium status 3438 * bit 3: medium change indication 3439 * bit 4 - 31: reserved 3440 */ 3441/* status option values, (0 - 2 bits) */ 3442#define COEX_MEDIUM_BUSY (0x0) /* radio belongs to WiMAX */ 3443#define COEX_MEDIUM_ACTIVE (0x1) /* radio belongs to WiFi */ 3444#define COEX_MEDIUM_PRE_RELEASE (0x2) /* received radio release */ 3445#define COEX_MEDIUM_MSK (0x7) 3446 3447/* send notification status (1 bit) */ 3448#define COEX_MEDIUM_CHANGED (0x8) 3449#define COEX_MEDIUM_CHANGED_MSK (0x8) 3450#define COEX_MEDIUM_SHIFT (3) 3451 3452struct iwl_coex_medium_notification { 3453 __le32 status; 3454 __le32 events; 3455} __packed; 3456 3457/* 3458 * Coexistence EVENT Command 3459 * COEX_EVENT_CMD = 0x5c 3460 * 3461 * send from host to uCode for coex event request. 3462 */ 3463/* flags options */ 3464#define COEX_EVENT_REQUEST_MSK (0x1) 3465 3466struct iwl_coex_event_cmd { 3467 u8 flags; 3468 u8 event; 3469 __le16 reserved; 3470} __packed; 3471 3472struct iwl_coex_event_resp { 3473 __le32 status; 3474} __packed; 3475 3476 3477/****************************************************************************** 3478 * Bluetooth Coexistence commands 3479 * 3480 *****************************************************************************/ 3481 3482/* 3483 * BT Status notification 3484 * REPLY_BT_COEX_PROFILE_NOTIF = 0xce 3485 */ 3486enum iwl_bt_coex_profile_traffic_load { 3487 IWL_BT_COEX_TRAFFIC_LOAD_NONE = 0, 3488 IWL_BT_COEX_TRAFFIC_LOAD_LOW = 1, 3489 IWL_BT_COEX_TRAFFIC_LOAD_HIGH = 2, 3490 IWL_BT_COEX_TRAFFIC_LOAD_CONTINUOUS = 3, 3491/* 3492 * There are no more even though below is a u8, the 3493 * indication from the BT device only has two bits. 3494 */ 3495}; 3496 3497#define BT_SESSION_ACTIVITY_1_UART_MSG 0x1 3498#define BT_SESSION_ACTIVITY_2_UART_MSG 0x2 3499 3500/* BT UART message - Share Part (BT -> WiFi) */ 3501#define BT_UART_MSG_FRAME1MSGTYPE_POS (0) 3502#define BT_UART_MSG_FRAME1MSGTYPE_MSK \ 3503 (0x7 << BT_UART_MSG_FRAME1MSGTYPE_POS) 3504#define BT_UART_MSG_FRAME1SSN_POS (3) 3505#define BT_UART_MSG_FRAME1SSN_MSK \ 3506 (0x3 << BT_UART_MSG_FRAME1SSN_POS) 3507#define BT_UART_MSG_FRAME1UPDATEREQ_POS (5) 3508#define BT_UART_MSG_FRAME1UPDATEREQ_MSK \ 3509 (0x1 << BT_UART_MSG_FRAME1UPDATEREQ_POS) 3510#define BT_UART_MSG_FRAME1RESERVED_POS (6) 3511#define BT_UART_MSG_FRAME1RESERVED_MSK \ 3512 (0x3 << BT_UART_MSG_FRAME1RESERVED_POS) 3513 3514#define BT_UART_MSG_FRAME2OPENCONNECTIONS_POS (0) 3515#define BT_UART_MSG_FRAME2OPENCONNECTIONS_MSK \ 3516 (0x3 << BT_UART_MSG_FRAME2OPENCONNECTIONS_POS) 3517#define BT_UART_MSG_FRAME2TRAFFICLOAD_POS (2) 3518#define BT_UART_MSG_FRAME2TRAFFICLOAD_MSK \ 3519 (0x3 << BT_UART_MSG_FRAME2TRAFFICLOAD_POS) 3520#define BT_UART_MSG_FRAME2CHLSEQN_POS (4) 3521#define BT_UART_MSG_FRAME2CHLSEQN_MSK \ 3522 (0x1 << BT_UART_MSG_FRAME2CHLSEQN_POS) 3523#define BT_UART_MSG_FRAME2INBAND_POS (5) 3524#define BT_UART_MSG_FRAME2INBAND_MSK \ 3525 (0x1 << BT_UART_MSG_FRAME2INBAND_POS) 3526#define BT_UART_MSG_FRAME2RESERVED_POS (6) 3527#define BT_UART_MSG_FRAME2RESERVED_MSK \ 3528 (0x3 << BT_UART_MSG_FRAME2RESERVED_POS) 3529 3530#define BT_UART_MSG_FRAME3SCOESCO_POS (0) 3531#define BT_UART_MSG_FRAME3SCOESCO_MSK \ 3532 (0x1 << BT_UART_MSG_FRAME3SCOESCO_POS) 3533#define BT_UART_MSG_FRAME3SNIFF_POS (1) 3534#define BT_UART_MSG_FRAME3SNIFF_MSK \ 3535 (0x1 << BT_UART_MSG_FRAME3SNIFF_POS) 3536#define BT_UART_MSG_FRAME3A2DP_POS (2) 3537#define BT_UART_MSG_FRAME3A2DP_MSK \ 3538 (0x1 << BT_UART_MSG_FRAME3A2DP_POS) 3539#define BT_UART_MSG_FRAME3ACL_POS (3) 3540#define BT_UART_MSG_FRAME3ACL_MSK \ 3541 (0x1 << BT_UART_MSG_FRAME3ACL_POS) 3542#define BT_UART_MSG_FRAME3MASTER_POS (4) 3543#define BT_UART_MSG_FRAME3MASTER_MSK \ 3544 (0x1 << BT_UART_MSG_FRAME3MASTER_POS) 3545#define BT_UART_MSG_FRAME3OBEX_POS (5) 3546#define BT_UART_MSG_FRAME3OBEX_MSK \ 3547 (0x1 << BT_UART_MSG_FRAME3OBEX_POS) 3548#define BT_UART_MSG_FRAME3RESERVED_POS (6) 3549#define BT_UART_MSG_FRAME3RESERVED_MSK \ 3550 (0x3 << BT_UART_MSG_FRAME3RESERVED_POS) 3551 3552#define BT_UART_MSG_FRAME4IDLEDURATION_POS (0) 3553#define BT_UART_MSG_FRAME4IDLEDURATION_MSK \ 3554 (0x3F << BT_UART_MSG_FRAME4IDLEDURATION_POS) 3555#define BT_UART_MSG_FRAME4RESERVED_POS (6) 3556#define BT_UART_MSG_FRAME4RESERVED_MSK \ 3557 (0x3 << BT_UART_MSG_FRAME4RESERVED_POS) 3558 3559#define BT_UART_MSG_FRAME5TXACTIVITY_POS (0) 3560#define BT_UART_MSG_FRAME5TXACTIVITY_MSK \ 3561 (0x3 << BT_UART_MSG_FRAME5TXACTIVITY_POS) 3562#define BT_UART_MSG_FRAME5RXACTIVITY_POS (2) 3563#define BT_UART_MSG_FRAME5RXACTIVITY_MSK \ 3564 (0x3 << BT_UART_MSG_FRAME5RXACTIVITY_POS) 3565#define BT_UART_MSG_FRAME5ESCORETRANSMIT_POS (4) 3566#define BT_UART_MSG_FRAME5ESCORETRANSMIT_MSK \ 3567 (0x3 << BT_UART_MSG_FRAME5ESCORETRANSMIT_POS) 3568#define BT_UART_MSG_FRAME5RESERVED_POS (6) 3569#define BT_UART_MSG_FRAME5RESERVED_MSK \ 3570 (0x3 << BT_UART_MSG_FRAME5RESERVED_POS) 3571 3572#define BT_UART_MSG_FRAME6SNIFFINTERVAL_POS (0) 3573#define BT_UART_MSG_FRAME6SNIFFINTERVAL_MSK \ 3574 (0x1F << BT_UART_MSG_FRAME6SNIFFINTERVAL_POS) 3575#define BT_UART_MSG_FRAME6DISCOVERABLE_POS (5) 3576#define BT_UART_MSG_FRAME6DISCOVERABLE_MSK \ 3577 (0x1 << BT_UART_MSG_FRAME6DISCOVERABLE_POS) 3578#define BT_UART_MSG_FRAME6RESERVED_POS (6) 3579#define BT_UART_MSG_FRAME6RESERVED_MSK \ 3580 (0x3 << BT_UART_MSG_FRAME6RESERVED_POS) 3581 3582#define BT_UART_MSG_FRAME7SNIFFACTIVITY_POS (0) 3583#define BT_UART_MSG_FRAME7SNIFFACTIVITY_MSK \ 3584 (0x7 << BT_UART_MSG_FRAME7SNIFFACTIVITY_POS) 3585#define BT_UART_MSG_FRAME7PAGE_POS (3) 3586#define BT_UART_MSG_FRAME7PAGE_MSK \ 3587 (0x1 << BT_UART_MSG_FRAME7PAGE_POS) 3588#define BT_UART_MSG_FRAME7INQUIRY_POS (4) 3589#define BT_UART_MSG_FRAME7INQUIRY_MSK \ 3590 (0x1 << BT_UART_MSG_FRAME7INQUIRY_POS) 3591#define BT_UART_MSG_FRAME7CONNECTABLE_POS (5) 3592#define BT_UART_MSG_FRAME7CONNECTABLE_MSK \ 3593 (0x1 << BT_UART_MSG_FRAME7CONNECTABLE_POS) 3594#define BT_UART_MSG_FRAME7RESERVED_POS (6) 3595#define BT_UART_MSG_FRAME7RESERVED_MSK \ 3596 (0x3 << BT_UART_MSG_FRAME7RESERVED_POS) 3597 3598/* BT Session Activity 2 UART message (BT -> WiFi) */ 3599#define BT_UART_MSG_2_FRAME1RESERVED1_POS (5) 3600#define BT_UART_MSG_2_FRAME1RESERVED1_MSK \ 3601 (0x1<<BT_UART_MSG_2_FRAME1RESERVED1_POS) 3602#define BT_UART_MSG_2_FRAME1RESERVED2_POS (6) 3603#define BT_UART_MSG_2_FRAME1RESERVED2_MSK \ 3604 (0x3<<BT_UART_MSG_2_FRAME1RESERVED2_POS) 3605 3606#define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS (0) 3607#define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_MSK \ 3608 (0x3F<<BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS) 3609#define BT_UART_MSG_2_FRAME2RESERVED_POS (6) 3610#define BT_UART_MSG_2_FRAME2RESERVED_MSK \ 3611 (0x3<<BT_UART_MSG_2_FRAME2RESERVED_POS) 3612 3613#define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS (0) 3614#define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_MSK \ 3615 (0xF<<BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS) 3616#define BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS (4) 3617#define BT_UART_MSG_2_FRAME3INQPAGESRMODE_MSK \ 3618 (0x1<<BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS) 3619#define BT_UART_MSG_2_FRAME3LEMASTER_POS (5) 3620#define BT_UART_MSG_2_FRAME3LEMASTER_MSK \ 3621 (0x1<<BT_UART_MSG_2_FRAME3LEMASTER_POS) 3622#define BT_UART_MSG_2_FRAME3RESERVED_POS (6) 3623#define BT_UART_MSG_2_FRAME3RESERVED_MSK \ 3624 (0x3<<BT_UART_MSG_2_FRAME3RESERVED_POS) 3625 3626#define BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS (0) 3627#define BT_UART_MSG_2_FRAME4LELASTTXPOWER_MSK \ 3628 (0xF<<BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS) 3629#define BT_UART_MSG_2_FRAME4NUMLECONN_POS (4) 3630#define BT_UART_MSG_2_FRAME4NUMLECONN_MSK \ 3631 (0x3<<BT_UART_MSG_2_FRAME4NUMLECONN_POS) 3632#define BT_UART_MSG_2_FRAME4RESERVED_POS (6) 3633#define BT_UART_MSG_2_FRAME4RESERVED_MSK \ 3634 (0x3<<BT_UART_MSG_2_FRAME4RESERVED_POS) 3635 3636#define BT_UART_MSG_2_FRAME5BTMINRSSI_POS (0) 3637#define BT_UART_MSG_2_FRAME5BTMINRSSI_MSK \ 3638 (0xF<<BT_UART_MSG_2_FRAME5BTMINRSSI_POS) 3639#define BT_UART_MSG_2_FRAME5LESCANINITMODE_POS (4) 3640#define BT_UART_MSG_2_FRAME5LESCANINITMODE_MSK \ 3641 (0x1<<BT_UART_MSG_2_FRAME5LESCANINITMODE_POS) 3642#define BT_UART_MSG_2_FRAME5LEADVERMODE_POS (5) 3643#define BT_UART_MSG_2_FRAME5LEADVERMODE_MSK \ 3644 (0x1<<BT_UART_MSG_2_FRAME5LEADVERMODE_POS) 3645#define BT_UART_MSG_2_FRAME5RESERVED_POS (6) 3646#define BT_UART_MSG_2_FRAME5RESERVED_MSK \ 3647 (0x3<<BT_UART_MSG_2_FRAME5RESERVED_POS) 3648 3649#define BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS (0) 3650#define BT_UART_MSG_2_FRAME6LECONNINTERVAL_MSK \ 3651 (0x1F<<BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS) 3652#define BT_UART_MSG_2_FRAME6RFU_POS (5) 3653#define BT_UART_MSG_2_FRAME6RFU_MSK \ 3654 (0x1<<BT_UART_MSG_2_FRAME6RFU_POS) 3655#define BT_UART_MSG_2_FRAME6RESERVED_POS (6) 3656#define BT_UART_MSG_2_FRAME6RESERVED_MSK \ 3657 (0x3<<BT_UART_MSG_2_FRAME6RESERVED_POS) 3658 3659#define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS (0) 3660#define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_MSK \ 3661 (0x7<<BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS) 3662#define BT_UART_MSG_2_FRAME7LEPROFILE1_POS (3) 3663#define BT_UART_MSG_2_FRAME7LEPROFILE1_MSK \ 3664 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE1_POS) 3665#define BT_UART_MSG_2_FRAME7LEPROFILE2_POS (4) 3666#define BT_UART_MSG_2_FRAME7LEPROFILE2_MSK \ 3667 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE2_POS) 3668#define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS (5) 3669#define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_MSK \ 3670 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS) 3671#define BT_UART_MSG_2_FRAME7RESERVED_POS (6) 3672#define BT_UART_MSG_2_FRAME7RESERVED_MSK \ 3673 (0x3<<BT_UART_MSG_2_FRAME7RESERVED_POS) 3674 3675 3676#define BT_ENABLE_REDUCED_TXPOWER_THRESHOLD (-62) 3677#define BT_DISABLE_REDUCED_TXPOWER_THRESHOLD (-65) 3678 3679struct iwl_bt_uart_msg { 3680 u8 header; 3681 u8 frame1; 3682 u8 frame2; 3683 u8 frame3; 3684 u8 frame4; 3685 u8 frame5; 3686 u8 frame6; 3687 u8 frame7; 3688} __packed; 3689 3690struct iwl_bt_coex_profile_notif { 3691 struct iwl_bt_uart_msg last_bt_uart_msg; 3692 u8 bt_status; /* 0 - off, 1 - on */ 3693 u8 bt_traffic_load; /* 0 .. 3? */ 3694 u8 bt_ci_compliance; /* 0 - not complied, 1 - complied */ 3695 u8 reserved; 3696} __packed; 3697 3698#define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS 0 3699#define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_MSK 0x1 3700#define IWL_BT_COEX_PRIO_TBL_PRIO_POS 1 3701#define IWL_BT_COEX_PRIO_TBL_PRIO_MASK 0x0e 3702#define IWL_BT_COEX_PRIO_TBL_RESERVED_POS 4 3703#define IWL_BT_COEX_PRIO_TBL_RESERVED_MASK 0xf0 3704#define IWL_BT_COEX_PRIO_TBL_PRIO_SHIFT 1 3705 3706/* 3707 * BT Coexistence Priority table 3708 * REPLY_BT_COEX_PRIO_TABLE = 0xcc 3709 */ 3710enum bt_coex_prio_table_events { 3711 BT_COEX_PRIO_TBL_EVT_INIT_CALIB1 = 0, 3712 BT_COEX_PRIO_TBL_EVT_INIT_CALIB2 = 1, 3713 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW1 = 2, 3714 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW2 = 3, /* DC calib */ 3715 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH1 = 4, 3716 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH2 = 5, 3717 BT_COEX_PRIO_TBL_EVT_DTIM = 6, 3718 BT_COEX_PRIO_TBL_EVT_SCAN52 = 7, 3719 BT_COEX_PRIO_TBL_EVT_SCAN24 = 8, 3720 BT_COEX_PRIO_TBL_EVT_RESERVED0 = 9, 3721 BT_COEX_PRIO_TBL_EVT_RESERVED1 = 10, 3722 BT_COEX_PRIO_TBL_EVT_RESERVED2 = 11, 3723 BT_COEX_PRIO_TBL_EVT_RESERVED3 = 12, 3724 BT_COEX_PRIO_TBL_EVT_RESERVED4 = 13, 3725 BT_COEX_PRIO_TBL_EVT_RESERVED5 = 14, 3726 BT_COEX_PRIO_TBL_EVT_RESERVED6 = 15, 3727 /* BT_COEX_PRIO_TBL_EVT_MAX should always be last */ 3728 BT_COEX_PRIO_TBL_EVT_MAX, 3729}; 3730 3731enum bt_coex_prio_table_priorities { 3732 BT_COEX_PRIO_TBL_DISABLED = 0, 3733 BT_COEX_PRIO_TBL_PRIO_LOW = 1, 3734 BT_COEX_PRIO_TBL_PRIO_HIGH = 2, 3735 BT_COEX_PRIO_TBL_PRIO_BYPASS = 3, 3736 BT_COEX_PRIO_TBL_PRIO_COEX_OFF = 4, 3737 BT_COEX_PRIO_TBL_PRIO_COEX_ON = 5, 3738 BT_COEX_PRIO_TBL_PRIO_RSRVD1 = 6, 3739 BT_COEX_PRIO_TBL_PRIO_RSRVD2 = 7, 3740 BT_COEX_PRIO_TBL_MAX, 3741}; 3742 3743struct iwl_bt_coex_prio_table_cmd { 3744 u8 prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX]; 3745} __packed; 3746 3747#define IWL_BT_COEX_ENV_CLOSE 0 3748#define IWL_BT_COEX_ENV_OPEN 1 3749/* 3750 * BT Protection Envelope 3751 * REPLY_BT_COEX_PROT_ENV = 0xcd 3752 */ 3753struct iwl_bt_coex_prot_env_cmd { 3754 u8 action; /* 0 = closed, 1 = open */ 3755 u8 type; /* 0 .. 15 */ 3756 u8 reserved[2]; 3757} __packed; 3758 3759/* 3760 * REPLY_D3_CONFIG 3761 */ 3762enum iwlagn_d3_wakeup_filters { 3763 IWLAGN_D3_WAKEUP_RFKILL = BIT(0), 3764 IWLAGN_D3_WAKEUP_SYSASSERT = BIT(1), 3765}; 3766 3767struct iwlagn_d3_config_cmd { 3768 __le32 min_sleep_time; 3769 __le32 wakeup_flags; 3770} __packed; 3771 3772/* 3773 * REPLY_WOWLAN_PATTERNS 3774 */ 3775#define IWLAGN_WOWLAN_MIN_PATTERN_LEN 16 3776#define IWLAGN_WOWLAN_MAX_PATTERN_LEN 128 3777 3778struct iwlagn_wowlan_pattern { 3779 u8 mask[IWLAGN_WOWLAN_MAX_PATTERN_LEN / 8]; 3780 u8 pattern[IWLAGN_WOWLAN_MAX_PATTERN_LEN]; 3781 u8 mask_size; 3782 u8 pattern_size; 3783 __le16 reserved; 3784} __packed; 3785 3786#define IWLAGN_WOWLAN_MAX_PATTERNS 20 3787 3788struct iwlagn_wowlan_patterns_cmd { 3789 __le32 n_patterns; 3790 struct iwlagn_wowlan_pattern patterns[]; 3791} __packed; 3792 3793/* 3794 * REPLY_WOWLAN_WAKEUP_FILTER 3795 */ 3796enum iwlagn_wowlan_wakeup_filters { 3797 IWLAGN_WOWLAN_WAKEUP_MAGIC_PACKET = BIT(0), 3798 IWLAGN_WOWLAN_WAKEUP_PATTERN_MATCH = BIT(1), 3799 IWLAGN_WOWLAN_WAKEUP_BEACON_MISS = BIT(2), 3800 IWLAGN_WOWLAN_WAKEUP_LINK_CHANGE = BIT(3), 3801 IWLAGN_WOWLAN_WAKEUP_GTK_REKEY_FAIL = BIT(4), 3802 IWLAGN_WOWLAN_WAKEUP_EAP_IDENT_REQ = BIT(5), 3803 IWLAGN_WOWLAN_WAKEUP_4WAY_HANDSHAKE = BIT(6), 3804 IWLAGN_WOWLAN_WAKEUP_ALWAYS = BIT(7), 3805 IWLAGN_WOWLAN_WAKEUP_ENABLE_NET_DETECT = BIT(8), 3806}; 3807 3808struct iwlagn_wowlan_wakeup_filter_cmd { 3809 __le32 enabled; 3810 __le16 non_qos_seq; 3811 __le16 reserved; 3812 __le16 qos_seq[8]; 3813}; 3814 3815/* 3816 * REPLY_WOWLAN_TSC_RSC_PARAMS 3817 */ 3818#define IWLAGN_NUM_RSC 16 3819 3820struct tkip_sc { 3821 __le16 iv16; 3822 __le16 pad; 3823 __le32 iv32; 3824} __packed; 3825 3826struct iwlagn_tkip_rsc_tsc { 3827 struct tkip_sc unicast_rsc[IWLAGN_NUM_RSC]; 3828 struct tkip_sc multicast_rsc[IWLAGN_NUM_RSC]; 3829 struct tkip_sc tsc; 3830} __packed; 3831 3832struct aes_sc { 3833 __le64 pn; 3834} __packed; 3835 3836struct iwlagn_aes_rsc_tsc { 3837 struct aes_sc unicast_rsc[IWLAGN_NUM_RSC]; 3838 struct aes_sc multicast_rsc[IWLAGN_NUM_RSC]; 3839 struct aes_sc tsc; 3840} __packed; 3841 3842union iwlagn_all_tsc_rsc { 3843 struct iwlagn_tkip_rsc_tsc tkip; 3844 struct iwlagn_aes_rsc_tsc aes; 3845}; 3846 3847struct iwlagn_wowlan_rsc_tsc_params_cmd { 3848 union iwlagn_all_tsc_rsc all_tsc_rsc; 3849} __packed; 3850 3851/* 3852 * REPLY_WOWLAN_TKIP_PARAMS 3853 */ 3854#define IWLAGN_MIC_KEY_SIZE 8 3855#define IWLAGN_P1K_SIZE 5 3856struct iwlagn_mic_keys { 3857 u8 tx[IWLAGN_MIC_KEY_SIZE]; 3858 u8 rx_unicast[IWLAGN_MIC_KEY_SIZE]; 3859 u8 rx_mcast[IWLAGN_MIC_KEY_SIZE]; 3860} __packed; 3861 3862struct iwlagn_p1k_cache { 3863 __le16 p1k[IWLAGN_P1K_SIZE]; 3864} __packed; 3865 3866#define IWLAGN_NUM_RX_P1K_CACHE 2 3867 3868struct iwlagn_wowlan_tkip_params_cmd { 3869 struct iwlagn_mic_keys mic_keys; 3870 struct iwlagn_p1k_cache tx; 3871 struct iwlagn_p1k_cache rx_uni[IWLAGN_NUM_RX_P1K_CACHE]; 3872 struct iwlagn_p1k_cache rx_multi[IWLAGN_NUM_RX_P1K_CACHE]; 3873} __packed; 3874 3875/* 3876 * REPLY_WOWLAN_KEK_KCK_MATERIAL 3877 */ 3878 3879#define IWLAGN_KCK_MAX_SIZE 32 3880#define IWLAGN_KEK_MAX_SIZE 32 3881 3882struct iwlagn_wowlan_kek_kck_material_cmd { 3883 u8 kck[IWLAGN_KCK_MAX_SIZE]; 3884 u8 kek[IWLAGN_KEK_MAX_SIZE]; 3885 __le16 kck_len; 3886 __le16 kek_len; 3887 __le64 replay_ctr; 3888} __packed; 3889 3890#define RF_KILL_INDICATOR_FOR_WOWLAN 0x87 3891 3892/* 3893 * REPLY_WOWLAN_GET_STATUS = 0xe5 3894 */ 3895struct iwlagn_wowlan_status { 3896 __le64 replay_ctr; 3897 __le32 rekey_status; 3898 __le32 wakeup_reason; 3899 u8 pattern_number; 3900 u8 reserved1; 3901 __le16 qos_seq_ctr[8]; 3902 __le16 non_qos_seq_ctr; 3903 __le16 reserved2; 3904 union iwlagn_all_tsc_rsc tsc_rsc; 3905 __le16 reserved3; 3906} __packed; 3907 3908/* 3909 * REPLY_WIPAN_PARAMS = 0xb2 (Commands and Notification) 3910 */ 3911 3912/* 3913 * Minimum slot time in TU 3914 */ 3915#define IWL_MIN_SLOT_TIME 20 3916 3917/** 3918 * struct iwl_wipan_slot 3919 * @width: Time in TU 3920 * @type: 3921 * 0 - BSS 3922 * 1 - PAN 3923 */ 3924struct iwl_wipan_slot { 3925 __le16 width; 3926 u8 type; 3927 u8 reserved; 3928} __packed; 3929 3930#define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_CTS BIT(1) /* reserved */ 3931#define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_QUIET BIT(2) /* reserved */ 3932#define IWL_WIPAN_PARAMS_FLG_SLOTTED_MODE BIT(3) /* reserved */ 3933#define IWL_WIPAN_PARAMS_FLG_FILTER_BEACON_NOTIF BIT(4) 3934#define IWL_WIPAN_PARAMS_FLG_FULL_SLOTTED_MODE BIT(5) 3935 3936/** 3937 * struct iwl_wipan_params_cmd 3938 * @flags: 3939 * bit0: reserved 3940 * bit1: CP leave channel with CTS 3941 * bit2: CP leave channel qith Quiet 3942 * bit3: slotted mode 3943 * 1 - work in slotted mode 3944 * 0 - work in non slotted mode 3945 * bit4: filter beacon notification 3946 * bit5: full tx slotted mode. if this flag is set, 3947 * uCode will perform leaving channel methods in context switch 3948 * also when working in same channel mode 3949 * @num_slots: 1 - 10 3950 */ 3951struct iwl_wipan_params_cmd { 3952 __le16 flags; 3953 u8 reserved; 3954 u8 num_slots; 3955 struct iwl_wipan_slot slots[10]; 3956} __packed; 3957 3958/* 3959 * REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9 3960 * 3961 * TODO: Figure out what this is used for, 3962 * it can only switch between 2.4 GHz 3963 * channels!! 3964 */ 3965 3966struct iwl_wipan_p2p_channel_switch_cmd { 3967 __le16 channel; 3968 __le16 reserved; 3969}; 3970 3971/* 3972 * REPLY_WIPAN_NOA_NOTIFICATION = 0xbc 3973 * 3974 * This is used by the device to notify us of the 3975 * NoA schedule it determined so we can forward it 3976 * to userspace for inclusion in probe responses. 3977 * 3978 * In beacons, the NoA schedule is simply appended 3979 * to the frame we give the device. 3980 */ 3981 3982struct iwl_wipan_noa_descriptor { 3983 u8 count; 3984 __le32 duration; 3985 __le32 interval; 3986 __le32 starttime; 3987} __packed; 3988 3989struct iwl_wipan_noa_attribute { 3990 u8 id; 3991 __le16 length; 3992 u8 index; 3993 u8 ct_window; 3994 struct iwl_wipan_noa_descriptor descr0, descr1; 3995 u8 reserved; 3996} __packed; 3997 3998struct iwl_wipan_noa_notification { 3999 u32 noa_active; 4000 struct iwl_wipan_noa_attribute noa_attribute; 4001} __packed; 4002 4003#endif /* __iwl_commands_h__ */ 4004