1/* 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com> 3 <http://rt2x00.serialmonkey.com> 4 5 This program is free software; you can redistribute it and/or modify 6 it under the terms of the GNU General Public License as published by 7 the Free Software Foundation; either version 2 of the License, or 8 (at your option) any later version. 9 10 This program is distributed in the hope that it will be useful, 11 but WITHOUT ANY WARRANTY; without even the implied warranty of 12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 GNU General Public License for more details. 14 15 You should have received a copy of the GNU General Public License 16 along with this program; if not, see <http://www.gnu.org/licenses/>. 17 */ 18 19/* 20 Module: rt2500usb 21 Abstract: rt2500usb device specific routines. 22 Supported chipsets: RT2570. 23 */ 24 25#include <linux/delay.h> 26#include <linux/etherdevice.h> 27#include <linux/kernel.h> 28#include <linux/module.h> 29#include <linux/slab.h> 30#include <linux/usb.h> 31 32#include "rt2x00.h" 33#include "rt2x00usb.h" 34#include "rt2500usb.h" 35 36/* 37 * Allow hardware encryption to be disabled. 38 */ 39static bool modparam_nohwcrypt; 40module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO); 41MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption."); 42 43/* 44 * Register access. 45 * All access to the CSR registers will go through the methods 46 * rt2500usb_register_read and rt2500usb_register_write. 47 * BBP and RF register require indirect register access, 48 * and use the CSR registers BBPCSR and RFCSR to achieve this. 49 * These indirect registers work with busy bits, 50 * and we will try maximal REGISTER_BUSY_COUNT times to access 51 * the register while taking a REGISTER_BUSY_DELAY us delay 52 * between each attampt. When the busy bit is still set at that time, 53 * the access attempt is considered to have failed, 54 * and we will print an error. 55 * If the csr_mutex is already held then the _lock variants must 56 * be used instead. 57 */ 58static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev, 59 const unsigned int offset, 60 u16 *value) 61{ 62 __le16 reg; 63 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ, 64 USB_VENDOR_REQUEST_IN, offset, 65 ®, sizeof(reg), REGISTER_TIMEOUT); 66 *value = le16_to_cpu(reg); 67} 68 69static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev, 70 const unsigned int offset, 71 u16 *value) 72{ 73 __le16 reg; 74 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ, 75 USB_VENDOR_REQUEST_IN, offset, 76 ®, sizeof(reg), REGISTER_TIMEOUT); 77 *value = le16_to_cpu(reg); 78} 79 80static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev, 81 const unsigned int offset, 82 void *value, const u16 length) 83{ 84 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ, 85 USB_VENDOR_REQUEST_IN, offset, 86 value, length, 87 REGISTER_TIMEOUT16(length)); 88} 89 90static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev, 91 const unsigned int offset, 92 u16 value) 93{ 94 __le16 reg = cpu_to_le16(value); 95 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE, 96 USB_VENDOR_REQUEST_OUT, offset, 97 ®, sizeof(reg), REGISTER_TIMEOUT); 98} 99 100static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev, 101 const unsigned int offset, 102 u16 value) 103{ 104 __le16 reg = cpu_to_le16(value); 105 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE, 106 USB_VENDOR_REQUEST_OUT, offset, 107 ®, sizeof(reg), REGISTER_TIMEOUT); 108} 109 110static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev, 111 const unsigned int offset, 112 void *value, const u16 length) 113{ 114 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE, 115 USB_VENDOR_REQUEST_OUT, offset, 116 value, length, 117 REGISTER_TIMEOUT16(length)); 118} 119 120static int rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev, 121 const unsigned int offset, 122 struct rt2x00_field16 field, 123 u16 *reg) 124{ 125 unsigned int i; 126 127 for (i = 0; i < REGISTER_BUSY_COUNT; i++) { 128 rt2500usb_register_read_lock(rt2x00dev, offset, reg); 129 if (!rt2x00_get_field16(*reg, field)) 130 return 1; 131 udelay(REGISTER_BUSY_DELAY); 132 } 133 134 rt2x00_err(rt2x00dev, "Indirect register access failed: offset=0x%.08x, value=0x%.08x\n", 135 offset, *reg); 136 *reg = ~0; 137 138 return 0; 139} 140 141#define WAIT_FOR_BBP(__dev, __reg) \ 142 rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg)) 143#define WAIT_FOR_RF(__dev, __reg) \ 144 rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg)) 145 146static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev, 147 const unsigned int word, const u8 value) 148{ 149 u16 reg; 150 151 mutex_lock(&rt2x00dev->csr_mutex); 152 153 /* 154 * Wait until the BBP becomes available, afterwards we 155 * can safely write the new data into the register. 156 */ 157 if (WAIT_FOR_BBP(rt2x00dev, ®)) { 158 reg = 0; 159 rt2x00_set_field16(®, PHY_CSR7_DATA, value); 160 rt2x00_set_field16(®, PHY_CSR7_REG_ID, word); 161 rt2x00_set_field16(®, PHY_CSR7_READ_CONTROL, 0); 162 163 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg); 164 } 165 166 mutex_unlock(&rt2x00dev->csr_mutex); 167} 168 169static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev, 170 const unsigned int word, u8 *value) 171{ 172 u16 reg; 173 174 mutex_lock(&rt2x00dev->csr_mutex); 175 176 /* 177 * Wait until the BBP becomes available, afterwards we 178 * can safely write the read request into the register. 179 * After the data has been written, we wait until hardware 180 * returns the correct value, if at any time the register 181 * doesn't become available in time, reg will be 0xffffffff 182 * which means we return 0xff to the caller. 183 */ 184 if (WAIT_FOR_BBP(rt2x00dev, ®)) { 185 reg = 0; 186 rt2x00_set_field16(®, PHY_CSR7_REG_ID, word); 187 rt2x00_set_field16(®, PHY_CSR7_READ_CONTROL, 1); 188 189 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg); 190 191 if (WAIT_FOR_BBP(rt2x00dev, ®)) 192 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, ®); 193 } 194 195 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA); 196 197 mutex_unlock(&rt2x00dev->csr_mutex); 198} 199 200static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev, 201 const unsigned int word, const u32 value) 202{ 203 u16 reg; 204 205 mutex_lock(&rt2x00dev->csr_mutex); 206 207 /* 208 * Wait until the RF becomes available, afterwards we 209 * can safely write the new data into the register. 210 */ 211 if (WAIT_FOR_RF(rt2x00dev, ®)) { 212 reg = 0; 213 rt2x00_set_field16(®, PHY_CSR9_RF_VALUE, value); 214 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg); 215 216 reg = 0; 217 rt2x00_set_field16(®, PHY_CSR10_RF_VALUE, value >> 16); 218 rt2x00_set_field16(®, PHY_CSR10_RF_NUMBER_OF_BITS, 20); 219 rt2x00_set_field16(®, PHY_CSR10_RF_IF_SELECT, 0); 220 rt2x00_set_field16(®, PHY_CSR10_RF_BUSY, 1); 221 222 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg); 223 rt2x00_rf_write(rt2x00dev, word, value); 224 } 225 226 mutex_unlock(&rt2x00dev->csr_mutex); 227} 228 229#ifdef CONFIG_RT2X00_LIB_DEBUGFS 230static void _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev, 231 const unsigned int offset, 232 u32 *value) 233{ 234 rt2500usb_register_read(rt2x00dev, offset, (u16 *)value); 235} 236 237static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev, 238 const unsigned int offset, 239 u32 value) 240{ 241 rt2500usb_register_write(rt2x00dev, offset, value); 242} 243 244static const struct rt2x00debug rt2500usb_rt2x00debug = { 245 .owner = THIS_MODULE, 246 .csr = { 247 .read = _rt2500usb_register_read, 248 .write = _rt2500usb_register_write, 249 .flags = RT2X00DEBUGFS_OFFSET, 250 .word_base = CSR_REG_BASE, 251 .word_size = sizeof(u16), 252 .word_count = CSR_REG_SIZE / sizeof(u16), 253 }, 254 .eeprom = { 255 .read = rt2x00_eeprom_read, 256 .write = rt2x00_eeprom_write, 257 .word_base = EEPROM_BASE, 258 .word_size = sizeof(u16), 259 .word_count = EEPROM_SIZE / sizeof(u16), 260 }, 261 .bbp = { 262 .read = rt2500usb_bbp_read, 263 .write = rt2500usb_bbp_write, 264 .word_base = BBP_BASE, 265 .word_size = sizeof(u8), 266 .word_count = BBP_SIZE / sizeof(u8), 267 }, 268 .rf = { 269 .read = rt2x00_rf_read, 270 .write = rt2500usb_rf_write, 271 .word_base = RF_BASE, 272 .word_size = sizeof(u32), 273 .word_count = RF_SIZE / sizeof(u32), 274 }, 275}; 276#endif /* CONFIG_RT2X00_LIB_DEBUGFS */ 277 278static int rt2500usb_rfkill_poll(struct rt2x00_dev *rt2x00dev) 279{ 280 u16 reg; 281 282 rt2500usb_register_read(rt2x00dev, MAC_CSR19, ®); 283 return rt2x00_get_field16(reg, MAC_CSR19_VAL7); 284} 285 286#ifdef CONFIG_RT2X00_LIB_LEDS 287static void rt2500usb_brightness_set(struct led_classdev *led_cdev, 288 enum led_brightness brightness) 289{ 290 struct rt2x00_led *led = 291 container_of(led_cdev, struct rt2x00_led, led_dev); 292 unsigned int enabled = brightness != LED_OFF; 293 u16 reg; 294 295 rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, ®); 296 297 if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC) 298 rt2x00_set_field16(®, MAC_CSR20_LINK, enabled); 299 else if (led->type == LED_TYPE_ACTIVITY) 300 rt2x00_set_field16(®, MAC_CSR20_ACTIVITY, enabled); 301 302 rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg); 303} 304 305static int rt2500usb_blink_set(struct led_classdev *led_cdev, 306 unsigned long *delay_on, 307 unsigned long *delay_off) 308{ 309 struct rt2x00_led *led = 310 container_of(led_cdev, struct rt2x00_led, led_dev); 311 u16 reg; 312 313 rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, ®); 314 rt2x00_set_field16(®, MAC_CSR21_ON_PERIOD, *delay_on); 315 rt2x00_set_field16(®, MAC_CSR21_OFF_PERIOD, *delay_off); 316 rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg); 317 318 return 0; 319} 320 321static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev, 322 struct rt2x00_led *led, 323 enum led_type type) 324{ 325 led->rt2x00dev = rt2x00dev; 326 led->type = type; 327 led->led_dev.brightness_set = rt2500usb_brightness_set; 328 led->led_dev.blink_set = rt2500usb_blink_set; 329 led->flags = LED_INITIALIZED; 330} 331#endif /* CONFIG_RT2X00_LIB_LEDS */ 332 333/* 334 * Configuration handlers. 335 */ 336 337/* 338 * rt2500usb does not differentiate between shared and pairwise 339 * keys, so we should use the same function for both key types. 340 */ 341static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev, 342 struct rt2x00lib_crypto *crypto, 343 struct ieee80211_key_conf *key) 344{ 345 u32 mask; 346 u16 reg; 347 enum cipher curr_cipher; 348 349 if (crypto->cmd == SET_KEY) { 350 /* 351 * Disallow to set WEP key other than with index 0, 352 * it is known that not work at least on some hardware. 353 * SW crypto will be used in that case. 354 */ 355 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 || 356 key->cipher == WLAN_CIPHER_SUITE_WEP104) && 357 key->keyidx != 0) 358 return -EOPNOTSUPP; 359 360 /* 361 * Pairwise key will always be entry 0, but this 362 * could collide with a shared key on the same 363 * position... 364 */ 365 mask = TXRX_CSR0_KEY_ID.bit_mask; 366 367 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®); 368 curr_cipher = rt2x00_get_field16(reg, TXRX_CSR0_ALGORITHM); 369 reg &= mask; 370 371 if (reg && reg == mask) 372 return -ENOSPC; 373 374 reg = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID); 375 376 key->hw_key_idx += reg ? ffz(reg) : 0; 377 /* 378 * Hardware requires that all keys use the same cipher 379 * (e.g. TKIP-only, AES-only, but not TKIP+AES). 380 * If this is not the first key, compare the cipher with the 381 * first one and fall back to SW crypto if not the same. 382 */ 383 if (key->hw_key_idx > 0 && crypto->cipher != curr_cipher) 384 return -EOPNOTSUPP; 385 386 rt2500usb_register_multiwrite(rt2x00dev, KEY_ENTRY(key->hw_key_idx), 387 crypto->key, sizeof(crypto->key)); 388 389 /* 390 * The driver does not support the IV/EIV generation 391 * in hardware. However it demands the data to be provided 392 * both separately as well as inside the frame. 393 * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib 394 * to ensure rt2x00lib will not strip the data from the 395 * frame after the copy, now we must tell mac80211 396 * to generate the IV/EIV data. 397 */ 398 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; 399 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC; 400 } 401 402 /* 403 * TXRX_CSR0_KEY_ID contains only single-bit fields to indicate 404 * a particular key is valid. 405 */ 406 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®); 407 rt2x00_set_field16(®, TXRX_CSR0_ALGORITHM, crypto->cipher); 408 rt2x00_set_field16(®, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER); 409 410 mask = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID); 411 if (crypto->cmd == SET_KEY) 412 mask |= 1 << key->hw_key_idx; 413 else if (crypto->cmd == DISABLE_KEY) 414 mask &= ~(1 << key->hw_key_idx); 415 rt2x00_set_field16(®, TXRX_CSR0_KEY_ID, mask); 416 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg); 417 418 return 0; 419} 420 421static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev, 422 const unsigned int filter_flags) 423{ 424 u16 reg; 425 426 /* 427 * Start configuration steps. 428 * Note that the version error will always be dropped 429 * and broadcast frames will always be accepted since 430 * there is no filter for it at this time. 431 */ 432 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); 433 rt2x00_set_field16(®, TXRX_CSR2_DROP_CRC, 434 !(filter_flags & FIF_FCSFAIL)); 435 rt2x00_set_field16(®, TXRX_CSR2_DROP_PHYSICAL, 436 !(filter_flags & FIF_PLCPFAIL)); 437 rt2x00_set_field16(®, TXRX_CSR2_DROP_CONTROL, 438 !(filter_flags & FIF_CONTROL)); 439 rt2x00_set_field16(®, TXRX_CSR2_DROP_NOT_TO_ME, 440 !(filter_flags & FIF_PROMISC_IN_BSS)); 441 rt2x00_set_field16(®, TXRX_CSR2_DROP_TODS, 442 !(filter_flags & FIF_PROMISC_IN_BSS) && 443 !rt2x00dev->intf_ap_count); 444 rt2x00_set_field16(®, TXRX_CSR2_DROP_VERSION_ERROR, 1); 445 rt2x00_set_field16(®, TXRX_CSR2_DROP_MULTICAST, 446 !(filter_flags & FIF_ALLMULTI)); 447 rt2x00_set_field16(®, TXRX_CSR2_DROP_BROADCAST, 0); 448 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); 449} 450 451static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev, 452 struct rt2x00_intf *intf, 453 struct rt2x00intf_conf *conf, 454 const unsigned int flags) 455{ 456 unsigned int bcn_preload; 457 u16 reg; 458 459 if (flags & CONFIG_UPDATE_TYPE) { 460 /* 461 * Enable beacon config 462 */ 463 bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20); 464 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, ®); 465 rt2x00_set_field16(®, TXRX_CSR20_OFFSET, bcn_preload >> 6); 466 rt2x00_set_field16(®, TXRX_CSR20_BCN_EXPECT_WINDOW, 467 2 * (conf->type != NL80211_IFTYPE_STATION)); 468 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg); 469 470 /* 471 * Enable synchronisation. 472 */ 473 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, ®); 474 rt2x00_set_field16(®, TXRX_CSR18_OFFSET, 0); 475 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg); 476 477 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); 478 rt2x00_set_field16(®, TXRX_CSR19_TSF_SYNC, conf->sync); 479 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 480 } 481 482 if (flags & CONFIG_UPDATE_MAC) 483 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac, 484 (3 * sizeof(__le16))); 485 486 if (flags & CONFIG_UPDATE_BSSID) 487 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid, 488 (3 * sizeof(__le16))); 489} 490 491static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev, 492 struct rt2x00lib_erp *erp, 493 u32 changed) 494{ 495 u16 reg; 496 497 if (changed & BSS_CHANGED_ERP_PREAMBLE) { 498 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, ®); 499 rt2x00_set_field16(®, TXRX_CSR10_AUTORESPOND_PREAMBLE, 500 !!erp->short_preamble); 501 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg); 502 } 503 504 if (changed & BSS_CHANGED_BASIC_RATES) 505 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, 506 erp->basic_rates); 507 508 if (changed & BSS_CHANGED_BEACON_INT) { 509 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, ®); 510 rt2x00_set_field16(®, TXRX_CSR18_INTERVAL, 511 erp->beacon_int * 4); 512 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg); 513 } 514 515 if (changed & BSS_CHANGED_ERP_SLOT) { 516 rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time); 517 rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs); 518 rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs); 519 } 520} 521 522static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev, 523 struct antenna_setup *ant) 524{ 525 u8 r2; 526 u8 r14; 527 u16 csr5; 528 u16 csr6; 529 530 /* 531 * We should never come here because rt2x00lib is supposed 532 * to catch this and send us the correct antenna explicitely. 533 */ 534 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY || 535 ant->tx == ANTENNA_SW_DIVERSITY); 536 537 rt2500usb_bbp_read(rt2x00dev, 2, &r2); 538 rt2500usb_bbp_read(rt2x00dev, 14, &r14); 539 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5); 540 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6); 541 542 /* 543 * Configure the TX antenna. 544 */ 545 switch (ant->tx) { 546 case ANTENNA_HW_DIVERSITY: 547 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1); 548 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1); 549 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1); 550 break; 551 case ANTENNA_A: 552 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0); 553 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0); 554 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0); 555 break; 556 case ANTENNA_B: 557 default: 558 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2); 559 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2); 560 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2); 561 break; 562 } 563 564 /* 565 * Configure the RX antenna. 566 */ 567 switch (ant->rx) { 568 case ANTENNA_HW_DIVERSITY: 569 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1); 570 break; 571 case ANTENNA_A: 572 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0); 573 break; 574 case ANTENNA_B: 575 default: 576 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2); 577 break; 578 } 579 580 /* 581 * RT2525E and RT5222 need to flip TX I/Q 582 */ 583 if (rt2x00_rf(rt2x00dev, RF2525E) || rt2x00_rf(rt2x00dev, RF5222)) { 584 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1); 585 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1); 586 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1); 587 588 /* 589 * RT2525E does not need RX I/Q Flip. 590 */ 591 if (rt2x00_rf(rt2x00dev, RF2525E)) 592 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0); 593 } else { 594 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0); 595 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0); 596 } 597 598 rt2500usb_bbp_write(rt2x00dev, 2, r2); 599 rt2500usb_bbp_write(rt2x00dev, 14, r14); 600 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5); 601 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6); 602} 603 604static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev, 605 struct rf_channel *rf, const int txpower) 606{ 607 /* 608 * Set TXpower. 609 */ 610 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower)); 611 612 /* 613 * For RT2525E we should first set the channel to half band higher. 614 */ 615 if (rt2x00_rf(rt2x00dev, RF2525E)) { 616 static const u32 vals[] = { 617 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2, 618 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba, 619 0x000008ba, 0x000008be, 0x000008b7, 0x00000902, 620 0x00000902, 0x00000906 621 }; 622 623 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]); 624 if (rf->rf4) 625 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4); 626 } 627 628 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1); 629 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2); 630 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3); 631 if (rf->rf4) 632 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4); 633} 634 635static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev, 636 const int txpower) 637{ 638 u32 rf3; 639 640 rt2x00_rf_read(rt2x00dev, 3, &rf3); 641 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower)); 642 rt2500usb_rf_write(rt2x00dev, 3, rf3); 643} 644 645static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev, 646 struct rt2x00lib_conf *libconf) 647{ 648 enum dev_state state = 649 (libconf->conf->flags & IEEE80211_CONF_PS) ? 650 STATE_SLEEP : STATE_AWAKE; 651 u16 reg; 652 653 if (state == STATE_SLEEP) { 654 rt2500usb_register_read(rt2x00dev, MAC_CSR18, ®); 655 rt2x00_set_field16(®, MAC_CSR18_DELAY_AFTER_BEACON, 656 rt2x00dev->beacon_int - 20); 657 rt2x00_set_field16(®, MAC_CSR18_BEACONS_BEFORE_WAKEUP, 658 libconf->conf->listen_interval - 1); 659 660 /* We must first disable autowake before it can be enabled */ 661 rt2x00_set_field16(®, MAC_CSR18_AUTO_WAKE, 0); 662 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg); 663 664 rt2x00_set_field16(®, MAC_CSR18_AUTO_WAKE, 1); 665 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg); 666 } else { 667 rt2500usb_register_read(rt2x00dev, MAC_CSR18, ®); 668 rt2x00_set_field16(®, MAC_CSR18_AUTO_WAKE, 0); 669 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg); 670 } 671 672 rt2x00dev->ops->lib->set_device_state(rt2x00dev, state); 673} 674 675static void rt2500usb_config(struct rt2x00_dev *rt2x00dev, 676 struct rt2x00lib_conf *libconf, 677 const unsigned int flags) 678{ 679 if (flags & IEEE80211_CONF_CHANGE_CHANNEL) 680 rt2500usb_config_channel(rt2x00dev, &libconf->rf, 681 libconf->conf->power_level); 682 if ((flags & IEEE80211_CONF_CHANGE_POWER) && 683 !(flags & IEEE80211_CONF_CHANGE_CHANNEL)) 684 rt2500usb_config_txpower(rt2x00dev, 685 libconf->conf->power_level); 686 if (flags & IEEE80211_CONF_CHANGE_PS) 687 rt2500usb_config_ps(rt2x00dev, libconf); 688} 689 690/* 691 * Link tuning 692 */ 693static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev, 694 struct link_qual *qual) 695{ 696 u16 reg; 697 698 /* 699 * Update FCS error count from register. 700 */ 701 rt2500usb_register_read(rt2x00dev, STA_CSR0, ®); 702 qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR); 703 704 /* 705 * Update False CCA count from register. 706 */ 707 rt2500usb_register_read(rt2x00dev, STA_CSR3, ®); 708 qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR); 709} 710 711static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev, 712 struct link_qual *qual) 713{ 714 u16 eeprom; 715 u16 value; 716 717 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom); 718 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW); 719 rt2500usb_bbp_write(rt2x00dev, 24, value); 720 721 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom); 722 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW); 723 rt2500usb_bbp_write(rt2x00dev, 25, value); 724 725 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom); 726 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW); 727 rt2500usb_bbp_write(rt2x00dev, 61, value); 728 729 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom); 730 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER); 731 rt2500usb_bbp_write(rt2x00dev, 17, value); 732 733 qual->vgc_level = value; 734} 735 736/* 737 * Queue handlers. 738 */ 739static void rt2500usb_start_queue(struct data_queue *queue) 740{ 741 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev; 742 u16 reg; 743 744 switch (queue->qid) { 745 case QID_RX: 746 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); 747 rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX, 0); 748 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); 749 break; 750 case QID_BEACON: 751 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); 752 rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 1); 753 rt2x00_set_field16(®, TXRX_CSR19_TBCN, 1); 754 rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 1); 755 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 756 break; 757 default: 758 break; 759 } 760} 761 762static void rt2500usb_stop_queue(struct data_queue *queue) 763{ 764 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev; 765 u16 reg; 766 767 switch (queue->qid) { 768 case QID_RX: 769 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); 770 rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX, 1); 771 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); 772 break; 773 case QID_BEACON: 774 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); 775 rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 0); 776 rt2x00_set_field16(®, TXRX_CSR19_TBCN, 0); 777 rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 0); 778 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 779 break; 780 default: 781 break; 782 } 783} 784 785/* 786 * Initialization functions. 787 */ 788static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev) 789{ 790 u16 reg; 791 792 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001, 793 USB_MODE_TEST, REGISTER_TIMEOUT); 794 rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308, 795 0x00f0, REGISTER_TIMEOUT); 796 797 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); 798 rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX, 1); 799 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); 800 801 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111); 802 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11); 803 804 rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®); 805 rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 1); 806 rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 1); 807 rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 0); 808 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg); 809 810 rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®); 811 rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 0); 812 rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 0); 813 rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 0); 814 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg); 815 816 rt2500usb_register_read(rt2x00dev, TXRX_CSR5, ®); 817 rt2x00_set_field16(®, TXRX_CSR5_BBP_ID0, 13); 818 rt2x00_set_field16(®, TXRX_CSR5_BBP_ID0_VALID, 1); 819 rt2x00_set_field16(®, TXRX_CSR5_BBP_ID1, 12); 820 rt2x00_set_field16(®, TXRX_CSR5_BBP_ID1_VALID, 1); 821 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg); 822 823 rt2500usb_register_read(rt2x00dev, TXRX_CSR6, ®); 824 rt2x00_set_field16(®, TXRX_CSR6_BBP_ID0, 10); 825 rt2x00_set_field16(®, TXRX_CSR6_BBP_ID0_VALID, 1); 826 rt2x00_set_field16(®, TXRX_CSR6_BBP_ID1, 11); 827 rt2x00_set_field16(®, TXRX_CSR6_BBP_ID1_VALID, 1); 828 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg); 829 830 rt2500usb_register_read(rt2x00dev, TXRX_CSR7, ®); 831 rt2x00_set_field16(®, TXRX_CSR7_BBP_ID0, 7); 832 rt2x00_set_field16(®, TXRX_CSR7_BBP_ID0_VALID, 1); 833 rt2x00_set_field16(®, TXRX_CSR7_BBP_ID1, 6); 834 rt2x00_set_field16(®, TXRX_CSR7_BBP_ID1_VALID, 1); 835 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg); 836 837 rt2500usb_register_read(rt2x00dev, TXRX_CSR8, ®); 838 rt2x00_set_field16(®, TXRX_CSR8_BBP_ID0, 5); 839 rt2x00_set_field16(®, TXRX_CSR8_BBP_ID0_VALID, 1); 840 rt2x00_set_field16(®, TXRX_CSR8_BBP_ID1, 0); 841 rt2x00_set_field16(®, TXRX_CSR8_BBP_ID1_VALID, 0); 842 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg); 843 844 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); 845 rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 0); 846 rt2x00_set_field16(®, TXRX_CSR19_TSF_SYNC, 0); 847 rt2x00_set_field16(®, TXRX_CSR19_TBCN, 0); 848 rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 0); 849 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 850 851 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f); 852 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d); 853 854 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE)) 855 return -EBUSY; 856 857 rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®); 858 rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 0); 859 rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 0); 860 rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 1); 861 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg); 862 863 if (rt2x00_rev(rt2x00dev) >= RT2570_VERSION_C) { 864 rt2500usb_register_read(rt2x00dev, PHY_CSR2, ®); 865 rt2x00_set_field16(®, PHY_CSR2_LNA, 0); 866 } else { 867 reg = 0; 868 rt2x00_set_field16(®, PHY_CSR2_LNA, 1); 869 rt2x00_set_field16(®, PHY_CSR2_LNA_MODE, 3); 870 } 871 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg); 872 873 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002); 874 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053); 875 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee); 876 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000); 877 878 rt2500usb_register_read(rt2x00dev, MAC_CSR8, ®); 879 rt2x00_set_field16(®, MAC_CSR8_MAX_FRAME_UNIT, 880 rt2x00dev->rx->data_size); 881 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg); 882 883 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®); 884 rt2x00_set_field16(®, TXRX_CSR0_ALGORITHM, CIPHER_NONE); 885 rt2x00_set_field16(®, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER); 886 rt2x00_set_field16(®, TXRX_CSR0_KEY_ID, 0); 887 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg); 888 889 rt2500usb_register_read(rt2x00dev, MAC_CSR18, ®); 890 rt2x00_set_field16(®, MAC_CSR18_DELAY_AFTER_BEACON, 90); 891 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg); 892 893 rt2500usb_register_read(rt2x00dev, PHY_CSR4, ®); 894 rt2x00_set_field16(®, PHY_CSR4_LOW_RF_LE, 1); 895 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg); 896 897 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, ®); 898 rt2x00_set_field16(®, TXRX_CSR1_AUTO_SEQUENCE, 1); 899 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg); 900 901 return 0; 902} 903 904static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev) 905{ 906 unsigned int i; 907 u8 value; 908 909 for (i = 0; i < REGISTER_BUSY_COUNT; i++) { 910 rt2500usb_bbp_read(rt2x00dev, 0, &value); 911 if ((value != 0xff) && (value != 0x00)) 912 return 0; 913 udelay(REGISTER_BUSY_DELAY); 914 } 915 916 rt2x00_err(rt2x00dev, "BBP register access failed, aborting\n"); 917 return -EACCES; 918} 919 920static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev) 921{ 922 unsigned int i; 923 u16 eeprom; 924 u8 value; 925 u8 reg_id; 926 927 if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev))) 928 return -EACCES; 929 930 rt2500usb_bbp_write(rt2x00dev, 3, 0x02); 931 rt2500usb_bbp_write(rt2x00dev, 4, 0x19); 932 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c); 933 rt2500usb_bbp_write(rt2x00dev, 15, 0x30); 934 rt2500usb_bbp_write(rt2x00dev, 16, 0xac); 935 rt2500usb_bbp_write(rt2x00dev, 18, 0x18); 936 rt2500usb_bbp_write(rt2x00dev, 19, 0xff); 937 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e); 938 rt2500usb_bbp_write(rt2x00dev, 21, 0x08); 939 rt2500usb_bbp_write(rt2x00dev, 22, 0x08); 940 rt2500usb_bbp_write(rt2x00dev, 23, 0x08); 941 rt2500usb_bbp_write(rt2x00dev, 24, 0x80); 942 rt2500usb_bbp_write(rt2x00dev, 25, 0x50); 943 rt2500usb_bbp_write(rt2x00dev, 26, 0x08); 944 rt2500usb_bbp_write(rt2x00dev, 27, 0x23); 945 rt2500usb_bbp_write(rt2x00dev, 30, 0x10); 946 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b); 947 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9); 948 rt2500usb_bbp_write(rt2x00dev, 34, 0x12); 949 rt2500usb_bbp_write(rt2x00dev, 35, 0x50); 950 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4); 951 rt2500usb_bbp_write(rt2x00dev, 40, 0x02); 952 rt2500usb_bbp_write(rt2x00dev, 41, 0x60); 953 rt2500usb_bbp_write(rt2x00dev, 53, 0x10); 954 rt2500usb_bbp_write(rt2x00dev, 54, 0x18); 955 rt2500usb_bbp_write(rt2x00dev, 56, 0x08); 956 rt2500usb_bbp_write(rt2x00dev, 57, 0x10); 957 rt2500usb_bbp_write(rt2x00dev, 58, 0x08); 958 rt2500usb_bbp_write(rt2x00dev, 61, 0x60); 959 rt2500usb_bbp_write(rt2x00dev, 62, 0x10); 960 rt2500usb_bbp_write(rt2x00dev, 75, 0xff); 961 962 for (i = 0; i < EEPROM_BBP_SIZE; i++) { 963 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom); 964 965 if (eeprom != 0xffff && eeprom != 0x0000) { 966 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID); 967 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE); 968 rt2500usb_bbp_write(rt2x00dev, reg_id, value); 969 } 970 } 971 972 return 0; 973} 974 975/* 976 * Device state switch handlers. 977 */ 978static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev) 979{ 980 /* 981 * Initialize all registers. 982 */ 983 if (unlikely(rt2500usb_init_registers(rt2x00dev) || 984 rt2500usb_init_bbp(rt2x00dev))) 985 return -EIO; 986 987 return 0; 988} 989 990static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev) 991{ 992 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121); 993 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121); 994 995 /* 996 * Disable synchronisation. 997 */ 998 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0); 999 1000 rt2x00usb_disable_radio(rt2x00dev); 1001} 1002 1003static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev, 1004 enum dev_state state) 1005{ 1006 u16 reg; 1007 u16 reg2; 1008 unsigned int i; 1009 char put_to_sleep; 1010 char bbp_state; 1011 char rf_state; 1012 1013 put_to_sleep = (state != STATE_AWAKE); 1014 1015 reg = 0; 1016 rt2x00_set_field16(®, MAC_CSR17_BBP_DESIRE_STATE, state); 1017 rt2x00_set_field16(®, MAC_CSR17_RF_DESIRE_STATE, state); 1018 rt2x00_set_field16(®, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep); 1019 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg); 1020 rt2x00_set_field16(®, MAC_CSR17_SET_STATE, 1); 1021 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg); 1022 1023 /* 1024 * Device is not guaranteed to be in the requested state yet. 1025 * We must wait until the register indicates that the 1026 * device has entered the correct state. 1027 */ 1028 for (i = 0; i < REGISTER_BUSY_COUNT; i++) { 1029 rt2500usb_register_read(rt2x00dev, MAC_CSR17, ®2); 1030 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE); 1031 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE); 1032 if (bbp_state == state && rf_state == state) 1033 return 0; 1034 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg); 1035 msleep(30); 1036 } 1037 1038 return -EBUSY; 1039} 1040 1041static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev, 1042 enum dev_state state) 1043{ 1044 int retval = 0; 1045 1046 switch (state) { 1047 case STATE_RADIO_ON: 1048 retval = rt2500usb_enable_radio(rt2x00dev); 1049 break; 1050 case STATE_RADIO_OFF: 1051 rt2500usb_disable_radio(rt2x00dev); 1052 break; 1053 case STATE_RADIO_IRQ_ON: 1054 case STATE_RADIO_IRQ_OFF: 1055 /* No support, but no error either */ 1056 break; 1057 case STATE_DEEP_SLEEP: 1058 case STATE_SLEEP: 1059 case STATE_STANDBY: 1060 case STATE_AWAKE: 1061 retval = rt2500usb_set_state(rt2x00dev, state); 1062 break; 1063 default: 1064 retval = -ENOTSUPP; 1065 break; 1066 } 1067 1068 if (unlikely(retval)) 1069 rt2x00_err(rt2x00dev, "Device failed to enter state %d (%d)\n", 1070 state, retval); 1071 1072 return retval; 1073} 1074 1075/* 1076 * TX descriptor initialization 1077 */ 1078static void rt2500usb_write_tx_desc(struct queue_entry *entry, 1079 struct txentry_desc *txdesc) 1080{ 1081 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); 1082 __le32 *txd = (__le32 *) entry->skb->data; 1083 u32 word; 1084 1085 /* 1086 * Start writing the descriptor words. 1087 */ 1088 rt2x00_desc_read(txd, 0, &word); 1089 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit); 1090 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG, 1091 test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags)); 1092 rt2x00_set_field32(&word, TXD_W0_ACK, 1093 test_bit(ENTRY_TXD_ACK, &txdesc->flags)); 1094 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP, 1095 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags)); 1096 rt2x00_set_field32(&word, TXD_W0_OFDM, 1097 (txdesc->rate_mode == RATE_MODE_OFDM)); 1098 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ, 1099 test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags)); 1100 rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->u.plcp.ifs); 1101 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, txdesc->length); 1102 rt2x00_set_field32(&word, TXD_W0_CIPHER, !!txdesc->cipher); 1103 rt2x00_set_field32(&word, TXD_W0_KEY_ID, txdesc->key_idx); 1104 rt2x00_desc_write(txd, 0, word); 1105 1106 rt2x00_desc_read(txd, 1, &word); 1107 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset); 1108 rt2x00_set_field32(&word, TXD_W1_AIFS, entry->queue->aifs); 1109 rt2x00_set_field32(&word, TXD_W1_CWMIN, entry->queue->cw_min); 1110 rt2x00_set_field32(&word, TXD_W1_CWMAX, entry->queue->cw_max); 1111 rt2x00_desc_write(txd, 1, word); 1112 1113 rt2x00_desc_read(txd, 2, &word); 1114 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->u.plcp.signal); 1115 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->u.plcp.service); 1116 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, 1117 txdesc->u.plcp.length_low); 1118 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, 1119 txdesc->u.plcp.length_high); 1120 rt2x00_desc_write(txd, 2, word); 1121 1122 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) { 1123 _rt2x00_desc_write(txd, 3, skbdesc->iv[0]); 1124 _rt2x00_desc_write(txd, 4, skbdesc->iv[1]); 1125 } 1126 1127 /* 1128 * Register descriptor details in skb frame descriptor. 1129 */ 1130 skbdesc->flags |= SKBDESC_DESC_IN_SKB; 1131 skbdesc->desc = txd; 1132 skbdesc->desc_len = TXD_DESC_SIZE; 1133} 1134 1135/* 1136 * TX data initialization 1137 */ 1138static void rt2500usb_beacondone(struct urb *urb); 1139 1140static void rt2500usb_write_beacon(struct queue_entry *entry, 1141 struct txentry_desc *txdesc) 1142{ 1143 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; 1144 struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev); 1145 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data; 1146 int pipe = usb_sndbulkpipe(usb_dev, entry->queue->usb_endpoint); 1147 int length; 1148 u16 reg, reg0; 1149 1150 /* 1151 * Disable beaconing while we are reloading the beacon data, 1152 * otherwise we might be sending out invalid data. 1153 */ 1154 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); 1155 rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 0); 1156 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 1157 1158 /* 1159 * Add space for the descriptor in front of the skb. 1160 */ 1161 skb_push(entry->skb, TXD_DESC_SIZE); 1162 memset(entry->skb->data, 0, TXD_DESC_SIZE); 1163 1164 /* 1165 * Write the TX descriptor for the beacon. 1166 */ 1167 rt2500usb_write_tx_desc(entry, txdesc); 1168 1169 /* 1170 * Dump beacon to userspace through debugfs. 1171 */ 1172 rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_BEACON, entry->skb); 1173 1174 /* 1175 * USB devices cannot blindly pass the skb->len as the 1176 * length of the data to usb_fill_bulk_urb. Pass the skb 1177 * to the driver to determine what the length should be. 1178 */ 1179 length = rt2x00dev->ops->lib->get_tx_data_len(entry); 1180 1181 usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe, 1182 entry->skb->data, length, rt2500usb_beacondone, 1183 entry); 1184 1185 /* 1186 * Second we need to create the guardian byte. 1187 * We only need a single byte, so lets recycle 1188 * the 'flags' field we are not using for beacons. 1189 */ 1190 bcn_priv->guardian_data = 0; 1191 usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe, 1192 &bcn_priv->guardian_data, 1, rt2500usb_beacondone, 1193 entry); 1194 1195 /* 1196 * Send out the guardian byte. 1197 */ 1198 usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC); 1199 1200 /* 1201 * Enable beaconing again. 1202 */ 1203 rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 1); 1204 rt2x00_set_field16(®, TXRX_CSR19_TBCN, 1); 1205 reg0 = reg; 1206 rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 1); 1207 /* 1208 * Beacon generation will fail initially. 1209 * To prevent this we need to change the TXRX_CSR19 1210 * register several times (reg0 is the same as reg 1211 * except for TXRX_CSR19_BEACON_GEN, which is 0 in reg0 1212 * and 1 in reg). 1213 */ 1214 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 1215 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0); 1216 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 1217 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0); 1218 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 1219} 1220 1221static int rt2500usb_get_tx_data_len(struct queue_entry *entry) 1222{ 1223 int length; 1224 1225 /* 1226 * The length _must_ be a multiple of 2, 1227 * but it must _not_ be a multiple of the USB packet size. 1228 */ 1229 length = roundup(entry->skb->len, 2); 1230 length += (2 * !(length % entry->queue->usb_maxpacket)); 1231 1232 return length; 1233} 1234 1235/* 1236 * RX control handlers 1237 */ 1238static void rt2500usb_fill_rxdone(struct queue_entry *entry, 1239 struct rxdone_entry_desc *rxdesc) 1240{ 1241 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; 1242 struct queue_entry_priv_usb *entry_priv = entry->priv_data; 1243 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); 1244 __le32 *rxd = 1245 (__le32 *)(entry->skb->data + 1246 (entry_priv->urb->actual_length - 1247 entry->queue->desc_size)); 1248 u32 word0; 1249 u32 word1; 1250 1251 /* 1252 * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of 1253 * frame data in rt2x00usb. 1254 */ 1255 memcpy(skbdesc->desc, rxd, skbdesc->desc_len); 1256 rxd = (__le32 *)skbdesc->desc; 1257 1258 /* 1259 * It is now safe to read the descriptor on all architectures. 1260 */ 1261 rt2x00_desc_read(rxd, 0, &word0); 1262 rt2x00_desc_read(rxd, 1, &word1); 1263 1264 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) 1265 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC; 1266 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR)) 1267 rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC; 1268 1269 rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER); 1270 if (rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR)) 1271 rxdesc->cipher_status = RX_CRYPTO_FAIL_KEY; 1272 1273 if (rxdesc->cipher != CIPHER_NONE) { 1274 _rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]); 1275 _rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]); 1276 rxdesc->dev_flags |= RXDONE_CRYPTO_IV; 1277 1278 /* ICV is located at the end of frame */ 1279 1280 rxdesc->flags |= RX_FLAG_MMIC_STRIPPED; 1281 if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS) 1282 rxdesc->flags |= RX_FLAG_DECRYPTED; 1283 else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC) 1284 rxdesc->flags |= RX_FLAG_MMIC_ERROR; 1285 } 1286 1287 /* 1288 * Obtain the status about this packet. 1289 * When frame was received with an OFDM bitrate, 1290 * the signal is the PLCP value. If it was received with 1291 * a CCK bitrate the signal is the rate in 100kbit/s. 1292 */ 1293 rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL); 1294 rxdesc->rssi = 1295 rt2x00_get_field32(word1, RXD_W1_RSSI) - rt2x00dev->rssi_offset; 1296 rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); 1297 1298 if (rt2x00_get_field32(word0, RXD_W0_OFDM)) 1299 rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP; 1300 else 1301 rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE; 1302 if (rt2x00_get_field32(word0, RXD_W0_MY_BSS)) 1303 rxdesc->dev_flags |= RXDONE_MY_BSS; 1304 1305 /* 1306 * Adjust the skb memory window to the frame boundaries. 1307 */ 1308 skb_trim(entry->skb, rxdesc->size); 1309} 1310 1311/* 1312 * Interrupt functions. 1313 */ 1314static void rt2500usb_beacondone(struct urb *urb) 1315{ 1316 struct queue_entry *entry = (struct queue_entry *)urb->context; 1317 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data; 1318 1319 if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags)) 1320 return; 1321 1322 /* 1323 * Check if this was the guardian beacon, 1324 * if that was the case we need to send the real beacon now. 1325 * Otherwise we should free the sk_buffer, the device 1326 * should be doing the rest of the work now. 1327 */ 1328 if (bcn_priv->guardian_urb == urb) { 1329 usb_submit_urb(bcn_priv->urb, GFP_ATOMIC); 1330 } else if (bcn_priv->urb == urb) { 1331 dev_kfree_skb(entry->skb); 1332 entry->skb = NULL; 1333 } 1334} 1335 1336/* 1337 * Device probe functions. 1338 */ 1339static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev) 1340{ 1341 u16 word; 1342 u8 *mac; 1343 u8 bbp; 1344 1345 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE); 1346 1347 /* 1348 * Start validation of the data that has been read. 1349 */ 1350 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0); 1351 if (!is_valid_ether_addr(mac)) { 1352 eth_random_addr(mac); 1353 rt2x00_eeprom_dbg(rt2x00dev, "MAC: %pM\n", mac); 1354 } 1355 1356 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word); 1357 if (word == 0xffff) { 1358 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2); 1359 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT, 1360 ANTENNA_SW_DIVERSITY); 1361 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT, 1362 ANTENNA_SW_DIVERSITY); 1363 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE, 1364 LED_MODE_DEFAULT); 1365 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0); 1366 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0); 1367 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522); 1368 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word); 1369 rt2x00_eeprom_dbg(rt2x00dev, "Antenna: 0x%04x\n", word); 1370 } 1371 1372 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word); 1373 if (word == 0xffff) { 1374 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0); 1375 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0); 1376 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0); 1377 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word); 1378 rt2x00_eeprom_dbg(rt2x00dev, "NIC: 0x%04x\n", word); 1379 } 1380 1381 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word); 1382 if (word == 0xffff) { 1383 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI, 1384 DEFAULT_RSSI_OFFSET); 1385 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word); 1386 rt2x00_eeprom_dbg(rt2x00dev, "Calibrate offset: 0x%04x\n", 1387 word); 1388 } 1389 1390 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word); 1391 if (word == 0xffff) { 1392 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45); 1393 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word); 1394 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune: 0x%04x\n", word); 1395 } 1396 1397 /* 1398 * Switch lower vgc bound to current BBP R17 value, 1399 * lower the value a bit for better quality. 1400 */ 1401 rt2500usb_bbp_read(rt2x00dev, 17, &bbp); 1402 bbp -= 6; 1403 1404 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word); 1405 if (word == 0xffff) { 1406 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40); 1407 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp); 1408 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word); 1409 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune vgc: 0x%04x\n", word); 1410 } else { 1411 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp); 1412 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word); 1413 } 1414 1415 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word); 1416 if (word == 0xffff) { 1417 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48); 1418 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41); 1419 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word); 1420 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r17: 0x%04x\n", word); 1421 } 1422 1423 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word); 1424 if (word == 0xffff) { 1425 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40); 1426 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80); 1427 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word); 1428 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r24: 0x%04x\n", word); 1429 } 1430 1431 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word); 1432 if (word == 0xffff) { 1433 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40); 1434 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50); 1435 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word); 1436 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r25: 0x%04x\n", word); 1437 } 1438 1439 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word); 1440 if (word == 0xffff) { 1441 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60); 1442 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d); 1443 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word); 1444 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r61: 0x%04x\n", word); 1445 } 1446 1447 return 0; 1448} 1449 1450static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev) 1451{ 1452 u16 reg; 1453 u16 value; 1454 u16 eeprom; 1455 1456 /* 1457 * Read EEPROM word for configuration. 1458 */ 1459 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom); 1460 1461 /* 1462 * Identify RF chipset. 1463 */ 1464 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE); 1465 rt2500usb_register_read(rt2x00dev, MAC_CSR0, ®); 1466 rt2x00_set_chip(rt2x00dev, RT2570, value, reg); 1467 1468 if (((reg & 0xfff0) != 0) || ((reg & 0x0000000f) == 0)) { 1469 rt2x00_err(rt2x00dev, "Invalid RT chipset detected\n"); 1470 return -ENODEV; 1471 } 1472 1473 if (!rt2x00_rf(rt2x00dev, RF2522) && 1474 !rt2x00_rf(rt2x00dev, RF2523) && 1475 !rt2x00_rf(rt2x00dev, RF2524) && 1476 !rt2x00_rf(rt2x00dev, RF2525) && 1477 !rt2x00_rf(rt2x00dev, RF2525E) && 1478 !rt2x00_rf(rt2x00dev, RF5222)) { 1479 rt2x00_err(rt2x00dev, "Invalid RF chipset detected\n"); 1480 return -ENODEV; 1481 } 1482 1483 /* 1484 * Identify default antenna configuration. 1485 */ 1486 rt2x00dev->default_ant.tx = 1487 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT); 1488 rt2x00dev->default_ant.rx = 1489 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT); 1490 1491 /* 1492 * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead. 1493 * I am not 100% sure about this, but the legacy drivers do not 1494 * indicate antenna swapping in software is required when 1495 * diversity is enabled. 1496 */ 1497 if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY) 1498 rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY; 1499 if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY) 1500 rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY; 1501 1502 /* 1503 * Store led mode, for correct led behaviour. 1504 */ 1505#ifdef CONFIG_RT2X00_LIB_LEDS 1506 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE); 1507 1508 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO); 1509 if (value == LED_MODE_TXRX_ACTIVITY || 1510 value == LED_MODE_DEFAULT || 1511 value == LED_MODE_ASUS) 1512 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual, 1513 LED_TYPE_ACTIVITY); 1514#endif /* CONFIG_RT2X00_LIB_LEDS */ 1515 1516 /* 1517 * Detect if this device has an hardware controlled radio. 1518 */ 1519 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO)) 1520 __set_bit(CAPABILITY_HW_BUTTON, &rt2x00dev->cap_flags); 1521 1522 /* 1523 * Read the RSSI <-> dBm offset information. 1524 */ 1525 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom); 1526 rt2x00dev->rssi_offset = 1527 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI); 1528 1529 return 0; 1530} 1531 1532/* 1533 * RF value list for RF2522 1534 * Supports: 2.4 GHz 1535 */ 1536static const struct rf_channel rf_vals_bg_2522[] = { 1537 { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 }, 1538 { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 }, 1539 { 3, 0x00002050, 0x000c2002, 0x00000101, 0 }, 1540 { 4, 0x00002050, 0x000c2016, 0x00000101, 0 }, 1541 { 5, 0x00002050, 0x000c202a, 0x00000101, 0 }, 1542 { 6, 0x00002050, 0x000c203e, 0x00000101, 0 }, 1543 { 7, 0x00002050, 0x000c2052, 0x00000101, 0 }, 1544 { 8, 0x00002050, 0x000c2066, 0x00000101, 0 }, 1545 { 9, 0x00002050, 0x000c207a, 0x00000101, 0 }, 1546 { 10, 0x00002050, 0x000c208e, 0x00000101, 0 }, 1547 { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 }, 1548 { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 }, 1549 { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 }, 1550 { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 }, 1551}; 1552 1553/* 1554 * RF value list for RF2523 1555 * Supports: 2.4 GHz 1556 */ 1557static const struct rf_channel rf_vals_bg_2523[] = { 1558 { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b }, 1559 { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b }, 1560 { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b }, 1561 { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b }, 1562 { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b }, 1563 { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b }, 1564 { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b }, 1565 { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b }, 1566 { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b }, 1567 { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b }, 1568 { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b }, 1569 { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b }, 1570 { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b }, 1571 { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 }, 1572}; 1573 1574/* 1575 * RF value list for RF2524 1576 * Supports: 2.4 GHz 1577 */ 1578static const struct rf_channel rf_vals_bg_2524[] = { 1579 { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b }, 1580 { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b }, 1581 { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b }, 1582 { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b }, 1583 { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b }, 1584 { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b }, 1585 { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b }, 1586 { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b }, 1587 { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b }, 1588 { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b }, 1589 { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b }, 1590 { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b }, 1591 { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b }, 1592 { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 }, 1593}; 1594 1595/* 1596 * RF value list for RF2525 1597 * Supports: 2.4 GHz 1598 */ 1599static const struct rf_channel rf_vals_bg_2525[] = { 1600 { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b }, 1601 { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b }, 1602 { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b }, 1603 { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b }, 1604 { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b }, 1605 { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b }, 1606 { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b }, 1607 { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b }, 1608 { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b }, 1609 { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b }, 1610 { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b }, 1611 { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b }, 1612 { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b }, 1613 { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 }, 1614}; 1615 1616/* 1617 * RF value list for RF2525e 1618 * Supports: 2.4 GHz 1619 */ 1620static const struct rf_channel rf_vals_bg_2525e[] = { 1621 { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b }, 1622 { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 }, 1623 { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b }, 1624 { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 }, 1625 { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b }, 1626 { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 }, 1627 { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b }, 1628 { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 }, 1629 { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b }, 1630 { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 }, 1631 { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b }, 1632 { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 }, 1633 { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b }, 1634 { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 }, 1635}; 1636 1637/* 1638 * RF value list for RF5222 1639 * Supports: 2.4 GHz & 5.2 GHz 1640 */ 1641static const struct rf_channel rf_vals_5222[] = { 1642 { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b }, 1643 { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b }, 1644 { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b }, 1645 { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b }, 1646 { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b }, 1647 { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b }, 1648 { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b }, 1649 { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b }, 1650 { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b }, 1651 { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b }, 1652 { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b }, 1653 { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b }, 1654 { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b }, 1655 { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b }, 1656 1657 /* 802.11 UNI / HyperLan 2 */ 1658 { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f }, 1659 { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f }, 1660 { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f }, 1661 { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f }, 1662 { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f }, 1663 { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f }, 1664 { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f }, 1665 { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f }, 1666 1667 /* 802.11 HyperLan 2 */ 1668 { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f }, 1669 { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f }, 1670 { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f }, 1671 { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f }, 1672 { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f }, 1673 { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f }, 1674 { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f }, 1675 { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f }, 1676 { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f }, 1677 { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f }, 1678 1679 /* 802.11 UNII */ 1680 { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f }, 1681 { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 }, 1682 { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 }, 1683 { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 }, 1684 { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 }, 1685}; 1686 1687static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev) 1688{ 1689 struct hw_mode_spec *spec = &rt2x00dev->spec; 1690 struct channel_info *info; 1691 char *tx_power; 1692 unsigned int i; 1693 1694 /* 1695 * Initialize all hw fields. 1696 * 1697 * Don't set IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING unless we are 1698 * capable of sending the buffered frames out after the DTIM 1699 * transmission using rt2x00lib_beacondone. This will send out 1700 * multicast and broadcast traffic immediately instead of buffering it 1701 * infinitly and thus dropping it after some time. 1702 */ 1703 rt2x00dev->hw->flags = 1704 IEEE80211_HW_RX_INCLUDES_FCS | 1705 IEEE80211_HW_SIGNAL_DBM | 1706 IEEE80211_HW_SUPPORTS_PS | 1707 IEEE80211_HW_PS_NULLFUNC_STACK; 1708 1709 /* 1710 * Disable powersaving as default. 1711 */ 1712 rt2x00dev->hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; 1713 1714 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev); 1715 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw, 1716 rt2x00_eeprom_addr(rt2x00dev, 1717 EEPROM_MAC_ADDR_0)); 1718 1719 /* 1720 * Initialize hw_mode information. 1721 */ 1722 spec->supported_bands = SUPPORT_BAND_2GHZ; 1723 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM; 1724 1725 if (rt2x00_rf(rt2x00dev, RF2522)) { 1726 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522); 1727 spec->channels = rf_vals_bg_2522; 1728 } else if (rt2x00_rf(rt2x00dev, RF2523)) { 1729 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523); 1730 spec->channels = rf_vals_bg_2523; 1731 } else if (rt2x00_rf(rt2x00dev, RF2524)) { 1732 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524); 1733 spec->channels = rf_vals_bg_2524; 1734 } else if (rt2x00_rf(rt2x00dev, RF2525)) { 1735 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525); 1736 spec->channels = rf_vals_bg_2525; 1737 } else if (rt2x00_rf(rt2x00dev, RF2525E)) { 1738 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e); 1739 spec->channels = rf_vals_bg_2525e; 1740 } else if (rt2x00_rf(rt2x00dev, RF5222)) { 1741 spec->supported_bands |= SUPPORT_BAND_5GHZ; 1742 spec->num_channels = ARRAY_SIZE(rf_vals_5222); 1743 spec->channels = rf_vals_5222; 1744 } 1745 1746 /* 1747 * Create channel information array 1748 */ 1749 info = kcalloc(spec->num_channels, sizeof(*info), GFP_KERNEL); 1750 if (!info) 1751 return -ENOMEM; 1752 1753 spec->channels_info = info; 1754 1755 tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START); 1756 for (i = 0; i < 14; i++) { 1757 info[i].max_power = MAX_TXPOWER; 1758 info[i].default_power1 = TXPOWER_FROM_DEV(tx_power[i]); 1759 } 1760 1761 if (spec->num_channels > 14) { 1762 for (i = 14; i < spec->num_channels; i++) { 1763 info[i].max_power = MAX_TXPOWER; 1764 info[i].default_power1 = DEFAULT_TXPOWER; 1765 } 1766 } 1767 1768 return 0; 1769} 1770 1771static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev) 1772{ 1773 int retval; 1774 u16 reg; 1775 1776 /* 1777 * Allocate eeprom data. 1778 */ 1779 retval = rt2500usb_validate_eeprom(rt2x00dev); 1780 if (retval) 1781 return retval; 1782 1783 retval = rt2500usb_init_eeprom(rt2x00dev); 1784 if (retval) 1785 return retval; 1786 1787 /* 1788 * Enable rfkill polling by setting GPIO direction of the 1789 * rfkill switch GPIO pin correctly. 1790 */ 1791 rt2500usb_register_read(rt2x00dev, MAC_CSR19, ®); 1792 rt2x00_set_field16(®, MAC_CSR19_DIR0, 0); 1793 rt2500usb_register_write(rt2x00dev, MAC_CSR19, reg); 1794 1795 /* 1796 * Initialize hw specifications. 1797 */ 1798 retval = rt2500usb_probe_hw_mode(rt2x00dev); 1799 if (retval) 1800 return retval; 1801 1802 /* 1803 * This device requires the atim queue 1804 */ 1805 __set_bit(REQUIRE_ATIM_QUEUE, &rt2x00dev->cap_flags); 1806 __set_bit(REQUIRE_BEACON_GUARD, &rt2x00dev->cap_flags); 1807 if (!modparam_nohwcrypt) { 1808 __set_bit(CAPABILITY_HW_CRYPTO, &rt2x00dev->cap_flags); 1809 __set_bit(REQUIRE_COPY_IV, &rt2x00dev->cap_flags); 1810 } 1811 __set_bit(REQUIRE_SW_SEQNO, &rt2x00dev->cap_flags); 1812 __set_bit(REQUIRE_PS_AUTOWAKE, &rt2x00dev->cap_flags); 1813 1814 /* 1815 * Set the rssi offset. 1816 */ 1817 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET; 1818 1819 return 0; 1820} 1821 1822static const struct ieee80211_ops rt2500usb_mac80211_ops = { 1823 .tx = rt2x00mac_tx, 1824 .start = rt2x00mac_start, 1825 .stop = rt2x00mac_stop, 1826 .add_interface = rt2x00mac_add_interface, 1827 .remove_interface = rt2x00mac_remove_interface, 1828 .config = rt2x00mac_config, 1829 .configure_filter = rt2x00mac_configure_filter, 1830 .set_tim = rt2x00mac_set_tim, 1831 .set_key = rt2x00mac_set_key, 1832 .sw_scan_start = rt2x00mac_sw_scan_start, 1833 .sw_scan_complete = rt2x00mac_sw_scan_complete, 1834 .get_stats = rt2x00mac_get_stats, 1835 .bss_info_changed = rt2x00mac_bss_info_changed, 1836 .conf_tx = rt2x00mac_conf_tx, 1837 .rfkill_poll = rt2x00mac_rfkill_poll, 1838 .flush = rt2x00mac_flush, 1839 .set_antenna = rt2x00mac_set_antenna, 1840 .get_antenna = rt2x00mac_get_antenna, 1841 .get_ringparam = rt2x00mac_get_ringparam, 1842 .tx_frames_pending = rt2x00mac_tx_frames_pending, 1843}; 1844 1845static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = { 1846 .probe_hw = rt2500usb_probe_hw, 1847 .initialize = rt2x00usb_initialize, 1848 .uninitialize = rt2x00usb_uninitialize, 1849 .clear_entry = rt2x00usb_clear_entry, 1850 .set_device_state = rt2500usb_set_device_state, 1851 .rfkill_poll = rt2500usb_rfkill_poll, 1852 .link_stats = rt2500usb_link_stats, 1853 .reset_tuner = rt2500usb_reset_tuner, 1854 .watchdog = rt2x00usb_watchdog, 1855 .start_queue = rt2500usb_start_queue, 1856 .kick_queue = rt2x00usb_kick_queue, 1857 .stop_queue = rt2500usb_stop_queue, 1858 .flush_queue = rt2x00usb_flush_queue, 1859 .write_tx_desc = rt2500usb_write_tx_desc, 1860 .write_beacon = rt2500usb_write_beacon, 1861 .get_tx_data_len = rt2500usb_get_tx_data_len, 1862 .fill_rxdone = rt2500usb_fill_rxdone, 1863 .config_shared_key = rt2500usb_config_key, 1864 .config_pairwise_key = rt2500usb_config_key, 1865 .config_filter = rt2500usb_config_filter, 1866 .config_intf = rt2500usb_config_intf, 1867 .config_erp = rt2500usb_config_erp, 1868 .config_ant = rt2500usb_config_ant, 1869 .config = rt2500usb_config, 1870}; 1871 1872static void rt2500usb_queue_init(struct data_queue *queue) 1873{ 1874 switch (queue->qid) { 1875 case QID_RX: 1876 queue->limit = 32; 1877 queue->data_size = DATA_FRAME_SIZE; 1878 queue->desc_size = RXD_DESC_SIZE; 1879 queue->priv_size = sizeof(struct queue_entry_priv_usb); 1880 break; 1881 1882 case QID_AC_VO: 1883 case QID_AC_VI: 1884 case QID_AC_BE: 1885 case QID_AC_BK: 1886 queue->limit = 32; 1887 queue->data_size = DATA_FRAME_SIZE; 1888 queue->desc_size = TXD_DESC_SIZE; 1889 queue->priv_size = sizeof(struct queue_entry_priv_usb); 1890 break; 1891 1892 case QID_BEACON: 1893 queue->limit = 1; 1894 queue->data_size = MGMT_FRAME_SIZE; 1895 queue->desc_size = TXD_DESC_SIZE; 1896 queue->priv_size = sizeof(struct queue_entry_priv_usb_bcn); 1897 break; 1898 1899 case QID_ATIM: 1900 queue->limit = 8; 1901 queue->data_size = DATA_FRAME_SIZE; 1902 queue->desc_size = TXD_DESC_SIZE; 1903 queue->priv_size = sizeof(struct queue_entry_priv_usb); 1904 break; 1905 1906 default: 1907 BUG(); 1908 break; 1909 } 1910} 1911 1912static const struct rt2x00_ops rt2500usb_ops = { 1913 .name = KBUILD_MODNAME, 1914 .max_ap_intf = 1, 1915 .eeprom_size = EEPROM_SIZE, 1916 .rf_size = RF_SIZE, 1917 .tx_queues = NUM_TX_QUEUES, 1918 .queue_init = rt2500usb_queue_init, 1919 .lib = &rt2500usb_rt2x00_ops, 1920 .hw = &rt2500usb_mac80211_ops, 1921#ifdef CONFIG_RT2X00_LIB_DEBUGFS 1922 .debugfs = &rt2500usb_rt2x00debug, 1923#endif /* CONFIG_RT2X00_LIB_DEBUGFS */ 1924}; 1925 1926/* 1927 * rt2500usb module information. 1928 */ 1929static struct usb_device_id rt2500usb_device_table[] = { 1930 /* ASUS */ 1931 { USB_DEVICE(0x0b05, 0x1706) }, 1932 { USB_DEVICE(0x0b05, 0x1707) }, 1933 /* Belkin */ 1934 { USB_DEVICE(0x050d, 0x7050) }, /* FCC ID: K7SF5D7050A ver. 2.x */ 1935 { USB_DEVICE(0x050d, 0x7051) }, 1936 /* Cisco Systems */ 1937 { USB_DEVICE(0x13b1, 0x000d) }, 1938 { USB_DEVICE(0x13b1, 0x0011) }, 1939 { USB_DEVICE(0x13b1, 0x001a) }, 1940 /* Conceptronic */ 1941 { USB_DEVICE(0x14b2, 0x3c02) }, 1942 /* D-LINK */ 1943 { USB_DEVICE(0x2001, 0x3c00) }, 1944 /* Gigabyte */ 1945 { USB_DEVICE(0x1044, 0x8001) }, 1946 { USB_DEVICE(0x1044, 0x8007) }, 1947 /* Hercules */ 1948 { USB_DEVICE(0x06f8, 0xe000) }, 1949 /* Melco */ 1950 { USB_DEVICE(0x0411, 0x005e) }, 1951 { USB_DEVICE(0x0411, 0x0066) }, 1952 { USB_DEVICE(0x0411, 0x0067) }, 1953 { USB_DEVICE(0x0411, 0x008b) }, 1954 { USB_DEVICE(0x0411, 0x0097) }, 1955 /* MSI */ 1956 { USB_DEVICE(0x0db0, 0x6861) }, 1957 { USB_DEVICE(0x0db0, 0x6865) }, 1958 { USB_DEVICE(0x0db0, 0x6869) }, 1959 /* Ralink */ 1960 { USB_DEVICE(0x148f, 0x1706) }, 1961 { USB_DEVICE(0x148f, 0x2570) }, 1962 { USB_DEVICE(0x148f, 0x9020) }, 1963 /* Sagem */ 1964 { USB_DEVICE(0x079b, 0x004b) }, 1965 /* Siemens */ 1966 { USB_DEVICE(0x0681, 0x3c06) }, 1967 /* SMC */ 1968 { USB_DEVICE(0x0707, 0xee13) }, 1969 /* Spairon */ 1970 { USB_DEVICE(0x114b, 0x0110) }, 1971 /* SURECOM */ 1972 { USB_DEVICE(0x0769, 0x11f3) }, 1973 /* Trust */ 1974 { USB_DEVICE(0x0eb0, 0x9020) }, 1975 /* VTech */ 1976 { USB_DEVICE(0x0f88, 0x3012) }, 1977 /* Zinwell */ 1978 { USB_DEVICE(0x5a57, 0x0260) }, 1979 { 0, } 1980}; 1981 1982MODULE_AUTHOR(DRV_PROJECT); 1983MODULE_VERSION(DRV_VERSION); 1984MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver."); 1985MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards"); 1986MODULE_DEVICE_TABLE(usb, rt2500usb_device_table); 1987MODULE_LICENSE("GPL"); 1988 1989static int rt2500usb_probe(struct usb_interface *usb_intf, 1990 const struct usb_device_id *id) 1991{ 1992 return rt2x00usb_probe(usb_intf, &rt2500usb_ops); 1993} 1994 1995static struct usb_driver rt2500usb_driver = { 1996 .name = KBUILD_MODNAME, 1997 .id_table = rt2500usb_device_table, 1998 .probe = rt2500usb_probe, 1999 .disconnect = rt2x00usb_disconnect, 2000 .suspend = rt2x00usb_suspend, 2001 .resume = rt2x00usb_resume, 2002 .reset_resume = rt2x00usb_resume, 2003 .disable_hub_initiated_lpm = 1, 2004}; 2005 2006module_usb_driver(rt2500usb_driver); 2007