1/* 2 * This is the Fusion MPT base driver providing common API layer interface 3 * for access to MPT (Message Passing Technology) firmware. 4 * 5 * This code is based on drivers/scsi/mpt2sas/mpt2_base.c 6 * Copyright (C) 2007-2014 LSI Corporation 7 * (mailto:DL-MPTFusionLinux@lsi.com) 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License 11 * as published by the Free Software Foundation; either version 2 12 * of the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * NO WARRANTY 20 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 21 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 23 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 24 * solely responsible for determining the appropriateness of using and 25 * distributing the Program and assumes all risks associated with its 26 * exercise of rights under this Agreement, including but not limited to 27 * the risks and costs of program errors, damage to or loss of data, 28 * programs or equipment, and unavailability or interruption of operations. 29 30 * DISCLAIMER OF LIABILITY 31 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 34 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 35 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 36 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 37 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 38 39 * You should have received a copy of the GNU General Public License 40 * along with this program; if not, write to the Free Software 41 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, 42 * USA. 43 */ 44 45#include <linux/kernel.h> 46#include <linux/module.h> 47#include <linux/errno.h> 48#include <linux/init.h> 49#include <linux/slab.h> 50#include <linux/types.h> 51#include <linux/pci.h> 52#include <linux/kdev_t.h> 53#include <linux/blkdev.h> 54#include <linux/delay.h> 55#include <linux/interrupt.h> 56#include <linux/dma-mapping.h> 57#include <linux/sort.h> 58#include <linux/io.h> 59#include <linux/time.h> 60#include <linux/kthread.h> 61#include <linux/aer.h> 62 63#include "mpt2sas_base.h" 64 65static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS]; 66 67#define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */ 68 69#define MAX_HBA_QUEUE_DEPTH 30000 70#define MAX_CHAIN_DEPTH 100000 71static int max_queue_depth = -1; 72module_param(max_queue_depth, int, 0); 73MODULE_PARM_DESC(max_queue_depth, " max controller queue depth "); 74 75static int max_sgl_entries = -1; 76module_param(max_sgl_entries, int, 0); 77MODULE_PARM_DESC(max_sgl_entries, " max sg entries "); 78 79static int msix_disable = -1; 80module_param(msix_disable, int, 0); 81MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)"); 82 83static int max_msix_vectors = -1; 84module_param(max_msix_vectors, int, 0); 85MODULE_PARM_DESC(max_msix_vectors, " max msix vectors "); 86 87static int mpt2sas_fwfault_debug; 88MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault " 89 "and halt firmware - (default=0)"); 90 91static int disable_discovery = -1; 92module_param(disable_discovery, int, 0); 93MODULE_PARM_DESC(disable_discovery, " disable discovery "); 94 95static int 96_base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag); 97 98static int 99_base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag); 100 101/** 102 * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug. 103 * 104 */ 105static int 106_scsih_set_fwfault_debug(const char *val, struct kernel_param *kp) 107{ 108 int ret = param_set_int(val, kp); 109 struct MPT2SAS_ADAPTER *ioc; 110 111 if (ret) 112 return ret; 113 114 printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug); 115 list_for_each_entry(ioc, &mpt2sas_ioc_list, list) 116 ioc->fwfault_debug = mpt2sas_fwfault_debug; 117 return 0; 118} 119 120module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug, 121 param_get_int, &mpt2sas_fwfault_debug, 0644); 122 123/** 124 * mpt2sas_remove_dead_ioc_func - kthread context to remove dead ioc 125 * @arg: input argument, used to derive ioc 126 * 127 * Return 0 if controller is removed from pci subsystem. 128 * Return -1 for other case. 129 */ 130static int mpt2sas_remove_dead_ioc_func(void *arg) 131{ 132 struct MPT2SAS_ADAPTER *ioc = (struct MPT2SAS_ADAPTER *)arg; 133 struct pci_dev *pdev; 134 135 if ((ioc == NULL)) 136 return -1; 137 138 pdev = ioc->pdev; 139 if ((pdev == NULL)) 140 return -1; 141 pci_stop_and_remove_bus_device_locked(pdev); 142 return 0; 143} 144 145 146/** 147 * _base_fault_reset_work - workq handling ioc fault conditions 148 * @work: input argument, used to derive ioc 149 * Context: sleep. 150 * 151 * Return nothing. 152 */ 153static void 154_base_fault_reset_work(struct work_struct *work) 155{ 156 struct MPT2SAS_ADAPTER *ioc = 157 container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work); 158 unsigned long flags; 159 u32 doorbell; 160 int rc; 161 struct task_struct *p; 162 163 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 164 if (ioc->shost_recovery || ioc->pci_error_recovery) 165 goto rearm_timer; 166 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 167 168 doorbell = mpt2sas_base_get_iocstate(ioc, 0); 169 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_MASK) { 170 printk(MPT2SAS_INFO_FMT "%s : SAS host is non-operational !!!!\n", 171 ioc->name, __func__); 172 173 /* It may be possible that EEH recovery can resolve some of 174 * pci bus failure issues rather removing the dead ioc function 175 * by considering controller is in a non-operational state. So 176 * here priority is given to the EEH recovery. If it doesn't 177 * not resolve this issue, mpt2sas driver will consider this 178 * controller to non-operational state and remove the dead ioc 179 * function. 180 */ 181 if (ioc->non_operational_loop++ < 5) { 182 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, 183 flags); 184 goto rearm_timer; 185 } 186 187 /* 188 * Call _scsih_flush_pending_cmds callback so that we flush all 189 * pending commands back to OS. This call is required to aovid 190 * deadlock at block layer. Dead IOC will fail to do diag reset, 191 * and this call is safe since dead ioc will never return any 192 * command back from HW. 193 */ 194 ioc->schedule_dead_ioc_flush_running_cmds(ioc); 195 /* 196 * Set remove_host flag early since kernel thread will 197 * take some time to execute. 198 */ 199 ioc->remove_host = 1; 200 /*Remove the Dead Host */ 201 p = kthread_run(mpt2sas_remove_dead_ioc_func, ioc, 202 "mpt2sas_dead_ioc_%d", ioc->id); 203 if (IS_ERR(p)) { 204 printk(MPT2SAS_ERR_FMT 205 "%s: Running mpt2sas_dead_ioc thread failed !!!!\n", 206 ioc->name, __func__); 207 } else { 208 printk(MPT2SAS_ERR_FMT 209 "%s: Running mpt2sas_dead_ioc thread success !!!!\n", 210 ioc->name, __func__); 211 } 212 213 return; /* don't rearm timer */ 214 } 215 216 ioc->non_operational_loop = 0; 217 218 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 219 rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 220 FORCE_BIG_HAMMER); 221 printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name, 222 __func__, (rc == 0) ? "success" : "failed"); 223 doorbell = mpt2sas_base_get_iocstate(ioc, 0); 224 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) 225 mpt2sas_base_fault_info(ioc, doorbell & 226 MPI2_DOORBELL_DATA_MASK); 227 } 228 229 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 230 rearm_timer: 231 if (ioc->fault_reset_work_q) 232 queue_delayed_work(ioc->fault_reset_work_q, 233 &ioc->fault_reset_work, 234 msecs_to_jiffies(FAULT_POLLING_INTERVAL)); 235 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 236} 237 238/** 239 * mpt2sas_base_start_watchdog - start the fault_reset_work_q 240 * @ioc: per adapter object 241 * Context: sleep. 242 * 243 * Return nothing. 244 */ 245void 246mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc) 247{ 248 unsigned long flags; 249 250 if (ioc->fault_reset_work_q) 251 return; 252 253 /* initialize fault polling */ 254 INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work); 255 snprintf(ioc->fault_reset_work_q_name, 256 sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id); 257 ioc->fault_reset_work_q = 258 create_singlethread_workqueue(ioc->fault_reset_work_q_name); 259 if (!ioc->fault_reset_work_q) { 260 printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n", 261 ioc->name, __func__, __LINE__); 262 return; 263 } 264 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 265 if (ioc->fault_reset_work_q) 266 queue_delayed_work(ioc->fault_reset_work_q, 267 &ioc->fault_reset_work, 268 msecs_to_jiffies(FAULT_POLLING_INTERVAL)); 269 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 270} 271 272/** 273 * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q 274 * @ioc: per adapter object 275 * Context: sleep. 276 * 277 * Return nothing. 278 */ 279void 280mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc) 281{ 282 unsigned long flags; 283 struct workqueue_struct *wq; 284 285 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 286 wq = ioc->fault_reset_work_q; 287 ioc->fault_reset_work_q = NULL; 288 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 289 if (wq) { 290 if (!cancel_delayed_work_sync(&ioc->fault_reset_work)) 291 flush_workqueue(wq); 292 destroy_workqueue(wq); 293 } 294} 295 296/** 297 * mpt2sas_base_fault_info - verbose translation of firmware FAULT code 298 * @ioc: per adapter object 299 * @fault_code: fault code 300 * 301 * Return nothing. 302 */ 303void 304mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code) 305{ 306 printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n", 307 ioc->name, fault_code); 308} 309 310/** 311 * mpt2sas_halt_firmware - halt's mpt controller firmware 312 * @ioc: per adapter object 313 * 314 * For debugging timeout related issues. Writing 0xCOFFEE00 315 * to the doorbell register will halt controller firmware. With 316 * the purpose to stop both driver and firmware, the enduser can 317 * obtain a ring buffer from controller UART. 318 */ 319void 320mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc) 321{ 322 u32 doorbell; 323 324 if (!ioc->fwfault_debug) 325 return; 326 327 dump_stack(); 328 329 doorbell = readl(&ioc->chip->Doorbell); 330 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) 331 mpt2sas_base_fault_info(ioc , doorbell); 332 else { 333 writel(0xC0FFEE00, &ioc->chip->Doorbell); 334 printk(MPT2SAS_ERR_FMT "Firmware is halted due to command " 335 "timeout\n", ioc->name); 336 } 337 338 panic("panic in %s\n", __func__); 339} 340 341#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 342/** 343 * _base_sas_ioc_info - verbose translation of the ioc status 344 * @ioc: per adapter object 345 * @mpi_reply: reply mf payload returned from firmware 346 * @request_hdr: request mf 347 * 348 * Return nothing. 349 */ 350static void 351_base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply, 352 MPI2RequestHeader_t *request_hdr) 353{ 354 u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & 355 MPI2_IOCSTATUS_MASK; 356 char *desc = NULL; 357 u16 frame_sz; 358 char *func_str = NULL; 359 360 /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */ 361 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST || 362 request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH || 363 request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION) 364 return; 365 366 if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE) 367 return; 368 369 switch (ioc_status) { 370 371/**************************************************************************** 372* Common IOCStatus values for all replies 373****************************************************************************/ 374 375 case MPI2_IOCSTATUS_INVALID_FUNCTION: 376 desc = "invalid function"; 377 break; 378 case MPI2_IOCSTATUS_BUSY: 379 desc = "busy"; 380 break; 381 case MPI2_IOCSTATUS_INVALID_SGL: 382 desc = "invalid sgl"; 383 break; 384 case MPI2_IOCSTATUS_INTERNAL_ERROR: 385 desc = "internal error"; 386 break; 387 case MPI2_IOCSTATUS_INVALID_VPID: 388 desc = "invalid vpid"; 389 break; 390 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES: 391 desc = "insufficient resources"; 392 break; 393 case MPI2_IOCSTATUS_INVALID_FIELD: 394 desc = "invalid field"; 395 break; 396 case MPI2_IOCSTATUS_INVALID_STATE: 397 desc = "invalid state"; 398 break; 399 case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED: 400 desc = "op state not supported"; 401 break; 402 403/**************************************************************************** 404* Config IOCStatus values 405****************************************************************************/ 406 407 case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION: 408 desc = "config invalid action"; 409 break; 410 case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE: 411 desc = "config invalid type"; 412 break; 413 case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE: 414 desc = "config invalid page"; 415 break; 416 case MPI2_IOCSTATUS_CONFIG_INVALID_DATA: 417 desc = "config invalid data"; 418 break; 419 case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS: 420 desc = "config no defaults"; 421 break; 422 case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT: 423 desc = "config cant commit"; 424 break; 425 426/**************************************************************************** 427* SCSI IO Reply 428****************************************************************************/ 429 430 case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR: 431 case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE: 432 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE: 433 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN: 434 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN: 435 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR: 436 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR: 437 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED: 438 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH: 439 case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED: 440 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED: 441 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED: 442 break; 443 444/**************************************************************************** 445* For use by SCSI Initiator and SCSI Target end-to-end data protection 446****************************************************************************/ 447 448 case MPI2_IOCSTATUS_EEDP_GUARD_ERROR: 449 desc = "eedp guard error"; 450 break; 451 case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR: 452 desc = "eedp ref tag error"; 453 break; 454 case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR: 455 desc = "eedp app tag error"; 456 break; 457 458/**************************************************************************** 459* SCSI Target values 460****************************************************************************/ 461 462 case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX: 463 desc = "target invalid io index"; 464 break; 465 case MPI2_IOCSTATUS_TARGET_ABORTED: 466 desc = "target aborted"; 467 break; 468 case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE: 469 desc = "target no conn retryable"; 470 break; 471 case MPI2_IOCSTATUS_TARGET_NO_CONNECTION: 472 desc = "target no connection"; 473 break; 474 case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH: 475 desc = "target xfer count mismatch"; 476 break; 477 case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR: 478 desc = "target data offset error"; 479 break; 480 case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA: 481 desc = "target too much write data"; 482 break; 483 case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT: 484 desc = "target iu too short"; 485 break; 486 case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT: 487 desc = "target ack nak timeout"; 488 break; 489 case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED: 490 desc = "target nak received"; 491 break; 492 493/**************************************************************************** 494* Serial Attached SCSI values 495****************************************************************************/ 496 497 case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED: 498 desc = "smp request failed"; 499 break; 500 case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN: 501 desc = "smp data overrun"; 502 break; 503 504/**************************************************************************** 505* Diagnostic Buffer Post / Diagnostic Release values 506****************************************************************************/ 507 508 case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED: 509 desc = "diagnostic released"; 510 break; 511 default: 512 break; 513 } 514 515 if (!desc) 516 return; 517 518 switch (request_hdr->Function) { 519 case MPI2_FUNCTION_CONFIG: 520 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size; 521 func_str = "config_page"; 522 break; 523 case MPI2_FUNCTION_SCSI_TASK_MGMT: 524 frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t); 525 func_str = "task_mgmt"; 526 break; 527 case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL: 528 frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t); 529 func_str = "sas_iounit_ctl"; 530 break; 531 case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR: 532 frame_sz = sizeof(Mpi2SepRequest_t); 533 func_str = "enclosure"; 534 break; 535 case MPI2_FUNCTION_IOC_INIT: 536 frame_sz = sizeof(Mpi2IOCInitRequest_t); 537 func_str = "ioc_init"; 538 break; 539 case MPI2_FUNCTION_PORT_ENABLE: 540 frame_sz = sizeof(Mpi2PortEnableRequest_t); 541 func_str = "port_enable"; 542 break; 543 case MPI2_FUNCTION_SMP_PASSTHROUGH: 544 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size; 545 func_str = "smp_passthru"; 546 break; 547 default: 548 frame_sz = 32; 549 func_str = "unknown"; 550 break; 551 } 552 553 printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p)," 554 " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str); 555 556 _debug_dump_mf(request_hdr, frame_sz/4); 557} 558 559/** 560 * _base_display_event_data - verbose translation of firmware asyn events 561 * @ioc: per adapter object 562 * @mpi_reply: reply mf payload returned from firmware 563 * 564 * Return nothing. 565 */ 566static void 567_base_display_event_data(struct MPT2SAS_ADAPTER *ioc, 568 Mpi2EventNotificationReply_t *mpi_reply) 569{ 570 char *desc = NULL; 571 u16 event; 572 573 if (!(ioc->logging_level & MPT_DEBUG_EVENTS)) 574 return; 575 576 event = le16_to_cpu(mpi_reply->Event); 577 578 switch (event) { 579 case MPI2_EVENT_LOG_DATA: 580 desc = "Log Data"; 581 break; 582 case MPI2_EVENT_STATE_CHANGE: 583 desc = "Status Change"; 584 break; 585 case MPI2_EVENT_HARD_RESET_RECEIVED: 586 desc = "Hard Reset Received"; 587 break; 588 case MPI2_EVENT_EVENT_CHANGE: 589 desc = "Event Change"; 590 break; 591 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE: 592 desc = "Device Status Change"; 593 break; 594 case MPI2_EVENT_IR_OPERATION_STATUS: 595 if (!ioc->hide_ir_msg) 596 desc = "IR Operation Status"; 597 break; 598 case MPI2_EVENT_SAS_DISCOVERY: 599 { 600 Mpi2EventDataSasDiscovery_t *event_data = 601 (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData; 602 printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name, 603 (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ? 604 "start" : "stop"); 605 if (event_data->DiscoveryStatus) 606 printk("discovery_status(0x%08x)", 607 le32_to_cpu(event_data->DiscoveryStatus)); 608 printk("\n"); 609 return; 610 } 611 case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE: 612 desc = "SAS Broadcast Primitive"; 613 break; 614 case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE: 615 desc = "SAS Init Device Status Change"; 616 break; 617 case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW: 618 desc = "SAS Init Table Overflow"; 619 break; 620 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST: 621 desc = "SAS Topology Change List"; 622 break; 623 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE: 624 desc = "SAS Enclosure Device Status Change"; 625 break; 626 case MPI2_EVENT_IR_VOLUME: 627 if (!ioc->hide_ir_msg) 628 desc = "IR Volume"; 629 break; 630 case MPI2_EVENT_IR_PHYSICAL_DISK: 631 if (!ioc->hide_ir_msg) 632 desc = "IR Physical Disk"; 633 break; 634 case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST: 635 if (!ioc->hide_ir_msg) 636 desc = "IR Configuration Change List"; 637 break; 638 case MPI2_EVENT_LOG_ENTRY_ADDED: 639 if (!ioc->hide_ir_msg) 640 desc = "Log Entry Added"; 641 break; 642 } 643 644 if (!desc) 645 return; 646 647 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc); 648} 649#endif 650 651/** 652 * _base_sas_log_info - verbose translation of firmware log info 653 * @ioc: per adapter object 654 * @log_info: log info 655 * 656 * Return nothing. 657 */ 658static void 659_base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info) 660{ 661 union loginfo_type { 662 u32 loginfo; 663 struct { 664 u32 subcode:16; 665 u32 code:8; 666 u32 originator:4; 667 u32 bus_type:4; 668 } dw; 669 }; 670 union loginfo_type sas_loginfo; 671 char *originator_str = NULL; 672 673 sas_loginfo.loginfo = log_info; 674 if (sas_loginfo.dw.bus_type != 3 /*SAS*/) 675 return; 676 677 /* each nexus loss loginfo */ 678 if (log_info == 0x31170000) 679 return; 680 681 /* eat the loginfos associated with task aborts */ 682 if (ioc->ignore_loginfos && (log_info == 0x30050000 || log_info == 683 0x31140000 || log_info == 0x31130000)) 684 return; 685 686 switch (sas_loginfo.dw.originator) { 687 case 0: 688 originator_str = "IOP"; 689 break; 690 case 1: 691 originator_str = "PL"; 692 break; 693 case 2: 694 if (!ioc->hide_ir_msg) 695 originator_str = "IR"; 696 else 697 originator_str = "WarpDrive"; 698 break; 699 } 700 701 printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), " 702 "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info, 703 originator_str, sas_loginfo.dw.code, 704 sas_loginfo.dw.subcode); 705} 706 707/** 708 * _base_display_reply_info - 709 * @ioc: per adapter object 710 * @smid: system request message index 711 * @msix_index: MSIX table index supplied by the OS 712 * @reply: reply message frame(lower 32bit addr) 713 * 714 * Return nothing. 715 */ 716static void 717_base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 718 u32 reply) 719{ 720 MPI2DefaultReply_t *mpi_reply; 721 u16 ioc_status; 722 723 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 724 if (unlikely(!mpi_reply)) { 725 printk(MPT2SAS_ERR_FMT "mpi_reply not valid at %s:%d/%s()!\n", 726 ioc->name, __FILE__, __LINE__, __func__); 727 return; 728 } 729 ioc_status = le16_to_cpu(mpi_reply->IOCStatus); 730#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 731 if ((ioc_status & MPI2_IOCSTATUS_MASK) && 732 (ioc->logging_level & MPT_DEBUG_REPLY)) { 733 _base_sas_ioc_info(ioc , mpi_reply, 734 mpt2sas_base_get_msg_frame(ioc, smid)); 735 } 736#endif 737 if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) 738 _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo)); 739} 740 741/** 742 * mpt2sas_base_done - base internal command completion routine 743 * @ioc: per adapter object 744 * @smid: system request message index 745 * @msix_index: MSIX table index supplied by the OS 746 * @reply: reply message frame(lower 32bit addr) 747 * 748 * Return 1 meaning mf should be freed from _base_interrupt 749 * 0 means the mf is freed from this function. 750 */ 751u8 752mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 753 u32 reply) 754{ 755 MPI2DefaultReply_t *mpi_reply; 756 757 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 758 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK) 759 return 1; 760 761 if (ioc->base_cmds.status == MPT2_CMD_NOT_USED) 762 return 1; 763 764 ioc->base_cmds.status |= MPT2_CMD_COMPLETE; 765 if (mpi_reply) { 766 ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID; 767 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4); 768 } 769 ioc->base_cmds.status &= ~MPT2_CMD_PENDING; 770 771 complete(&ioc->base_cmds.done); 772 return 1; 773} 774 775/** 776 * _base_async_event - main callback handler for firmware asyn events 777 * @ioc: per adapter object 778 * @msix_index: MSIX table index supplied by the OS 779 * @reply: reply message frame(lower 32bit addr) 780 * 781 * Returns void. 782 */ 783static void 784_base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply) 785{ 786 Mpi2EventNotificationReply_t *mpi_reply; 787 Mpi2EventAckRequest_t *ack_request; 788 u16 smid; 789 790 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 791 if (!mpi_reply) 792 return; 793 if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION) 794 return; 795#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 796 _base_display_event_data(ioc, mpi_reply); 797#endif 798 if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED)) 799 goto out; 800 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 801 if (!smid) { 802 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 803 ioc->name, __func__); 804 goto out; 805 } 806 807 ack_request = mpt2sas_base_get_msg_frame(ioc, smid); 808 memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t)); 809 ack_request->Function = MPI2_FUNCTION_EVENT_ACK; 810 ack_request->Event = mpi_reply->Event; 811 ack_request->EventContext = mpi_reply->EventContext; 812 ack_request->VF_ID = 0; /* TODO */ 813 ack_request->VP_ID = 0; 814 mpt2sas_base_put_smid_default(ioc, smid); 815 816 out: 817 818 /* scsih callback handler */ 819 mpt2sas_scsih_event_callback(ioc, msix_index, reply); 820 821 /* ctl callback handler */ 822 mpt2sas_ctl_event_callback(ioc, msix_index, reply); 823 824 return; 825} 826 827/** 828 * _base_get_cb_idx - obtain the callback index 829 * @ioc: per adapter object 830 * @smid: system request message index 831 * 832 * Return callback index. 833 */ 834static u8 835_base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid) 836{ 837 int i; 838 u8 cb_idx; 839 840 if (smid < ioc->hi_priority_smid) { 841 i = smid - 1; 842 cb_idx = ioc->scsi_lookup[i].cb_idx; 843 } else if (smid < ioc->internal_smid) { 844 i = smid - ioc->hi_priority_smid; 845 cb_idx = ioc->hpr_lookup[i].cb_idx; 846 } else if (smid <= ioc->hba_queue_depth) { 847 i = smid - ioc->internal_smid; 848 cb_idx = ioc->internal_lookup[i].cb_idx; 849 } else 850 cb_idx = 0xFF; 851 return cb_idx; 852} 853 854/** 855 * _base_mask_interrupts - disable interrupts 856 * @ioc: per adapter object 857 * 858 * Disabling ResetIRQ, Reply and Doorbell Interrupts 859 * 860 * Return nothing. 861 */ 862static void 863_base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc) 864{ 865 u32 him_register; 866 867 ioc->mask_interrupts = 1; 868 him_register = readl(&ioc->chip->HostInterruptMask); 869 him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK; 870 writel(him_register, &ioc->chip->HostInterruptMask); 871 readl(&ioc->chip->HostInterruptMask); 872} 873 874/** 875 * _base_unmask_interrupts - enable interrupts 876 * @ioc: per adapter object 877 * 878 * Enabling only Reply Interrupts 879 * 880 * Return nothing. 881 */ 882static void 883_base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc) 884{ 885 u32 him_register; 886 887 him_register = readl(&ioc->chip->HostInterruptMask); 888 him_register &= ~MPI2_HIM_RIM; 889 writel(him_register, &ioc->chip->HostInterruptMask); 890 ioc->mask_interrupts = 0; 891} 892 893union reply_descriptor { 894 u64 word; 895 struct { 896 u32 low; 897 u32 high; 898 } u; 899}; 900 901/** 902 * _base_interrupt - MPT adapter (IOC) specific interrupt handler. 903 * @irq: irq number (not used) 904 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure 905 * @r: pt_regs pointer (not used) 906 * 907 * Return IRQ_HANDLE if processed, else IRQ_NONE. 908 */ 909static irqreturn_t 910_base_interrupt(int irq, void *bus_id) 911{ 912 struct adapter_reply_queue *reply_q = bus_id; 913 union reply_descriptor rd; 914 u32 completed_cmds; 915 u8 request_desript_type; 916 u16 smid; 917 u8 cb_idx; 918 u32 reply; 919 u8 msix_index = reply_q->msix_index; 920 struct MPT2SAS_ADAPTER *ioc = reply_q->ioc; 921 Mpi2ReplyDescriptorsUnion_t *rpf; 922 u8 rc; 923 924 if (ioc->mask_interrupts) 925 return IRQ_NONE; 926 927 if (!atomic_add_unless(&reply_q->busy, 1, 1)) 928 return IRQ_NONE; 929 930 rpf = &reply_q->reply_post_free[reply_q->reply_post_host_index]; 931 request_desript_type = rpf->Default.ReplyFlags 932 & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 933 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) { 934 atomic_dec(&reply_q->busy); 935 return IRQ_NONE; 936 } 937 938 completed_cmds = 0; 939 cb_idx = 0xFF; 940 do { 941 rd.word = le64_to_cpu(rpf->Words); 942 if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX) 943 goto out; 944 reply = 0; 945 smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1); 946 if (request_desript_type == 947 MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) { 948 reply = le32_to_cpu 949 (rpf->AddressReply.ReplyFrameAddress); 950 if (reply > ioc->reply_dma_max_address || 951 reply < ioc->reply_dma_min_address) 952 reply = 0; 953 } else if (request_desript_type == 954 MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER) 955 goto next; 956 else if (request_desript_type == 957 MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS) 958 goto next; 959 if (smid) { 960 cb_idx = _base_get_cb_idx(ioc, smid); 961 if ((likely(cb_idx < MPT_MAX_CALLBACKS)) 962 && (likely(mpt_callbacks[cb_idx] != NULL))) { 963 rc = mpt_callbacks[cb_idx](ioc, smid, 964 msix_index, reply); 965 if (reply) 966 _base_display_reply_info(ioc, smid, 967 msix_index, reply); 968 if (rc) 969 mpt2sas_base_free_smid(ioc, smid); 970 } 971 } 972 if (!smid) 973 _base_async_event(ioc, msix_index, reply); 974 975 /* reply free queue handling */ 976 if (reply) { 977 ioc->reply_free_host_index = 978 (ioc->reply_free_host_index == 979 (ioc->reply_free_queue_depth - 1)) ? 980 0 : ioc->reply_free_host_index + 1; 981 ioc->reply_free[ioc->reply_free_host_index] = 982 cpu_to_le32(reply); 983 wmb(); 984 writel(ioc->reply_free_host_index, 985 &ioc->chip->ReplyFreeHostIndex); 986 } 987 988 next: 989 990 rpf->Words = cpu_to_le64(ULLONG_MAX); 991 reply_q->reply_post_host_index = 992 (reply_q->reply_post_host_index == 993 (ioc->reply_post_queue_depth - 1)) ? 0 : 994 reply_q->reply_post_host_index + 1; 995 request_desript_type = 996 reply_q->reply_post_free[reply_q->reply_post_host_index]. 997 Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 998 completed_cmds++; 999 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) 1000 goto out; 1001 if (!reply_q->reply_post_host_index) 1002 rpf = reply_q->reply_post_free; 1003 else 1004 rpf++; 1005 } while (1); 1006 1007 out: 1008 1009 if (!completed_cmds) { 1010 atomic_dec(&reply_q->busy); 1011 return IRQ_NONE; 1012 } 1013 wmb(); 1014 if (ioc->is_warpdrive) { 1015 writel(reply_q->reply_post_host_index, 1016 ioc->reply_post_host_index[msix_index]); 1017 atomic_dec(&reply_q->busy); 1018 return IRQ_HANDLED; 1019 } 1020 writel(reply_q->reply_post_host_index | (msix_index << 1021 MPI2_RPHI_MSIX_INDEX_SHIFT), &ioc->chip->ReplyPostHostIndex); 1022 atomic_dec(&reply_q->busy); 1023 return IRQ_HANDLED; 1024} 1025 1026/** 1027 * _base_is_controller_msix_enabled - is controller support muli-reply queues 1028 * @ioc: per adapter object 1029 * 1030 */ 1031static inline int 1032_base_is_controller_msix_enabled(struct MPT2SAS_ADAPTER *ioc) 1033{ 1034 return (ioc->facts.IOCCapabilities & 1035 MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable; 1036} 1037 1038/** 1039 * mpt2sas_base_flush_reply_queues - flushing the MSIX reply queues 1040 * @ioc: per adapter object 1041 * Context: ISR conext 1042 * 1043 * Called when a Task Management request has completed. We want 1044 * to flush the other reply queues so all the outstanding IO has been 1045 * completed back to OS before we process the TM completetion. 1046 * 1047 * Return nothing. 1048 */ 1049void 1050mpt2sas_base_flush_reply_queues(struct MPT2SAS_ADAPTER *ioc) 1051{ 1052 struct adapter_reply_queue *reply_q; 1053 1054 /* If MSIX capability is turned off 1055 * then multi-queues are not enabled 1056 */ 1057 if (!_base_is_controller_msix_enabled(ioc)) 1058 return; 1059 1060 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) { 1061 if (ioc->shost_recovery) 1062 return; 1063 /* TMs are on msix_index == 0 */ 1064 if (reply_q->msix_index == 0) 1065 continue; 1066 _base_interrupt(reply_q->vector, (void *)reply_q); 1067 } 1068} 1069 1070/** 1071 * mpt2sas_base_release_callback_handler - clear interrupt callback handler 1072 * @cb_idx: callback index 1073 * 1074 * Return nothing. 1075 */ 1076void 1077mpt2sas_base_release_callback_handler(u8 cb_idx) 1078{ 1079 mpt_callbacks[cb_idx] = NULL; 1080} 1081 1082/** 1083 * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler 1084 * @cb_func: callback function 1085 * 1086 * Returns cb_func. 1087 */ 1088u8 1089mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func) 1090{ 1091 u8 cb_idx; 1092 1093 for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--) 1094 if (mpt_callbacks[cb_idx] == NULL) 1095 break; 1096 1097 mpt_callbacks[cb_idx] = cb_func; 1098 return cb_idx; 1099} 1100 1101/** 1102 * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler 1103 * 1104 * Return nothing. 1105 */ 1106void 1107mpt2sas_base_initialize_callback_handler(void) 1108{ 1109 u8 cb_idx; 1110 1111 for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++) 1112 mpt2sas_base_release_callback_handler(cb_idx); 1113} 1114 1115/** 1116 * mpt2sas_base_build_zero_len_sge - build zero length sg entry 1117 * @ioc: per adapter object 1118 * @paddr: virtual address for SGE 1119 * 1120 * Create a zero length scatter gather entry to insure the IOCs hardware has 1121 * something to use if the target device goes brain dead and tries 1122 * to send data even when none is asked for. 1123 * 1124 * Return nothing. 1125 */ 1126void 1127mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr) 1128{ 1129 u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT | 1130 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST | 1131 MPI2_SGE_FLAGS_SIMPLE_ELEMENT) << 1132 MPI2_SGE_FLAGS_SHIFT); 1133 ioc->base_add_sg_single(paddr, flags_length, -1); 1134} 1135 1136/** 1137 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr. 1138 * @paddr: virtual address for SGE 1139 * @flags_length: SGE flags and data transfer length 1140 * @dma_addr: Physical address 1141 * 1142 * Return nothing. 1143 */ 1144static void 1145_base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr) 1146{ 1147 Mpi2SGESimple32_t *sgel = paddr; 1148 1149 flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING | 1150 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT; 1151 sgel->FlagsLength = cpu_to_le32(flags_length); 1152 sgel->Address = cpu_to_le32(dma_addr); 1153} 1154 1155 1156/** 1157 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr. 1158 * @paddr: virtual address for SGE 1159 * @flags_length: SGE flags and data transfer length 1160 * @dma_addr: Physical address 1161 * 1162 * Return nothing. 1163 */ 1164static void 1165_base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr) 1166{ 1167 Mpi2SGESimple64_t *sgel = paddr; 1168 1169 flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING | 1170 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT; 1171 sgel->FlagsLength = cpu_to_le32(flags_length); 1172 sgel->Address = cpu_to_le64(dma_addr); 1173} 1174 1175#define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10)) 1176 1177/** 1178 * _base_config_dma_addressing - set dma addressing 1179 * @ioc: per adapter object 1180 * @pdev: PCI device struct 1181 * 1182 * Returns 0 for success, non-zero for failure. 1183 */ 1184static int 1185_base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev) 1186{ 1187 struct sysinfo s; 1188 u64 consistent_dma_mask; 1189 1190 if (ioc->dma_mask) 1191 consistent_dma_mask = DMA_BIT_MASK(64); 1192 else 1193 consistent_dma_mask = DMA_BIT_MASK(32); 1194 1195 if (sizeof(dma_addr_t) > 4) { 1196 const uint64_t required_mask = 1197 dma_get_required_mask(&pdev->dev); 1198 if ((required_mask > DMA_BIT_MASK(32)) && 1199 !pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) && 1200 !pci_set_consistent_dma_mask(pdev, consistent_dma_mask)) { 1201 ioc->base_add_sg_single = &_base_add_sg_single_64; 1202 ioc->sge_size = sizeof(Mpi2SGESimple64_t); 1203 ioc->dma_mask = 64; 1204 goto out; 1205 } 1206 } 1207 1208 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) 1209 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) { 1210 ioc->base_add_sg_single = &_base_add_sg_single_32; 1211 ioc->sge_size = sizeof(Mpi2SGESimple32_t); 1212 ioc->dma_mask = 32; 1213 } else 1214 return -ENODEV; 1215 1216 out: 1217 si_meminfo(&s); 1218 printk(MPT2SAS_INFO_FMT 1219 "%d BIT PCI BUS DMA ADDRESSING SUPPORTED, total mem (%ld kB)\n", 1220 ioc->name, ioc->dma_mask, convert_to_kb(s.totalram)); 1221 1222 return 0; 1223} 1224 1225static int 1226_base_change_consistent_dma_mask(struct MPT2SAS_ADAPTER *ioc, 1227 struct pci_dev *pdev) 1228{ 1229 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) { 1230 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) 1231 return -ENODEV; 1232 } 1233 return 0; 1234} 1235/** 1236 * _base_check_enable_msix - checks MSIX capabable. 1237 * @ioc: per adapter object 1238 * 1239 * Check to see if card is capable of MSIX, and set number 1240 * of available msix vectors 1241 */ 1242static int 1243_base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc) 1244{ 1245 int base; 1246 u16 message_control; 1247 1248 1249 /* Check whether controller SAS2008 B0 controller, 1250 if it is SAS2008 B0 controller use IO-APIC instead of MSIX */ 1251 if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 && 1252 ioc->pdev->revision == 0x01) { 1253 return -EINVAL; 1254 } 1255 1256 base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX); 1257 if (!base) { 1258 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not " 1259 "supported\n", ioc->name)); 1260 return -EINVAL; 1261 } 1262 1263 /* get msix vector count */ 1264 /* NUMA_IO not supported for older controllers */ 1265 if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 || 1266 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 || 1267 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 || 1268 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 || 1269 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 || 1270 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 || 1271 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2) 1272 ioc->msix_vector_count = 1; 1273 else { 1274 pci_read_config_word(ioc->pdev, base + 2, &message_control); 1275 ioc->msix_vector_count = (message_control & 0x3FF) + 1; 1276 } 1277 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, " 1278 "vector_count(%d)\n", ioc->name, ioc->msix_vector_count)); 1279 1280 return 0; 1281} 1282 1283/** 1284 * _base_free_irq - free irq 1285 * @ioc: per adapter object 1286 * 1287 * Freeing respective reply_queue from the list. 1288 */ 1289static void 1290_base_free_irq(struct MPT2SAS_ADAPTER *ioc) 1291{ 1292 struct adapter_reply_queue *reply_q, *next; 1293 1294 if (list_empty(&ioc->reply_queue_list)) 1295 return; 1296 1297 list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) { 1298 list_del(&reply_q->list); 1299 synchronize_irq(reply_q->vector); 1300 free_irq(reply_q->vector, reply_q); 1301 kfree(reply_q); 1302 } 1303} 1304 1305/** 1306 * _base_request_irq - request irq 1307 * @ioc: per adapter object 1308 * @index: msix index into vector table 1309 * @vector: irq vector 1310 * 1311 * Inserting respective reply_queue into the list. 1312 */ 1313static int 1314_base_request_irq(struct MPT2SAS_ADAPTER *ioc, u8 index, u32 vector) 1315{ 1316 struct adapter_reply_queue *reply_q; 1317 int r; 1318 1319 reply_q = kzalloc(sizeof(struct adapter_reply_queue), GFP_KERNEL); 1320 if (!reply_q) { 1321 printk(MPT2SAS_ERR_FMT "unable to allocate memory %d!\n", 1322 ioc->name, (int)sizeof(struct adapter_reply_queue)); 1323 return -ENOMEM; 1324 } 1325 reply_q->ioc = ioc; 1326 reply_q->msix_index = index; 1327 reply_q->vector = vector; 1328 atomic_set(&reply_q->busy, 0); 1329 if (ioc->msix_enable) 1330 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-msix%d", 1331 MPT2SAS_DRIVER_NAME, ioc->id, index); 1332 else 1333 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d", 1334 MPT2SAS_DRIVER_NAME, ioc->id); 1335 r = request_irq(vector, _base_interrupt, IRQF_SHARED, reply_q->name, 1336 reply_q); 1337 if (r) { 1338 printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n", 1339 reply_q->name, vector); 1340 kfree(reply_q); 1341 return -EBUSY; 1342 } 1343 1344 INIT_LIST_HEAD(&reply_q->list); 1345 list_add_tail(&reply_q->list, &ioc->reply_queue_list); 1346 return 0; 1347} 1348 1349/** 1350 * _base_assign_reply_queues - assigning msix index for each cpu 1351 * @ioc: per adapter object 1352 * 1353 * The enduser would need to set the affinity via /proc/irq/#/smp_affinity 1354 * 1355 * It would nice if we could call irq_set_affinity, however it is not 1356 * an exported symbol 1357 */ 1358static void 1359_base_assign_reply_queues(struct MPT2SAS_ADAPTER *ioc) 1360{ 1361 unsigned int cpu, nr_cpus, nr_msix, index = 0; 1362 1363 if (!_base_is_controller_msix_enabled(ioc)) 1364 return; 1365 1366 memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz); 1367 1368 nr_cpus = num_online_cpus(); 1369 nr_msix = ioc->reply_queue_count = min(ioc->reply_queue_count, 1370 ioc->facts.MaxMSIxVectors); 1371 if (!nr_msix) 1372 return; 1373 1374 cpu = cpumask_first(cpu_online_mask); 1375 1376 do { 1377 unsigned int i, group = nr_cpus / nr_msix; 1378 1379 if (index < nr_cpus % nr_msix) 1380 group++; 1381 1382 for (i = 0 ; i < group ; i++) { 1383 ioc->cpu_msix_table[cpu] = index; 1384 cpu = cpumask_next(cpu, cpu_online_mask); 1385 } 1386 1387 index++; 1388 1389 } while (cpu < nr_cpus); 1390} 1391 1392/** 1393 * _base_disable_msix - disables msix 1394 * @ioc: per adapter object 1395 * 1396 */ 1397static void 1398_base_disable_msix(struct MPT2SAS_ADAPTER *ioc) 1399{ 1400 if (ioc->msix_enable) { 1401 pci_disable_msix(ioc->pdev); 1402 ioc->msix_enable = 0; 1403 } 1404} 1405 1406/** 1407 * _base_enable_msix - enables msix, failback to io_apic 1408 * @ioc: per adapter object 1409 * 1410 */ 1411static int 1412_base_enable_msix(struct MPT2SAS_ADAPTER *ioc) 1413{ 1414 struct msix_entry *entries, *a; 1415 int r; 1416 int i; 1417 u8 try_msix = 0; 1418 1419 if (msix_disable == -1 || msix_disable == 0) 1420 try_msix = 1; 1421 1422 if (!try_msix) 1423 goto try_ioapic; 1424 1425 if (_base_check_enable_msix(ioc) != 0) 1426 goto try_ioapic; 1427 1428 ioc->reply_queue_count = min_t(int, ioc->cpu_count, 1429 ioc->msix_vector_count); 1430 1431 if (!ioc->rdpq_array_enable && max_msix_vectors == -1) 1432 max_msix_vectors = 8; 1433 1434 if (max_msix_vectors > 0) { 1435 ioc->reply_queue_count = min_t(int, max_msix_vectors, 1436 ioc->reply_queue_count); 1437 ioc->msix_vector_count = ioc->reply_queue_count; 1438 } else if (max_msix_vectors == 0) 1439 goto try_ioapic; 1440 1441 printk(MPT2SAS_INFO_FMT 1442 "MSI-X vectors supported: %d, no of cores: %d, max_msix_vectors: %d\n", 1443 ioc->name, ioc->msix_vector_count, ioc->cpu_count, max_msix_vectors); 1444 1445 entries = kcalloc(ioc->reply_queue_count, sizeof(struct msix_entry), 1446 GFP_KERNEL); 1447 if (!entries) { 1448 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "kcalloc " 1449 "failed @ at %s:%d/%s() !!!\n", ioc->name, __FILE__, 1450 __LINE__, __func__)); 1451 goto try_ioapic; 1452 } 1453 1454 for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++) 1455 a->entry = i; 1456 1457 r = pci_enable_msix_exact(ioc->pdev, entries, ioc->reply_queue_count); 1458 if (r) { 1459 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT 1460 "pci_enable_msix_exact failed (r=%d) !!!\n", ioc->name, r)); 1461 kfree(entries); 1462 goto try_ioapic; 1463 } 1464 1465 ioc->msix_enable = 1; 1466 for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++) { 1467 r = _base_request_irq(ioc, i, a->vector); 1468 if (r) { 1469 _base_free_irq(ioc); 1470 _base_disable_msix(ioc); 1471 kfree(entries); 1472 goto try_ioapic; 1473 } 1474 } 1475 1476 kfree(entries); 1477 return 0; 1478 1479/* failback to io_apic interrupt routing */ 1480 try_ioapic: 1481 1482 ioc->reply_queue_count = 1; 1483 r = _base_request_irq(ioc, 0, ioc->pdev->irq); 1484 1485 return r; 1486} 1487 1488/** 1489 * mpt2sas_base_map_resources - map in controller resources (io/irq/memap) 1490 * @ioc: per adapter object 1491 * 1492 * Returns 0 for success, non-zero for failure. 1493 */ 1494int 1495mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc) 1496{ 1497 struct pci_dev *pdev = ioc->pdev; 1498 u32 memap_sz; 1499 u32 pio_sz; 1500 int i, r = 0; 1501 u64 pio_chip = 0; 1502 u64 chip_phys = 0; 1503 struct adapter_reply_queue *reply_q; 1504 1505 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", 1506 ioc->name, __func__)); 1507 1508 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM); 1509 if (pci_enable_device_mem(pdev)) { 1510 printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: " 1511 "failed\n", ioc->name); 1512 ioc->bars = 0; 1513 return -ENODEV; 1514 } 1515 1516 1517 if (pci_request_selected_regions(pdev, ioc->bars, 1518 MPT2SAS_DRIVER_NAME)) { 1519 printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: " 1520 "failed\n", ioc->name); 1521 ioc->bars = 0; 1522 r = -ENODEV; 1523 goto out_fail; 1524 } 1525 1526 /* AER (Advanced Error Reporting) hooks */ 1527 pci_enable_pcie_error_reporting(pdev); 1528 1529 pci_set_master(pdev); 1530 1531 if (_base_config_dma_addressing(ioc, pdev) != 0) { 1532 printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n", 1533 ioc->name, pci_name(pdev)); 1534 r = -ENODEV; 1535 goto out_fail; 1536 } 1537 1538 for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) { 1539 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) { 1540 if (pio_sz) 1541 continue; 1542 pio_chip = (u64)pci_resource_start(pdev, i); 1543 pio_sz = pci_resource_len(pdev, i); 1544 } else { 1545 if (memap_sz) 1546 continue; 1547 /* verify memory resource is valid before using */ 1548 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 1549 ioc->chip_phys = pci_resource_start(pdev, i); 1550 chip_phys = (u64)ioc->chip_phys; 1551 memap_sz = pci_resource_len(pdev, i); 1552 ioc->chip = ioremap(ioc->chip_phys, memap_sz); 1553 if (ioc->chip == NULL) { 1554 printk(MPT2SAS_ERR_FMT "unable to map " 1555 "adapter memory!\n", ioc->name); 1556 r = -EINVAL; 1557 goto out_fail; 1558 } 1559 } 1560 } 1561 } 1562 1563 _base_mask_interrupts(ioc); 1564 1565 r = _base_get_ioc_facts(ioc, CAN_SLEEP); 1566 if (r) 1567 goto out_fail; 1568 1569 if (!ioc->rdpq_array_enable_assigned) { 1570 ioc->rdpq_array_enable = ioc->rdpq_array_capable; 1571 ioc->rdpq_array_enable_assigned = 1; 1572 } 1573 1574 r = _base_enable_msix(ioc); 1575 if (r) 1576 goto out_fail; 1577 1578 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) 1579 printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n", 1580 reply_q->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" : 1581 "IO-APIC enabled"), reply_q->vector); 1582 1583 printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n", 1584 ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz); 1585 printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n", 1586 ioc->name, (unsigned long long)pio_chip, pio_sz); 1587 1588 /* Save PCI configuration state for recovery from PCI AER/EEH errors */ 1589 pci_save_state(pdev); 1590 1591 return 0; 1592 1593 out_fail: 1594 if (ioc->chip_phys) 1595 iounmap(ioc->chip); 1596 ioc->chip_phys = 0; 1597 pci_release_selected_regions(ioc->pdev, ioc->bars); 1598 pci_disable_pcie_error_reporting(pdev); 1599 pci_disable_device(pdev); 1600 return r; 1601} 1602 1603/** 1604 * mpt2sas_base_get_msg_frame - obtain request mf pointer 1605 * @ioc: per adapter object 1606 * @smid: system request message index(smid zero is invalid) 1607 * 1608 * Returns virt pointer to message frame. 1609 */ 1610void * 1611mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1612{ 1613 return (void *)(ioc->request + (smid * ioc->request_sz)); 1614} 1615 1616/** 1617 * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request 1618 * @ioc: per adapter object 1619 * @smid: system request message index 1620 * 1621 * Returns virt pointer to sense buffer. 1622 */ 1623void * 1624mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1625{ 1626 return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE)); 1627} 1628 1629/** 1630 * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request 1631 * @ioc: per adapter object 1632 * @smid: system request message index 1633 * 1634 * Returns phys pointer to the low 32bit address of the sense buffer. 1635 */ 1636__le32 1637mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1638{ 1639 return cpu_to_le32(ioc->sense_dma + 1640 ((smid - 1) * SCSI_SENSE_BUFFERSIZE)); 1641} 1642 1643/** 1644 * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address 1645 * @ioc: per adapter object 1646 * @phys_addr: lower 32 physical addr of the reply 1647 * 1648 * Converts 32bit lower physical addr into a virt address. 1649 */ 1650void * 1651mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr) 1652{ 1653 if (!phys_addr) 1654 return NULL; 1655 return ioc->reply + (phys_addr - (u32)ioc->reply_dma); 1656} 1657 1658/** 1659 * mpt2sas_base_get_smid - obtain a free smid from internal queue 1660 * @ioc: per adapter object 1661 * @cb_idx: callback index 1662 * 1663 * Returns smid (zero is invalid) 1664 */ 1665u16 1666mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx) 1667{ 1668 unsigned long flags; 1669 struct request_tracker *request; 1670 u16 smid; 1671 1672 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1673 if (list_empty(&ioc->internal_free_list)) { 1674 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1675 printk(MPT2SAS_ERR_FMT "%s: smid not available\n", 1676 ioc->name, __func__); 1677 return 0; 1678 } 1679 1680 request = list_entry(ioc->internal_free_list.next, 1681 struct request_tracker, tracker_list); 1682 request->cb_idx = cb_idx; 1683 smid = request->smid; 1684 list_del(&request->tracker_list); 1685 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1686 return smid; 1687} 1688 1689/** 1690 * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue 1691 * @ioc: per adapter object 1692 * @cb_idx: callback index 1693 * @scmd: pointer to scsi command object 1694 * 1695 * Returns smid (zero is invalid) 1696 */ 1697u16 1698mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx, 1699 struct scsi_cmnd *scmd) 1700{ 1701 unsigned long flags; 1702 struct scsiio_tracker *request; 1703 u16 smid; 1704 1705 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1706 if (list_empty(&ioc->free_list)) { 1707 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1708 printk(MPT2SAS_ERR_FMT "%s: smid not available\n", 1709 ioc->name, __func__); 1710 return 0; 1711 } 1712 1713 request = list_entry(ioc->free_list.next, 1714 struct scsiio_tracker, tracker_list); 1715 request->scmd = scmd; 1716 request->cb_idx = cb_idx; 1717 smid = request->smid; 1718 list_del(&request->tracker_list); 1719 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1720 return smid; 1721} 1722 1723/** 1724 * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue 1725 * @ioc: per adapter object 1726 * @cb_idx: callback index 1727 * 1728 * Returns smid (zero is invalid) 1729 */ 1730u16 1731mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx) 1732{ 1733 unsigned long flags; 1734 struct request_tracker *request; 1735 u16 smid; 1736 1737 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1738 if (list_empty(&ioc->hpr_free_list)) { 1739 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1740 return 0; 1741 } 1742 1743 request = list_entry(ioc->hpr_free_list.next, 1744 struct request_tracker, tracker_list); 1745 request->cb_idx = cb_idx; 1746 smid = request->smid; 1747 list_del(&request->tracker_list); 1748 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1749 return smid; 1750} 1751 1752 1753/** 1754 * mpt2sas_base_free_smid - put smid back on free_list 1755 * @ioc: per adapter object 1756 * @smid: system request message index 1757 * 1758 * Return nothing. 1759 */ 1760void 1761mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1762{ 1763 unsigned long flags; 1764 int i; 1765 struct chain_tracker *chain_req, *next; 1766 1767 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1768 if (smid < ioc->hi_priority_smid) { 1769 /* scsiio queue */ 1770 i = smid - 1; 1771 if (!list_empty(&ioc->scsi_lookup[i].chain_list)) { 1772 list_for_each_entry_safe(chain_req, next, 1773 &ioc->scsi_lookup[i].chain_list, tracker_list) { 1774 list_del_init(&chain_req->tracker_list); 1775 list_add(&chain_req->tracker_list, 1776 &ioc->free_chain_list); 1777 } 1778 } 1779 ioc->scsi_lookup[i].cb_idx = 0xFF; 1780 ioc->scsi_lookup[i].scmd = NULL; 1781 ioc->scsi_lookup[i].direct_io = 0; 1782 list_add(&ioc->scsi_lookup[i].tracker_list, 1783 &ioc->free_list); 1784 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1785 1786 /* 1787 * See _wait_for_commands_to_complete() call with regards 1788 * to this code. 1789 */ 1790 if (ioc->shost_recovery && ioc->pending_io_count) { 1791 if (ioc->pending_io_count == 1) 1792 wake_up(&ioc->reset_wq); 1793 ioc->pending_io_count--; 1794 } 1795 return; 1796 } else if (smid < ioc->internal_smid) { 1797 /* hi-priority */ 1798 i = smid - ioc->hi_priority_smid; 1799 ioc->hpr_lookup[i].cb_idx = 0xFF; 1800 list_add(&ioc->hpr_lookup[i].tracker_list, 1801 &ioc->hpr_free_list); 1802 } else if (smid <= ioc->hba_queue_depth) { 1803 /* internal queue */ 1804 i = smid - ioc->internal_smid; 1805 ioc->internal_lookup[i].cb_idx = 0xFF; 1806 list_add(&ioc->internal_lookup[i].tracker_list, 1807 &ioc->internal_free_list); 1808 } 1809 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1810} 1811 1812/** 1813 * _base_writeq - 64 bit write to MMIO 1814 * @ioc: per adapter object 1815 * @b: data payload 1816 * @addr: address in MMIO space 1817 * @writeq_lock: spin lock 1818 * 1819 * Glue for handling an atomic 64 bit word to MMIO. This special handling takes 1820 * care of 32 bit environment where its not quarenteed to send the entire word 1821 * in one transfer. 1822 */ 1823#ifndef writeq 1824static inline void _base_writeq(__u64 b, volatile void __iomem *addr, 1825 spinlock_t *writeq_lock) 1826{ 1827 unsigned long flags; 1828 __u64 data_out = cpu_to_le64(b); 1829 1830 spin_lock_irqsave(writeq_lock, flags); 1831 writel((u32)(data_out), addr); 1832 writel((u32)(data_out >> 32), (addr + 4)); 1833 spin_unlock_irqrestore(writeq_lock, flags); 1834} 1835#else 1836static inline void _base_writeq(__u64 b, volatile void __iomem *addr, 1837 spinlock_t *writeq_lock) 1838{ 1839 writeq(cpu_to_le64(b), addr); 1840} 1841#endif 1842 1843static inline u8 1844_base_get_msix_index(struct MPT2SAS_ADAPTER *ioc) 1845{ 1846 return ioc->cpu_msix_table[raw_smp_processor_id()]; 1847} 1848 1849/** 1850 * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware 1851 * @ioc: per adapter object 1852 * @smid: system request message index 1853 * @handle: device handle 1854 * 1855 * Return nothing. 1856 */ 1857void 1858mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle) 1859{ 1860 Mpi2RequestDescriptorUnion_t descriptor; 1861 u64 *request = (u64 *)&descriptor; 1862 1863 1864 descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO; 1865 descriptor.SCSIIO.MSIxIndex = _base_get_msix_index(ioc); 1866 descriptor.SCSIIO.SMID = cpu_to_le16(smid); 1867 descriptor.SCSIIO.DevHandle = cpu_to_le16(handle); 1868 descriptor.SCSIIO.LMID = 0; 1869 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1870 &ioc->scsi_lookup_lock); 1871} 1872 1873 1874/** 1875 * mpt2sas_base_put_smid_hi_priority - send Task Management request to firmware 1876 * @ioc: per adapter object 1877 * @smid: system request message index 1878 * 1879 * Return nothing. 1880 */ 1881void 1882mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1883{ 1884 Mpi2RequestDescriptorUnion_t descriptor; 1885 u64 *request = (u64 *)&descriptor; 1886 1887 descriptor.HighPriority.RequestFlags = 1888 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY; 1889 descriptor.HighPriority.MSIxIndex = 0; 1890 descriptor.HighPriority.SMID = cpu_to_le16(smid); 1891 descriptor.HighPriority.LMID = 0; 1892 descriptor.HighPriority.Reserved1 = 0; 1893 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1894 &ioc->scsi_lookup_lock); 1895} 1896 1897/** 1898 * mpt2sas_base_put_smid_default - Default, primarily used for config pages 1899 * @ioc: per adapter object 1900 * @smid: system request message index 1901 * 1902 * Return nothing. 1903 */ 1904void 1905mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1906{ 1907 Mpi2RequestDescriptorUnion_t descriptor; 1908 u64 *request = (u64 *)&descriptor; 1909 1910 descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 1911 descriptor.Default.MSIxIndex = _base_get_msix_index(ioc); 1912 descriptor.Default.SMID = cpu_to_le16(smid); 1913 descriptor.Default.LMID = 0; 1914 descriptor.Default.DescriptorTypeDependent = 0; 1915 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1916 &ioc->scsi_lookup_lock); 1917} 1918 1919/** 1920 * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware 1921 * @ioc: per adapter object 1922 * @smid: system request message index 1923 * @io_index: value used to track the IO 1924 * 1925 * Return nothing. 1926 */ 1927void 1928mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid, 1929 u16 io_index) 1930{ 1931 Mpi2RequestDescriptorUnion_t descriptor; 1932 u64 *request = (u64 *)&descriptor; 1933 1934 descriptor.SCSITarget.RequestFlags = 1935 MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET; 1936 descriptor.SCSITarget.MSIxIndex = _base_get_msix_index(ioc); 1937 descriptor.SCSITarget.SMID = cpu_to_le16(smid); 1938 descriptor.SCSITarget.LMID = 0; 1939 descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index); 1940 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1941 &ioc->scsi_lookup_lock); 1942} 1943 1944/** 1945 * _base_display_dell_branding - Disply branding string 1946 * @ioc: per adapter object 1947 * 1948 * Return nothing. 1949 */ 1950static void 1951_base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc) 1952{ 1953 char dell_branding[MPT2SAS_DELL_BRANDING_SIZE]; 1954 1955 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL) 1956 return; 1957 1958 memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE); 1959 switch (ioc->pdev->subsystem_device) { 1960 case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID: 1961 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING, 1962 MPT2SAS_DELL_BRANDING_SIZE - 1); 1963 break; 1964 case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID: 1965 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING, 1966 MPT2SAS_DELL_BRANDING_SIZE - 1); 1967 break; 1968 case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID: 1969 strncpy(dell_branding, 1970 MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING, 1971 MPT2SAS_DELL_BRANDING_SIZE - 1); 1972 break; 1973 case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID: 1974 strncpy(dell_branding, 1975 MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING, 1976 MPT2SAS_DELL_BRANDING_SIZE - 1); 1977 break; 1978 case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID: 1979 strncpy(dell_branding, 1980 MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING, 1981 MPT2SAS_DELL_BRANDING_SIZE - 1); 1982 break; 1983 case MPT2SAS_DELL_PERC_H200_SSDID: 1984 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING, 1985 MPT2SAS_DELL_BRANDING_SIZE - 1); 1986 break; 1987 case MPT2SAS_DELL_6GBPS_SAS_SSDID: 1988 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING, 1989 MPT2SAS_DELL_BRANDING_SIZE - 1); 1990 break; 1991 default: 1992 sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device); 1993 break; 1994 } 1995 1996 printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X)," 1997 " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding, 1998 ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor, 1999 ioc->pdev->subsystem_device); 2000} 2001 2002/** 2003 * _base_display_intel_branding - Display branding string 2004 * @ioc: per adapter object 2005 * 2006 * Return nothing. 2007 */ 2008static void 2009_base_display_intel_branding(struct MPT2SAS_ADAPTER *ioc) 2010{ 2011 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL) 2012 return; 2013 2014 switch (ioc->pdev->device) { 2015 case MPI2_MFGPAGE_DEVID_SAS2008: 2016 switch (ioc->pdev->subsystem_device) { 2017 case MPT2SAS_INTEL_RMS2LL080_SSDID: 2018 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 2019 MPT2SAS_INTEL_RMS2LL080_BRANDING); 2020 break; 2021 case MPT2SAS_INTEL_RMS2LL040_SSDID: 2022 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 2023 MPT2SAS_INTEL_RMS2LL040_BRANDING); 2024 break; 2025 case MPT2SAS_INTEL_SSD910_SSDID: 2026 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 2027 MPT2SAS_INTEL_SSD910_BRANDING); 2028 break; 2029 default: 2030 break; 2031 } 2032 case MPI2_MFGPAGE_DEVID_SAS2308_2: 2033 switch (ioc->pdev->subsystem_device) { 2034 case MPT2SAS_INTEL_RS25GB008_SSDID: 2035 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 2036 MPT2SAS_INTEL_RS25GB008_BRANDING); 2037 break; 2038 case MPT2SAS_INTEL_RMS25JB080_SSDID: 2039 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 2040 MPT2SAS_INTEL_RMS25JB080_BRANDING); 2041 break; 2042 case MPT2SAS_INTEL_RMS25JB040_SSDID: 2043 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 2044 MPT2SAS_INTEL_RMS25JB040_BRANDING); 2045 break; 2046 case MPT2SAS_INTEL_RMS25KB080_SSDID: 2047 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 2048 MPT2SAS_INTEL_RMS25KB080_BRANDING); 2049 break; 2050 case MPT2SAS_INTEL_RMS25KB040_SSDID: 2051 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 2052 MPT2SAS_INTEL_RMS25KB040_BRANDING); 2053 break; 2054 case MPT2SAS_INTEL_RMS25LB040_SSDID: 2055 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 2056 MPT2SAS_INTEL_RMS25LB040_BRANDING); 2057 break; 2058 case MPT2SAS_INTEL_RMS25LB080_SSDID: 2059 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 2060 MPT2SAS_INTEL_RMS25LB080_BRANDING); 2061 break; 2062 default: 2063 break; 2064 } 2065 default: 2066 break; 2067 } 2068} 2069 2070/** 2071 * _base_display_hp_branding - Display branding string 2072 * @ioc: per adapter object 2073 * 2074 * Return nothing. 2075 */ 2076static void 2077_base_display_hp_branding(struct MPT2SAS_ADAPTER *ioc) 2078{ 2079 if (ioc->pdev->subsystem_vendor != MPT2SAS_HP_3PAR_SSVID) 2080 return; 2081 2082 switch (ioc->pdev->device) { 2083 case MPI2_MFGPAGE_DEVID_SAS2004: 2084 switch (ioc->pdev->subsystem_device) { 2085 case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID: 2086 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 2087 MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING); 2088 break; 2089 default: 2090 break; 2091 } 2092 case MPI2_MFGPAGE_DEVID_SAS2308_2: 2093 switch (ioc->pdev->subsystem_device) { 2094 case MPT2SAS_HP_2_4_INTERNAL_SSDID: 2095 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 2096 MPT2SAS_HP_2_4_INTERNAL_BRANDING); 2097 break; 2098 case MPT2SAS_HP_2_4_EXTERNAL_SSDID: 2099 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 2100 MPT2SAS_HP_2_4_EXTERNAL_BRANDING); 2101 break; 2102 case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID: 2103 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 2104 MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING); 2105 break; 2106 case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID: 2107 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 2108 MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING); 2109 break; 2110 default: 2111 break; 2112 } 2113 default: 2114 break; 2115 } 2116} 2117 2118/** 2119 * _base_display_ioc_capabilities - Disply IOC's capabilities. 2120 * @ioc: per adapter object 2121 * 2122 * Return nothing. 2123 */ 2124static void 2125_base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc) 2126{ 2127 int i = 0; 2128 char desc[16]; 2129 u32 iounit_pg1_flags; 2130 u32 bios_version; 2131 2132 bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion); 2133 strncpy(desc, ioc->manu_pg0.ChipName, 16); 2134 printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), " 2135 "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n", 2136 ioc->name, desc, 2137 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24, 2138 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16, 2139 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8, 2140 ioc->facts.FWVersion.Word & 0x000000FF, 2141 ioc->pdev->revision, 2142 (bios_version & 0xFF000000) >> 24, 2143 (bios_version & 0x00FF0000) >> 16, 2144 (bios_version & 0x0000FF00) >> 8, 2145 bios_version & 0x000000FF); 2146 2147 _base_display_dell_branding(ioc); 2148 _base_display_intel_branding(ioc); 2149 _base_display_hp_branding(ioc); 2150 2151 printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name); 2152 2153 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) { 2154 printk("Initiator"); 2155 i++; 2156 } 2157 2158 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) { 2159 printk("%sTarget", i ? "," : ""); 2160 i++; 2161 } 2162 2163 i = 0; 2164 printk("), "); 2165 printk("Capabilities=("); 2166 2167 if (!ioc->hide_ir_msg) { 2168 if (ioc->facts.IOCCapabilities & 2169 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) { 2170 printk("Raid"); 2171 i++; 2172 } 2173 } 2174 2175 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) { 2176 printk("%sTLR", i ? "," : ""); 2177 i++; 2178 } 2179 2180 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) { 2181 printk("%sMulticast", i ? "," : ""); 2182 i++; 2183 } 2184 2185 if (ioc->facts.IOCCapabilities & 2186 MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) { 2187 printk("%sBIDI Target", i ? "," : ""); 2188 i++; 2189 } 2190 2191 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) { 2192 printk("%sEEDP", i ? "," : ""); 2193 i++; 2194 } 2195 2196 if (ioc->facts.IOCCapabilities & 2197 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) { 2198 printk("%sSnapshot Buffer", i ? "," : ""); 2199 i++; 2200 } 2201 2202 if (ioc->facts.IOCCapabilities & 2203 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) { 2204 printk("%sDiag Trace Buffer", i ? "," : ""); 2205 i++; 2206 } 2207 2208 if (ioc->facts.IOCCapabilities & 2209 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) { 2210 printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : ""); 2211 i++; 2212 } 2213 2214 if (ioc->facts.IOCCapabilities & 2215 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) { 2216 printk("%sTask Set Full", i ? "," : ""); 2217 i++; 2218 } 2219 2220 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags); 2221 if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) { 2222 printk("%sNCQ", i ? "," : ""); 2223 i++; 2224 } 2225 2226 printk(")\n"); 2227} 2228 2229/** 2230 * mpt2sas_base_update_missing_delay - change the missing delay timers 2231 * @ioc: per adapter object 2232 * @device_missing_delay: amount of time till device is reported missing 2233 * @io_missing_delay: interval IO is returned when there is a missing device 2234 * 2235 * Return nothing. 2236 * 2237 * Passed on the command line, this function will modify the device missing 2238 * delay, as well as the io missing delay. This should be called at driver 2239 * load time. 2240 */ 2241void 2242mpt2sas_base_update_missing_delay(struct MPT2SAS_ADAPTER *ioc, 2243 u16 device_missing_delay, u8 io_missing_delay) 2244{ 2245 u16 dmd, dmd_new, dmd_orignal; 2246 u8 io_missing_delay_original; 2247 u16 sz; 2248 Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL; 2249 Mpi2ConfigReply_t mpi_reply; 2250 u8 num_phys = 0; 2251 u16 ioc_status; 2252 2253 mpt2sas_config_get_number_hba_phys(ioc, &num_phys); 2254 if (!num_phys) 2255 return; 2256 2257 sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys * 2258 sizeof(Mpi2SasIOUnit1PhyData_t)); 2259 sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL); 2260 if (!sas_iounit_pg1) { 2261 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n", 2262 ioc->name, __FILE__, __LINE__, __func__); 2263 goto out; 2264 } 2265 if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply, 2266 sas_iounit_pg1, sz))) { 2267 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n", 2268 ioc->name, __FILE__, __LINE__, __func__); 2269 goto out; 2270 } 2271 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & 2272 MPI2_IOCSTATUS_MASK; 2273 if (ioc_status != MPI2_IOCSTATUS_SUCCESS) { 2274 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n", 2275 ioc->name, __FILE__, __LINE__, __func__); 2276 goto out; 2277 } 2278 2279 /* device missing delay */ 2280 dmd = sas_iounit_pg1->ReportDeviceMissingDelay; 2281 if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16) 2282 dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16; 2283 else 2284 dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK; 2285 dmd_orignal = dmd; 2286 if (device_missing_delay > 0x7F) { 2287 dmd = (device_missing_delay > 0x7F0) ? 0x7F0 : 2288 device_missing_delay; 2289 dmd = dmd / 16; 2290 dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16; 2291 } else 2292 dmd = device_missing_delay; 2293 sas_iounit_pg1->ReportDeviceMissingDelay = dmd; 2294 2295 /* io missing delay */ 2296 io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay; 2297 sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay; 2298 2299 if (!mpt2sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1, 2300 sz)) { 2301 if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16) 2302 dmd_new = (dmd & 2303 MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16; 2304 else 2305 dmd_new = 2306 dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK; 2307 printk(MPT2SAS_INFO_FMT "device_missing_delay: old(%d), " 2308 "new(%d)\n", ioc->name, dmd_orignal, dmd_new); 2309 printk(MPT2SAS_INFO_FMT "ioc_missing_delay: old(%d), " 2310 "new(%d)\n", ioc->name, io_missing_delay_original, 2311 io_missing_delay); 2312 ioc->device_missing_delay = dmd_new; 2313 ioc->io_missing_delay = io_missing_delay; 2314 } 2315 2316out: 2317 kfree(sas_iounit_pg1); 2318} 2319 2320/** 2321 * _base_static_config_pages - static start of day config pages 2322 * @ioc: per adapter object 2323 * 2324 * Return nothing. 2325 */ 2326static void 2327_base_static_config_pages(struct MPT2SAS_ADAPTER *ioc) 2328{ 2329 Mpi2ConfigReply_t mpi_reply; 2330 u32 iounit_pg1_flags; 2331 2332 mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0); 2333 if (ioc->ir_firmware) 2334 mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply, 2335 &ioc->manu_pg10); 2336 mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2); 2337 mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3); 2338 mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8); 2339 mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0); 2340 mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1); 2341 _base_display_ioc_capabilities(ioc); 2342 2343 /* 2344 * Enable task_set_full handling in iounit_pg1 when the 2345 * facts capabilities indicate that its supported. 2346 */ 2347 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags); 2348 if ((ioc->facts.IOCCapabilities & 2349 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING)) 2350 iounit_pg1_flags &= 2351 ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING; 2352 else 2353 iounit_pg1_flags |= 2354 MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING; 2355 ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags); 2356 mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1); 2357 2358} 2359 2360/** 2361 * _base_release_memory_pools - release memory 2362 * @ioc: per adapter object 2363 * 2364 * Free memory allocated from _base_allocate_memory_pools. 2365 * 2366 * Return nothing. 2367 */ 2368static void 2369_base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc) 2370{ 2371 int i = 0; 2372 struct reply_post_struct *rps; 2373 2374 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 2375 __func__)); 2376 2377 if (ioc->request) { 2378 pci_free_consistent(ioc->pdev, ioc->request_dma_sz, 2379 ioc->request, ioc->request_dma); 2380 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)" 2381 ": free\n", ioc->name, ioc->request)); 2382 ioc->request = NULL; 2383 } 2384 2385 if (ioc->sense) { 2386 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma); 2387 if (ioc->sense_dma_pool) 2388 pci_pool_destroy(ioc->sense_dma_pool); 2389 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)" 2390 ": free\n", ioc->name, ioc->sense)); 2391 ioc->sense = NULL; 2392 } 2393 2394 if (ioc->reply) { 2395 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma); 2396 if (ioc->reply_dma_pool) 2397 pci_pool_destroy(ioc->reply_dma_pool); 2398 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)" 2399 ": free\n", ioc->name, ioc->reply)); 2400 ioc->reply = NULL; 2401 } 2402 2403 if (ioc->reply_free) { 2404 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free, 2405 ioc->reply_free_dma); 2406 if (ioc->reply_free_dma_pool) 2407 pci_pool_destroy(ioc->reply_free_dma_pool); 2408 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool" 2409 "(0x%p): free\n", ioc->name, ioc->reply_free)); 2410 ioc->reply_free = NULL; 2411 } 2412 2413 if (ioc->reply_post) { 2414 do { 2415 rps = &ioc->reply_post[i]; 2416 if (rps->reply_post_free) { 2417 pci_pool_free( 2418 ioc->reply_post_free_dma_pool, 2419 rps->reply_post_free, 2420 rps->reply_post_free_dma); 2421 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT 2422 "reply_post_free_pool(0x%p): free\n", 2423 ioc->name, rps->reply_post_free)); 2424 rps->reply_post_free = NULL; 2425 } 2426 } while (ioc->rdpq_array_enable && 2427 (++i < ioc->reply_queue_count)); 2428 2429 if (ioc->reply_post_free_dma_pool) 2430 pci_pool_destroy(ioc->reply_post_free_dma_pool); 2431 kfree(ioc->reply_post); 2432 } 2433 2434 if (ioc->config_page) { 2435 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT 2436 "config_page(0x%p): free\n", ioc->name, 2437 ioc->config_page)); 2438 pci_free_consistent(ioc->pdev, ioc->config_page_sz, 2439 ioc->config_page, ioc->config_page_dma); 2440 } 2441 2442 if (ioc->scsi_lookup) { 2443 free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages); 2444 ioc->scsi_lookup = NULL; 2445 } 2446 kfree(ioc->hpr_lookup); 2447 kfree(ioc->internal_lookup); 2448 if (ioc->chain_lookup) { 2449 for (i = 0; i < ioc->chain_depth; i++) { 2450 if (ioc->chain_lookup[i].chain_buffer) 2451 pci_pool_free(ioc->chain_dma_pool, 2452 ioc->chain_lookup[i].chain_buffer, 2453 ioc->chain_lookup[i].chain_buffer_dma); 2454 } 2455 if (ioc->chain_dma_pool) 2456 pci_pool_destroy(ioc->chain_dma_pool); 2457 free_pages((ulong)ioc->chain_lookup, ioc->chain_pages); 2458 ioc->chain_lookup = NULL; 2459 } 2460} 2461 2462 2463/** 2464 * _base_allocate_memory_pools - allocate start of day memory pools 2465 * @ioc: per adapter object 2466 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2467 * 2468 * Returns 0 success, anything else error 2469 */ 2470static int 2471_base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 2472{ 2473 struct mpt2sas_facts *facts; 2474 u16 max_sge_elements; 2475 u16 chains_needed_per_io; 2476 u32 sz, total_sz, reply_post_free_sz; 2477 u32 retry_sz; 2478 u16 max_request_credit; 2479 int i; 2480 2481 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 2482 __func__)); 2483 2484 retry_sz = 0; 2485 facts = &ioc->facts; 2486 2487 /* command line tunables for max sgl entries */ 2488 if (max_sgl_entries != -1) { 2489 ioc->shost->sg_tablesize = (max_sgl_entries < 2490 MPT2SAS_SG_DEPTH) ? max_sgl_entries : 2491 MPT2SAS_SG_DEPTH; 2492 } else { 2493 ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH; 2494 } 2495 2496 /* command line tunables for max controller queue depth */ 2497 if (max_queue_depth != -1 && max_queue_depth != 0) { 2498 max_request_credit = min_t(u16, max_queue_depth + 2499 ioc->hi_priority_depth + ioc->internal_depth, 2500 facts->RequestCredit); 2501 if (max_request_credit > MAX_HBA_QUEUE_DEPTH) 2502 max_request_credit = MAX_HBA_QUEUE_DEPTH; 2503 } else 2504 max_request_credit = min_t(u16, facts->RequestCredit, 2505 MAX_HBA_QUEUE_DEPTH); 2506 2507 ioc->hba_queue_depth = max_request_credit; 2508 ioc->hi_priority_depth = facts->HighPriorityCredit; 2509 ioc->internal_depth = ioc->hi_priority_depth + 5; 2510 2511 /* request frame size */ 2512 ioc->request_sz = facts->IOCRequestFrameSize * 4; 2513 2514 /* reply frame size */ 2515 ioc->reply_sz = facts->ReplyFrameSize * 4; 2516 2517 retry_allocation: 2518 total_sz = 0; 2519 /* calculate number of sg elements left over in the 1st frame */ 2520 max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) - 2521 sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size); 2522 ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size; 2523 2524 /* now do the same for a chain buffer */ 2525 max_sge_elements = ioc->request_sz - ioc->sge_size; 2526 ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size; 2527 2528 ioc->chain_offset_value_for_main_message = 2529 ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) + 2530 (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4; 2531 2532 /* 2533 * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE 2534 */ 2535 chains_needed_per_io = ((ioc->shost->sg_tablesize - 2536 ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message) 2537 + 1; 2538 if (chains_needed_per_io > facts->MaxChainDepth) { 2539 chains_needed_per_io = facts->MaxChainDepth; 2540 ioc->shost->sg_tablesize = min_t(u16, 2541 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message 2542 * chains_needed_per_io), ioc->shost->sg_tablesize); 2543 } 2544 ioc->chains_needed_per_io = chains_needed_per_io; 2545 2546 /* reply free queue sizing - taking into account for 64 FW events */ 2547 ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64; 2548 2549 /* calculate reply descriptor post queue depth */ 2550 ioc->reply_post_queue_depth = ioc->hba_queue_depth + 2551 ioc->reply_free_queue_depth + 1; 2552 /* align the reply post queue on the next 16 count boundary */ 2553 if (ioc->reply_post_queue_depth % 16) 2554 ioc->reply_post_queue_depth += 16 - 2555 (ioc->reply_post_queue_depth % 16); 2556 2557 2558 if (ioc->reply_post_queue_depth > 2559 facts->MaxReplyDescriptorPostQueueDepth) { 2560 ioc->reply_post_queue_depth = 2561 facts->MaxReplyDescriptorPostQueueDepth - 2562 (facts->MaxReplyDescriptorPostQueueDepth % 16); 2563 ioc->hba_queue_depth = 2564 ((ioc->reply_post_queue_depth - 64) / 2) - 1; 2565 ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64; 2566 } 2567 2568 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: " 2569 "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), " 2570 "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message, 2571 ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize, 2572 ioc->chains_needed_per_io)); 2573 2574 /* reply post queue, 16 byte align */ 2575 reply_post_free_sz = ioc->reply_post_queue_depth * 2576 sizeof(Mpi2DefaultReplyDescriptor_t); 2577 2578 sz = reply_post_free_sz; 2579 if (_base_is_controller_msix_enabled(ioc) && !ioc->rdpq_array_enable) 2580 sz *= ioc->reply_queue_count; 2581 2582 ioc->reply_post = kcalloc((ioc->rdpq_array_enable) ? 2583 (ioc->reply_queue_count):1, 2584 sizeof(struct reply_post_struct), GFP_KERNEL); 2585 2586 if (!ioc->reply_post) { 2587 printk(MPT2SAS_ERR_FMT "reply_post_free pool: kcalloc failed\n", 2588 ioc->name); 2589 goto out; 2590 } 2591 ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool", 2592 ioc->pdev, sz, 16, 0); 2593 if (!ioc->reply_post_free_dma_pool) { 2594 printk(MPT2SAS_ERR_FMT 2595 "reply_post_free pool: pci_pool_create failed\n", 2596 ioc->name); 2597 goto out; 2598 } 2599 i = 0; 2600 do { 2601 ioc->reply_post[i].reply_post_free = 2602 pci_pool_alloc(ioc->reply_post_free_dma_pool, 2603 GFP_KERNEL, 2604 &ioc->reply_post[i].reply_post_free_dma); 2605 if (!ioc->reply_post[i].reply_post_free) { 2606 printk(MPT2SAS_ERR_FMT 2607 "reply_post_free pool: pci_pool_alloc failed\n", 2608 ioc->name); 2609 goto out; 2610 } 2611 memset(ioc->reply_post[i].reply_post_free, 0, sz); 2612 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT 2613 "reply post free pool (0x%p): depth(%d)," 2614 "element_size(%d), pool_size(%d kB)\n", ioc->name, 2615 ioc->reply_post[i].reply_post_free, 2616 ioc->reply_post_queue_depth, 8, sz/1024)); 2617 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT 2618 "reply_post_free_dma = (0x%llx)\n", ioc->name, 2619 (unsigned long long) 2620 ioc->reply_post[i].reply_post_free_dma)); 2621 total_sz += sz; 2622 } while (ioc->rdpq_array_enable && (++i < ioc->reply_queue_count)); 2623 2624 if (ioc->dma_mask == 64) { 2625 if (_base_change_consistent_dma_mask(ioc, ioc->pdev) != 0) { 2626 printk(MPT2SAS_WARN_FMT 2627 "no suitable consistent DMA mask for %s\n", 2628 ioc->name, pci_name(ioc->pdev)); 2629 goto out; 2630 } 2631 } 2632 2633 ioc->scsiio_depth = ioc->hba_queue_depth - 2634 ioc->hi_priority_depth - ioc->internal_depth; 2635 2636 /* set the scsi host can_queue depth 2637 * with some internal commands that could be outstanding 2638 */ 2639 ioc->shost->can_queue = ioc->scsiio_depth; 2640 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: " 2641 "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue)); 2642 2643 /* contiguous pool for request and chains, 16 byte align, one extra " 2644 * "frame for smid=0 2645 */ 2646 ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth; 2647 sz = ((ioc->scsiio_depth + 1) * ioc->request_sz); 2648 2649 /* hi-priority queue */ 2650 sz += (ioc->hi_priority_depth * ioc->request_sz); 2651 2652 /* internal queue */ 2653 sz += (ioc->internal_depth * ioc->request_sz); 2654 2655 ioc->request_dma_sz = sz; 2656 ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma); 2657 if (!ioc->request) { 2658 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent " 2659 "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), " 2660 "total(%d kB)\n", ioc->name, ioc->hba_queue_depth, 2661 ioc->chains_needed_per_io, ioc->request_sz, sz/1024); 2662 if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH) 2663 goto out; 2664 retry_sz += 64; 2665 ioc->hba_queue_depth = max_request_credit - retry_sz; 2666 goto retry_allocation; 2667 } 2668 2669 if (retry_sz) 2670 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent " 2671 "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), " 2672 "total(%d kb)\n", ioc->name, ioc->hba_queue_depth, 2673 ioc->chains_needed_per_io, ioc->request_sz, sz/1024); 2674 2675 2676 /* hi-priority queue */ 2677 ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) * 2678 ioc->request_sz); 2679 ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) * 2680 ioc->request_sz); 2681 2682 /* internal queue */ 2683 ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth * 2684 ioc->request_sz); 2685 ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth * 2686 ioc->request_sz); 2687 2688 2689 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): " 2690 "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, 2691 ioc->request, ioc->hba_queue_depth, ioc->request_sz, 2692 (ioc->hba_queue_depth * ioc->request_sz)/1024)); 2693 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n", 2694 ioc->name, (unsigned long long) ioc->request_dma)); 2695 total_sz += sz; 2696 2697 sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker); 2698 ioc->scsi_lookup_pages = get_order(sz); 2699 ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages( 2700 GFP_KERNEL, ioc->scsi_lookup_pages); 2701 if (!ioc->scsi_lookup) { 2702 printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, " 2703 "sz(%d)\n", ioc->name, (int)sz); 2704 goto out; 2705 } 2706 2707 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): " 2708 "depth(%d)\n", ioc->name, ioc->request, 2709 ioc->scsiio_depth)); 2710 2711 ioc->chain_depth = min_t(u32, ioc->chain_depth, MAX_CHAIN_DEPTH); 2712 sz = ioc->chain_depth * sizeof(struct chain_tracker); 2713 ioc->chain_pages = get_order(sz); 2714 2715 ioc->chain_lookup = (struct chain_tracker *)__get_free_pages( 2716 GFP_KERNEL, ioc->chain_pages); 2717 if (!ioc->chain_lookup) { 2718 printk(MPT2SAS_ERR_FMT "chain_lookup: get_free_pages failed, " 2719 "sz(%d)\n", ioc->name, (int)sz); 2720 goto out; 2721 } 2722 ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev, 2723 ioc->request_sz, 16, 0); 2724 if (!ioc->chain_dma_pool) { 2725 printk(MPT2SAS_ERR_FMT "chain_dma_pool: pci_pool_create " 2726 "failed\n", ioc->name); 2727 goto out; 2728 } 2729 for (i = 0; i < ioc->chain_depth; i++) { 2730 ioc->chain_lookup[i].chain_buffer = pci_pool_alloc( 2731 ioc->chain_dma_pool , GFP_KERNEL, 2732 &ioc->chain_lookup[i].chain_buffer_dma); 2733 if (!ioc->chain_lookup[i].chain_buffer) { 2734 ioc->chain_depth = i; 2735 goto chain_done; 2736 } 2737 total_sz += ioc->request_sz; 2738 } 2739chain_done: 2740 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool depth" 2741 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, 2742 ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth * 2743 ioc->request_sz))/1024)); 2744 2745 /* initialize hi-priority queue smid's */ 2746 ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth, 2747 sizeof(struct request_tracker), GFP_KERNEL); 2748 if (!ioc->hpr_lookup) { 2749 printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n", 2750 ioc->name); 2751 goto out; 2752 } 2753 ioc->hi_priority_smid = ioc->scsiio_depth + 1; 2754 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): " 2755 "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority, 2756 ioc->hi_priority_depth, ioc->hi_priority_smid)); 2757 2758 /* initialize internal queue smid's */ 2759 ioc->internal_lookup = kcalloc(ioc->internal_depth, 2760 sizeof(struct request_tracker), GFP_KERNEL); 2761 if (!ioc->internal_lookup) { 2762 printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n", 2763 ioc->name); 2764 goto out; 2765 } 2766 ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth; 2767 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): " 2768 "depth(%d), start smid(%d)\n", ioc->name, ioc->internal, 2769 ioc->internal_depth, ioc->internal_smid)); 2770 2771 /* sense buffers, 4 byte align */ 2772 sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE; 2773 ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4, 2774 0); 2775 if (!ioc->sense_dma_pool) { 2776 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n", 2777 ioc->name); 2778 goto out; 2779 } 2780 ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL, 2781 &ioc->sense_dma); 2782 if (!ioc->sense) { 2783 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n", 2784 ioc->name); 2785 goto out; 2786 } 2787 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT 2788 "sense pool(0x%p): depth(%d), element_size(%d), pool_size" 2789 "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth, 2790 SCSI_SENSE_BUFFERSIZE, sz/1024)); 2791 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n", 2792 ioc->name, (unsigned long long)ioc->sense_dma)); 2793 total_sz += sz; 2794 2795 /* reply pool, 4 byte align */ 2796 sz = ioc->reply_free_queue_depth * ioc->reply_sz; 2797 ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4, 2798 0); 2799 if (!ioc->reply_dma_pool) { 2800 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n", 2801 ioc->name); 2802 goto out; 2803 } 2804 ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL, 2805 &ioc->reply_dma); 2806 if (!ioc->reply) { 2807 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n", 2808 ioc->name); 2809 goto out; 2810 } 2811 ioc->reply_dma_min_address = (u32)(ioc->reply_dma); 2812 ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz; 2813 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth" 2814 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply, 2815 ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024)); 2816 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n", 2817 ioc->name, (unsigned long long)ioc->reply_dma)); 2818 total_sz += sz; 2819 2820 /* reply free queue, 16 byte align */ 2821 sz = ioc->reply_free_queue_depth * 4; 2822 ioc->reply_free_dma_pool = pci_pool_create("reply_free pool", 2823 ioc->pdev, sz, 16, 0); 2824 if (!ioc->reply_free_dma_pool) { 2825 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create " 2826 "failed\n", ioc->name); 2827 goto out; 2828 } 2829 ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL, 2830 &ioc->reply_free_dma); 2831 if (!ioc->reply_free) { 2832 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc " 2833 "failed\n", ioc->name); 2834 goto out; 2835 } 2836 memset(ioc->reply_free, 0, sz); 2837 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): " 2838 "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name, 2839 ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024)); 2840 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma" 2841 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma)); 2842 total_sz += sz; 2843 2844 ioc->config_page_sz = 512; 2845 ioc->config_page = pci_alloc_consistent(ioc->pdev, 2846 ioc->config_page_sz, &ioc->config_page_dma); 2847 if (!ioc->config_page) { 2848 printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc " 2849 "failed\n", ioc->name); 2850 goto out; 2851 } 2852 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size" 2853 "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz)); 2854 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma" 2855 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma)); 2856 total_sz += ioc->config_page_sz; 2857 2858 printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n", 2859 ioc->name, total_sz/1024); 2860 printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), " 2861 "Max Controller Queue Depth(%d)\n", 2862 ioc->name, ioc->shost->can_queue, facts->RequestCredit); 2863 printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n", 2864 ioc->name, ioc->shost->sg_tablesize); 2865 return 0; 2866 2867 out: 2868 return -ENOMEM; 2869} 2870 2871 2872/** 2873 * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter. 2874 * @ioc: Pointer to MPT_ADAPTER structure 2875 * @cooked: Request raw or cooked IOC state 2876 * 2877 * Returns all IOC Doorbell register bits if cooked==0, else just the 2878 * Doorbell bits in MPI_IOC_STATE_MASK. 2879 */ 2880u32 2881mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked) 2882{ 2883 u32 s, sc; 2884 2885 s = readl(&ioc->chip->Doorbell); 2886 sc = s & MPI2_IOC_STATE_MASK; 2887 return cooked ? sc : s; 2888} 2889 2890/** 2891 * _base_wait_on_iocstate - waiting on a particular ioc state 2892 * @ioc_state: controller state { READY, OPERATIONAL, or RESET } 2893 * @timeout: timeout in second 2894 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2895 * 2896 * Returns 0 for success, non-zero for failure. 2897 */ 2898static int 2899_base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout, 2900 int sleep_flag) 2901{ 2902 u32 count, cntdn; 2903 u32 current_state; 2904 2905 count = 0; 2906 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2907 do { 2908 current_state = mpt2sas_base_get_iocstate(ioc, 1); 2909 if (current_state == ioc_state) 2910 return 0; 2911 if (count && current_state == MPI2_IOC_STATE_FAULT) 2912 break; 2913 if (sleep_flag == CAN_SLEEP) 2914 msleep(1); 2915 else 2916 udelay(500); 2917 count++; 2918 } while (--cntdn); 2919 2920 return current_state; 2921} 2922 2923/** 2924 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by 2925 * a write to the doorbell) 2926 * @ioc: per adapter object 2927 * @timeout: timeout in second 2928 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2929 * 2930 * Returns 0 for success, non-zero for failure. 2931 * 2932 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell. 2933 */ 2934static int 2935_base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout, 2936 int sleep_flag) 2937{ 2938 u32 cntdn, count; 2939 u32 int_status; 2940 2941 count = 0; 2942 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2943 do { 2944 int_status = readl(&ioc->chip->HostInterruptStatus); 2945 if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 2946 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: " 2947 "successful count(%d), timeout(%d)\n", ioc->name, 2948 __func__, count, timeout)); 2949 return 0; 2950 } 2951 if (sleep_flag == CAN_SLEEP) 2952 msleep(1); 2953 else 2954 udelay(500); 2955 count++; 2956 } while (--cntdn); 2957 2958 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2959 "int_status(%x)!\n", ioc->name, __func__, count, int_status); 2960 return -EFAULT; 2961} 2962 2963/** 2964 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell. 2965 * @ioc: per adapter object 2966 * @timeout: timeout in second 2967 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2968 * 2969 * Returns 0 for success, non-zero for failure. 2970 * 2971 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to 2972 * doorbell. 2973 */ 2974static int 2975_base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout, 2976 int sleep_flag) 2977{ 2978 u32 cntdn, count; 2979 u32 int_status; 2980 u32 doorbell; 2981 2982 count = 0; 2983 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2984 do { 2985 int_status = readl(&ioc->chip->HostInterruptStatus); 2986 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) { 2987 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: " 2988 "successful count(%d), timeout(%d)\n", ioc->name, 2989 __func__, count, timeout)); 2990 return 0; 2991 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 2992 doorbell = readl(&ioc->chip->Doorbell); 2993 if ((doorbell & MPI2_IOC_STATE_MASK) == 2994 MPI2_IOC_STATE_FAULT) { 2995 mpt2sas_base_fault_info(ioc , doorbell); 2996 return -EFAULT; 2997 } 2998 } else if (int_status == 0xFFFFFFFF) 2999 goto out; 3000 3001 if (sleep_flag == CAN_SLEEP) 3002 msleep(1); 3003 else 3004 udelay(500); 3005 count++; 3006 } while (--cntdn); 3007 3008 out: 3009 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 3010 "int_status(%x)!\n", ioc->name, __func__, count, int_status); 3011 return -EFAULT; 3012} 3013 3014/** 3015 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use 3016 * @ioc: per adapter object 3017 * @timeout: timeout in second 3018 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3019 * 3020 * Returns 0 for success, non-zero for failure. 3021 * 3022 */ 3023static int 3024_base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout, 3025 int sleep_flag) 3026{ 3027 u32 cntdn, count; 3028 u32 doorbell_reg; 3029 3030 count = 0; 3031 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 3032 do { 3033 doorbell_reg = readl(&ioc->chip->Doorbell); 3034 if (!(doorbell_reg & MPI2_DOORBELL_USED)) { 3035 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: " 3036 "successful count(%d), timeout(%d)\n", ioc->name, 3037 __func__, count, timeout)); 3038 return 0; 3039 } 3040 if (sleep_flag == CAN_SLEEP) 3041 msleep(1); 3042 else 3043 udelay(500); 3044 count++; 3045 } while (--cntdn); 3046 3047 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 3048 "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg); 3049 return -EFAULT; 3050} 3051 3052/** 3053 * _base_send_ioc_reset - send doorbell reset 3054 * @ioc: per adapter object 3055 * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET 3056 * @timeout: timeout in second 3057 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3058 * 3059 * Returns 0 for success, non-zero for failure. 3060 */ 3061static int 3062_base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout, 3063 int sleep_flag) 3064{ 3065 u32 ioc_state; 3066 int r = 0; 3067 3068 if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) { 3069 printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n", 3070 ioc->name, __func__); 3071 return -EFAULT; 3072 } 3073 3074 if (!(ioc->facts.IOCCapabilities & 3075 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY)) 3076 return -EFAULT; 3077 3078 printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name); 3079 3080 writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT, 3081 &ioc->chip->Doorbell); 3082 if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) { 3083 r = -EFAULT; 3084 goto out; 3085 } 3086 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 3087 timeout, sleep_flag); 3088 if (ioc_state) { 3089 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state " 3090 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 3091 r = -EFAULT; 3092 goto out; 3093 } 3094 out: 3095 printk(MPT2SAS_INFO_FMT "message unit reset: %s\n", 3096 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED")); 3097 return r; 3098} 3099 3100/** 3101 * _base_handshake_req_reply_wait - send request thru doorbell interface 3102 * @ioc: per adapter object 3103 * @request_bytes: request length 3104 * @request: pointer having request payload 3105 * @reply_bytes: reply length 3106 * @reply: pointer to reply payload 3107 * @timeout: timeout in second 3108 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3109 * 3110 * Returns 0 for success, non-zero for failure. 3111 */ 3112static int 3113_base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes, 3114 u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag) 3115{ 3116 MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply; 3117 int i; 3118 u8 failed; 3119 u16 dummy; 3120 __le32 *mfp; 3121 3122 /* make sure doorbell is not in use */ 3123 if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) { 3124 printk(MPT2SAS_ERR_FMT "doorbell is in use " 3125 " (line=%d)\n", ioc->name, __LINE__); 3126 return -EFAULT; 3127 } 3128 3129 /* clear pending doorbell interrupts from previous state changes */ 3130 if (readl(&ioc->chip->HostInterruptStatus) & 3131 MPI2_HIS_IOC2SYS_DB_STATUS) 3132 writel(0, &ioc->chip->HostInterruptStatus); 3133 3134 /* send message to ioc */ 3135 writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) | 3136 ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)), 3137 &ioc->chip->Doorbell); 3138 3139 if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) { 3140 printk(MPT2SAS_ERR_FMT "doorbell handshake " 3141 "int failed (line=%d)\n", ioc->name, __LINE__); 3142 return -EFAULT; 3143 } 3144 writel(0, &ioc->chip->HostInterruptStatus); 3145 3146 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) { 3147 printk(MPT2SAS_ERR_FMT "doorbell handshake " 3148 "ack failed (line=%d)\n", ioc->name, __LINE__); 3149 return -EFAULT; 3150 } 3151 3152 /* send message 32-bits at a time */ 3153 for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) { 3154 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell); 3155 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) 3156 failed = 1; 3157 } 3158 3159 if (failed) { 3160 printk(MPT2SAS_ERR_FMT "doorbell handshake " 3161 "sending request failed (line=%d)\n", ioc->name, __LINE__); 3162 return -EFAULT; 3163 } 3164 3165 /* now wait for the reply */ 3166 if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) { 3167 printk(MPT2SAS_ERR_FMT "doorbell handshake " 3168 "int failed (line=%d)\n", ioc->name, __LINE__); 3169 return -EFAULT; 3170 } 3171 3172 /* read the first two 16-bits, it gives the total length of the reply */ 3173 reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell) 3174 & MPI2_DOORBELL_DATA_MASK); 3175 writel(0, &ioc->chip->HostInterruptStatus); 3176 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) { 3177 printk(MPT2SAS_ERR_FMT "doorbell handshake " 3178 "int failed (line=%d)\n", ioc->name, __LINE__); 3179 return -EFAULT; 3180 } 3181 reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell) 3182 & MPI2_DOORBELL_DATA_MASK); 3183 writel(0, &ioc->chip->HostInterruptStatus); 3184 3185 for (i = 2; i < default_reply->MsgLength * 2; i++) { 3186 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) { 3187 printk(MPT2SAS_ERR_FMT "doorbell " 3188 "handshake int failed (line=%d)\n", ioc->name, 3189 __LINE__); 3190 return -EFAULT; 3191 } 3192 if (i >= reply_bytes/2) /* overflow case */ 3193 dummy = readl(&ioc->chip->Doorbell); 3194 else 3195 reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell) 3196 & MPI2_DOORBELL_DATA_MASK); 3197 writel(0, &ioc->chip->HostInterruptStatus); 3198 } 3199 3200 _base_wait_for_doorbell_int(ioc, 5, sleep_flag); 3201 if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) { 3202 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use " 3203 " (line=%d)\n", ioc->name, __LINE__)); 3204 } 3205 writel(0, &ioc->chip->HostInterruptStatus); 3206 3207 if (ioc->logging_level & MPT_DEBUG_INIT) { 3208 mfp = (__le32 *)reply; 3209 printk(KERN_INFO "\toffset:data\n"); 3210 for (i = 0; i < reply_bytes/4; i++) 3211 printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4, 3212 le32_to_cpu(mfp[i])); 3213 } 3214 return 0; 3215} 3216 3217/** 3218 * mpt2sas_base_sas_iounit_control - send sas iounit control to FW 3219 * @ioc: per adapter object 3220 * @mpi_reply: the reply payload from FW 3221 * @mpi_request: the request payload sent to FW 3222 * 3223 * The SAS IO Unit Control Request message allows the host to perform low-level 3224 * operations, such as resets on the PHYs of the IO Unit, also allows the host 3225 * to obtain the IOC assigned device handles for a device if it has other 3226 * identifying information about the device, in addition allows the host to 3227 * remove IOC resources associated with the device. 3228 * 3229 * Returns 0 for success, non-zero for failure. 3230 */ 3231int 3232mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc, 3233 Mpi2SasIoUnitControlReply_t *mpi_reply, 3234 Mpi2SasIoUnitControlRequest_t *mpi_request) 3235{ 3236 u16 smid; 3237 u32 ioc_state; 3238 unsigned long timeleft; 3239 u8 issue_reset; 3240 int rc; 3241 void *request; 3242 u16 wait_state_count; 3243 3244 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 3245 __func__)); 3246 3247 mutex_lock(&ioc->base_cmds.mutex); 3248 3249 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) { 3250 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n", 3251 ioc->name, __func__); 3252 rc = -EAGAIN; 3253 goto out; 3254 } 3255 3256 wait_state_count = 0; 3257 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 3258 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) { 3259 if (wait_state_count++ == 10) { 3260 printk(MPT2SAS_ERR_FMT 3261 "%s: failed due to ioc not operational\n", 3262 ioc->name, __func__); 3263 rc = -EFAULT; 3264 goto out; 3265 } 3266 ssleep(1); 3267 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 3268 printk(MPT2SAS_INFO_FMT "%s: waiting for " 3269 "operational state(count=%d)\n", ioc->name, 3270 __func__, wait_state_count); 3271 } 3272 3273 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 3274 if (!smid) { 3275 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 3276 ioc->name, __func__); 3277 rc = -EAGAIN; 3278 goto out; 3279 } 3280 3281 rc = 0; 3282 ioc->base_cmds.status = MPT2_CMD_PENDING; 3283 request = mpt2sas_base_get_msg_frame(ioc, smid); 3284 ioc->base_cmds.smid = smid; 3285 memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t)); 3286 if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET || 3287 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) 3288 ioc->ioc_link_reset_in_progress = 1; 3289 init_completion(&ioc->base_cmds.done); 3290 mpt2sas_base_put_smid_default(ioc, smid); 3291 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 3292 msecs_to_jiffies(10000)); 3293 if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET || 3294 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) && 3295 ioc->ioc_link_reset_in_progress) 3296 ioc->ioc_link_reset_in_progress = 0; 3297 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 3298 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 3299 ioc->name, __func__); 3300 _debug_dump_mf(mpi_request, 3301 sizeof(Mpi2SasIoUnitControlRequest_t)/4); 3302 if (!(ioc->base_cmds.status & MPT2_CMD_RESET)) 3303 issue_reset = 1; 3304 goto issue_host_reset; 3305 } 3306 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID) 3307 memcpy(mpi_reply, ioc->base_cmds.reply, 3308 sizeof(Mpi2SasIoUnitControlReply_t)); 3309 else 3310 memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t)); 3311 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 3312 goto out; 3313 3314 issue_host_reset: 3315 if (issue_reset) 3316 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 3317 FORCE_BIG_HAMMER); 3318 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 3319 rc = -EFAULT; 3320 out: 3321 mutex_unlock(&ioc->base_cmds.mutex); 3322 return rc; 3323} 3324 3325 3326/** 3327 * mpt2sas_base_scsi_enclosure_processor - sending request to sep device 3328 * @ioc: per adapter object 3329 * @mpi_reply: the reply payload from FW 3330 * @mpi_request: the request payload sent to FW 3331 * 3332 * The SCSI Enclosure Processor request message causes the IOC to 3333 * communicate with SES devices to control LED status signals. 3334 * 3335 * Returns 0 for success, non-zero for failure. 3336 */ 3337int 3338mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc, 3339 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request) 3340{ 3341 u16 smid; 3342 u32 ioc_state; 3343 unsigned long timeleft; 3344 u8 issue_reset; 3345 int rc; 3346 void *request; 3347 u16 wait_state_count; 3348 3349 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 3350 __func__)); 3351 3352 mutex_lock(&ioc->base_cmds.mutex); 3353 3354 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) { 3355 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n", 3356 ioc->name, __func__); 3357 rc = -EAGAIN; 3358 goto out; 3359 } 3360 3361 wait_state_count = 0; 3362 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 3363 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) { 3364 if (wait_state_count++ == 10) { 3365 printk(MPT2SAS_ERR_FMT 3366 "%s: failed due to ioc not operational\n", 3367 ioc->name, __func__); 3368 rc = -EFAULT; 3369 goto out; 3370 } 3371 ssleep(1); 3372 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 3373 printk(MPT2SAS_INFO_FMT "%s: waiting for " 3374 "operational state(count=%d)\n", ioc->name, 3375 __func__, wait_state_count); 3376 } 3377 3378 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 3379 if (!smid) { 3380 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 3381 ioc->name, __func__); 3382 rc = -EAGAIN; 3383 goto out; 3384 } 3385 3386 rc = 0; 3387 ioc->base_cmds.status = MPT2_CMD_PENDING; 3388 request = mpt2sas_base_get_msg_frame(ioc, smid); 3389 ioc->base_cmds.smid = smid; 3390 memcpy(request, mpi_request, sizeof(Mpi2SepReply_t)); 3391 init_completion(&ioc->base_cmds.done); 3392 mpt2sas_base_put_smid_default(ioc, smid); 3393 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 3394 msecs_to_jiffies(10000)); 3395 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 3396 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 3397 ioc->name, __func__); 3398 _debug_dump_mf(mpi_request, 3399 sizeof(Mpi2SepRequest_t)/4); 3400 if (!(ioc->base_cmds.status & MPT2_CMD_RESET)) 3401 issue_reset = 1; 3402 goto issue_host_reset; 3403 } 3404 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID) 3405 memcpy(mpi_reply, ioc->base_cmds.reply, 3406 sizeof(Mpi2SepReply_t)); 3407 else 3408 memset(mpi_reply, 0, sizeof(Mpi2SepReply_t)); 3409 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 3410 goto out; 3411 3412 issue_host_reset: 3413 if (issue_reset) 3414 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 3415 FORCE_BIG_HAMMER); 3416 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 3417 rc = -EFAULT; 3418 out: 3419 mutex_unlock(&ioc->base_cmds.mutex); 3420 return rc; 3421} 3422 3423/** 3424 * _base_get_port_facts - obtain port facts reply and save in ioc 3425 * @ioc: per adapter object 3426 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3427 * 3428 * Returns 0 for success, non-zero for failure. 3429 */ 3430static int 3431_base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag) 3432{ 3433 Mpi2PortFactsRequest_t mpi_request; 3434 Mpi2PortFactsReply_t mpi_reply; 3435 struct mpt2sas_port_facts *pfacts; 3436 int mpi_reply_sz, mpi_request_sz, r; 3437 3438 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 3439 __func__)); 3440 3441 mpi_reply_sz = sizeof(Mpi2PortFactsReply_t); 3442 mpi_request_sz = sizeof(Mpi2PortFactsRequest_t); 3443 memset(&mpi_request, 0, mpi_request_sz); 3444 mpi_request.Function = MPI2_FUNCTION_PORT_FACTS; 3445 mpi_request.PortNumber = port; 3446 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz, 3447 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP); 3448 3449 if (r != 0) { 3450 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 3451 ioc->name, __func__, r); 3452 return r; 3453 } 3454 3455 pfacts = &ioc->pfacts[port]; 3456 memset(pfacts, 0, sizeof(struct mpt2sas_port_facts)); 3457 pfacts->PortNumber = mpi_reply.PortNumber; 3458 pfacts->VP_ID = mpi_reply.VP_ID; 3459 pfacts->VF_ID = mpi_reply.VF_ID; 3460 pfacts->MaxPostedCmdBuffers = 3461 le16_to_cpu(mpi_reply.MaxPostedCmdBuffers); 3462 3463 return 0; 3464} 3465 3466/** 3467 * _base_wait_for_iocstate - Wait until the card is in READY or OPERATIONAL 3468 * @ioc: per adapter object 3469 * @timeout: 3470 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3471 * 3472 * Returns 0 for success, non-zero for failure. 3473 */ 3474static int 3475_base_wait_for_iocstate(struct MPT2SAS_ADAPTER *ioc, int timeout, 3476 int sleep_flag) 3477{ 3478 u32 ioc_state, doorbell; 3479 int rc; 3480 3481 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 3482 __func__)); 3483 3484 if (ioc->pci_error_recovery) 3485 return 0; 3486 3487 doorbell = mpt2sas_base_get_iocstate(ioc, 0); 3488 ioc_state = doorbell & MPI2_IOC_STATE_MASK; 3489 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n", 3490 ioc->name, __func__, ioc_state)); 3491 3492 switch (ioc_state) { 3493 case MPI2_IOC_STATE_READY: 3494 case MPI2_IOC_STATE_OPERATIONAL: 3495 return 0; 3496 } 3497 3498 if (doorbell & MPI2_DOORBELL_USED) { 3499 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT 3500 "unexpected doorbell activ!e\n", ioc->name)); 3501 goto issue_diag_reset; 3502 } 3503 3504 if (ioc_state == MPI2_IOC_STATE_FAULT) { 3505 mpt2sas_base_fault_info(ioc, doorbell & 3506 MPI2_DOORBELL_DATA_MASK); 3507 goto issue_diag_reset; 3508 } 3509 3510 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 3511 timeout, sleep_flag); 3512 if (ioc_state) { 3513 printk(MPT2SAS_ERR_FMT 3514 "%s: failed going to ready state (ioc_state=0x%x)\n", 3515 ioc->name, __func__, ioc_state); 3516 return -EFAULT; 3517 } 3518 3519 issue_diag_reset: 3520 rc = _base_diag_reset(ioc, sleep_flag); 3521 return rc; 3522} 3523 3524/** 3525 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc 3526 * @ioc: per adapter object 3527 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3528 * 3529 * Returns 0 for success, non-zero for failure. 3530 */ 3531static int 3532_base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3533{ 3534 Mpi2IOCFactsRequest_t mpi_request; 3535 Mpi2IOCFactsReply_t mpi_reply; 3536 struct mpt2sas_facts *facts; 3537 int mpi_reply_sz, mpi_request_sz, r; 3538 3539 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 3540 __func__)); 3541 3542 r = _base_wait_for_iocstate(ioc, 10, sleep_flag); 3543 if (r) { 3544 printk(MPT2SAS_ERR_FMT "%s: failed getting to correct state\n", 3545 ioc->name, __func__); 3546 return r; 3547 } 3548 3549 mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t); 3550 mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t); 3551 memset(&mpi_request, 0, mpi_request_sz); 3552 mpi_request.Function = MPI2_FUNCTION_IOC_FACTS; 3553 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz, 3554 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP); 3555 3556 if (r != 0) { 3557 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 3558 ioc->name, __func__, r); 3559 return r; 3560 } 3561 3562 facts = &ioc->facts; 3563 memset(facts, 0, sizeof(struct mpt2sas_facts)); 3564 facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion); 3565 facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion); 3566 facts->VP_ID = mpi_reply.VP_ID; 3567 facts->VF_ID = mpi_reply.VF_ID; 3568 facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions); 3569 facts->MaxChainDepth = mpi_reply.MaxChainDepth; 3570 facts->WhoInit = mpi_reply.WhoInit; 3571 facts->NumberOfPorts = mpi_reply.NumberOfPorts; 3572 facts->MaxMSIxVectors = mpi_reply.MaxMSIxVectors; 3573 facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit); 3574 facts->MaxReplyDescriptorPostQueueDepth = 3575 le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth); 3576 facts->ProductID = le16_to_cpu(mpi_reply.ProductID); 3577 facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities); 3578 if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID)) 3579 ioc->ir_firmware = 1; 3580 if ((facts->IOCCapabilities & 3581 MPI2_IOCFACTS_CAPABILITY_RDPQ_ARRAY_CAPABLE)) 3582 ioc->rdpq_array_capable = 1; 3583 facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word); 3584 facts->IOCRequestFrameSize = 3585 le16_to_cpu(mpi_reply.IOCRequestFrameSize); 3586 facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators); 3587 facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets); 3588 ioc->shost->max_id = -1; 3589 facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders); 3590 facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures); 3591 facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags); 3592 facts->HighPriorityCredit = 3593 le16_to_cpu(mpi_reply.HighPriorityCredit); 3594 facts->ReplyFrameSize = mpi_reply.ReplyFrameSize; 3595 facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle); 3596 3597 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), " 3598 "max chains per io(%d)\n", ioc->name, facts->RequestCredit, 3599 facts->MaxChainDepth)); 3600 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), " 3601 "reply frame size(%d)\n", ioc->name, 3602 facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4)); 3603 return 0; 3604} 3605 3606/** 3607 * _base_send_ioc_init - send ioc_init to firmware 3608 * @ioc: per adapter object 3609 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3610 * 3611 * Returns 0 for success, non-zero for failure. 3612 */ 3613static int 3614_base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3615{ 3616 Mpi2IOCInitRequest_t mpi_request; 3617 Mpi2IOCInitReply_t mpi_reply; 3618 int i, r = 0; 3619 struct timeval current_time; 3620 u16 ioc_status; 3621 u32 reply_post_free_array_sz = 0; 3622 Mpi2IOCInitRDPQArrayEntry *reply_post_free_array = NULL; 3623 dma_addr_t reply_post_free_array_dma; 3624 3625 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 3626 __func__)); 3627 3628 memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t)); 3629 mpi_request.Function = MPI2_FUNCTION_IOC_INIT; 3630 mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER; 3631 mpi_request.VF_ID = 0; /* TODO */ 3632 mpi_request.VP_ID = 0; 3633 mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION); 3634 mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION); 3635 3636 if (_base_is_controller_msix_enabled(ioc)) 3637 mpi_request.HostMSIxVectors = ioc->reply_queue_count; 3638 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4); 3639 mpi_request.ReplyDescriptorPostQueueDepth = 3640 cpu_to_le16(ioc->reply_post_queue_depth); 3641 mpi_request.ReplyFreeQueueDepth = 3642 cpu_to_le16(ioc->reply_free_queue_depth); 3643 3644 mpi_request.SenseBufferAddressHigh = 3645 cpu_to_le32((u64)ioc->sense_dma >> 32); 3646 mpi_request.SystemReplyAddressHigh = 3647 cpu_to_le32((u64)ioc->reply_dma >> 32); 3648 mpi_request.SystemRequestFrameBaseAddress = 3649 cpu_to_le64((u64)ioc->request_dma); 3650 mpi_request.ReplyFreeQueueAddress = 3651 cpu_to_le64((u64)ioc->reply_free_dma); 3652 3653 if (ioc->rdpq_array_enable) { 3654 reply_post_free_array_sz = ioc->reply_queue_count * 3655 sizeof(Mpi2IOCInitRDPQArrayEntry); 3656 reply_post_free_array = pci_alloc_consistent(ioc->pdev, 3657 reply_post_free_array_sz, &reply_post_free_array_dma); 3658 if (!reply_post_free_array) { 3659 printk(MPT2SAS_ERR_FMT 3660 "reply_post_free_array: pci_alloc_consistent failed\n", 3661 ioc->name); 3662 r = -ENOMEM; 3663 goto out; 3664 } 3665 memset(reply_post_free_array, 0, reply_post_free_array_sz); 3666 for (i = 0; i < ioc->reply_queue_count; i++) 3667 reply_post_free_array[i].RDPQBaseAddress = 3668 cpu_to_le64( 3669 (u64)ioc->reply_post[i].reply_post_free_dma); 3670 mpi_request.MsgFlags = MPI2_IOCINIT_MSGFLAG_RDPQ_ARRAY_MODE; 3671 mpi_request.ReplyDescriptorPostQueueAddress = 3672 cpu_to_le64((u64)reply_post_free_array_dma); 3673 } else { 3674 mpi_request.ReplyDescriptorPostQueueAddress = 3675 cpu_to_le64((u64)ioc->reply_post[0].reply_post_free_dma); 3676 } 3677 3678 /* This time stamp specifies number of milliseconds 3679 * since epoch ~ midnight January 1, 1970. 3680 */ 3681 do_gettimeofday(¤t_time); 3682 mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 + 3683 (current_time.tv_usec / 1000)); 3684 3685 if (ioc->logging_level & MPT_DEBUG_INIT) { 3686 __le32 *mfp; 3687 int i; 3688 3689 mfp = (__le32 *)&mpi_request; 3690 printk(KERN_INFO "\toffset:data\n"); 3691 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++) 3692 printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4, 3693 le32_to_cpu(mfp[i])); 3694 } 3695 3696 r = _base_handshake_req_reply_wait(ioc, 3697 sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request, 3698 sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10, 3699 sleep_flag); 3700 3701 if (r != 0) { 3702 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 3703 ioc->name, __func__, r); 3704 goto out; 3705 } 3706 3707 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK; 3708 if (ioc_status != MPI2_IOCSTATUS_SUCCESS || 3709 mpi_reply.IOCLogInfo) { 3710 printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__); 3711 r = -EIO; 3712 } 3713 3714out: 3715 if (reply_post_free_array) 3716 pci_free_consistent(ioc->pdev, reply_post_free_array_sz, 3717 reply_post_free_array, 3718 reply_post_free_array_dma); 3719 return r; 3720} 3721 3722/** 3723 * mpt2sas_port_enable_done - command completion routine for port enable 3724 * @ioc: per adapter object 3725 * @smid: system request message index 3726 * @msix_index: MSIX table index supplied by the OS 3727 * @reply: reply message frame(lower 32bit addr) 3728 * 3729 * Return 1 meaning mf should be freed from _base_interrupt 3730 * 0 means the mf is freed from this function. 3731 */ 3732u8 3733mpt2sas_port_enable_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 3734 u32 reply) 3735{ 3736 MPI2DefaultReply_t *mpi_reply; 3737 u16 ioc_status; 3738 3739 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 3740 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK) 3741 return 1; 3742 3743 if (ioc->port_enable_cmds.status == MPT2_CMD_NOT_USED) 3744 return 1; 3745 3746 ioc->port_enable_cmds.status |= MPT2_CMD_COMPLETE; 3747 if (mpi_reply) { 3748 ioc->port_enable_cmds.status |= MPT2_CMD_REPLY_VALID; 3749 memcpy(ioc->port_enable_cmds.reply, mpi_reply, 3750 mpi_reply->MsgLength*4); 3751 } 3752 ioc->port_enable_cmds.status &= ~MPT2_CMD_PENDING; 3753 3754 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK; 3755 3756 if (ioc_status != MPI2_IOCSTATUS_SUCCESS) 3757 ioc->port_enable_failed = 1; 3758 3759 if (ioc->is_driver_loading) { 3760 if (ioc_status == MPI2_IOCSTATUS_SUCCESS) { 3761 mpt2sas_port_enable_complete(ioc); 3762 return 1; 3763 } else { 3764 ioc->start_scan_failed = ioc_status; 3765 ioc->start_scan = 0; 3766 return 1; 3767 } 3768 } 3769 complete(&ioc->port_enable_cmds.done); 3770 return 1; 3771} 3772 3773 3774/** 3775 * _base_send_port_enable - send port_enable(discovery stuff) to firmware 3776 * @ioc: per adapter object 3777 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3778 * 3779 * Returns 0 for success, non-zero for failure. 3780 */ 3781static int 3782_base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3783{ 3784 Mpi2PortEnableRequest_t *mpi_request; 3785 Mpi2PortEnableReply_t *mpi_reply; 3786 unsigned long timeleft; 3787 int r = 0; 3788 u16 smid; 3789 u16 ioc_status; 3790 3791 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name); 3792 3793 if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) { 3794 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n", 3795 ioc->name, __func__); 3796 return -EAGAIN; 3797 } 3798 3799 smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx); 3800 if (!smid) { 3801 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 3802 ioc->name, __func__); 3803 return -EAGAIN; 3804 } 3805 3806 ioc->port_enable_cmds.status = MPT2_CMD_PENDING; 3807 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid); 3808 ioc->port_enable_cmds.smid = smid; 3809 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t)); 3810 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE; 3811 3812 init_completion(&ioc->port_enable_cmds.done); 3813 mpt2sas_base_put_smid_default(ioc, smid); 3814 timeleft = wait_for_completion_timeout(&ioc->port_enable_cmds.done, 3815 300*HZ); 3816 if (!(ioc->port_enable_cmds.status & MPT2_CMD_COMPLETE)) { 3817 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 3818 ioc->name, __func__); 3819 _debug_dump_mf(mpi_request, 3820 sizeof(Mpi2PortEnableRequest_t)/4); 3821 if (ioc->port_enable_cmds.status & MPT2_CMD_RESET) 3822 r = -EFAULT; 3823 else 3824 r = -ETIME; 3825 goto out; 3826 } 3827 mpi_reply = ioc->port_enable_cmds.reply; 3828 3829 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK; 3830 if (ioc_status != MPI2_IOCSTATUS_SUCCESS) { 3831 printk(MPT2SAS_ERR_FMT "%s: failed with (ioc_status=0x%08x)\n", 3832 ioc->name, __func__, ioc_status); 3833 r = -EFAULT; 3834 goto out; 3835 } 3836 out: 3837 ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED; 3838 printk(MPT2SAS_INFO_FMT "port enable: %s\n", ioc->name, ((r == 0) ? 3839 "SUCCESS" : "FAILED")); 3840 return r; 3841} 3842 3843/** 3844 * mpt2sas_port_enable - initiate firmware discovery (don't wait for reply) 3845 * @ioc: per adapter object 3846 * 3847 * Returns 0 for success, non-zero for failure. 3848 */ 3849int 3850mpt2sas_port_enable(struct MPT2SAS_ADAPTER *ioc) 3851{ 3852 Mpi2PortEnableRequest_t *mpi_request; 3853 u16 smid; 3854 3855 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name); 3856 3857 if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) { 3858 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n", 3859 ioc->name, __func__); 3860 return -EAGAIN; 3861 } 3862 3863 smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx); 3864 if (!smid) { 3865 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 3866 ioc->name, __func__); 3867 return -EAGAIN; 3868 } 3869 3870 ioc->port_enable_cmds.status = MPT2_CMD_PENDING; 3871 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid); 3872 ioc->port_enable_cmds.smid = smid; 3873 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t)); 3874 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE; 3875 3876 mpt2sas_base_put_smid_default(ioc, smid); 3877 return 0; 3878} 3879 3880/** 3881 * _base_determine_wait_on_discovery - desposition 3882 * @ioc: per adapter object 3883 * 3884 * Decide whether to wait on discovery to complete. Used to either 3885 * locate boot device, or report volumes ahead of physical devices. 3886 * 3887 * Returns 1 for wait, 0 for don't wait 3888 */ 3889static int 3890_base_determine_wait_on_discovery(struct MPT2SAS_ADAPTER *ioc) 3891{ 3892 /* We wait for discovery to complete if IR firmware is loaded. 3893 * The sas topology events arrive before PD events, so we need time to 3894 * turn on the bit in ioc->pd_handles to indicate PD 3895 * Also, it maybe required to report Volumes ahead of physical 3896 * devices when MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING is set. 3897 */ 3898 if (ioc->ir_firmware) 3899 return 1; 3900 3901 /* if no Bios, then we don't need to wait */ 3902 if (!ioc->bios_pg3.BiosVersion) 3903 return 0; 3904 3905 /* Bios is present, then we drop down here. 3906 * 3907 * If there any entries in the Bios Page 2, then we wait 3908 * for discovery to complete. 3909 */ 3910 3911 /* Current Boot Device */ 3912 if ((ioc->bios_pg2.CurrentBootDeviceForm & 3913 MPI2_BIOSPAGE2_FORM_MASK) == 3914 MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED && 3915 /* Request Boot Device */ 3916 (ioc->bios_pg2.ReqBootDeviceForm & 3917 MPI2_BIOSPAGE2_FORM_MASK) == 3918 MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED && 3919 /* Alternate Request Boot Device */ 3920 (ioc->bios_pg2.ReqAltBootDeviceForm & 3921 MPI2_BIOSPAGE2_FORM_MASK) == 3922 MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED) 3923 return 0; 3924 3925 return 1; 3926} 3927 3928 3929/** 3930 * _base_unmask_events - turn on notification for this event 3931 * @ioc: per adapter object 3932 * @event: firmware event 3933 * 3934 * The mask is stored in ioc->event_masks. 3935 */ 3936static void 3937_base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event) 3938{ 3939 u32 desired_event; 3940 3941 if (event >= 128) 3942 return; 3943 3944 desired_event = (1 << (event % 32)); 3945 3946 if (event < 32) 3947 ioc->event_masks[0] &= ~desired_event; 3948 else if (event < 64) 3949 ioc->event_masks[1] &= ~desired_event; 3950 else if (event < 96) 3951 ioc->event_masks[2] &= ~desired_event; 3952 else if (event < 128) 3953 ioc->event_masks[3] &= ~desired_event; 3954} 3955 3956/** 3957 * _base_event_notification - send event notification 3958 * @ioc: per adapter object 3959 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3960 * 3961 * Returns 0 for success, non-zero for failure. 3962 */ 3963static int 3964_base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3965{ 3966 Mpi2EventNotificationRequest_t *mpi_request; 3967 unsigned long timeleft; 3968 u16 smid; 3969 int r = 0; 3970 int i; 3971 3972 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 3973 __func__)); 3974 3975 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 3976 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n", 3977 ioc->name, __func__); 3978 return -EAGAIN; 3979 } 3980 3981 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 3982 if (!smid) { 3983 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 3984 ioc->name, __func__); 3985 return -EAGAIN; 3986 } 3987 ioc->base_cmds.status = MPT2_CMD_PENDING; 3988 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid); 3989 ioc->base_cmds.smid = smid; 3990 memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t)); 3991 mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 3992 mpi_request->VF_ID = 0; /* TODO */ 3993 mpi_request->VP_ID = 0; 3994 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 3995 mpi_request->EventMasks[i] = 3996 cpu_to_le32(ioc->event_masks[i]); 3997 init_completion(&ioc->base_cmds.done); 3998 mpt2sas_base_put_smid_default(ioc, smid); 3999 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ); 4000 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 4001 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 4002 ioc->name, __func__); 4003 _debug_dump_mf(mpi_request, 4004 sizeof(Mpi2EventNotificationRequest_t)/4); 4005 if (ioc->base_cmds.status & MPT2_CMD_RESET) 4006 r = -EFAULT; 4007 else 4008 r = -ETIME; 4009 } else 4010 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n", 4011 ioc->name, __func__)); 4012 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 4013 return r; 4014} 4015 4016/** 4017 * mpt2sas_base_validate_event_type - validating event types 4018 * @ioc: per adapter object 4019 * @event: firmware event 4020 * 4021 * This will turn on firmware event notification when application 4022 * ask for that event. We don't mask events that are already enabled. 4023 */ 4024void 4025mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type) 4026{ 4027 int i, j; 4028 u32 event_mask, desired_event; 4029 u8 send_update_to_fw; 4030 4031 for (i = 0, send_update_to_fw = 0; i < 4032 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) { 4033 event_mask = ~event_type[i]; 4034 desired_event = 1; 4035 for (j = 0; j < 32; j++) { 4036 if (!(event_mask & desired_event) && 4037 (ioc->event_masks[i] & desired_event)) { 4038 ioc->event_masks[i] &= ~desired_event; 4039 send_update_to_fw = 1; 4040 } 4041 desired_event = (desired_event << 1); 4042 } 4043 } 4044 4045 if (!send_update_to_fw) 4046 return; 4047 4048 mutex_lock(&ioc->base_cmds.mutex); 4049 _base_event_notification(ioc, CAN_SLEEP); 4050 mutex_unlock(&ioc->base_cmds.mutex); 4051} 4052 4053/** 4054 * _base_diag_reset - the "big hammer" start of day reset 4055 * @ioc: per adapter object 4056 * @sleep_flag: CAN_SLEEP or NO_SLEEP 4057 * 4058 * Returns 0 for success, non-zero for failure. 4059 */ 4060static int 4061_base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 4062{ 4063 u32 host_diagnostic; 4064 u32 ioc_state; 4065 u32 count; 4066 u32 hcb_size; 4067 4068 printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name); 4069 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "clear interrupts\n", 4070 ioc->name)); 4071 4072 count = 0; 4073 do { 4074 /* Write magic sequence to WriteSequence register 4075 * Loop until in diagnostic mode 4076 */ 4077 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "write magic " 4078 "sequence\n", ioc->name)); 4079 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence); 4080 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence); 4081 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence); 4082 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence); 4083 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence); 4084 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence); 4085 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence); 4086 4087 /* wait 100 msec */ 4088 if (sleep_flag == CAN_SLEEP) 4089 msleep(100); 4090 else 4091 mdelay(100); 4092 4093 if (count++ > 20) 4094 goto out; 4095 4096 host_diagnostic = readl(&ioc->chip->HostDiagnostic); 4097 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "wrote magic " 4098 "sequence: count(%d), host_diagnostic(0x%08x)\n", 4099 ioc->name, count, host_diagnostic)); 4100 4101 } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0); 4102 4103 hcb_size = readl(&ioc->chip->HCBSize); 4104 4105 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "diag reset: issued\n", 4106 ioc->name)); 4107 writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER, 4108 &ioc->chip->HostDiagnostic); 4109 4110 /* This delay allows the chip PCIe hardware time to finish reset tasks*/ 4111 if (sleep_flag == CAN_SLEEP) 4112 msleep(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC/1000); 4113 else 4114 mdelay(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC/1000); 4115 4116 /* Approximately 300 second max wait */ 4117 for (count = 0; count < (300000000 / 4118 MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC); count++) { 4119 4120 host_diagnostic = readl(&ioc->chip->HostDiagnostic); 4121 4122 if (host_diagnostic == 0xFFFFFFFF) 4123 goto out; 4124 if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER)) 4125 break; 4126 4127 /* Wait to pass the second read delay window */ 4128 if (sleep_flag == CAN_SLEEP) 4129 msleep(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC 4130 /1000); 4131 else 4132 mdelay(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC 4133 /1000); 4134 } 4135 4136 if (host_diagnostic & MPI2_DIAG_HCB_MODE) { 4137 4138 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter " 4139 "assuming the HCB Address points to good F/W\n", 4140 ioc->name)); 4141 host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK; 4142 host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW; 4143 writel(host_diagnostic, &ioc->chip->HostDiagnostic); 4144 4145 drsprintk(ioc, printk(MPT2SAS_INFO_FMT 4146 "re-enable the HCDW\n", ioc->name)); 4147 writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE, 4148 &ioc->chip->HCBSize); 4149 } 4150 4151 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter\n", 4152 ioc->name)); 4153 writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET, 4154 &ioc->chip->HostDiagnostic); 4155 4156 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "disable writes to the " 4157 "diagnostic register\n", ioc->name)); 4158 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence); 4159 4160 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "Wait for FW to go to the " 4161 "READY state\n", ioc->name)); 4162 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20, 4163 sleep_flag); 4164 if (ioc_state) { 4165 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state " 4166 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 4167 goto out; 4168 } 4169 4170 printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name); 4171 return 0; 4172 4173 out: 4174 printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name); 4175 return -EFAULT; 4176} 4177 4178/** 4179 * _base_make_ioc_ready - put controller in READY state 4180 * @ioc: per adapter object 4181 * @sleep_flag: CAN_SLEEP or NO_SLEEP 4182 * @type: FORCE_BIG_HAMMER or SOFT_RESET 4183 * 4184 * Returns 0 for success, non-zero for failure. 4185 */ 4186static int 4187_base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag, 4188 enum reset_type type) 4189{ 4190 u32 ioc_state; 4191 int rc; 4192 4193 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 4194 __func__)); 4195 4196 if (ioc->pci_error_recovery) 4197 return 0; 4198 4199 ioc_state = mpt2sas_base_get_iocstate(ioc, 0); 4200 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n", 4201 ioc->name, __func__, ioc_state)); 4202 4203 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY) 4204 return 0; 4205 4206 if (ioc_state & MPI2_DOORBELL_USED) { 4207 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "unexpected doorbell " 4208 "active!\n", ioc->name)); 4209 goto issue_diag_reset; 4210 } 4211 4212 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 4213 mpt2sas_base_fault_info(ioc, ioc_state & 4214 MPI2_DOORBELL_DATA_MASK); 4215 goto issue_diag_reset; 4216 } 4217 4218 if (type == FORCE_BIG_HAMMER) 4219 goto issue_diag_reset; 4220 4221 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL) 4222 if (!(_base_send_ioc_reset(ioc, 4223 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) { 4224 ioc->ioc_reset_count++; 4225 return 0; 4226 } 4227 4228 issue_diag_reset: 4229 rc = _base_diag_reset(ioc, CAN_SLEEP); 4230 ioc->ioc_reset_count++; 4231 return rc; 4232} 4233 4234/** 4235 * _base_make_ioc_operational - put controller in OPERATIONAL state 4236 * @ioc: per adapter object 4237 * @sleep_flag: CAN_SLEEP or NO_SLEEP 4238 * 4239 * Returns 0 for success, non-zero for failure. 4240 */ 4241static int 4242_base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 4243{ 4244 int r, i; 4245 unsigned long flags; 4246 u32 reply_address; 4247 u16 smid; 4248 struct _tr_list *delayed_tr, *delayed_tr_next; 4249 u8 hide_flag; 4250 struct adapter_reply_queue *reply_q; 4251 long reply_post_free; 4252 u32 reply_post_free_sz, index = 0; 4253 4254 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 4255 __func__)); 4256 4257 /* clean the delayed target reset list */ 4258 list_for_each_entry_safe(delayed_tr, delayed_tr_next, 4259 &ioc->delayed_tr_list, list) { 4260 list_del(&delayed_tr->list); 4261 kfree(delayed_tr); 4262 } 4263 4264 list_for_each_entry_safe(delayed_tr, delayed_tr_next, 4265 &ioc->delayed_tr_volume_list, list) { 4266 list_del(&delayed_tr->list); 4267 kfree(delayed_tr); 4268 } 4269 4270 /* initialize the scsi lookup free list */ 4271 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 4272 INIT_LIST_HEAD(&ioc->free_list); 4273 smid = 1; 4274 for (i = 0; i < ioc->scsiio_depth; i++, smid++) { 4275 INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list); 4276 ioc->scsi_lookup[i].cb_idx = 0xFF; 4277 ioc->scsi_lookup[i].smid = smid; 4278 ioc->scsi_lookup[i].scmd = NULL; 4279 ioc->scsi_lookup[i].direct_io = 0; 4280 list_add_tail(&ioc->scsi_lookup[i].tracker_list, 4281 &ioc->free_list); 4282 } 4283 4284 /* hi-priority queue */ 4285 INIT_LIST_HEAD(&ioc->hpr_free_list); 4286 smid = ioc->hi_priority_smid; 4287 for (i = 0; i < ioc->hi_priority_depth; i++, smid++) { 4288 ioc->hpr_lookup[i].cb_idx = 0xFF; 4289 ioc->hpr_lookup[i].smid = smid; 4290 list_add_tail(&ioc->hpr_lookup[i].tracker_list, 4291 &ioc->hpr_free_list); 4292 } 4293 4294 /* internal queue */ 4295 INIT_LIST_HEAD(&ioc->internal_free_list); 4296 smid = ioc->internal_smid; 4297 for (i = 0; i < ioc->internal_depth; i++, smid++) { 4298 ioc->internal_lookup[i].cb_idx = 0xFF; 4299 ioc->internal_lookup[i].smid = smid; 4300 list_add_tail(&ioc->internal_lookup[i].tracker_list, 4301 &ioc->internal_free_list); 4302 } 4303 4304 /* chain pool */ 4305 INIT_LIST_HEAD(&ioc->free_chain_list); 4306 for (i = 0; i < ioc->chain_depth; i++) 4307 list_add_tail(&ioc->chain_lookup[i].tracker_list, 4308 &ioc->free_chain_list); 4309 4310 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 4311 4312 /* initialize Reply Free Queue */ 4313 for (i = 0, reply_address = (u32)ioc->reply_dma ; 4314 i < ioc->reply_free_queue_depth ; i++, reply_address += 4315 ioc->reply_sz) 4316 ioc->reply_free[i] = cpu_to_le32(reply_address); 4317 4318 /* initialize reply queues */ 4319 if (ioc->is_driver_loading) 4320 _base_assign_reply_queues(ioc); 4321 4322 /* initialize Reply Post Free Queue */ 4323 reply_post_free_sz = ioc->reply_post_queue_depth * 4324 sizeof(Mpi2DefaultReplyDescriptor_t); 4325 reply_post_free = (long)ioc->reply_post[index].reply_post_free; 4326 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) { 4327 reply_q->reply_post_host_index = 0; 4328 reply_q->reply_post_free = (Mpi2ReplyDescriptorsUnion_t *) 4329 reply_post_free; 4330 for (i = 0; i < ioc->reply_post_queue_depth; i++) 4331 reply_q->reply_post_free[i].Words = 4332 cpu_to_le64(ULLONG_MAX); 4333 if (!_base_is_controller_msix_enabled(ioc)) 4334 goto skip_init_reply_post_free_queue; 4335 /* 4336 * If RDPQ is enabled, switch to the next allocation. 4337 * Otherwise advance within the contiguous region. 4338 */ 4339 if (ioc->rdpq_array_enable) 4340 reply_post_free = (long) 4341 ioc->reply_post[++index].reply_post_free; 4342 else 4343 reply_post_free += reply_post_free_sz; 4344 } 4345 skip_init_reply_post_free_queue: 4346 4347 r = _base_send_ioc_init(ioc, sleep_flag); 4348 if (r) 4349 return r; 4350 4351 /* initialize reply free host index */ 4352 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1; 4353 writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex); 4354 4355 /* initialize reply post host index */ 4356 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) { 4357 writel(reply_q->msix_index << MPI2_RPHI_MSIX_INDEX_SHIFT, 4358 &ioc->chip->ReplyPostHostIndex); 4359 if (!_base_is_controller_msix_enabled(ioc)) 4360 goto skip_init_reply_post_host_index; 4361 } 4362 4363 skip_init_reply_post_host_index: 4364 4365 _base_unmask_interrupts(ioc); 4366 4367 r = _base_event_notification(ioc, sleep_flag); 4368 if (r) 4369 return r; 4370 4371 if (sleep_flag == CAN_SLEEP) 4372 _base_static_config_pages(ioc); 4373 4374 4375 if (ioc->is_driver_loading) { 4376 if (ioc->is_warpdrive && ioc->manu_pg10.OEMIdentifier 4377 == 0x80) { 4378 hide_flag = (u8) ( 4379 le32_to_cpu(ioc->manu_pg10.OEMSpecificFlags0) & 4380 MFG_PAGE10_HIDE_SSDS_MASK); 4381 if (hide_flag != MFG_PAGE10_HIDE_SSDS_MASK) 4382 ioc->mfg_pg10_hide_flag = hide_flag; 4383 } 4384 ioc->wait_for_discovery_to_complete = 4385 _base_determine_wait_on_discovery(ioc); 4386 return r; /* scan_start and scan_finished support */ 4387 } 4388 r = _base_send_port_enable(ioc, sleep_flag); 4389 if (r) 4390 return r; 4391 4392 return r; 4393} 4394 4395/** 4396 * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap) 4397 * @ioc: per adapter object 4398 * 4399 * Return nothing. 4400 */ 4401void 4402mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc) 4403{ 4404 struct pci_dev *pdev = ioc->pdev; 4405 4406 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 4407 __func__)); 4408 4409 if (ioc->chip_phys && ioc->chip) { 4410 _base_mask_interrupts(ioc); 4411 ioc->shost_recovery = 1; 4412 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET); 4413 ioc->shost_recovery = 0; 4414 } 4415 4416 _base_free_irq(ioc); 4417 _base_disable_msix(ioc); 4418 4419 if (ioc->chip_phys && ioc->chip) 4420 iounmap(ioc->chip); 4421 ioc->chip_phys = 0; 4422 4423 if (pci_is_enabled(pdev)) { 4424 pci_release_selected_regions(ioc->pdev, ioc->bars); 4425 pci_disable_pcie_error_reporting(pdev); 4426 pci_disable_device(pdev); 4427 } 4428 return; 4429} 4430 4431/** 4432 * mpt2sas_base_attach - attach controller instance 4433 * @ioc: per adapter object 4434 * 4435 * Returns 0 for success, non-zero for failure. 4436 */ 4437int 4438mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc) 4439{ 4440 int r, i; 4441 int cpu_id, last_cpu_id = 0; 4442 4443 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 4444 __func__)); 4445 4446 /* setup cpu_msix_table */ 4447 ioc->cpu_count = num_online_cpus(); 4448 for_each_online_cpu(cpu_id) 4449 last_cpu_id = cpu_id; 4450 ioc->cpu_msix_table_sz = last_cpu_id + 1; 4451 ioc->cpu_msix_table = kzalloc(ioc->cpu_msix_table_sz, GFP_KERNEL); 4452 ioc->reply_queue_count = 1; 4453 if (!ioc->cpu_msix_table) { 4454 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for " 4455 "cpu_msix_table failed!!!\n", ioc->name)); 4456 r = -ENOMEM; 4457 goto out_free_resources; 4458 } 4459 4460 if (ioc->is_warpdrive) { 4461 ioc->reply_post_host_index = kcalloc(ioc->cpu_msix_table_sz, 4462 sizeof(resource_size_t *), GFP_KERNEL); 4463 if (!ioc->reply_post_host_index) { 4464 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation " 4465 "for cpu_msix_table failed!!!\n", ioc->name)); 4466 r = -ENOMEM; 4467 goto out_free_resources; 4468 } 4469 } 4470 4471 ioc->rdpq_array_enable_assigned = 0; 4472 ioc->dma_mask = 0; 4473 r = mpt2sas_base_map_resources(ioc); 4474 if (r) 4475 goto out_free_resources; 4476 4477 if (ioc->is_warpdrive) { 4478 ioc->reply_post_host_index[0] = (resource_size_t __iomem *) 4479 &ioc->chip->ReplyPostHostIndex; 4480 4481 for (i = 1; i < ioc->cpu_msix_table_sz; i++) 4482 ioc->reply_post_host_index[i] = 4483 (resource_size_t __iomem *) 4484 ((u8 __iomem *)&ioc->chip->Doorbell + (0x4000 + ((i - 1) 4485 * 4))); 4486 } 4487 4488 pci_set_drvdata(ioc->pdev, ioc->shost); 4489 r = _base_get_ioc_facts(ioc, CAN_SLEEP); 4490 if (r) 4491 goto out_free_resources; 4492 4493 r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET); 4494 if (r) 4495 goto out_free_resources; 4496 4497 ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts, 4498 sizeof(struct mpt2sas_port_facts), GFP_KERNEL); 4499 if (!ioc->pfacts) { 4500 r = -ENOMEM; 4501 goto out_free_resources; 4502 } 4503 4504 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) { 4505 r = _base_get_port_facts(ioc, i, CAN_SLEEP); 4506 if (r) 4507 goto out_free_resources; 4508 } 4509 4510 r = _base_allocate_memory_pools(ioc, CAN_SLEEP); 4511 if (r) 4512 goto out_free_resources; 4513 4514 init_waitqueue_head(&ioc->reset_wq); 4515 /* allocate memory pd handle bitmask list */ 4516 ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8); 4517 if (ioc->facts.MaxDevHandle % 8) 4518 ioc->pd_handles_sz++; 4519 ioc->pd_handles = kzalloc(ioc->pd_handles_sz, 4520 GFP_KERNEL); 4521 if (!ioc->pd_handles) { 4522 r = -ENOMEM; 4523 goto out_free_resources; 4524 } 4525 ioc->blocking_handles = kzalloc(ioc->pd_handles_sz, 4526 GFP_KERNEL); 4527 if (!ioc->blocking_handles) { 4528 r = -ENOMEM; 4529 goto out_free_resources; 4530 } 4531 ioc->fwfault_debug = mpt2sas_fwfault_debug; 4532 4533 /* base internal command bits */ 4534 mutex_init(&ioc->base_cmds.mutex); 4535 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 4536 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 4537 4538 /* port_enable command bits */ 4539 ioc->port_enable_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 4540 ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED; 4541 4542 /* transport internal command bits */ 4543 ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 4544 ioc->transport_cmds.status = MPT2_CMD_NOT_USED; 4545 mutex_init(&ioc->transport_cmds.mutex); 4546 4547 /* scsih internal command bits */ 4548 ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 4549 ioc->scsih_cmds.status = MPT2_CMD_NOT_USED; 4550 mutex_init(&ioc->scsih_cmds.mutex); 4551 4552 /* task management internal command bits */ 4553 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 4554 ioc->tm_cmds.status = MPT2_CMD_NOT_USED; 4555 mutex_init(&ioc->tm_cmds.mutex); 4556 4557 /* config page internal command bits */ 4558 ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 4559 ioc->config_cmds.status = MPT2_CMD_NOT_USED; 4560 mutex_init(&ioc->config_cmds.mutex); 4561 4562 /* ctl module internal command bits */ 4563 ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 4564 ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL); 4565 ioc->ctl_cmds.status = MPT2_CMD_NOT_USED; 4566 mutex_init(&ioc->ctl_cmds.mutex); 4567 4568 if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply || 4569 !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply || 4570 !ioc->config_cmds.reply || !ioc->ctl_cmds.reply || 4571 !ioc->ctl_cmds.sense) { 4572 r = -ENOMEM; 4573 goto out_free_resources; 4574 } 4575 4576 if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply || 4577 !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply || 4578 !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) { 4579 r = -ENOMEM; 4580 goto out_free_resources; 4581 } 4582 4583 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 4584 ioc->event_masks[i] = -1; 4585 4586 /* here we enable the events we care about */ 4587 _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY); 4588 _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE); 4589 _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST); 4590 _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE); 4591 _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE); 4592 _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST); 4593 _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME); 4594 _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK); 4595 _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS); 4596 _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED); 4597 r = _base_make_ioc_operational(ioc, CAN_SLEEP); 4598 if (r) 4599 goto out_free_resources; 4600 4601 ioc->non_operational_loop = 0; 4602 4603 return 0; 4604 4605 out_free_resources: 4606 4607 ioc->remove_host = 1; 4608 mpt2sas_base_free_resources(ioc); 4609 _base_release_memory_pools(ioc); 4610 pci_set_drvdata(ioc->pdev, NULL); 4611 kfree(ioc->cpu_msix_table); 4612 if (ioc->is_warpdrive) 4613 kfree(ioc->reply_post_host_index); 4614 kfree(ioc->pd_handles); 4615 kfree(ioc->blocking_handles); 4616 kfree(ioc->tm_cmds.reply); 4617 kfree(ioc->transport_cmds.reply); 4618 kfree(ioc->scsih_cmds.reply); 4619 kfree(ioc->config_cmds.reply); 4620 kfree(ioc->base_cmds.reply); 4621 kfree(ioc->port_enable_cmds.reply); 4622 kfree(ioc->ctl_cmds.reply); 4623 kfree(ioc->ctl_cmds.sense); 4624 kfree(ioc->pfacts); 4625 ioc->ctl_cmds.reply = NULL; 4626 ioc->base_cmds.reply = NULL; 4627 ioc->tm_cmds.reply = NULL; 4628 ioc->scsih_cmds.reply = NULL; 4629 ioc->transport_cmds.reply = NULL; 4630 ioc->config_cmds.reply = NULL; 4631 ioc->pfacts = NULL; 4632 return r; 4633} 4634 4635 4636/** 4637 * mpt2sas_base_detach - remove controller instance 4638 * @ioc: per adapter object 4639 * 4640 * Return nothing. 4641 */ 4642void 4643mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc) 4644{ 4645 4646 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 4647 __func__)); 4648 4649 mpt2sas_base_stop_watchdog(ioc); 4650 mpt2sas_base_free_resources(ioc); 4651 _base_release_memory_pools(ioc); 4652 pci_set_drvdata(ioc->pdev, NULL); 4653 kfree(ioc->cpu_msix_table); 4654 if (ioc->is_warpdrive) 4655 kfree(ioc->reply_post_host_index); 4656 kfree(ioc->pd_handles); 4657 kfree(ioc->blocking_handles); 4658 kfree(ioc->pfacts); 4659 kfree(ioc->ctl_cmds.reply); 4660 kfree(ioc->ctl_cmds.sense); 4661 kfree(ioc->base_cmds.reply); 4662 kfree(ioc->port_enable_cmds.reply); 4663 kfree(ioc->tm_cmds.reply); 4664 kfree(ioc->transport_cmds.reply); 4665 kfree(ioc->scsih_cmds.reply); 4666 kfree(ioc->config_cmds.reply); 4667} 4668 4669/** 4670 * _base_reset_handler - reset callback handler (for base) 4671 * @ioc: per adapter object 4672 * @reset_phase: phase 4673 * 4674 * The handler for doing any required cleanup or initialization. 4675 * 4676 * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET, 4677 * MPT2_IOC_DONE_RESET 4678 * 4679 * Return nothing. 4680 */ 4681static void 4682_base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase) 4683{ 4684 mpt2sas_scsih_reset_handler(ioc, reset_phase); 4685 mpt2sas_ctl_reset_handler(ioc, reset_phase); 4686 switch (reset_phase) { 4687 case MPT2_IOC_PRE_RESET: 4688 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: " 4689 "MPT2_IOC_PRE_RESET\n", ioc->name, __func__)); 4690 break; 4691 case MPT2_IOC_AFTER_RESET: 4692 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: " 4693 "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__)); 4694 if (ioc->transport_cmds.status & MPT2_CMD_PENDING) { 4695 ioc->transport_cmds.status |= MPT2_CMD_RESET; 4696 mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid); 4697 complete(&ioc->transport_cmds.done); 4698 } 4699 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 4700 ioc->base_cmds.status |= MPT2_CMD_RESET; 4701 mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid); 4702 complete(&ioc->base_cmds.done); 4703 } 4704 if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) { 4705 ioc->port_enable_failed = 1; 4706 ioc->port_enable_cmds.status |= MPT2_CMD_RESET; 4707 mpt2sas_base_free_smid(ioc, ioc->port_enable_cmds.smid); 4708 if (ioc->is_driver_loading) { 4709 ioc->start_scan_failed = 4710 MPI2_IOCSTATUS_INTERNAL_ERROR; 4711 ioc->start_scan = 0; 4712 ioc->port_enable_cmds.status = 4713 MPT2_CMD_NOT_USED; 4714 } else 4715 complete(&ioc->port_enable_cmds.done); 4716 4717 } 4718 if (ioc->config_cmds.status & MPT2_CMD_PENDING) { 4719 ioc->config_cmds.status |= MPT2_CMD_RESET; 4720 mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid); 4721 ioc->config_cmds.smid = USHRT_MAX; 4722 complete(&ioc->config_cmds.done); 4723 } 4724 break; 4725 case MPT2_IOC_DONE_RESET: 4726 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: " 4727 "MPT2_IOC_DONE_RESET\n", ioc->name, __func__)); 4728 break; 4729 } 4730} 4731 4732/** 4733 * _wait_for_commands_to_complete - reset controller 4734 * @ioc: Pointer to MPT_ADAPTER structure 4735 * @sleep_flag: CAN_SLEEP or NO_SLEEP 4736 * 4737 * This function waiting(3s) for all pending commands to complete 4738 * prior to putting controller in reset. 4739 */ 4740static void 4741_wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 4742{ 4743 u32 ioc_state; 4744 unsigned long flags; 4745 u16 i; 4746 4747 ioc->pending_io_count = 0; 4748 if (sleep_flag != CAN_SLEEP) 4749 return; 4750 4751 ioc_state = mpt2sas_base_get_iocstate(ioc, 0); 4752 if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL) 4753 return; 4754 4755 /* pending command count */ 4756 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 4757 for (i = 0; i < ioc->scsiio_depth; i++) 4758 if (ioc->scsi_lookup[i].cb_idx != 0xFF) 4759 ioc->pending_io_count++; 4760 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 4761 4762 if (!ioc->pending_io_count) 4763 return; 4764 4765 /* wait for pending commands to complete */ 4766 wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ); 4767} 4768 4769/** 4770 * mpt2sas_base_hard_reset_handler - reset controller 4771 * @ioc: Pointer to MPT_ADAPTER structure 4772 * @sleep_flag: CAN_SLEEP or NO_SLEEP 4773 * @type: FORCE_BIG_HAMMER or SOFT_RESET 4774 * 4775 * Returns 0 for success, non-zero for failure. 4776 */ 4777int 4778mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag, 4779 enum reset_type type) 4780{ 4781 int r; 4782 unsigned long flags; 4783 4784 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name, 4785 __func__)); 4786 4787 if (ioc->pci_error_recovery) { 4788 printk(MPT2SAS_ERR_FMT "%s: pci error recovery reset\n", 4789 ioc->name, __func__); 4790 r = 0; 4791 goto out_unlocked; 4792 } 4793 4794 if (mpt2sas_fwfault_debug) 4795 mpt2sas_halt_firmware(ioc); 4796 4797 /* TODO - What we really should be doing is pulling 4798 * out all the code associated with NO_SLEEP; its never used. 4799 * That is legacy code from mpt fusion driver, ported over. 4800 * I will leave this BUG_ON here for now till its been resolved. 4801 */ 4802 BUG_ON(sleep_flag == NO_SLEEP); 4803 4804 /* wait for an active reset in progress to complete */ 4805 if (!mutex_trylock(&ioc->reset_in_progress_mutex)) { 4806 do { 4807 ssleep(1); 4808 } while (ioc->shost_recovery == 1); 4809 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name, 4810 __func__)); 4811 return ioc->ioc_reset_in_progress_status; 4812 } 4813 4814 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 4815 ioc->shost_recovery = 1; 4816 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 4817 4818 _base_reset_handler(ioc, MPT2_IOC_PRE_RESET); 4819 _wait_for_commands_to_complete(ioc, sleep_flag); 4820 _base_mask_interrupts(ioc); 4821 r = _base_make_ioc_ready(ioc, sleep_flag, type); 4822 if (r) 4823 goto out; 4824 _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET); 4825 4826 /* If this hard reset is called while port enable is active, then 4827 * there is no reason to call make_ioc_operational 4828 */ 4829 if (ioc->is_driver_loading && ioc->port_enable_failed) { 4830 ioc->remove_host = 1; 4831 r = -EFAULT; 4832 goto out; 4833 } 4834 4835 r = _base_get_ioc_facts(ioc, CAN_SLEEP); 4836 if (r) 4837 goto out; 4838 4839 if (ioc->rdpq_array_enable && !ioc->rdpq_array_capable) 4840 panic("%s: Issue occurred with flashing controller firmware." 4841 "Please reboot the system and ensure that the correct" 4842 " firmware version is running\n", ioc->name); 4843 4844 r = _base_make_ioc_operational(ioc, sleep_flag); 4845 if (!r) 4846 _base_reset_handler(ioc, MPT2_IOC_DONE_RESET); 4847 out: 4848 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: %s\n", 4849 ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED"))); 4850 4851 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 4852 ioc->ioc_reset_in_progress_status = r; 4853 ioc->shost_recovery = 0; 4854 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 4855 mutex_unlock(&ioc->reset_in_progress_mutex); 4856 4857 out_unlocked: 4858 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name, 4859 __func__)); 4860 return r; 4861} 4862