pmcraid.h revision 5da61410054d125e63aeab9cc7a11874a69465c0
1/* 2 * pmcraid.h -- PMC Sierra MaxRAID controller driver header file 3 * 4 * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com> 5 * PMC-Sierra Inc 6 * 7 * Copyright (C) 2008, 2009 PMC Sierra Inc. 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 22 */ 23 24#ifndef _PMCRAID_H 25#define _PMCRAID_H 26 27#include <linux/version.h> 28#include <linux/types.h> 29#include <linux/completion.h> 30#include <linux/list.h> 31#include <scsi/scsi.h> 32#include <scsi/scsi_cmnd.h> 33#include <linux/cdev.h> 34#include <net/netlink.h> 35#include <net/genetlink.h> 36#include <linux/connector.h> 37/* 38 * Driver name : string representing the driver name 39 * Device file : /dev file to be used for management interfaces 40 * Driver version: version string in major_version.minor_version.patch format 41 * Driver date : date information in "Mon dd yyyy" format 42 */ 43#define PMCRAID_DRIVER_NAME "PMC MaxRAID" 44#define PMCRAID_DEVFILE "pmcsas" 45#define PMCRAID_DRIVER_VERSION "1.0.3" 46#define PMCRAID_DRIVER_DATE __DATE__ 47 48#define PMCRAID_FW_VERSION_1 0x002 49 50/* Maximum number of adapters supported by current version of the driver */ 51#define PMCRAID_MAX_ADAPTERS 1024 52 53/* Bit definitions as per firmware, bit position [0][1][2].....[31] */ 54#define PMC_BIT8(n) (1 << (7-n)) 55#define PMC_BIT16(n) (1 << (15-n)) 56#define PMC_BIT32(n) (1 << (31-n)) 57 58/* PMC PCI vendor ID and device ID values */ 59#define PCI_VENDOR_ID_PMC 0x11F8 60#define PCI_DEVICE_ID_PMC_MAXRAID 0x5220 61 62/* 63 * MAX_CMD : maximum commands that can be outstanding with IOA 64 * MAX_IO_CMD : command blocks available for IO commands 65 * MAX_HCAM_CMD : command blocks avaibale for HCAMS 66 * MAX_INTERNAL_CMD : command blocks avaible for internal commands like reset 67 */ 68#define PMCRAID_MAX_CMD 1024 69#define PMCRAID_MAX_IO_CMD 1020 70#define PMCRAID_MAX_HCAM_CMD 2 71#define PMCRAID_MAX_INTERNAL_CMD 2 72 73/* MAX_IOADLS : max number of scatter-gather lists supported by IOA 74 * IOADLS_INTERNAL : number of ioadls included as part of IOARCB. 75 * IOADLS_EXTERNAL : number of ioadls allocated external to IOARCB 76 */ 77#define PMCRAID_IOADLS_INTERNAL 27 78#define PMCRAID_IOADLS_EXTERNAL 37 79#define PMCRAID_MAX_IOADLS PMCRAID_IOADLS_INTERNAL 80 81/* HRRQ_ENTRY_SIZE : size of hrrq buffer 82 * IOARCB_ALIGNMENT : alignment required for IOARCB 83 * IOADL_ALIGNMENT : alignment requirement for IOADLs 84 * MSIX_VECTORS : number of MSIX vectors supported 85 */ 86#define HRRQ_ENTRY_SIZE sizeof(__le32) 87#define PMCRAID_IOARCB_ALIGNMENT 32 88#define PMCRAID_IOADL_ALIGNMENT 16 89#define PMCRAID_IOASA_ALIGNMENT 4 90#define PMCRAID_NUM_MSIX_VECTORS 16 91 92/* various other limits */ 93#define PMCRAID_VENDOR_ID_LEN 8 94#define PMCRAID_PRODUCT_ID_LEN 16 95#define PMCRAID_SERIAL_NUM_LEN 8 96#define PMCRAID_LUN_LEN 8 97#define PMCRAID_MAX_CDB_LEN 16 98#define PMCRAID_DEVICE_ID_LEN 8 99#define PMCRAID_SENSE_DATA_LEN 256 100#define PMCRAID_ADD_CMD_PARAM_LEN 48 101 102#define PMCRAID_MAX_BUS_TO_SCAN 1 103#define PMCRAID_MAX_NUM_TARGETS_PER_BUS 256 104#define PMCRAID_MAX_NUM_LUNS_PER_TARGET 8 105 106/* IOA bus/target/lun number of IOA resources */ 107#define PMCRAID_IOA_BUS_ID 0xfe 108#define PMCRAID_IOA_TARGET_ID 0xff 109#define PMCRAID_IOA_LUN_ID 0xff 110#define PMCRAID_VSET_BUS_ID 0x1 111#define PMCRAID_VSET_LUN_ID 0x0 112#define PMCRAID_PHYS_BUS_ID 0x0 113#define PMCRAID_VIRTUAL_ENCL_BUS_ID 0x8 114#define PMCRAID_MAX_VSET_TARGETS 0x7F 115#define PMCRAID_MAX_VSET_LUNS_PER_TARGET 8 116 117#define PMCRAID_IOA_MAX_SECTORS 32767 118#define PMCRAID_VSET_MAX_SECTORS 512 119#define PMCRAID_MAX_CMD_PER_LUN 254 120 121/* Number of configuration table entries (resources), includes 1 FP, 122 * 1 Enclosure device 123 */ 124#define PMCRAID_MAX_RESOURCES 256 125 126/* Adapter Commands used by driver */ 127#define PMCRAID_QUERY_RESOURCE_STATE 0xC2 128#define PMCRAID_RESET_DEVICE 0xC3 129/* options to select reset target */ 130#define ENABLE_RESET_MODIFIER 0x80 131#define RESET_DEVICE_LUN 0x40 132#define RESET_DEVICE_TARGET 0x20 133#define RESET_DEVICE_BUS 0x10 134 135#define PMCRAID_IDENTIFY_HRRQ 0xC4 136#define PMCRAID_QUERY_IOA_CONFIG 0xC5 137#define PMCRAID_QUERY_CMD_STATUS 0xCB 138#define PMCRAID_ABORT_CMD 0xC7 139 140/* CANCEL ALL command, provides option for setting SYNC_COMPLETE 141 * on the target resources for which commands got cancelled 142 */ 143#define PMCRAID_CANCEL_ALL_REQUESTS 0xCE 144#define PMCRAID_SYNC_COMPLETE_AFTER_CANCEL PMC_BIT8(0) 145 146/* HCAM command and types of HCAM supported by IOA */ 147#define PMCRAID_HOST_CONTROLLED_ASYNC 0xCF 148#define PMCRAID_HCAM_CODE_CONFIG_CHANGE 0x01 149#define PMCRAID_HCAM_CODE_LOG_DATA 0x02 150 151/* IOA shutdown command and various shutdown types */ 152#define PMCRAID_IOA_SHUTDOWN 0xF7 153#define PMCRAID_SHUTDOWN_NORMAL 0x00 154#define PMCRAID_SHUTDOWN_PREPARE_FOR_NORMAL 0x40 155#define PMCRAID_SHUTDOWN_NONE 0x100 156#define PMCRAID_SHUTDOWN_ABBREV 0x80 157 158/* SET SUPPORTED DEVICES command and the option to select all the 159 * devices to be supported 160 */ 161#define PMCRAID_SET_SUPPORTED_DEVICES 0xFB 162#define ALL_DEVICES_SUPPORTED PMC_BIT8(0) 163 164/* This option is used with SCSI WRITE_BUFFER command */ 165#define PMCRAID_WR_BUF_DOWNLOAD_AND_SAVE 0x05 166 167/* IOASC Codes used by driver */ 168#define PMCRAID_IOASC_SENSE_MASK 0xFFFFFF00 169#define PMCRAID_IOASC_SENSE_KEY(ioasc) ((ioasc) >> 24) 170#define PMCRAID_IOASC_SENSE_CODE(ioasc) (((ioasc) & 0x00ff0000) >> 16) 171#define PMCRAID_IOASC_SENSE_QUAL(ioasc) (((ioasc) & 0x0000ff00) >> 8) 172#define PMCRAID_IOASC_SENSE_STATUS(ioasc) ((ioasc) & 0x000000ff) 173 174#define PMCRAID_IOASC_GOOD_COMPLETION 0x00000000 175#define PMCRAID_IOASC_GC_IOARCB_NOTFOUND 0x005A0000 176#define PMCRAID_IOASC_NR_INIT_CMD_REQUIRED 0x02040200 177#define PMCRAID_IOASC_NR_IOA_RESET_REQUIRED 0x02048000 178#define PMCRAID_IOASC_NR_SYNC_REQUIRED 0x023F0000 179#define PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC 0x03110C00 180#define PMCRAID_IOASC_HW_CANNOT_COMMUNICATE 0x04050000 181#define PMCRAID_IOASC_HW_DEVICE_TIMEOUT 0x04080100 182#define PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR 0x04448500 183#define PMCRAID_IOASC_HW_IOA_RESET_REQUIRED 0x04448600 184#define PMCRAID_IOASC_IR_INVALID_RESOURCE_HANDLE 0x05250000 185#define PMCRAID_IOASC_AC_TERMINATED_BY_HOST 0x0B5A0000 186#define PMCRAID_IOASC_UA_BUS_WAS_RESET 0x06290000 187#define PMCRAID_IOASC_TIME_STAMP_OUT_OF_SYNC 0x06908B00 188#define PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER 0x06298000 189 190/* Driver defined IOASCs */ 191#define PMCRAID_IOASC_IOA_WAS_RESET 0x10000001 192#define PMCRAID_IOASC_PCI_ACCESS_ERROR 0x10000002 193 194/* Various timeout values (in milliseconds) used. If any of these are chip 195 * specific, move them to pmcraid_chip_details structure. 196 */ 197#define PMCRAID_PCI_DEASSERT_TIMEOUT 2000 198#define PMCRAID_BIST_TIMEOUT 2000 199#define PMCRAID_AENWAIT_TIMEOUT 5000 200#define PMCRAID_TRANSOP_TIMEOUT 60000 201 202#define PMCRAID_RESET_TIMEOUT (2 * HZ) 203#define PMCRAID_CHECK_FOR_RESET_TIMEOUT ((HZ / 10)) 204#define PMCRAID_VSET_IO_TIMEOUT (60 * HZ) 205#define PMCRAID_INTERNAL_TIMEOUT (60 * HZ) 206#define PMCRAID_SHUTDOWN_TIMEOUT (150 * HZ) 207#define PMCRAID_RESET_BUS_TIMEOUT (60 * HZ) 208#define PMCRAID_RESET_HOST_TIMEOUT (150 * HZ) 209#define PMCRAID_REQUEST_SENSE_TIMEOUT (30 * HZ) 210#define PMCRAID_SET_SUP_DEV_TIMEOUT (2 * 60 * HZ) 211 212/* structure to represent a scatter-gather element (IOADL descriptor) */ 213struct pmcraid_ioadl_desc { 214 __le64 address; 215 __le32 data_len; 216 __u8 reserved[3]; 217 __u8 flags; 218} __attribute__((packed, aligned(PMCRAID_IOADL_ALIGNMENT))); 219 220/* pmcraid_ioadl_desc.flags values */ 221#define IOADL_FLAGS_CHAINED PMC_BIT8(0) 222#define IOADL_FLAGS_LAST_DESC PMC_BIT8(1) 223#define IOADL_FLAGS_READ_LAST PMC_BIT8(1) 224#define IOADL_FLAGS_WRITE_LAST PMC_BIT8(1) 225 226 227/* additional IOARCB data which can be CDB or additional request parameters 228 * or list of IOADLs. Firmware supports max of 512 bytes for IOARCB, hence then 229 * number of IOADLs are limted to 27. In case they are more than 27, they will 230 * be used in chained form 231 */ 232struct pmcraid_ioarcb_add_data { 233 union { 234 struct pmcraid_ioadl_desc ioadl[PMCRAID_IOADLS_INTERNAL]; 235 __u8 add_cmd_params[PMCRAID_ADD_CMD_PARAM_LEN]; 236 } u; 237}; 238 239/* 240 * IOA Request Control Block 241 */ 242struct pmcraid_ioarcb { 243 __le64 ioarcb_bus_addr; 244 __le32 resource_handle; 245 __le32 response_handle; 246 __le64 ioadl_bus_addr; 247 __le32 ioadl_length; 248 __le32 data_transfer_length; 249 __le64 ioasa_bus_addr; 250 __le16 ioasa_len; 251 __le16 cmd_timeout; 252 __le16 add_cmd_param_offset; 253 __le16 add_cmd_param_length; 254 __le32 reserved1[2]; 255 __le32 reserved2; 256 __u8 request_type; 257 __u8 request_flags0; 258 __u8 request_flags1; 259 __u8 hrrq_id; 260 __u8 cdb[PMCRAID_MAX_CDB_LEN]; 261 struct pmcraid_ioarcb_add_data add_data; 262} __attribute__((packed, aligned(PMCRAID_IOARCB_ALIGNMENT))); 263 264/* well known resource handle values */ 265#define PMCRAID_IOA_RES_HANDLE 0xffffffff 266#define PMCRAID_INVALID_RES_HANDLE 0 267 268/* pmcraid_ioarcb.request_type values */ 269#define REQ_TYPE_SCSI 0x00 270#define REQ_TYPE_IOACMD 0x01 271#define REQ_TYPE_HCAM 0x02 272 273/* pmcraid_ioarcb.flags0 values */ 274#define TRANSFER_DIR_WRITE PMC_BIT8(0) 275#define INHIBIT_UL_CHECK PMC_BIT8(2) 276#define SYNC_OVERRIDE PMC_BIT8(3) 277#define SYNC_COMPLETE PMC_BIT8(4) 278#define NO_LINK_DESCS PMC_BIT8(5) 279 280/* pmcraid_ioarcb.flags1 values */ 281#define DELAY_AFTER_RESET PMC_BIT8(0) 282#define TASK_TAG_SIMPLE 0x10 283#define TASK_TAG_ORDERED 0x20 284#define TASK_TAG_QUEUE_HEAD 0x30 285 286/* toggle bit offset in response handle */ 287#define HRRQ_TOGGLE_BIT 0x01 288#define HRRQ_RESPONSE_BIT 0x02 289 290/* IOA Status Area */ 291struct pmcraid_ioasa_vset { 292 __le32 failing_lba_hi; 293 __le32 failing_lba_lo; 294 __le32 reserved; 295} __attribute__((packed, aligned(4))); 296 297struct pmcraid_ioasa { 298 __le32 ioasc; 299 __le16 returned_status_length; 300 __le16 available_status_length; 301 __le32 residual_data_length; 302 __le32 ilid; 303 __le32 fd_ioasc; 304 __le32 fd_res_address; 305 __le32 fd_res_handle; 306 __le32 reserved; 307 308 /* resource specific sense information */ 309 union { 310 struct pmcraid_ioasa_vset vset; 311 } u; 312 313 /* IOA autosense data */ 314 __le16 auto_sense_length; 315 __le16 error_data_length; 316 __u8 sense_data[PMCRAID_SENSE_DATA_LEN]; 317} __attribute__((packed, aligned(4))); 318 319#define PMCRAID_DRIVER_ILID 0xffffffff 320 321/* Config Table Entry per Resource */ 322struct pmcraid_config_table_entry { 323 __u8 resource_type; 324 __u8 bus_protocol; 325 __le16 array_id; 326 __u8 common_flags0; 327 __u8 common_flags1; 328 __u8 unique_flags0; 329 __u8 unique_flags1; /*also used as vset target_id */ 330 __le32 resource_handle; 331 __le32 resource_address; 332 __u8 device_id[PMCRAID_DEVICE_ID_LEN]; 333 __u8 lun[PMCRAID_LUN_LEN]; 334} __attribute__((packed, aligned(4))); 335 336/* extended configuration table sizes are also of 32 bytes in size */ 337struct pmcraid_config_table_entry_ext { 338 struct pmcraid_config_table_entry cfgte; 339}; 340 341/* resource types (config_table_entry.resource_type values) */ 342#define RES_TYPE_AF_DASD 0x00 343#define RES_TYPE_GSCSI 0x01 344#define RES_TYPE_VSET 0x02 345#define RES_TYPE_IOA_FP 0xFF 346 347#define RES_IS_IOA(res) ((res).resource_type == RES_TYPE_IOA_FP) 348#define RES_IS_GSCSI(res) ((res).resource_type == RES_TYPE_GSCSI) 349#define RES_IS_VSET(res) ((res).resource_type == RES_TYPE_VSET) 350#define RES_IS_AFDASD(res) ((res).resource_type == RES_TYPE_AF_DASD) 351 352/* bus_protocol values used by driver */ 353#define RES_TYPE_VENCLOSURE 0x8 354 355/* config_table_entry.common_flags0 */ 356#define MULTIPATH_RESOURCE PMC_BIT32(0) 357 358/* unique_flags1 */ 359#define IMPORT_MODE_MANUAL PMC_BIT8(0) 360 361/* well known resource handle values */ 362#define RES_HANDLE_IOA 0xFFFFFFFF 363#define RES_HANDLE_NONE 0x00000000 364 365/* well known resource address values */ 366#define RES_ADDRESS_IOAFP 0xFEFFFFFF 367#define RES_ADDRESS_INVALID 0xFFFFFFFF 368 369/* BUS/TARGET/LUN values from resource_addrr */ 370#define RES_BUS(res_addr) (le32_to_cpu(res_addr) & 0xFF) 371#define RES_TARGET(res_addr) ((le32_to_cpu(res_addr) >> 16) & 0xFF) 372#define RES_LUN(res_addr) 0x0 373 374/* configuration table structure */ 375struct pmcraid_config_table { 376 __le16 num_entries; 377 __u8 table_format; 378 __u8 reserved1; 379 __u8 flags; 380 __u8 reserved2[11]; 381 union { 382 struct pmcraid_config_table_entry 383 entries[PMCRAID_MAX_RESOURCES]; 384 struct pmcraid_config_table_entry_ext 385 entries_ext[PMCRAID_MAX_RESOURCES]; 386 }; 387} __attribute__((packed, aligned(4))); 388 389/* config_table.flags value */ 390#define MICROCODE_UPDATE_REQUIRED PMC_BIT32(0) 391 392/* 393 * HCAM format 394 */ 395#define PMCRAID_HOSTRCB_LDNSIZE 4056 396 397/* Error log notification format */ 398struct pmcraid_hostrcb_error { 399 __le32 fd_ioasc; 400 __le32 fd_ra; 401 __le32 fd_rh; 402 __le32 prc; 403 union { 404 __u8 data[PMCRAID_HOSTRCB_LDNSIZE]; 405 } u; 406} __attribute__ ((packed, aligned(4))); 407 408struct pmcraid_hcam_hdr { 409 __u8 op_code; 410 __u8 notification_type; 411 __u8 notification_lost; 412 __u8 flags; 413 __u8 overlay_id; 414 __u8 reserved1[3]; 415 __le32 ilid; 416 __le32 timestamp1; 417 __le32 timestamp2; 418 __le32 data_len; 419} __attribute__((packed, aligned(4))); 420 421#define PMCRAID_AEN_GROUP 0x3 422 423struct pmcraid_hcam_ccn { 424 struct pmcraid_hcam_hdr header; 425 struct pmcraid_config_table_entry cfg_entry; 426 struct pmcraid_config_table_entry cfg_entry_old; 427} __attribute__((packed, aligned(4))); 428 429#define PMCRAID_CCN_EXT_SIZE 3944 430struct pmcraid_hcam_ccn_ext { 431 struct pmcraid_hcam_hdr header; 432 struct pmcraid_config_table_entry_ext cfg_entry; 433 struct pmcraid_config_table_entry_ext cfg_entry_old; 434 __u8 reserved[PMCRAID_CCN_EXT_SIZE]; 435} __attribute__((packed, aligned(4))); 436 437struct pmcraid_hcam_ldn { 438 struct pmcraid_hcam_hdr header; 439 struct pmcraid_hostrcb_error error_log; 440} __attribute__((packed, aligned(4))); 441 442/* pmcraid_hcam.op_code values */ 443#define HOSTRCB_TYPE_CCN 0xE1 444#define HOSTRCB_TYPE_LDN 0xE2 445 446/* pmcraid_hcam.notification_type values */ 447#define NOTIFICATION_TYPE_ENTRY_CHANGED 0x0 448#define NOTIFICATION_TYPE_ENTRY_NEW 0x1 449#define NOTIFICATION_TYPE_ENTRY_DELETED 0x2 450#define NOTIFICATION_TYPE_STATE_CHANGE 0x3 451#define NOTIFICATION_TYPE_ENTRY_STATECHANGED 0x4 452#define NOTIFICATION_TYPE_ERROR_LOG 0x10 453#define NOTIFICATION_TYPE_INFORMATION_LOG 0x11 454 455#define HOSTRCB_NOTIFICATIONS_LOST PMC_BIT8(0) 456 457/* pmcraid_hcam.flags values */ 458#define HOSTRCB_INTERNAL_OP_ERROR PMC_BIT8(0) 459#define HOSTRCB_ERROR_RESPONSE_SENT PMC_BIT8(1) 460 461/* pmcraid_hcam.overlay_id values */ 462#define HOSTRCB_OVERLAY_ID_08 0x08 463#define HOSTRCB_OVERLAY_ID_09 0x09 464#define HOSTRCB_OVERLAY_ID_11 0x11 465#define HOSTRCB_OVERLAY_ID_12 0x12 466#define HOSTRCB_OVERLAY_ID_13 0x13 467#define HOSTRCB_OVERLAY_ID_14 0x14 468#define HOSTRCB_OVERLAY_ID_16 0x16 469#define HOSTRCB_OVERLAY_ID_17 0x17 470#define HOSTRCB_OVERLAY_ID_20 0x20 471#define HOSTRCB_OVERLAY_ID_FF 0xFF 472 473/* Implementation specific card details */ 474struct pmcraid_chip_details { 475 /* hardware register offsets */ 476 unsigned long ioastatus; 477 unsigned long ioarrin; 478 unsigned long mailbox; 479 unsigned long global_intr_mask; 480 unsigned long ioa_host_intr; 481 unsigned long ioa_host_msix_intr; 482 unsigned long ioa_host_intr_clr; 483 unsigned long ioa_host_mask; 484 unsigned long ioa_host_mask_clr; 485 unsigned long host_ioa_intr; 486 unsigned long host_ioa_intr_clr; 487 488 /* timeout used during transitional to operational state */ 489 unsigned long transop_timeout; 490}; 491 492/* IOA to HOST doorbells (interrupts) */ 493#define INTRS_TRANSITION_TO_OPERATIONAL PMC_BIT32(0) 494#define INTRS_IOARCB_TRANSFER_FAILED PMC_BIT32(3) 495#define INTRS_IOA_UNIT_CHECK PMC_BIT32(4) 496#define INTRS_NO_HRRQ_FOR_CMD_RESPONSE PMC_BIT32(5) 497#define INTRS_CRITICAL_OP_IN_PROGRESS PMC_BIT32(6) 498#define INTRS_IO_DEBUG_ACK PMC_BIT32(7) 499#define INTRS_IOARRIN_LOST PMC_BIT32(27) 500#define INTRS_SYSTEM_BUS_MMIO_ERROR PMC_BIT32(28) 501#define INTRS_IOA_PROCESSOR_ERROR PMC_BIT32(29) 502#define INTRS_HRRQ_VALID PMC_BIT32(30) 503#define INTRS_OPERATIONAL_STATUS PMC_BIT32(0) 504#define INTRS_ALLOW_MSIX_VECTOR0 PMC_BIT32(31) 505 506/* Host to IOA Doorbells */ 507#define DOORBELL_RUNTIME_RESET PMC_BIT32(1) 508#define DOORBELL_IOA_RESET_ALERT PMC_BIT32(7) 509#define DOORBELL_IOA_DEBUG_ALERT PMC_BIT32(9) 510#define DOORBELL_ENABLE_DESTRUCTIVE_DIAGS PMC_BIT32(8) 511#define DOORBELL_IOA_START_BIST PMC_BIT32(23) 512#define DOORBELL_INTR_MODE_MSIX PMC_BIT32(25) 513#define DOORBELL_INTR_MSIX_CLR PMC_BIT32(26) 514#define DOORBELL_RESET_IOA PMC_BIT32(31) 515 516/* Global interrupt mask register value */ 517#define GLOBAL_INTERRUPT_MASK 0x5ULL 518 519#define PMCRAID_ERROR_INTERRUPTS (INTRS_IOARCB_TRANSFER_FAILED | \ 520 INTRS_IOA_UNIT_CHECK | \ 521 INTRS_NO_HRRQ_FOR_CMD_RESPONSE | \ 522 INTRS_IOARRIN_LOST | \ 523 INTRS_SYSTEM_BUS_MMIO_ERROR | \ 524 INTRS_IOA_PROCESSOR_ERROR) 525 526#define PMCRAID_PCI_INTERRUPTS (PMCRAID_ERROR_INTERRUPTS | \ 527 INTRS_HRRQ_VALID | \ 528 INTRS_TRANSITION_TO_OPERATIONAL |\ 529 INTRS_ALLOW_MSIX_VECTOR0) 530 531/* control_block, associated with each of the commands contains IOARCB, IOADLs 532 * memory for IOASA. Additional 3 * 16 bytes are allocated in order to support 533 * additional request parameters (of max size 48) any command. 534 */ 535struct pmcraid_control_block { 536 struct pmcraid_ioarcb ioarcb; 537 struct pmcraid_ioadl_desc ioadl[PMCRAID_IOADLS_EXTERNAL + 3]; 538 struct pmcraid_ioasa ioasa; 539} __attribute__ ((packed, aligned(PMCRAID_IOARCB_ALIGNMENT))); 540 541/* pmcraid_sglist - Scatter-gather list allocated for passthrough ioctls 542 */ 543struct pmcraid_sglist { 544 u32 order; 545 u32 num_sg; 546 u32 num_dma_sg; 547 u32 buffer_len; 548 struct scatterlist scatterlist[1]; 549}; 550 551/* page D0 inquiry data of focal point resource */ 552struct pmcraid_inquiry_data { 553 __u8 ph_dev_type; 554 __u8 page_code; 555 __u8 reserved1; 556 __u8 add_page_len; 557 __u8 length; 558 __u8 reserved2; 559 __le16 fw_version; 560 __u8 reserved3[16]; 561}; 562 563#define PMCRAID_TIMESTAMP_LEN 12 564#define PMCRAID_REQ_TM_STR_LEN 6 565#define PMCRAID_SCSI_SET_TIMESTAMP 0xA4 566#define PMCRAID_SCSI_SERVICE_ACTION 0x0F 567 568struct pmcraid_timestamp_data { 569 __u8 reserved1[4]; 570 __u8 timestamp[PMCRAID_REQ_TM_STR_LEN]; /* current time value */ 571 __u8 reserved2[2]; 572}; 573 574/* pmcraid_cmd - LLD representation of SCSI command */ 575struct pmcraid_cmd { 576 577 /* Ptr and bus address of DMA.able control block for this command */ 578 struct pmcraid_control_block *ioa_cb; 579 dma_addr_t ioa_cb_bus_addr; 580 dma_addr_t dma_handle; 581 582 /* pointer to mid layer structure of SCSI commands */ 583 struct scsi_cmnd *scsi_cmd; 584 585 struct list_head free_list; 586 struct completion wait_for_completion; 587 struct timer_list timer; /* needed for internal commands */ 588 u32 timeout; /* current timeout value */ 589 u32 index; /* index into the command list */ 590 u8 completion_req; /* for handling internal commands */ 591 u8 release; /* for handling completions */ 592 593 void (*cmd_done) (struct pmcraid_cmd *); 594 struct pmcraid_instance *drv_inst; 595 596 struct pmcraid_sglist *sglist; /* used for passthrough IOCTLs */ 597 598 /* scratch used */ 599 union { 600 /* during reset sequence */ 601 unsigned long time_left; 602 struct pmcraid_resource_entry *res; 603 int hrrq_index; 604 605 /* used during IO command error handling. Sense buffer 606 * for REQUEST SENSE command if firmware is not sending 607 * auto sense data 608 */ 609 struct { 610 u8 *sense_buffer; 611 dma_addr_t sense_buffer_dma; 612 }; 613 }; 614}; 615 616/* 617 * Interrupt registers of IOA 618 */ 619struct pmcraid_interrupts { 620 void __iomem *ioa_host_interrupt_reg; 621 void __iomem *ioa_host_msix_interrupt_reg; 622 void __iomem *ioa_host_interrupt_clr_reg; 623 void __iomem *ioa_host_interrupt_mask_reg; 624 void __iomem *ioa_host_interrupt_mask_clr_reg; 625 void __iomem *global_interrupt_mask_reg; 626 void __iomem *host_ioa_interrupt_reg; 627 void __iomem *host_ioa_interrupt_clr_reg; 628}; 629 630/* ISR parameters LLD allocates (one for each MSI-X if enabled) vectors */ 631struct pmcraid_isr_param { 632 struct pmcraid_instance *drv_inst; 633 u16 vector; /* allocated msi-x vector */ 634 u8 hrrq_id; /* hrrq entry index */ 635}; 636 637 638/* AEN message header sent as part of event data to applications */ 639struct pmcraid_aen_msg { 640 u32 hostno; 641 u32 length; 642 u8 reserved[8]; 643 u8 data[0]; 644}; 645 646/* Controller state event message type */ 647struct pmcraid_state_msg { 648 struct pmcraid_aen_msg msg; 649 u32 ioa_state; 650}; 651 652#define PMC_DEVICE_EVENT_RESET_START 0x11000000 653#define PMC_DEVICE_EVENT_RESET_SUCCESS 0x11000001 654#define PMC_DEVICE_EVENT_RESET_FAILED 0x11000002 655#define PMC_DEVICE_EVENT_SHUTDOWN_START 0x11000003 656#define PMC_DEVICE_EVENT_SHUTDOWN_SUCCESS 0x11000004 657#define PMC_DEVICE_EVENT_SHUTDOWN_FAILED 0x11000005 658 659struct pmcraid_hostrcb { 660 struct pmcraid_instance *drv_inst; 661 struct pmcraid_aen_msg *msg; 662 struct pmcraid_hcam_hdr *hcam; /* pointer to hcam buffer */ 663 struct pmcraid_cmd *cmd; /* pointer to command block used */ 664 dma_addr_t baddr; /* system address of hcam buffer */ 665 atomic_t ignore; /* process HCAM response ? */ 666}; 667 668#define PMCRAID_AEN_HDR_SIZE sizeof(struct pmcraid_aen_msg) 669 670 671 672/* 673 * Per adapter structure maintained by LLD 674 */ 675struct pmcraid_instance { 676 /* Array of allowed-to-be-exposed resources, initialized from 677 * Configutation Table, later updated with CCNs 678 */ 679 struct pmcraid_resource_entry *res_entries; 680 681 struct list_head free_res_q; /* res_entries lists for easy lookup */ 682 struct list_head used_res_q; /* List of to be exposed resources */ 683 spinlock_t resource_lock; /* spinlock to protect resource list */ 684 685 void __iomem *mapped_dma_addr; 686 void __iomem *ioa_status; /* Iomapped IOA status register */ 687 void __iomem *mailbox; /* Iomapped mailbox register */ 688 void __iomem *ioarrin; /* IOmapped IOARR IN register */ 689 690 struct pmcraid_interrupts int_regs; 691 struct pmcraid_chip_details *chip_cfg; 692 693 /* HostRCBs needed for HCAM */ 694 struct pmcraid_hostrcb ldn; 695 struct pmcraid_hostrcb ccn; 696 struct pmcraid_state_msg scn; /* controller state change msg */ 697 698 699 /* Bus address of start of HRRQ */ 700 dma_addr_t hrrq_start_bus_addr[PMCRAID_NUM_MSIX_VECTORS]; 701 702 /* Pointer to 1st entry of HRRQ */ 703 __be32 *hrrq_start[PMCRAID_NUM_MSIX_VECTORS]; 704 705 /* Pointer to last entry of HRRQ */ 706 __be32 *hrrq_end[PMCRAID_NUM_MSIX_VECTORS]; 707 708 /* Pointer to current pointer of hrrq */ 709 __be32 *hrrq_curr[PMCRAID_NUM_MSIX_VECTORS]; 710 711 /* Lock for HRRQ access */ 712 spinlock_t hrrq_lock[PMCRAID_NUM_MSIX_VECTORS]; 713 714 struct pmcraid_inquiry_data *inq_data; 715 dma_addr_t inq_data_baddr; 716 717 struct pmcraid_timestamp_data *timestamp_data; 718 dma_addr_t timestamp_data_baddr; 719 720 /* size of configuration table entry, varies based on the firmware */ 721 u32 config_table_entry_size; 722 723 /* Expected toggle bit at host */ 724 u8 host_toggle_bit[PMCRAID_NUM_MSIX_VECTORS]; 725 726 727 /* Wait Q for threads to wait for Reset IOA completion */ 728 wait_queue_head_t reset_wait_q; 729 struct pmcraid_cmd *reset_cmd; 730 731 /* structures for supporting SIGIO based AEN. */ 732 struct fasync_struct *aen_queue; 733 struct mutex aen_queue_lock; /* lock for aen subscribers list */ 734 struct cdev cdev; 735 736 struct Scsi_Host *host; /* mid layer interface structure handle */ 737 struct pci_dev *pdev; /* PCI device structure handle */ 738 739 /* No of Reset IOA retries . IOA marked dead if threshold exceeds */ 740 u8 ioa_reset_attempts; 741#define PMCRAID_RESET_ATTEMPTS 3 742 743 u8 current_log_level; /* default level for logging IOASC errors */ 744 745 u8 num_hrrq; /* Number of interrupt vectors allocated */ 746 u8 interrupt_mode; /* current interrupt mode legacy or msix */ 747 dev_t dev; /* Major-Minor numbers for Char device */ 748 749 /* Used as ISR handler argument */ 750 struct pmcraid_isr_param hrrq_vector[PMCRAID_NUM_MSIX_VECTORS]; 751 752 /* Message id as filled in last fired IOARCB, used to identify HRRQ */ 753 atomic_t last_message_id; 754 755 /* configuration table */ 756 struct pmcraid_config_table *cfg_table; 757 dma_addr_t cfg_table_bus_addr; 758 759 /* structures related to command blocks */ 760 struct kmem_cache *cmd_cachep; /* cache for cmd blocks */ 761 struct pci_pool *control_pool; /* pool for control blocks */ 762 char cmd_pool_name[64]; /* name of cmd cache */ 763 char ctl_pool_name[64]; /* name of control cache */ 764 765 struct pmcraid_cmd *cmd_list[PMCRAID_MAX_CMD]; 766 767 struct list_head free_cmd_pool; 768 struct list_head pending_cmd_pool; 769 spinlock_t free_pool_lock; /* free pool lock */ 770 spinlock_t pending_pool_lock; /* pending pool lock */ 771 772 /* Tasklet to handle deferred processing */ 773 struct tasklet_struct isr_tasklet[PMCRAID_NUM_MSIX_VECTORS]; 774 775 /* Work-queue (Shared) for deferred reset processing */ 776 struct work_struct worker_q; 777 778 /* No of IO commands pending with FW */ 779 atomic_t outstanding_cmds; 780 781 /* should add/delete resources to mid-layer now ?*/ 782 atomic_t expose_resources; 783 784 785 786 u32 ioa_state:4; /* For IOA Reset sequence FSM */ 787#define IOA_STATE_OPERATIONAL 0x0 788#define IOA_STATE_UNKNOWN 0x1 789#define IOA_STATE_DEAD 0x2 790#define IOA_STATE_IN_SOFT_RESET 0x3 791#define IOA_STATE_IN_HARD_RESET 0x4 792#define IOA_STATE_IN_RESET_ALERT 0x5 793#define IOA_STATE_IN_BRINGDOWN 0x6 794#define IOA_STATE_IN_BRINGUP 0x7 795 796 u32 ioa_reset_in_progress:1; /* true if IOA reset is in progress */ 797 u32 ioa_hard_reset:1; /* TRUE if Hard Reset is needed */ 798 u32 ioa_unit_check:1; /* Indicates Unit Check condition */ 799 u32 ioa_bringdown:1; /* whether IOA needs to be brought down */ 800 u32 force_ioa_reset:1; /* force adapter reset ? */ 801 u32 reinit_cfg_table:1; /* reinit config table due to lost CCN */ 802 u32 ioa_shutdown_type:2;/* shutdown type used during reset */ 803#define SHUTDOWN_NONE 0x0 804#define SHUTDOWN_NORMAL 0x1 805#define SHUTDOWN_ABBREV 0x2 806 u32 timestamp_error:1; /* indicate set timestamp for out of sync */ 807 808}; 809 810/* LLD maintained resource entry structure */ 811struct pmcraid_resource_entry { 812 struct list_head queue; /* link to "to be exposed" resources */ 813 union { 814 struct pmcraid_config_table_entry cfg_entry; 815 struct pmcraid_config_table_entry_ext cfg_entry_ext; 816 }; 817 struct scsi_device *scsi_dev; /* Link scsi_device structure */ 818 atomic_t read_failures; /* count of failed READ commands */ 819 atomic_t write_failures; /* count of failed WRITE commands */ 820 821 /* To indicate add/delete/modify during CCN */ 822 u8 change_detected; 823#define RES_CHANGE_ADD 0x1 /* add this to mid-layer */ 824#define RES_CHANGE_DEL 0x2 /* remove this from mid-layer */ 825 826 u8 reset_progress; /* Device is resetting */ 827 828 /* 829 * When IOA asks for sync (i.e. IOASC = Not Ready, Sync Required), this 830 * flag will be set, mid layer will be asked to retry. In the next 831 * attempt, this flag will be checked in queuecommand() to set 832 * SYNC_COMPLETE flag in IOARCB (flag_0). 833 */ 834 u8 sync_reqd; 835 836 /* target indicates the mapped target_id assigned to this resource if 837 * this is VSET resource. For non-VSET resources this will be un-used 838 * or zero 839 */ 840 u8 target; 841}; 842 843/* Data structures used in IOASC error code logging */ 844struct pmcraid_ioasc_error { 845 u32 ioasc_code; /* IOASC code */ 846 u8 log_level; /* default log level assignment. */ 847 char *error_string; 848}; 849 850/* Initial log_level assignments for various IOASCs */ 851#define IOASC_LOG_LEVEL_NONE 0x0 /* no logging */ 852#define IOASC_LOG_LEVEL_MUST 0x1 /* must log: all high-severity errors */ 853#define IOASC_LOG_LEVEL_HARD 0x2 /* optional – low severity errors */ 854 855/* Error information maintained by LLD. LLD initializes the pmcraid_error_table 856 * statically. 857 */ 858static struct pmcraid_ioasc_error pmcraid_ioasc_error_table[] = { 859 {0x01180600, IOASC_LOG_LEVEL_HARD, 860 "Recovered Error, soft media error, sector reassignment suggested"}, 861 {0x015D0000, IOASC_LOG_LEVEL_HARD, 862 "Recovered Error, failure prediction thresold exceeded"}, 863 {0x015D9200, IOASC_LOG_LEVEL_HARD, 864 "Recovered Error, soft Cache Card Battery error thresold"}, 865 {0x015D9200, IOASC_LOG_LEVEL_HARD, 866 "Recovered Error, soft Cache Card Battery error thresold"}, 867 {0x02048000, IOASC_LOG_LEVEL_HARD, 868 "Not Ready, IOA Reset Required"}, 869 {0x02408500, IOASC_LOG_LEVEL_HARD, 870 "Not Ready, IOA microcode download required"}, 871 {0x03110B00, IOASC_LOG_LEVEL_HARD, 872 "Medium Error, data unreadable, reassignment suggested"}, 873 {0x03110C00, IOASC_LOG_LEVEL_MUST, 874 "Medium Error, data unreadable do not reassign"}, 875 {0x03310000, IOASC_LOG_LEVEL_HARD, 876 "Medium Error, media corrupted"}, 877 {0x04050000, IOASC_LOG_LEVEL_HARD, 878 "Hardware Error, IOA can't communicate with device"}, 879 {0x04080000, IOASC_LOG_LEVEL_MUST, 880 "Hardware Error, device bus error"}, 881 {0x04088000, IOASC_LOG_LEVEL_MUST, 882 "Hardware Error, device bus is not functioning"}, 883 {0x04118000, IOASC_LOG_LEVEL_HARD, 884 "Hardware Error, IOA reserved area data check"}, 885 {0x04118100, IOASC_LOG_LEVEL_HARD, 886 "Hardware Error, IOA reserved area invalid data pattern"}, 887 {0x04118200, IOASC_LOG_LEVEL_HARD, 888 "Hardware Error, IOA reserved area LRC error"}, 889 {0x04320000, IOASC_LOG_LEVEL_HARD, 890 "Hardware Error, reassignment space exhausted"}, 891 {0x04330000, IOASC_LOG_LEVEL_HARD, 892 "Hardware Error, data transfer underlength error"}, 893 {0x04330000, IOASC_LOG_LEVEL_HARD, 894 "Hardware Error, data transfer overlength error"}, 895 {0x04418000, IOASC_LOG_LEVEL_MUST, 896 "Hardware Error, PCI bus error"}, 897 {0x04440000, IOASC_LOG_LEVEL_HARD, 898 "Hardware Error, device error"}, 899 {0x04448200, IOASC_LOG_LEVEL_MUST, 900 "Hardware Error, IOA error"}, 901 {0x04448300, IOASC_LOG_LEVEL_HARD, 902 "Hardware Error, undefined device response"}, 903 {0x04448400, IOASC_LOG_LEVEL_HARD, 904 "Hardware Error, IOA microcode error"}, 905 {0x04448600, IOASC_LOG_LEVEL_HARD, 906 "Hardware Error, IOA reset required"}, 907 {0x04449200, IOASC_LOG_LEVEL_HARD, 908 "Hardware Error, hard Cache Fearuee Card Battery error"}, 909 {0x0444A000, IOASC_LOG_LEVEL_HARD, 910 "Hardware Error, failed device altered"}, 911 {0x0444A200, IOASC_LOG_LEVEL_HARD, 912 "Hardware Error, data check after reassignment"}, 913 {0x0444A300, IOASC_LOG_LEVEL_HARD, 914 "Hardware Error, LRC error after reassignment"}, 915 {0x044A0000, IOASC_LOG_LEVEL_HARD, 916 "Hardware Error, device bus error (msg/cmd phase)"}, 917 {0x04670400, IOASC_LOG_LEVEL_HARD, 918 "Hardware Error, new device can't be used"}, 919 {0x04678000, IOASC_LOG_LEVEL_HARD, 920 "Hardware Error, invalid multiadapter configuration"}, 921 {0x04678100, IOASC_LOG_LEVEL_HARD, 922 "Hardware Error, incorrect connection between enclosures"}, 923 {0x04678200, IOASC_LOG_LEVEL_HARD, 924 "Hardware Error, connections exceed IOA design limits"}, 925 {0x04678300, IOASC_LOG_LEVEL_HARD, 926 "Hardware Error, incorrect multipath connection"}, 927 {0x04679000, IOASC_LOG_LEVEL_HARD, 928 "Hardware Error, command to LUN failed"}, 929 {0x064C8000, IOASC_LOG_LEVEL_HARD, 930 "Unit Attention, cache exists for missing/failed device"}, 931 {0x06670100, IOASC_LOG_LEVEL_HARD, 932 "Unit Attention, incompatible exposed mode device"}, 933 {0x06670600, IOASC_LOG_LEVEL_HARD, 934 "Unit Attention, attachment of logical unit failed"}, 935 {0x06678000, IOASC_LOG_LEVEL_HARD, 936 "Unit Attention, cables exceed connective design limit"}, 937 {0x06678300, IOASC_LOG_LEVEL_HARD, 938 "Unit Attention, incomplete multipath connection between" \ 939 "IOA and enclosure"}, 940 {0x06678400, IOASC_LOG_LEVEL_HARD, 941 "Unit Attention, incomplete multipath connection between" \ 942 "device and enclosure"}, 943 {0x06678500, IOASC_LOG_LEVEL_HARD, 944 "Unit Attention, incomplete multipath connection between" \ 945 "IOA and remote IOA"}, 946 {0x06678600, IOASC_LOG_LEVEL_HARD, 947 "Unit Attention, missing remote IOA"}, 948 {0x06679100, IOASC_LOG_LEVEL_HARD, 949 "Unit Attention, enclosure doesn't support required multipath" \ 950 "function"}, 951 {0x06698200, IOASC_LOG_LEVEL_HARD, 952 "Unit Attention, corrupt array parity detected on device"}, 953 {0x066B0200, IOASC_LOG_LEVEL_HARD, 954 "Unit Attention, array exposed"}, 955 {0x066B8200, IOASC_LOG_LEVEL_HARD, 956 "Unit Attention, exposed array is still protected"}, 957 {0x066B9200, IOASC_LOG_LEVEL_HARD, 958 "Unit Attention, Multipath redundancy level got worse"}, 959 {0x07270000, IOASC_LOG_LEVEL_HARD, 960 "Data Protect, device is read/write protected by IOA"}, 961 {0x07278000, IOASC_LOG_LEVEL_HARD, 962 "Data Protect, IOA doesn't support device attribute"}, 963 {0x07278100, IOASC_LOG_LEVEL_HARD, 964 "Data Protect, NVRAM mirroring prohibited"}, 965 {0x07278400, IOASC_LOG_LEVEL_HARD, 966 "Data Protect, array is short 2 or more devices"}, 967 {0x07278600, IOASC_LOG_LEVEL_HARD, 968 "Data Protect, exposed array is short a required device"}, 969 {0x07278700, IOASC_LOG_LEVEL_HARD, 970 "Data Protect, array members not at required addresses"}, 971 {0x07278800, IOASC_LOG_LEVEL_HARD, 972 "Data Protect, exposed mode device resource address conflict"}, 973 {0x07278900, IOASC_LOG_LEVEL_HARD, 974 "Data Protect, incorrect resource address of exposed mode device"}, 975 {0x07278A00, IOASC_LOG_LEVEL_HARD, 976 "Data Protect, Array is missing a device and parity is out of sync"}, 977 {0x07278B00, IOASC_LOG_LEVEL_HARD, 978 "Data Protect, maximum number of arrays already exist"}, 979 {0x07278C00, IOASC_LOG_LEVEL_HARD, 980 "Data Protect, cannot locate cache data for device"}, 981 {0x07278D00, IOASC_LOG_LEVEL_HARD, 982 "Data Protect, cache data exits for a changed device"}, 983 {0x07279100, IOASC_LOG_LEVEL_HARD, 984 "Data Protect, detection of a device requiring format"}, 985 {0x07279200, IOASC_LOG_LEVEL_HARD, 986 "Data Protect, IOA exceeds maximum number of devices"}, 987 {0x07279600, IOASC_LOG_LEVEL_HARD, 988 "Data Protect, missing array, volume set is not functional"}, 989 {0x07279700, IOASC_LOG_LEVEL_HARD, 990 "Data Protect, single device for a volume set"}, 991 {0x07279800, IOASC_LOG_LEVEL_HARD, 992 "Data Protect, missing multiple devices for a volume set"}, 993 {0x07279900, IOASC_LOG_LEVEL_HARD, 994 "Data Protect, maximum number of volument sets already exists"}, 995 {0x07279A00, IOASC_LOG_LEVEL_HARD, 996 "Data Protect, other volume set problem"}, 997}; 998 999/* macros to help in debugging */ 1000#define pmcraid_err(...) \ 1001 printk(KERN_ERR "MaxRAID: "__VA_ARGS__) 1002 1003#define pmcraid_info(...) \ 1004 if (pmcraid_debug_log) \ 1005 printk(KERN_INFO "MaxRAID: "__VA_ARGS__) 1006 1007/* check if given command is a SCSI READ or SCSI WRITE command */ 1008#define SCSI_READ_CMD 0x1 /* any of SCSI READ commands */ 1009#define SCSI_WRITE_CMD 0x2 /* any of SCSI WRITE commands */ 1010#define SCSI_CMD_TYPE(opcode) \ 1011({ u8 op = opcode; u8 __type = 0;\ 1012 if (op == READ_6 || op == READ_10 || op == READ_12 || op == READ_16)\ 1013 __type = SCSI_READ_CMD;\ 1014 else if (op == WRITE_6 || op == WRITE_10 || op == WRITE_12 || \ 1015 op == WRITE_16)\ 1016 __type = SCSI_WRITE_CMD;\ 1017 __type;\ 1018}) 1019 1020#define IS_SCSI_READ_WRITE(opcode) \ 1021({ u8 __type = SCSI_CMD_TYPE(opcode); \ 1022 (__type == SCSI_READ_CMD || __type == SCSI_WRITE_CMD) ? 1 : 0;\ 1023}) 1024 1025 1026/* 1027 * pmcraid_ioctl_header - definition of header structure that preceeds all the 1028 * buffers given as ioctl arguments. 1029 * 1030 * .signature : always ASCII string, "PMCRAID" 1031 * .reserved : not used 1032 * .buffer_length : length of the buffer following the header 1033 */ 1034struct pmcraid_ioctl_header { 1035 u8 signature[8]; 1036 u32 reserved; 1037 u32 buffer_length; 1038}; 1039 1040#define PMCRAID_IOCTL_SIGNATURE "PMCRAID" 1041 1042/* 1043 * pmcraid_passthrough_ioctl_buffer - structure given as argument to 1044 * passthrough(or firmware handled) IOCTL commands. Note that ioarcb requires 1045 * 32-byte alignment so, it is necessary to pack this structure to avoid any 1046 * holes between ioctl_header and passthrough buffer 1047 * 1048 * .ioactl_header : ioctl header 1049 * .ioarcb : filled-up ioarcb buffer, driver always reads this buffer 1050 * .ioasa : buffer for ioasa, driver fills this with IOASA from firmware 1051 * .request_buffer: The I/O buffer (flat), driver reads/writes to this based on 1052 * the transfer directions passed in ioarcb.flags0. Contents 1053 * of this buffer are valid only when ioarcb.data_transfer_len 1054 * is not zero. 1055 */ 1056struct pmcraid_passthrough_ioctl_buffer { 1057 struct pmcraid_ioctl_header ioctl_header; 1058 struct pmcraid_ioarcb ioarcb; 1059 struct pmcraid_ioasa ioasa; 1060 u8 request_buffer[1]; 1061} __attribute__ ((packed)); 1062 1063/* 1064 * keys to differentiate between driver handled IOCTLs and passthrough 1065 * IOCTLs passed to IOA. driver determines the ioctl type using macro 1066 * _IOC_TYPE 1067 */ 1068#define PMCRAID_DRIVER_IOCTL 'D' 1069#define PMCRAID_PASSTHROUGH_IOCTL 'F' 1070 1071#define DRV_IOCTL(n, size) \ 1072 _IOC(_IOC_READ|_IOC_WRITE, PMCRAID_DRIVER_IOCTL, (n), (size)) 1073 1074#define FMW_IOCTL(n, size) \ 1075 _IOC(_IOC_READ|_IOC_WRITE, PMCRAID_PASSTHROUGH_IOCTL, (n), (size)) 1076 1077/* 1078 * _ARGSIZE: macro that gives size of the argument type passed to an IOCTL cmd. 1079 * This is to facilitate applications avoiding un-necessary memory allocations. 1080 * For example, most of driver handled ioctls do not require ioarcb, ioasa. 1081 */ 1082#define _ARGSIZE(arg) (sizeof(struct pmcraid_ioctl_header) + sizeof(arg)) 1083 1084/* Driver handled IOCTL command definitions */ 1085 1086#define PMCRAID_IOCTL_RESET_ADAPTER \ 1087 DRV_IOCTL(5, sizeof(struct pmcraid_ioctl_header)) 1088 1089/* passthrough/firmware handled commands */ 1090#define PMCRAID_IOCTL_PASSTHROUGH_COMMAND \ 1091 FMW_IOCTL(1, sizeof(struct pmcraid_passthrough_ioctl_buffer)) 1092 1093#define PMCRAID_IOCTL_DOWNLOAD_MICROCODE \ 1094 FMW_IOCTL(2, sizeof(struct pmcraid_passthrough_ioctl_buffer)) 1095 1096 1097#endif /* _PMCRAID_H */ 1098