175540c1ac3c7bd72ac8e092058f9714875239995eric miao/* 245b301d2b188af6db332cbb14c36e20b5204223eAxel Lin * drivers/pwm/pwm-pxa.c 375540c1ac3c7bd72ac8e092058f9714875239995eric miao * 475540c1ac3c7bd72ac8e092058f9714875239995eric miao * simple driver for PWM (Pulse Width Modulator) controller 575540c1ac3c7bd72ac8e092058f9714875239995eric miao * 675540c1ac3c7bd72ac8e092058f9714875239995eric miao * This program is free software; you can redistribute it and/or modify 775540c1ac3c7bd72ac8e092058f9714875239995eric miao * it under the terms of the GNU General Public License version 2 as 875540c1ac3c7bd72ac8e092058f9714875239995eric miao * published by the Free Software Foundation. 975540c1ac3c7bd72ac8e092058f9714875239995eric miao * 1075540c1ac3c7bd72ac8e092058f9714875239995eric miao * 2008-02-13 initial version 11b07ab66391e47aacca9309eb88edef4897d94c77Jingoo Han * eric miao <eric.miao@marvell.com> 1275540c1ac3c7bd72ac8e092058f9714875239995eric miao */ 1375540c1ac3c7bd72ac8e092058f9714875239995eric miao 1475540c1ac3c7bd72ac8e092058f9714875239995eric miao#include <linux/module.h> 1575540c1ac3c7bd72ac8e092058f9714875239995eric miao#include <linux/kernel.h> 1675540c1ac3c7bd72ac8e092058f9714875239995eric miao#include <linux/platform_device.h> 175a0e3ad6af8660be21ca98a971cd00f331318c05Tejun Heo#include <linux/slab.h> 1875540c1ac3c7bd72ac8e092058f9714875239995eric miao#include <linux/err.h> 1975540c1ac3c7bd72ac8e092058f9714875239995eric miao#include <linux/clk.h> 2075540c1ac3c7bd72ac8e092058f9714875239995eric miao#include <linux/io.h> 2175540c1ac3c7bd72ac8e092058f9714875239995eric miao#include <linux/pwm.h> 22b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn#include <linux/of_device.h> 2375540c1ac3c7bd72ac8e092058f9714875239995eric miao 2475540c1ac3c7bd72ac8e092058f9714875239995eric miao#include <asm/div64.h> 2575540c1ac3c7bd72ac8e092058f9714875239995eric miao 263d2a98cd5e17052f461390c72efe1076c18fd62dEric Miao#define HAS_SECONDARY_PWM 0x10 273d2a98cd5e17052f461390c72efe1076c18fd62dEric Miao 283d2a98cd5e17052f461390c72efe1076c18fd62dEric Miaostatic const struct platform_device_id pwm_id_table[] = { 293d2a98cd5e17052f461390c72efe1076c18fd62dEric Miao /* PWM has_secondary_pwm? */ 303d2a98cd5e17052f461390c72efe1076c18fd62dEric Miao { "pxa25x-pwm", 0 }, 3122976a5dada65a0f44918e91c5f1fb5041dc1d5eAxel Lin { "pxa27x-pwm", HAS_SECONDARY_PWM }, 3222976a5dada65a0f44918e91c5f1fb5041dc1d5eAxel Lin { "pxa168-pwm", 0 }, 3322976a5dada65a0f44918e91c5f1fb5041dc1d5eAxel Lin { "pxa910-pwm", 0 }, 343d2a98cd5e17052f461390c72efe1076c18fd62dEric Miao { }, 353d2a98cd5e17052f461390c72efe1076c18fd62dEric Miao}; 363d2a98cd5e17052f461390c72efe1076c18fd62dEric MiaoMODULE_DEVICE_TABLE(platform, pwm_id_table); 373d2a98cd5e17052f461390c72efe1076c18fd62dEric Miao 3875540c1ac3c7bd72ac8e092058f9714875239995eric miao/* PWM registers and bits definitions */ 3975540c1ac3c7bd72ac8e092058f9714875239995eric miao#define PWMCR (0x00) 4075540c1ac3c7bd72ac8e092058f9714875239995eric miao#define PWMDCR (0x04) 4175540c1ac3c7bd72ac8e092058f9714875239995eric miao#define PWMPCR (0x08) 4275540c1ac3c7bd72ac8e092058f9714875239995eric miao 4375540c1ac3c7bd72ac8e092058f9714875239995eric miao#define PWMCR_SD (1 << 6) 4475540c1ac3c7bd72ac8e092058f9714875239995eric miao#define PWMDCR_FD (1 << 10) 4575540c1ac3c7bd72ac8e092058f9714875239995eric miao 4617b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Redingstruct pxa_pwm_chip { 4717b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding struct pwm_chip chip; 4817b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding struct device *dev; 4975540c1ac3c7bd72ac8e092058f9714875239995eric miao 5075540c1ac3c7bd72ac8e092058f9714875239995eric miao struct clk *clk; 5175540c1ac3c7bd72ac8e092058f9714875239995eric miao void __iomem *mmio_base; 5275540c1ac3c7bd72ac8e092058f9714875239995eric miao}; 5375540c1ac3c7bd72ac8e092058f9714875239995eric miao 5417b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Redingstatic inline struct pxa_pwm_chip *to_pxa_pwm_chip(struct pwm_chip *chip) 5517b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding{ 5617b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding return container_of(chip, struct pxa_pwm_chip, chip); 5717b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding} 5817b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding 5975540c1ac3c7bd72ac8e092058f9714875239995eric miao/* 6075540c1ac3c7bd72ac8e092058f9714875239995eric miao * period_ns = 10^9 * (PRESCALE + 1) * (PV + 1) / PWM_CLK_RATE 6175540c1ac3c7bd72ac8e092058f9714875239995eric miao * duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE 6275540c1ac3c7bd72ac8e092058f9714875239995eric miao */ 6317b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Redingstatic int pxa_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, 6417b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding int duty_ns, int period_ns) 6575540c1ac3c7bd72ac8e092058f9714875239995eric miao{ 6617b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip); 6775540c1ac3c7bd72ac8e092058f9714875239995eric miao unsigned long long c; 6875540c1ac3c7bd72ac8e092058f9714875239995eric miao unsigned long period_cycles, prescale, pv, dc; 6917b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding unsigned long offset; 7017b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding int rc; 7175540c1ac3c7bd72ac8e092058f9714875239995eric miao 7217b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding offset = pwm->hwpwm ? 0x10 : 0; 7317b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding 7417b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding c = clk_get_rate(pc->clk); 7575540c1ac3c7bd72ac8e092058f9714875239995eric miao c = c * period_ns; 7675540c1ac3c7bd72ac8e092058f9714875239995eric miao do_div(c, 1000000000); 7775540c1ac3c7bd72ac8e092058f9714875239995eric miao period_cycles = c; 7875540c1ac3c7bd72ac8e092058f9714875239995eric miao 7971a35d75661271d20ff0098817070f6545e90cberoelkluin if (period_cycles < 1) 8075540c1ac3c7bd72ac8e092058f9714875239995eric miao period_cycles = 1; 8175540c1ac3c7bd72ac8e092058f9714875239995eric miao prescale = (period_cycles - 1) / 1024; 8275540c1ac3c7bd72ac8e092058f9714875239995eric miao pv = period_cycles / (prescale + 1) - 1; 8375540c1ac3c7bd72ac8e092058f9714875239995eric miao 8475540c1ac3c7bd72ac8e092058f9714875239995eric miao if (prescale > 63) 8575540c1ac3c7bd72ac8e092058f9714875239995eric miao return -EINVAL; 8675540c1ac3c7bd72ac8e092058f9714875239995eric miao 8775540c1ac3c7bd72ac8e092058f9714875239995eric miao if (duty_ns == period_ns) 8875540c1ac3c7bd72ac8e092058f9714875239995eric miao dc = PWMDCR_FD; 8975540c1ac3c7bd72ac8e092058f9714875239995eric miao else 9075540c1ac3c7bd72ac8e092058f9714875239995eric miao dc = (pv + 1) * duty_ns / period_ns; 9175540c1ac3c7bd72ac8e092058f9714875239995eric miao 9275540c1ac3c7bd72ac8e092058f9714875239995eric miao /* NOTE: the clock to PWM has to be enabled first 9375540c1ac3c7bd72ac8e092058f9714875239995eric miao * before writing to the registers 9475540c1ac3c7bd72ac8e092058f9714875239995eric miao */ 9517b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding rc = clk_prepare_enable(pc->clk); 9617b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding if (rc < 0) 9717b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding return rc; 9817b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding 9917b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding writel(prescale, pc->mmio_base + offset + PWMCR); 10017b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding writel(dc, pc->mmio_base + offset + PWMDCR); 10117b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding writel(pv, pc->mmio_base + offset + PWMPCR); 10275540c1ac3c7bd72ac8e092058f9714875239995eric miao 10317b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding clk_disable_unprepare(pc->clk); 10475540c1ac3c7bd72ac8e092058f9714875239995eric miao return 0; 10575540c1ac3c7bd72ac8e092058f9714875239995eric miao} 10675540c1ac3c7bd72ac8e092058f9714875239995eric miao 10717b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Redingstatic int pxa_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) 10875540c1ac3c7bd72ac8e092058f9714875239995eric miao{ 10917b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip); 110c860d701cc5f77b74c481dcbd25b2d8b31c622fcRobert Jarzmik 111b014a30c5991e67aa90b6ff9bd4ec16435bbcefdAxel Lin return clk_prepare_enable(pc->clk); 11275540c1ac3c7bd72ac8e092058f9714875239995eric miao} 11375540c1ac3c7bd72ac8e092058f9714875239995eric miao 11417b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Redingstatic void pxa_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) 11575540c1ac3c7bd72ac8e092058f9714875239995eric miao{ 11617b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip); 11775540c1ac3c7bd72ac8e092058f9714875239995eric miao 118b014a30c5991e67aa90b6ff9bd4ec16435bbcefdAxel Lin clk_disable_unprepare(pc->clk); 11975540c1ac3c7bd72ac8e092058f9714875239995eric miao} 12075540c1ac3c7bd72ac8e092058f9714875239995eric miao 12117b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Redingstatic struct pwm_ops pxa_pwm_ops = { 12217b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding .config = pxa_pwm_config, 12317b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding .enable = pxa_pwm_enable, 12417b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding .disable = pxa_pwm_disable, 12517b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding .owner = THIS_MODULE, 12617b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding}; 12775540c1ac3c7bd72ac8e092058f9714875239995eric miao 128b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn#ifdef CONFIG_OF 129b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn/* 130fdec4f72719dbd6fc74776630b06ad851f4c2d81Thierry Reding * Device tree users must create one device instance for each PWM channel. 131b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn * Hence we dispense with the HAS_SECONDARY_PWM and "tell" the original driver 132b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn * code that this is a single channel pxa25x-pwm. Currently all devices are 133b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn * supported identically. 134b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn */ 1352ae69a460413615c82381b240df3800a909100d3Thierry Redingstatic const struct of_device_id pwm_of_match[] = { 136b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn { .compatible = "marvell,pxa250-pwm", .data = &pwm_id_table[0]}, 137b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn { .compatible = "marvell,pxa270-pwm", .data = &pwm_id_table[0]}, 138b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn { .compatible = "marvell,pxa168-pwm", .data = &pwm_id_table[0]}, 139b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn { .compatible = "marvell,pxa910-pwm", .data = &pwm_id_table[0]}, 140b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn { } 141b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn}; 142b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike DunnMODULE_DEVICE_TABLE(of, pwm_of_match); 143f409cd38334ce4d2b1b99fef00543de1695a281fThierry Reding#else 144f409cd38334ce4d2b1b99fef00543de1695a281fThierry Reding#define pwm_of_match NULL 145b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn#endif 146b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn 147b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunnstatic const struct platform_device_id *pxa_pwm_get_id_dt(struct device *dev) 148b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn{ 149b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn const struct of_device_id *id = of_match_device(pwm_of_match, dev); 150b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn 151b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn return id ? id->data : NULL; 152b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn} 153b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn 154b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunnstatic struct pwm_device * 155b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunnpxa_pwm_of_xlate(struct pwm_chip *pc, const struct of_phandle_args *args) 156b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn{ 157b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn struct pwm_device *pwm; 158b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn 159b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn pwm = pwm_request_from_chip(pc, 0, NULL); 160b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn if (IS_ERR(pwm)) 161b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn return pwm; 162b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn 163b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn pwm_set_period(pwm, args->args[0]); 164b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn 165b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn return pwm; 166b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn} 167b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn 1683e9fe83d278cce6974f0a4d1870c0ff4a0b74ba5Bill Pembertonstatic int pwm_probe(struct platform_device *pdev) 16975540c1ac3c7bd72ac8e092058f9714875239995eric miao{ 170b3282ab116cd7ebd2829ac8088524b5b279330e5Uwe Kleine-König const struct platform_device_id *id = platform_get_device_id(pdev); 17117b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding struct pxa_pwm_chip *pwm; 17275540c1ac3c7bd72ac8e092058f9714875239995eric miao struct resource *r; 17375540c1ac3c7bd72ac8e092058f9714875239995eric miao int ret = 0; 17475540c1ac3c7bd72ac8e092058f9714875239995eric miao 175b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn if (IS_ENABLED(CONFIG_OF) && id == NULL) 176b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn id = pxa_pwm_get_id_dt(&pdev->dev); 177b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn 178b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn if (id == NULL) 179b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn return -EINVAL; 180b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn 18145b301d2b188af6db332cbb14c36e20b5204223eAxel Lin pwm = devm_kzalloc(&pdev->dev, sizeof(*pwm), GFP_KERNEL); 182d93fc78f47f93a25a9f99fea613616901331d213Jingoo Han if (pwm == NULL) 1833d2a98cd5e17052f461390c72efe1076c18fd62dEric Miao return -ENOMEM; 18475540c1ac3c7bd72ac8e092058f9714875239995eric miao 18545b301d2b188af6db332cbb14c36e20b5204223eAxel Lin pwm->clk = devm_clk_get(&pdev->dev, NULL); 18645b301d2b188af6db332cbb14c36e20b5204223eAxel Lin if (IS_ERR(pwm->clk)) 18745b301d2b188af6db332cbb14c36e20b5204223eAxel Lin return PTR_ERR(pwm->clk); 18845b301d2b188af6db332cbb14c36e20b5204223eAxel Lin 18917b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding pwm->chip.dev = &pdev->dev; 19017b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding pwm->chip.ops = &pxa_pwm_ops; 19117b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding pwm->chip.base = -1; 19217b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding pwm->chip.npwm = (id->driver_data & HAS_SECONDARY_PWM) ? 2 : 1; 19375540c1ac3c7bd72ac8e092058f9714875239995eric miao 194b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn if (IS_ENABLED(CONFIG_OF)) { 195b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn pwm->chip.of_xlate = pxa_pwm_of_xlate; 196b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn pwm->chip.of_pwm_n_cells = 1; 197b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn } 198b52fa7bc5dc9697fb5983727d276dd565d85a8d0Mike Dunn 19975540c1ac3c7bd72ac8e092058f9714875239995eric miao r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2006d4294d1634543853febc4287ecf02998fd234e1Thierry Reding pwm->mmio_base = devm_ioremap_resource(&pdev->dev, r); 2016d4294d1634543853febc4287ecf02998fd234e1Thierry Reding if (IS_ERR(pwm->mmio_base)) 2026d4294d1634543853febc4287ecf02998fd234e1Thierry Reding return PTR_ERR(pwm->mmio_base); 20375540c1ac3c7bd72ac8e092058f9714875239995eric miao 20417b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding ret = pwmchip_add(&pwm->chip); 20517b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding if (ret < 0) { 20617b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret); 20717b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding return ret; 2083d2a98cd5e17052f461390c72efe1076c18fd62dEric Miao } 2093d2a98cd5e17052f461390c72efe1076c18fd62dEric Miao 21075540c1ac3c7bd72ac8e092058f9714875239995eric miao platform_set_drvdata(pdev, pwm); 2113d2a98cd5e17052f461390c72efe1076c18fd62dEric Miao return 0; 21275540c1ac3c7bd72ac8e092058f9714875239995eric miao} 21375540c1ac3c7bd72ac8e092058f9714875239995eric miao 21477f37917a6f2bd8635b553178bb34bdd80f08e40Bill Pembertonstatic int pwm_remove(struct platform_device *pdev) 21575540c1ac3c7bd72ac8e092058f9714875239995eric miao{ 21617b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding struct pxa_pwm_chip *chip; 21775540c1ac3c7bd72ac8e092058f9714875239995eric miao 21817b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding chip = platform_get_drvdata(pdev); 21917b2b4780f879a559b8dc96c170dd6df98fe9ab3Thierry Reding if (chip == NULL) 22075540c1ac3c7bd72ac8e092058f9714875239995eric miao return -ENODEV; 22175540c1ac3c7bd72ac8e092058f9714875239995eric miao 222abeaf75527386adea831914579f0b8711287d3f8Thierry Reding return pwmchip_remove(&chip->chip); 22375540c1ac3c7bd72ac8e092058f9714875239995eric miao} 22475540c1ac3c7bd72ac8e092058f9714875239995eric miao 2253d2a98cd5e17052f461390c72efe1076c18fd62dEric Miaostatic struct platform_driver pwm_driver = { 22675540c1ac3c7bd72ac8e092058f9714875239995eric miao .driver = { 22775540c1ac3c7bd72ac8e092058f9714875239995eric miao .name = "pxa25x-pwm", 2283d2a98cd5e17052f461390c72efe1076c18fd62dEric Miao .owner = THIS_MODULE, 229f409cd38334ce4d2b1b99fef00543de1695a281fThierry Reding .of_match_table = pwm_of_match, 23075540c1ac3c7bd72ac8e092058f9714875239995eric miao }, 2313d2a98cd5e17052f461390c72efe1076c18fd62dEric Miao .probe = pwm_probe, 232fd1091125a1d11fcc635749d0d3dec36904a7a48Bill Pemberton .remove = pwm_remove, 2333d2a98cd5e17052f461390c72efe1076c18fd62dEric Miao .id_table = pwm_id_table, 23475540c1ac3c7bd72ac8e092058f9714875239995eric miao}; 23575540c1ac3c7bd72ac8e092058f9714875239995eric miao 2361e185c7aafbb56580feaa5bdbc9e4b1d8efaf710Mike Dunnmodule_platform_driver(pwm_driver); 237b5f0228afa7810f3cad1f2f741cc747a2378b890Guennadi Liakhovetski 238b5f0228afa7810f3cad1f2f741cc747a2378b890Guennadi LiakhovetskiMODULE_LICENSE("GPL v2"); 239