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History log of /drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c
Revision Date Author Comments
28a38b656283bfea04f112abc587ce28760dac25 02-Sep-2014 Rob Clark <robdclark@gmail.com> drm/msm/hdmi: fix build break on non-CCF platforms

Reported-by: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Rob Clark <robdclark@gmail.com>
034fbcc3d8a5dff5d3df5a4ad6bf9cc0b01bd970 25-Jun-2014 Rob Clark <robdclark@gmail.com> drm/msm: hdmi phy 8960 phy pll

On downstream kernel the clk driver directly bangs hdmi phy registers.
For upstream kernel, we need to model this as a clock and register with
the clock framework.

Signed-off-by: Rob Clark <robdclark@gmail.com>
c8afe684c95cd17cf4f273d81af369a0fdfa5a74 26-Jun-2013 Rob Clark <robdclark@gmail.com> drm/msm: basic KMS driver for snapdragon

The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.

To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.

The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..

This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.

Signed-off-by: Rob Clark <robdclark@gmail.com>