Lines Matching refs:DIV_CPU0
117 #define DIV_CPU0 0x14500
265 DIV_CPU0,
716 DIV(0, "div_core", "mout_core", DIV_CPU0, 0, 3),
717 DIV(0, "div_corem0", "div_core2", DIV_CPU0, 4, 3),
718 DIV(0, "div_corem1", "div_core2", DIV_CPU0, 8, 3),
719 DIV(0, "div_periph", "div_core2", DIV_CPU0, 12, 3),
720 DIV(0, "div_atb", "mout_core", DIV_CPU0, 16, 3),
721 DIV(0, "div_pclk_dbg", "div_atb", DIV_CPU0, 20, 3),
722 DIV(CLK_ARM_CLK, "div_core2", "div_core", DIV_CPU0, 28, 3),
771 DIV(CLK_SCLK_APLL, "sclk_apll", "mout_apll", DIV_CPU0, 24, 3),