Lines Matching refs:vg
150 struct byt_gpio *vg = to_byt_gpio(chip);
156 reg_offset = vg->range->pins[offset] * 16;
158 return vg->reg_base + reg_offset + reg;
161 static bool is_special_pin(struct byt_gpio *vg, unsigned offset)
164 if (!strcmp(vg->range->name, BYT_SCORE_ACPI_UID) &&
169 if (!strcmp(vg->range->name, BYT_SUS_ACPI_UID) &&
178 struct byt_gpio *vg = to_byt_gpio(chip);
190 special = is_special_pin(vg, offset);
192 dev_err(&vg->pdev->dev,
197 pm_runtime_get(&vg->pdev->dev);
204 struct byt_gpio *vg = to_byt_gpio(chip);
205 void __iomem *reg = byt_gpio_reg(&vg->chip, offset, BYT_CONF0_REG);
213 pm_runtime_put(&vg->pdev->dev);
218 struct byt_gpio *vg = to_byt_gpio(irq_data_get_irq_chip_data(d));
222 void __iomem *reg = byt_gpio_reg(&vg->chip, offset, BYT_CONF0_REG);
224 if (offset >= vg->chip.ngpio)
227 spin_lock_irqsave(&vg->lock, flags);
256 spin_unlock_irqrestore(&vg->lock, flags);
269 struct byt_gpio *vg = to_byt_gpio(chip);
274 spin_lock_irqsave(&vg->lock, flags);
283 spin_unlock_irqrestore(&vg->lock, flags);
288 struct byt_gpio *vg = to_byt_gpio(chip);
293 spin_lock_irqsave(&vg->lock, flags);
299 spin_unlock_irqrestore(&vg->lock, flags);
307 struct byt_gpio *vg = to_byt_gpio(chip);
313 spin_lock_irqsave(&vg->lock, flags);
332 spin_unlock_irqrestore(&vg->lock, flags);
339 struct byt_gpio *vg = to_byt_gpio(chip);
344 spin_lock_irqsave(&vg->lock, flags);
346 for (i = 0; i < vg->chip.ngpio; i++) {
350 offs = vg->range->pins[i] * 16;
351 conf0 = readl(vg->reg_base + offs + BYT_CONF0_REG);
352 val = readl(vg->reg_base + offs + BYT_VAL_REG);
389 vg->range->pins[i], offs,
405 spin_unlock_irqrestore(&vg->lock, flags);
411 struct byt_gpio *vg = to_byt_gpio(irq_desc_get_handler_data(desc));
420 for (base = 0; base < vg->chip.ngpio; base += 32) {
422 reg = byt_gpio_reg(&vg->chip, base, BYT_INT_STAT_REG);
430 virq = irq_find_mapping(vg->chip.irqdomain, base + pin);
437 dev_err(&vg->pdev->dev,
441 reg = byt_gpio_reg(&vg->chip, base + pin,
471 static void byt_gpio_irq_init_hw(struct byt_gpio *vg)
477 for (base = 0; base < vg->chip.ngpio; base += 32) {
478 reg = byt_gpio_reg(&vg->chip, base, BYT_INT_STAT_REG);
484 dev_err(&vg->pdev->dev,
491 struct byt_gpio *vg;
503 vg = devm_kzalloc(dev, sizeof(struct byt_gpio), GFP_KERNEL);
504 if (!vg) {
511 vg->chip.ngpio = range->npins;
512 vg->range = range;
517 if (!vg->chip.ngpio || !vg->range)
520 vg->pdev = pdev;
521 platform_set_drvdata(pdev, vg);
524 vg->reg_base = devm_ioremap_resource(dev, mem_rc);
525 if (IS_ERR(vg->reg_base))
526 return PTR_ERR(vg->reg_base);
528 spin_lock_init(&vg->lock);
530 gc = &vg->chip;
553 byt_gpio_irq_init_hw(vg);
596 struct byt_gpio *vg = platform_get_drvdata(pdev);
599 gpiochip_remove(&vg->chip);