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Searched defs:clk_s (Results 1 - 8 of 8) sorted by relevance

/drivers/gpu/drm/radeon/
H A Drv730_dpm.c97 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); local
98 u32 clk_v = ss.percentage * fbdiv / (clk_s * 10000);
101 cg_spll_spread_spectrum |= CLK_S(clk_s);
173 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); local
174 u32 clk_v = ss.percentage * dividers.fb_div / (clk_s * 10000);
177 mpll_ss |= CLK_S(clk_s);
H A Drv740_dpm.c165 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); local
166 u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000);
169 cg_spll_spread_spectrum |= CLK_S(clk_s);
254 u32 clk_s = reference_clock * 5 / (decoded_ref * ss.rate); local
256 (dividers.whole_fb_div + (dividers.frac_fb_div / 8)) / (clk_s * 10000);
262 mpll_ss2 |= CLKS(clk_s);
H A Dcypress_dpm.c561 u32 clk_s = reference_clock * 5 / (decoded_ref * ss.rate); local
563 (0x4000 * dividers.whole_fb_div + 0x800 * dividers.frac_fb_div) / (clk_s * 625);
569 mpll_ss2 |= CLKS(clk_s);
H A Drv6xx_dpm.c316 u32 index, u32 clk_s)
319 CLKS(clk_s), ~CLKS_MASK);
341 u32 clk_s)
343 WREG32_P(CG_MPLL_SPREAD_SPECTRUM, CLKS(clk_s), ~CLKS_MASK);
556 u32 vco_freq, clk_v, clk_s; local
573 clk_s = rv6xx_calculate_spread_spectrum_clk_s(ss.rate,
577 rv6xx_set_engine_spread_spectrum_clk_s(rdev, level, clk_s);
659 u32 vco_freq = 0, clk_v, clk_s; local
691 clk_s = rv6xx_calculate_spread_spectrum_clk_s(ss.rate,
695 rv6xx_set_memory_spread_spectrum_clk_s(rdev, clk_s);
315 rv6xx_set_engine_spread_spectrum_clk_s(struct radeon_device *rdev, u32 index, u32 clk_s) argument
340 rv6xx_set_memory_spread_spectrum_clk_s(struct radeon_device *rdev, u32 clk_s) argument
[all...]
H A Dni_dpm.c2046 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); local
2047 u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000);
2050 cg_spll_spread_spectrum |= CLK_S(clk_s);
2098 u32 clk_s; local
2118 clk_s = (sclk_params.vCG_SPLL_SPREAD_SPECTRUM & CLK_S_MASK) >> CLK_S_SHIFT;
2128 if (clk_s & ~(SMC_NISLANDS_SPLL_DIV_TABLE_CLKS_MASK >> SMC_NISLANDS_SPLL_DIV_TABLE_CLKS_SHIFT))
2131 if (clk_s & ~(SMC_NISLANDS_SPLL_DIV_TABLE_CLKS_MASK >> SMC_NISLANDS_SPLL_DIV_TABLE_CLKS_SHIFT))
2145 ((clk_s << SMC_NISLANDS_SPLL_DIV_TABLE_CLKS_SHIFT) & SMC_NISLANDS_SPLL_DIV_TABLE_CLKS_MASK);
2244 u32 clk_s = reference_clock * 5 / (decoded_ref * ss.rate); local
2246 (0x4000 * dividers.whole_fb_div + 0x800 * dividers.frac_fb_div) / (clk_s * 62
[all...]
H A Drv770_dpm.c542 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); local
543 u32 clk_v = ss.percentage * fbdiv / (clk_s * 10000);
546 cg_spll_spread_spectrum |= CLKS(clk_s);
H A Dci_dpm.c2715 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); local
2716 u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000);
2719 cg_spll_spread_spectrum |= CLK_S(clk_s);
H A Dsi_dpm.c2847 u32 clk_s, clk_v; local
2867 clk_s = (sclk_params.vCG_SPLL_SPREAD_SPECTRUM & CLK_S_MASK) >> CLK_S_SHIFT;
2878 if (clk_s & ~(SMC_SISLANDS_SPLL_DIV_TABLE_CLKS_MASK >> SMC_SISLANDS_SPLL_DIV_TABLE_CLKS_SHIFT))
2891 ((clk_s << SMC_SISLANDS_SPLL_DIV_TABLE_CLKS_SHIFT) & SMC_SISLANDS_SPLL_DIV_TABLE_CLKS_MASK);
4708 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); local
4709 u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000);
4712 cg_spll_spread_spectrum |= CLK_S(clk_s);

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