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Searched defs:modeset (Results 1 - 10 of 10) sorted by relevance

/drivers/gpu/drm/nouveau/dispnv04/
H A Ddisp.c150 struct drm_mode_set modeset = { local
154 drm_mode_set_config_internal(&modeset);
181 /* meh.. modeset apparently doesn't setup all the regs and depends
183 * nouveau was loaded, and then do a modeset.
H A Dtvnv17.c758 /* Disable the crtc to ensure a full modeset is
761 struct drm_mode_set modeset = { local
765 drm_mode_set_config_internal(&modeset);
/drivers/gpu/drm/i2c/
H A Dch7006_drv.c360 /* Disable the crtc to ensure a full modeset is
363 struct drm_mode_set modeset = { local
367 drm_mode_set_config_internal(&modeset);
/drivers/gpu/drm/
H A Ddrm_irq.c643 * -EAGAIN - Temporary unavailable, e.g., called before initial modeset.
1218 * vblank counter value before and after a modeset
1260 * vblank interrupt keeps running across the modeset sequence. With this the
1344 struct drm_modeset_ctl *modeset = data; local
1355 crtc = modeset->crtc;
1359 switch (modeset->cmd) {
H A Ddrm_fb_helper.c62 * integration with the output polling code in drm_crtc_helper.c the modeset
74 * same time, drivers should initialize all modeset objects such as CRTCs,
331 * hold all modeset locks. Otherwise use drm_fb_helper_restore_fbdev_mode_unlocked()
909 struct drm_mode_set *modeset; local
920 modeset = &fb_helper->crtc_info[i].mode_set;
922 modeset->x = var->xoffset;
923 modeset->y = var->yoffset;
925 if (modeset->num_connectors) {
926 ret = drm_mode_set_config_internal(modeset);
1500 struct drm_mode_set *modeset; local
[all...]
/drivers/gpu/drm/nouveau/
H A Dnouveau_connector.c457 bool modeset = false; local
475 * modeset
479 modeset = true;
485 if (modeset || !nv_crtc->set_scale) {
/drivers/media/platform/davinci/
H A Disif.c894 u32 modeset = 0, ccdcfg = 0; local
900 modeset = modeset | (params->pix_fmt << ISIF_INPUT_SHIFT) |
913 modeset |= (VPFE_PINPOL_NEGATIVE << ISIF_VD_POL_SHIFT);
956 regw(modeset, MODESET);
/drivers/staging/media/davinci_vpfe/
H A Ddm365_isif.c1231 u32 modeset; local
1242 ccdcfg = modeset = 0;
1249 modeset = modeset | ((pix_fmt & ISIF_INPUT_MASK) <<
1263 modeset |= ((VPFE_PINPOL_NEGATIVE & ISIF_VD_POL_MASK) <<
1310 isif_write(isif->isif_cfg.base_addr, modeset, MODESET);
/drivers/gpu/drm/gma500/
H A Dpsb_drv.h488 bool modeset; /* true if we have done the mode_device setup */ member in struct:drm_psb_private
640 /* Optional helper caller after modeset */
/drivers/gpu/drm/i915/
H A Di915_drv.h224 bool on; /* is the PLL actually active? Disabled during modeset */
1063 * time are on. They are kept on until after the first modeset.
1530 * NOTE: Work items scheduled here are not allowed to grab any modeset
2199 int modeset; member in struct:i915_params

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