[go: nahoru, domu]

Searched defs:nsec (Results 1 - 19 of 19) sorted by relevance

/drivers/gpu/drm/nouveau/core/subdev/timer/
H A Dbase.c28 nouveau_timer_wait_eq(void *obj, u64 nsec, u32 addr, u32 mask, u32 data) argument
42 } while (ptimer->read(ptimer) - time0 < nsec);
48 nouveau_timer_wait_ne(void *obj, u64 nsec, u32 addr, u32 mask, u32 data) argument
62 } while (ptimer->read(ptimer) - time0 < nsec);
68 nouveau_timer_wait_cb(void *obj, u64 nsec, bool (*func)(void *), void *data) argument
77 } while (ptimer->read(ptimer) - time0 < nsec);
83 nouveau_timer_alarm(void *obj, u32 nsec, struct nouveau_alarm *alarm) argument
86 ptimer->alarm(ptimer, nsec, alarm);
/drivers/net/ethernet/stmicro/stmmac/
H A Dstmmac_hwtstamp.c54 static int stmmac_init_systime(void __iomem *ioaddr, u32 sec, u32 nsec) argument
60 writel(nsec, ioaddr + PTP_STNSUR);
103 static int stmmac_adjust_systime(void __iomem *ioaddr, u32 sec, u32 nsec, argument
110 writel(((add_sub << PTP_STNSUR_ADDSUB_SHIFT) | nsec),
H A Dstmmac_ptp.c77 u32 sec, nsec; local
88 nsec = reminder;
92 priv->hw->ptp->adjust_systime(priv->ioaddr, sec, nsec, neg_adj);
/drivers/gpu/drm/nouveau/core/subdev/bus/
H A Dhwsq.c135 nouveau_hwsq_nsec(struct nouveau_hwsq *hwsq, u32 nsec) argument
137 u8 shift = 0, usec = nsec / 1000;
143 nv_debug(hwsq->pbus, " DELAY = %d ns\n", nsec);
H A Dhwsq.h108 hwsq_nsec(struct hwsq *ram, u32 nsec) argument
110 nouveau_hwsq_nsec(ram->hwsq, nsec);
/drivers/net/ethernet/amd/xgbe/
H A Dxgbe-ptp.c130 u64 nsec; local
132 nsec = pdata->hw_if.get_tstamp_time(pdata);
134 return nsec;
174 u64 nsec; local
178 nsec = timecounter_read(&pdata->tstamp_tc);
180 nsec += delta;
181 timecounter_init(&pdata->tstamp_tc, &pdata->tstamp_cc, nsec);
194 u64 nsec; local
198 nsec = timecounter_read(&pdata->tstamp_tc);
202 *ts = ns_to_timespec(nsec);
213 u64 nsec; local
[all...]
H A Dxgbe-drv.c799 u64 nsec; local
803 nsec = timecounter_cyc2time(&pdata->tstamp_tc,
807 hwtstamps.hwtstamp = ns_to_ktime(nsec);
1728 u64 nsec; local
1730 nsec = timecounter_cyc2time(&pdata->tstamp_tc,
1733 hwtstamps->hwtstamp = ns_to_ktime(nsec);
H A Dxgbe-dev.c1040 unsigned int nsec)
1044 XGMAC_IOWRITE(pdata, MAC_STNUR, nsec);
1054 u64 nsec; local
1056 nsec = XGMAC_IOREAD(pdata, MAC_STSR);
1057 nsec *= NSEC_PER_SEC;
1058 nsec += XGMAC_IOREAD(pdata, MAC_STNR);
1060 return nsec;
1066 u64 nsec; local
1072 nsec = XGMAC_IOREAD(pdata, MAC_TXSSR);
1073 nsec *
1039 xgbe_set_tstamp_time(struct xgbe_prv_data *pdata, unsigned int sec, unsigned int nsec) argument
1082 u64 nsec; local
[all...]
/drivers/gpu/drm/nouveau/core/subdev/i2c/
H A Dbit.c57 i2c_delay(struct nouveau_i2c_port *port, u32 nsec) argument
59 udelay((nsec + 500) / 1000);
/drivers/gpu/drm/nouveau/core/subdev/pwr/
H A Dmemx.c105 u32 addr, u32 mask, u32 data, u32 nsec)
108 addr, mask, data, nsec);
109 memx_cmd(memx, MEMX_WAIT, 4, (u32[]){ addr, ~mask, data, nsec });
114 nouveau_memx_nsec(struct nouveau_memx *memx, u32 nsec) argument
116 nv_debug(memx->ppwr, " DELAY = %d ns\n", nsec);
117 memx_cmd(memx, MEMX_DELAY, 1, (u32[]){ nsec });
104 nouveau_memx_wait(struct nouveau_memx *memx, u32 addr, u32 mask, u32 data, u32 nsec) argument
/drivers/gpu/drm/nouveau/core/subdev/fb/
H A Dramfuc.h126 ramfuc_wait(struct ramfuc *ram, u32 addr, u32 mask, u32 data, u32 nsec) argument
128 nouveau_memx_wait(ram->memx, addr, mask, data, nsec);
132 ramfuc_nsec(struct ramfuc *ram, u32 nsec) argument
134 nouveau_memx_nsec(ram->memx, nsec);
/drivers/misc/sgi-gru/
H A Dgruhandles.c44 unsigned long nsec; local
46 nsec = CLKS2NSEC(clks);
48 atomic_long_add(nsec, &mcs_op_statistics[op].total);
49 if (mcs_op_statistics[op].max < nsec)
50 mcs_op_statistics[op].max = nsec;
/drivers/net/ethernet/mellanox/mlx4/
H A Den_clock.c111 u64 nsec; local
114 nsec = timecounter_cyc2time(&mdev->clock, timestamp);
118 hwts->hwtstamp = ns_to_ktime(nsec);
/drivers/net/ethernet/intel/igb/
H A Digb_ptp.c122 u32 sec, nsec; local
129 nsec = rd32(E1000_SYSTIML);
133 ts->tv_nsec = nsec;
/drivers/char/
H A Dmmtimer.c483 u64 nsec; local
485 nsec = rtc_time() * sgi_clock_period
487 *tp = ns_to_timespec(nsec);
495 u64 nsec; local
498 nsec = rtc_time() * sgi_clock_period;
500 sgi_clock_offset.tv_sec = tp->tv_sec - div_u64_rem(nsec, NSEC_PER_SEC, &rem);
/drivers/block/xen-blkback/
H A Dcommon.h324 unsigned int nsec; member in struct:seg_buf
/drivers/net/phy/
H A Ddp83640.c311 u32 sec, nsec, pwidth; local
341 nsec = clkreq->perout.start.nsec;
343 pwidth += clkreq->perout.period.nsec;
353 ext_write(0, phydev, PAGE4, PTP_TDR, nsec & 0xffff); /* ns[15:0] */
354 ext_write(0, phydev, PAGE4, PTP_TDR, nsec >> 16); /* ns[31:16] */
/drivers/crypto/
H A Dhifn_795x.c798 s64 nsec; local
800 nsec = ktime_to_ns(ktime_sub(ktime_get(), dev->rngtime));
801 nsec -= dev->rng_wait_time;
802 if (nsec <= 0)
806 ndelay(nsec);
/drivers/net/ethernet/broadcom/
H A Dtg3.c6270 u64 nsec; local
6272 nsec = rq->perout.start.sec * 1000000000ULL +
6273 rq->perout.start.nsec;
6275 if (rq->perout.period.sec || rq->perout.period.nsec) {
6282 if (nsec & (1ULL << 63)) {
6284 "Start value (nsec) is over limit. Maximum size of start is only 63 bits\n");
6289 tw32(TG3_EAV_WATCHDOG0_LSB, (nsec & 0xffffffff));
6292 ((nsec >> 32) & TG3_EAV_WATCHDOG_MSB_MASK));

Completed in 323 milliseconds