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Searched refs:BIT31 (Results 1 - 25 of 26) sorted by relevance

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/drivers/net/wireless/rtlwifi/btcoexist/
H A Dhalbt_precomp.h79 #define BIT31 0x80000000 macro
/drivers/staging/rtl8192e/rtl8192e/
H A Drtl_cam.c35 ulcommand |= BIT31|BIT30;
42 write_nic_dword(dev, RWCAM, BIT31|BIT16|(addr&0xff));
142 TargetCommand |= BIT31|BIT16;
180 target_command = target_command | BIT31;
184 if (ulStatus & BIT31)
H A Dr8192E_hw.h146 #define RCR_ONLYERLPKT BIT31
191 #define CAM_CM_SecCAMPolling BIT31
210 #define CAM_POLLINIG BIT31
H A Drtl_dm.c289 (pra->upper_rssi_threshold_ratr & (~BIT31)) | ((bshort_gi_enabled) ? BIT31 : 0);
292 (pra->middle_rssi_threshold_ratr & (~BIT31)) | ((bshort_gi_enabled) ? BIT31 : 0);
296 (pra->low_rssi_threshold_ratr_40M & (~BIT31)) | ((bshort_gi_enabled) ? BIT31 : 0);
299 (pra->low_rssi_threshold_ratr_20M & (~BIT31)) | ((bshort_gi_enabled) ? BIT31 : 0);
302 (pra->ping_rssi_ratr & (~BIT31)) | ((bshort_gi_enabled) ? BIT31
[all...]
H A Drtl_wx.c319 rt_global_debug_component &= BIT31;
/drivers/staging/rtl8188eu/include/
H A Dodm_debug.h83 #define ODM_COMP_INIT BIT31
H A Dosdep_service.h138 #define BIT31 0x80000000 macro
H A Dhal_intf.h240 #define RF_CHANGE_BY_SW BIT31
H A Drtl8188e_spec.h57 #define BIT31 0x80000000 macro
603 #define CAM_POLLINIG BIT31
708 #define RCR_APPFCS BIT31 /* WMAC append FCS after payload */
/drivers/staging/rtl8188eu/hal/
H A Dodm_RTL8188E.c32 phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT31, 1);
44 phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT31, 1);
76 phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT31, 1);
132 phy_set_bb_reg(adapter, 0xb2c, BIT31, 1);
154 phy_set_bb_reg(adapter, 0x878, BIT31|BIT30|BIT29, 7);
H A Dodm.c744 phy_set_bb_reg(adapter, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 1); /* hold page C counter */
745 phy_set_bb_reg(adapter, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 1); /* hold page D counter */
H A Dphy.c879 if (!(regeac & BIT31) &&
/drivers/staging/emxx_udc/
H A Demxx_udc.h118 #define BIT31 0x80000000 macro
296 #define EPn_EN BIT31
396 #define ARBITER_CTR BIT31 /* RW */
/drivers/staging/rtl8192e/
H A Drtl819x_Qos.h55 #define BIT31 0x80000000 macro
H A Drtllib.h150 #define RT_RF_LPS_LEVEL_ASPM BIT31
1884 #define RF_CHANGE_BY_SW BIT31
/drivers/staging/rtl8192u/ieee80211/
H A Drtl819x_Qos.h35 #define BIT31 0x80000000 macro
H A Dieee80211.h1751 #define RF_CHANGE_BY_SW BIT31
/drivers/staging/rtl8192u/
H A Dr8192U_hw.h143 #define RCR_ONLYERLPKT BIT31 // Early Receiving based on Packet Size.
H A Dr8192U_dm.c348 (pra->upper_rssi_threshold_ratr & (~BIT31)) | ((bshort_gi_enabled)? BIT31:0) ;
351 (pra->middle_rssi_threshold_ratr & (~BIT31)) | ((bshort_gi_enabled)? BIT31:0) ;
356 (pra->low_rssi_threshold_ratr_40M & (~BIT31)) | ((bshort_gi_enabled)? BIT31:0) ;
361 (pra->low_rssi_threshold_ratr_20M & (~BIT31)) | ((bshort_gi_enabled)? BIT31:0) ;
365 (pra->ping_rssi_ratr & (~BIT31)) | ((bshort_gi_enabled)? BIT31
[all...]
H A Dr8192U.h79 #define BIT31 0x80000000 macro
129 #define COMP_ERR BIT31 /* Error out, always on */
H A Dr8192U_core.c215 ulcommand |= BIT31|BIT30;
224 write_nic_dword(dev, RWCAM, BIT31|BIT16|(addr&0xff));
4886 TargetCommand |= BIT31|BIT16;
/drivers/staging/vt6655/
H A D80211hdr.h68 #define BIT31 0x80000000 macro
/drivers/scsi/
H A Ddc395x.h44 #define BIT31 0x80000000 macro
H A Dtmscsim.h161 #define BIT31 0x80000000 macro
/drivers/net/wireless/rtlwifi/rtl8821ae/
H A Dhw.c3566 ret_bitmap = ratr_bitmap & (~(BIT31|BIT21));

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