[go: nahoru, domu]

Searched refs:calc (Results 1 - 21 of 21) sorted by relevance

/drivers/gpu/drm/nouveau/core/subdev/fb/
H A Dramnv41.c52 ram->base.calc = nv40_ram_calc;
H A Dramnv44.c50 ram->base.calc = nv40_ram_calc;
H A Dramnv49.c52 ram->base.calc = nv40_ram_calc;
H A Dramnv40.c199 ram->base.calc = nv40_ram_calc;
H A Dramnv50.c421 ram->base.calc = nv50_ram_calc;
H A Dramnva3.c384 ram->base.calc = nva3_ram_calc;
H A Dramnvc0.c219 nv_error(pfb, "unable to calc refpll\n");
234 nv_error(pfb, "unable to calc refpll\n");
654 ram->base.calc = nvc0_ram_calc;
H A Dramnve0.c987 nv_error(pfb, "unable to calc refpll\n");
1003 nv_error(pfb, "unable to calc mempll\n");
1473 ram->base.calc = nve0_ram_calc;
/drivers/gpu/drm/nouveau/core/include/subdev/
H A Dclock.h91 int (*calc)(struct nouveau_clock *, struct nouveau_cstate *); member in struct:nouveau_clock
H A Dfb.h146 int (*calc)(struct nouveau_fb *, u32 freq); member in struct:nouveau_ram
/drivers/gpu/drm/nouveau/core/subdev/clock/
H A Dbase.c109 ret = clk->calc(clk, cstate);
192 if (pfb->ram->calc) {
195 ret = pfb->ram->calc(pfb, khz);
H A Dnv40.c225 priv->base.calc = nv40_clock_calc;
H A Dnvaa.c420 priv->base.calc = nvaa_clock_calc;
H A Dnvc0.c447 priv->base.calc = nvc0_clock_calc;
H A Dgk20a.c649 priv->base.calc = gk20a_clock_calc;
H A Dnv50.c533 priv->base.calc = nv50_clock_calc;
H A Dnva3.c519 priv->base.calc = nva3_clock_calc;
H A Dnve0.c485 priv->base.calc = nve0_clock_calc;
/drivers/gpu/drm/nouveau/core/engine/disp/
H A Dnv50.c1685 u32 calc, diff; local
1689 calc = VTUi * symbol;
1690 diff = tu_valid - calc;
1699 calc += symbol - (symbol / VTUf);
1703 calc += symbol;
1708 calc += symbol / VTUf;
1711 diff = calc - tu_valid;
/drivers/gpu/drm/nouveau/
H A Dnouveau_display.c81 calc(int blanks, int blanke, int total, int line) function
123 *vpos = calc(args.scan.vblanks, args.scan.vblanke,
/drivers/net/usb/
H A Dsmsc95xx.c1855 __wsum calc = csum_partial(skb->data + csstart, local
1858 + skb->csum_offset)) = csum_fold(calc);

Completed in 582 milliseconds