Searched refs:clr_mask (Results 1 - 11 of 11) sorted by relevance
/drivers/hwmon/ |
H A D | lm75.c | 189 u8 set_mask, clr_mask; local 209 clr_mask = LM75_SHUTDOWN; /* continuous conversions */ 213 clr_mask |= 1 << 5; /* not one-shot mode */ 220 clr_mask |= 3 << 5; 257 clr_mask |= 1 << 7; /* not one-shot mode */ 261 clr_mask |= 1 << 7; /* not one-shot mode */ 270 clr_mask |= 1 << 7; /* not one-shot mode */ 283 new = status & ~clr_mask;
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/drivers/mfd/ |
H A D | ssbi.c | 104 static int ssbi_wait_mask(struct ssbi *ssbi, u32 set_mask, u32 clr_mask) argument 111 if (((val & set_mask) == set_mask) && ((val & clr_mask) == 0))
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/drivers/net/phy/ |
H A D | bcm7xxx.c | 243 int set_mask, int clr_mask) 251 v &= ~clr_mask; 242 phy_set_clr_bits(struct phy_device *dev, int location, int set_mask, int clr_mask) argument
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/drivers/infiniband/hw/mthca/ |
H A D | mthca_eq.c | 397 if (dev->eq_table.clr_mask) 398 writel(dev->eq_table.clr_mask, dev->eq_table.clr_int); 437 if (dev->eq_table.clr_mask) 438 writel(dev->eq_table.clr_mask, dev->eq_table.clr_int); 785 dev->eq_table.clr_mask = 0; 787 dev->eq_table.clr_mask =
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H A D | mthca_dev.h | 229 u32 clr_mask; member in struct:mthca_eq_table
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/drivers/media/i2c/ |
H A D | ths8200.c | 108 uint8_t clr_mask, uint8_t val_mask) 110 ths8200_write(sd, reg, (ths8200_read(sd, reg) & clr_mask) | val_mask); 107 ths8200_write_and_or(struct v4l2_subdev *sd, u8 reg, uint8_t clr_mask, uint8_t val_mask) argument
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H A D | ad9389b.c | 148 u8 clr_mask, u8 val_mask) 150 ad9389b_wr(sd, reg, (ad9389b_rd(sd, reg) & clr_mask) | val_mask); 147 ad9389b_wr_and_or(struct v4l2_subdev *sd, u8 reg, u8 clr_mask, u8 val_mask) argument
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H A D | adv7511.c | 198 static inline void adv7511_wr_and_or(struct v4l2_subdev *sd, u8 reg, uint8_t clr_mask, uint8_t val_mask) argument 200 adv7511_wr(sd, reg, (adv7511_rd(sd, reg) & clr_mask) | val_mask);
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/drivers/dma/ |
H A D | qcom_bam_dma.c | 688 u32 clr_mask = 0, srcs = 0; local 697 clr_mask = readl_relaxed(bdev->regs + BAM_IRQ_STTS); 702 writel_relaxed(clr_mask, bdev->regs + BAM_IRQ_CLR);
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/drivers/net/ethernet/mellanox/mlx4/ |
H A D | eq.c | 771 writel(priv->eq_table.clr_mask, priv->eq_table.clr_int); 1139 priv->eq_table.clr_mask =
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H A D | mlx4.h | 656 u32 clr_mask; member in struct:mlx4_eq_table
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