[go: nahoru, domu]

Searched refs:h_start (Results 1 - 11 of 11) sorted by relevance

/drivers/media/platform/omap3isp/
H A Disph3a_af.c67 paxstart = conf->paxel.h_start << AF_HZ_START_SHIFT;
74 isp_reg_writel(af->isp, conf->iir.h_start,
195 if ((paxel_cfg->h_start < iir_cfg->h_start) ||
196 IS_OUT_OF_BOUNDS(paxel_cfg->h_start,
210 if (IS_OUT_OF_BOUNDS(iir_cfg->h_start, OMAP3ISP_AF_IIRSH_MIN,
260 if (cur_cfg->iir.h_start != user_cfg->iir.h_start) {
280 (cur_cfg->paxel.h_start != user_cfg->paxel.h_start) ||
[all...]
H A Disphist.c107 reg_hor[c] = (conf->region[c].h_start <<
313 if (user_cfg->region[c].h_start & ~ISPHIST_REG_START_END_MASK)
321 if (user_cfg->region[c].h_start > user_cfg->region[c].h_end)
379 if (cur_cfg->region[c].h_start != user_cfg->region[c].h_start)
/drivers/media/pci/saa7134/
H A Dsaa7134-vbi.c56 saa_writeb(SAA7134_VBI_H_START1(task), norm->h_start & 0xff);
57 saa_writeb(SAA7134_VBI_H_START2(task), norm->h_start >> 8);
H A Dsaa7134-video.c199 .h_start = 0, \
209 .h_start = 0, \
355 .h_start = 0,
392 dev->crop_bounds.left = norm->h_start;
393 dev->crop_defrect.left = norm->h_start;
394 dev->crop_bounds.width = norm->h_stop - norm->h_start +1;
395 dev->crop_defrect.width = norm->h_stop - norm->h_start +1;
553 int h_start, h_stop, v_start, v_stop; local
557 h_start = dev->crop_current.left;
562 saa_writeb(SAA7134_VIDEO_H_START1(task), h_start
563 saa_writeb(SAA7134_VIDEO_H_START2(task), h_start >> 8); local
[all...]
H A Dsaa7134.h93 unsigned int h_start; member in struct:saa7134_tvnorm
/drivers/video/fbdev/
H A Dwm8505fb.c90 int h_start = info->var.left_margin; local
91 int h_end = h_start + info->var.xres;
102 writel(h_start, fbi->regbase + WMT_GOVR_TIMING_H_START);
H A Dbfin-lq035q1-fb.c108 u32 h_start; member in struct:bfin_lq035q1fb_info
253 fbi->h_start = (7 * clocks_per_pix + cpld_pipeline_delay_cor); /* first valid pixel */
271 bfin_write_PPI_DELAY(fbi->h_start);
/drivers/media/pci/tw68/
H A Dtw68-video.c103 .h_start = 0, \
115 .h_start = 0, \
194 .h_start = 0,
282 " tvnorm h_delay=%d, h_start=%d, h_stop=%d, "
285 norm->h_delay, norm->h_start, norm->h_stop,
298 hdelay += norm->h_start;
299 hactive = norm->h_stop - norm->h_start + 1;
H A Dtw68.h99 u32 h_start; member in struct:tw68_tvnorm
/drivers/media/platform/ti-vpe/
H A Dvpdma_priv.h294 static inline u32 dtd_start_h_v(int h_start, int v_start) argument
296 return (h_start << DTD_H_START_SHFT) | v_start;
/drivers/video/fbdev/nvidia/
H A Dnvidia.c312 int h_start = (info->var.xres + info->var.right_margin) / 8 - 1; local
339 h_start = h_total - 5;
349 state->crtc[0x4] = Set8Bits(h_start);
386 | SetBitField(h_start, 8: 8, 3:3);

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