[go: nahoru, domu]

Searched refs:mux_width (Results 1 - 3 of 3) sorted by relevance

/drivers/clk/rockchip/
H A Dclk.h174 u8 mux_width; member in struct:rockchip_clk_branch
196 .mux_width = mw, \
254 .mux_width = mw, \
272 .mux_width = mw, \
307 .mux_width = w, \
H A Dclk.c43 int muxdiv_offset, u8 mux_shift, u8 mux_width, u8 mux_flags,
63 mux->mask = BIT(mux_width) - 1;
228 list->mux_shift, list->mux_width,
274 list->mux_width, list->mux_flags,
41 rockchip_clk_register_branch(const char *name, const char **parent_names, u8 num_parents, void __iomem *base, int muxdiv_offset, u8 mux_shift, u8 mux_width, u8 mux_flags, u8 div_shift, u8 div_width, u8 div_flags, struct clk_div_table *div_table, int gate_offset, u8 gate_shift, u8 gate_flags, unsigned long flags, spinlock_t *lock) argument
/drivers/clk/st/
H A Dclkgen-mux.c227 const int mux_width = 2; local
245 genamux->mux.mask = BIT(mux_width) - 1;
246 genamux->mux.shift = muxdata->mux_start_bit + (idx * mux_width);

Completed in 131 milliseconds