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Searched refs:setup_clock (Results 1 - 10 of 10) sorted by relevance

/drivers/gpu/drm/tegra/
H A Ddrm.h179 int (*setup_clock)(struct tegra_output *output, struct clk *clk, member in struct:tegra_output_ops
241 if (output && output->ops && output->ops->setup_clock)
242 return output->ops->setup_clock(output, clk, pclk, div);
H A Drgb.c214 .setup_clock = tegra_output_rgb_setup_clock,
H A Ddsi.c682 .setup_clock = tegra_output_dsi_setup_clock,
H A Dhdmi.c1105 .setup_clock = tegra_output_hdmi_setup_clock,
H A Dsor.c1168 .setup_clock = tegra_output_sor_setup_clock,
/drivers/media/platform/davinci/
H A Dvpbe_venc.c239 if (pdata->setup_clock(VPBE_ENC_STD, V4L2_STD_525_60) < 0)
285 if (venc->pdata->setup_clock(VPBE_ENC_STD, V4L2_STD_625_50) < 0)
340 if (pdata->setup_clock(VPBE_ENC_DV_TIMINGS, 27000000) < 0)
388 if (pdata->setup_clock(VPBE_ENC_DV_TIMINGS, 27000000) < 0)
429 if (pdata->setup_clock(VPBE_ENC_DV_TIMINGS, 74250000) < 0)
458 if (pdata->setup_clock(VPBE_ENC_DV_TIMINGS, 74250000) < 0)
/drivers/mmc/host/
H A Ddw_mmc-rockchip.c75 .setup_clock = dw_mci_rk3288_setup_clock,
H A Ddw_mmc.h249 * @setup_clock: implementation specific clock configuration.
262 int (*setup_clock)(struct dw_mci *host); member in struct:dw_mci_drv_data
H A Ddw_mmc-exynos.c398 .setup_clock = dw_mci_exynos_setup_clock,
H A Ddw_mmc.c2583 if (drv_data && drv_data->setup_clock) {
2584 ret = drv_data->setup_clock(host);

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