UPSTREAM: drm/amdgpu: enable ABGR and XBGR formats (v2)

Add support for DRM_FORMAT_{A,X}BGR8888 in amdgpu with amd dc disabled

(v2) Crossbar registers are defined and used to swap red and blue channels,
     keeping the existing coding style in each of the dce modules.
     After setting crossbar bits in fb_swap, use bitwise OR for big endian
     where required in DCE6 and DCE8 which do not rely on REG_SET_FIELD()

Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Drew Davenport <ddavenport@chromium.org>
(cherry picked from commit 00ecc6e6d4eeba9681ec91f9601a9ed1a68a9e7f)

BUG=none
TEST=check formats in modetest; modify drm_cursor_test to use XBGR8888 format

Change-Id: If4f8c870a1fb9b8d91b123bb0d59f4268b2ac3da
Reviewed-on: https://chromium-review.googlesource.com/1570626
Commit-Ready: Drew Davenport <ddavenport@chromium.org>
Tested-by: Drew Davenport <ddavenport@chromium.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>

• drivers/gpu/drm/amd/amdgpu/dce_v10_0.c[diff]
• drivers/gpu/drm/amd/amdgpu/dce_v11_0.c[diff]
• drivers/gpu/drm/amd/amdgpu/dce_v6_0.c[diff]
• drivers/gpu/drm/amd/amdgpu/dce_v8_0.c[diff]
• drivers/gpu/drm/amd/amdgpu/si_enums.h[diff]
• drivers/gpu/drm/amd/amdgpu/sid.h[diff]