Talk:Datapoint 2200: Difference between revisions

KB instead of KiB?

Why wasn't that correct? I noticed someone made the change from KB to KiB here a while ago then it was rejected. Let's GET some consensus on this, folks! mike4ty4 (talk) 00:41, 4 January 2008 (UTC)

For RAM KiB and KB are equivalent even in 2008. Any article referring to KB of RAM on computers prior to 1995 are all using 1024 bytes and there is no confusion. Don't know of any machines with KB's of RAM after 1995 but if you find some embedded systems with KB I'm pretty sure it's 1024. KB is historically accurate for the description of RAM on this machine and no need to revise for historic reasons. Alatari (talk) 15:45, 8 January 2008 (UTC)

Size difference i8008 motherboard to discrete motherboard

Supposedly, the difference between using the intel 8008 and Datapoint's discrete TTL implementation is an 8x11 motherboard and an 11x14 motherboard. The supporting logical required for the intel 8008 being a notable size cost. 131.107.0.73 (talk) 17:36, 19 May 2011 (UTC)HenriS

If this could be doucmented it might be worth noting either in this article or in the 8008 article. But the board size doesn't appear to be the reason the 8008 wasn't used. --Wtshymanski (talk) 20:47, 19 May 2011 (UTC)

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Programmability wasn't a secret

The article says "It was presented by CTC simply as a versatile and cost-efficient terminal... However, enterprising users... realized that this so-called "programmable terminal" was equipped to perform any task a simple computer could."

Leaving aside the self-contradiction there ("simply (a) terminal" vs. "so-called programmable terminal"), the implication is that CTC tried to hide the programmability of the system, but somehow customers figured it out. In fact, the marketing of the system featured its programmability from the beginning.

The system documentation, for example, included a programmer's reference manual at least as early as August 1971. That edition included a program listing for the in-ROM boot loader dated "02/05/71". [1]

Microcomputer companies of the day, including HP, simply didn't want confuse buyers used to the notion that a "computer" was a huge expensive thing. HP, for example, referred to its BASIC-programmable 9830 as a "calculator," but of course it didn't try to hide the fact that it had BASIC in ROM, supported multiple peripherals including tape storage, and so on.

It wasn't just a matter of "confused buyers." Sometimes it was institutional policy. If you worked for a university or a large corporation, and you wanted to purchase a "computer," it was might automatically be classified as capital equipment. Getting approval to purchase a "calculator" for the exact same price could be much easier. 173.75.33.51 (talk) 19:16, 9 July 2020 (UTC)

The story of the Datapoint 2200 is impressive enough without misleading embellishments. 73.92.193.211 (talk) 02:00, 13 March 2019 (UTC)

"Datapoint: The Lost Story of the Texans Who Invented the Personal Computer", by Lamont Wood, appears to indicate that the initial marketing was mainly as a terminal that could run any of a number of emulators, but that a CTC salesperson, Dave Gust, got the idea of marketing it to Pillsbury as a computer they could use at their chicken farms to process payrolls, after which CTC decided to sell it as a computer. (It also says they'd developed an ad to sell it as a computer, but they ran out of money and couldn't run it.) I've updated the article, using that book as a reference. Guy Harris (talk) 22:02, 14 September 2019 (UTC)

Datapoint 2200 not faster than Intel 8008

From the article: "Even though the Datapoint 2200 processor design employed a bit-serial microarchitecture, operating one bit at a time, it performed faster than the Intel 8008 microprocessor which employed an 8-bit parallel microarchitecture" "Datapoint 2200 Version II (CTC's parallel design) was much faster than the TMC 1795, which was slightly faster than the original serial design of the Datapoint 2200, which in turn was considerably faster than the 8008."

The serial design of the Datapoint 2200 version I is not faster than the Intel 8008. Even though the article matches the reference cited, the cited reference is incorrect. Although the Datapoint 2200 version I is somewhat faster than an 8008 on many instructions, any reference to the 2200's shift-register memory incurs a giant 520µs delay. Also any JMP, CALL, or RETURN can incur a variable delay up to 520µs depending on the distance to the new address. The parallel-architecture Datapoint 2200 version II is much faster than either. Compare the instruction times:

Instruction					Description	Datapoint 2200 ver I µs	500 kHz Intel 8008 µs	Datapoint 2200 ver II µs
ADB					Add B to A	16	20	3.2
ADI nn					Add nn immediate to A	16	32	4.8
ADM					Add memory to A	520	32	4.8
JMP nnnn					Jump to nnnn	24-520	44	6.4
CALL/RET					Call and Ret combined	520	64	9.6
Rcc (false)					Conditional return not taken	16	12	3.2

Page 8-11 of the Datapoint 2200 Programmer's Manual (August 1971) gives an assembly language example of a delay routine. The manual states that the delay routine decrements the delay counter at a rate of 2,000 counts per second. A 500 kHz Intel 8008 will execute this code at a rate of 5,319 counts per second, over twice as fast!

To show a most extreme example of the speed difference, I wrote a routine that would clear a 256 byte buffer located on a 256 byte boundary. The loop is just five instructions but unavoidably includes LMB and JFZ instructions, which are very slow. The 2200 version I will take about 266ms to execute. A 500 kHz 8008 will execute it in just 37ms, seven times faster! BTW: Using the expanded 8008 instruction set, the routine could be reduced to just three instructions, executing in 24ms.

How do we correct this error without violating Wikipedia sourcing rules? RastaKins (talk) 18:30, 3 June 2024 (UTC)

Fair enough. I was considering the processor (specifically ALU) speed, not the memory speed. It's confusing to say that the 8008 is faster than the 2200 if the speedup is entirely due to using RAM instead of shift-register memory, and the 8008 itself is slower. I don't have strong feelings on this, though. You could cut the sentence entirely, or add a qualification, or mention that system performance was limited by the serial memory. KenShirriff (talk) 23:41, 24 June 2024 (UTC)

I agree. Speed certainly is tied to the technologies used. The 2200 ALU is faster than the 8008 because 2200 is implemented in bipolar rather than PMOS. But overall 2200 system speed is slower because memory is implemented in shift registers rather than RAM. There is no way to interface RAM to the Datapoint 2200 ver I so its performance is intimately tied to shift register technology.

I believe it may be impossible to write a practical routine that is faster then 8008 on the Datapoint 2200 (without unrolling loops) because a slow conditional branch would eventually be needed. The 2200 shift register memory segment is 512bits/64 bytes long. I estimate the break-even point would be no less than 32 bytes of register-oriented code between branches. I tried to devise a useful routine that might be faster on the 2200 than the 8008. I came up with a register-based 40-bit multiple left-shift routine. 19 instructions, 22 bytes. On the 2200 it's 288µs for 18 of the instructions and a glacial 341µs just for the jump (22 bytes backward but implemented as 44 bytes forward). 629µs per iteration. A 500 kHz 8008 would clock in at a slower 372µs for the first 18 instructions but it makes up for that with its snappy 44µs jump resulting in just 416µs per iteration.

My conclusion: There is no practical routine one could code that would run faster on the Datapoint 2200 ver I. It never executes faster than the 8008. RastaKins (talk) 13:31, 26 June 2024 (UTC)