Revision as of 21:38, 24 December 2023 edit 2a01:c22:a4a6:7a00:5d91:b8a4:8a5:6f2 (talk) →‎Writable stores Tag: Visual edit ← Previous edit		Revision as of 08:34, 25 December 2023 edit undo Guy Harris (talk \| contribs) Extended confirmed users 74,530 edits →‎Writable stores: Ask for a citation on WCS making it harder to debug programs. Copyedit. Next edit →
Line 48: The [[Data General Eclipse MV/8000]] ("Eagle") has a SRAM writable control store, loaded on power-on through another CPU.<ref>{{cite web\|author=Mark Smotherman\|title=CPSC 330 / The Soul of a New Machine\|url=http://www.cs.clemson.edu/~mark/330/eagle.html\|quote=4096 x 75-bit SRAM writeable control store: 74-bit microinstruction with 1 parity bit (18 fields)}}</ref> WCS offers several advantages including the ease of patching the microprogram and, for certain hardware generations, faster access than ROMs could provide. User-programmable WCS allow the user to optimize the machine for specific purposes. However, it also ~~had~~has the ~~disadvantage~~disadvantages of making it harder to debug programs,{{cn}} and making it possible for malicious users to negatively affect the system and data.<ref>{{cite journal \|last=McDowell \|first=Charlie \|date=1982 \|title=Protection at the micromachine level \|url=https://dl.acm.org/doi/pdf/10.1145/859520.859521 \|journal=ACM SIGARCH Computer Architecture News \|volume=10 \|issue=1 \|pages=5 \|doi=10.1145/859520.859521 \|access-date=2023-11-25}}</ref> Some CPU designs compile the instruction set to a writable [[RAM]] or [[Flash memory\|FLASH]] inside the CPU (such as the [[Rekursiv]] processor and the [[Imsys]] [[Cjip]]),<ref>{{cite web\|url=http://cpushack.com/CPU/cpu7.html \|title=Great Microprocessors of the Past and Present (V 13.4.0) \|publisher=Cpushack.com \|access-date=2010-04-26}}</ref> or an FPGA ([[reconfigurable computing]]).

Control store: Difference between revisions