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Whether ESL or other systems, design refers to "the concurrent design of the hardware and software parts of an electronic product."<ref>{{cite web|last1=Perrier|first1=Vincent|title=A look inside electronic system level (ESL) design|url=http://www.eetimes.com/document.asp?doc_id=1276969}}</ref>
== Tools ==
There are various types of EDA tool used for ESL design. The key component is the Virtual Platform which is essentially a simulator. The Virtual Platform most commonly supports [[Transaction-level modeling]] (TLM), where operations of one component on another are modelled with a simple method call between the objects modelling each component. This abstraction gives a considerable speed up over cycle-accurate modelling, since thousands of net-level events in the real system can be represented by simply passing a pointer, e.g. to model that an Ethernet packed has been received. SystemC is often used.
Other tools support import and export or intercommunication with components modelled at other levels of abstraction. For instance, an RTL component be converted into a [[SystemC]] model using VtoC or Verilator. And [[High Level Synthesis]] can be used to convert C models of a component into an RTL implementation.
== Verification ==
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