NMOS logic: Difference between revisions

Another disadvantage of NMOS circuits is their thermal output. Due to the need to keep constant voltage running through the circuit to hold the transistors' states, NMOS circuits can generate a considerable amount of heat in operation which can reduce the device's reliability. This was especially problematic with the early large gate process nodes in the 1970s. CMOS circuits for contrast generate almost no heat unless the transistor count approaches 1 million.

 

 

Additionally, just like in [[diode–transistor logic]], [[transistor–transistor logic]], [[emitter-coupled logic]] etc., the asymmetric input logic levels make NMOS and PMOS circuits more susceptible to noise than CMOS. These disadvantages are why [[CMOS logic]] has supplanted most of these types in most high-speed digital circuits such as [[microprocessor]]s despite the fact that CMOS was originally very slow compared to [[logic gate]]s built with [[bipolar transistor]]s.