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==={{Anchor|1.0}}SATA revision 1.0 (1.5 Gbit/s, 150 MB/s, Serial ATA-150)===
Revision 1.0a<ref name="SATA1a" /> was released on January 7, 2003. First-generation SATA interfaces, now known as SATA 1.5 Gbit/s, communicate at a rate of 1.5 Gbit/s,{{Efn|{{BDprefix|p=D}}}} and do not support [[Native Command Queuing]] (NCQ). Taking [[8b/10b encoding]] overhead into account, they have an actual [[uncoded transfer rate]] of 1.2 Gbit/s (150 MB/s). The theoretical burst throughput of SATA 1.5
During the initial period after SATA 1.5 Gbit/s finalization, adapter and drive manufacturers used a "bridge chip" to convert existing PATA designs for use with the SATA interface. Bridged drives have a SATA connector, may include either or both kinds of power connectors, and, in general, perform identically to their native-SATA equivalents.<ref>{{cite web
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|archive-date = 2016-03-04
}}</ref>
* The [[SATA Express]] specification defines an interface that combines both SATA and [[PCI Express]] buses, making it possible for both types of storage devices to coexist. By employing PCI Express, a much higher theoretical throughput of 1969
* The [[M.2|SATA M.2]] standard is a small form factor implementation of the SATA Express interface, with the addition of an internal [[USB 3.0]] port; see the [[#M.2|M.2 (NGFF)]] section below for a more detailed summary.<ref>{{cite web |url=https://www.sata-io.org/sata-m2-card |title=SATA M.2 Card |publisher=SATA-IO |access-date=2014-01-16 |url-status=live |archive-url=https://web.archive.org/web/20131003103042/https://www.sata-io.org/sata-m2-card |archive-date=2013-10-03 }}</ref>
* ''microSSD'' introduces a [[ball grid array]] electrical interface for miniaturized, embedded SATA storage.<ref>[http://www.sata-io.org/technology/ussd.asp SATA µSSD] {{webarchive|url=https://web.archive.org/web/20130508023414/http://www.sata-io.org/technology/ussd.asp |date=2013-05-08 }}, Serial ATA International Organization.</ref>
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* Two ground pins and one pin for each supplied voltage support [[hot swapping|hot-plug]] precharging. Ground pins 4 and 12 in a hot-swap cable are the longest, so they make contact first when the connectors are mated. Drive power connector pins 3, 7, and 13 are longer than the others, so they make contact next. The drive uses them to charge its internal bypass capacitors through current-limiting resistances. Finally, the remaining power pins make contact, bypassing the resistances and providing a low-resistance source of each voltage. This two-step mating process avoids glitches to other loads and possible arcing or erosion of the SATA power-connector contacts.
* Pin 11 might be used (often by chassis or backplane hardware independent from SATA host controller and its data connection) for [[staggered spinup]], activity indication, emergency head parking, or other vendor defined functions in various combinations. It is an [[open-collector]] signal, which may be pulled down by the connector or the drive.
** Host signaling: If pulled down at the connector (as it is on most cable-style SATA power connectors), the drive spins up as soon as power is applied.
** Drive signaling: The pin is also pulled low by the drive to indicate drive activity. This may be used to give feedback to the user through an [[LED]]. Relevant definitions of pin operation have changed multiple times in published revisions of SATA standard, so the observed behavior may be dependent on device version, host version, firmware and software configuration.<ref>{{cite web |author1=Samsung Electronics |title=Device Activity Signal (DAS) Application Note |url=https://semiconductor.samsung.com/resources/others/Samsung_SSD_845DC_01_Device_Activity_Signal_DAS.pdf |access-date=27 April 2023 |date=26 May 2014}}</ref><ref>{{cite web |author1=SATA-IO |title=Serial ATA Revision 3.2 Technical Proposal #058: DAS/DSS/DHU Changes |url=https://sata-io.org/sites/default/files/TPR058v3_SATA32_DAS%2BDSS%2BDHU_Changes.pdf |access-date=27 April 2023 |date=2 June 2014}}</ref><ref>{{cite web |author1=SATA-IO |title=Serial ATA Revision 3.2 Error Correction #089: DAS/DSS support clarifications |url=https://sata-io.org/sites/default/files/ECN089v6_SATA32_DSS_DAS_SupportClarifications.pdf |access-date=27 April 2023 |date=11 August 2015}}</ref> There is also a specification for transmission of drive temperature and other status values with activity signal pulses routinely used to make LED blink.<ref>{{cite web |author1=SNIA SFF TWG |title=SFF-8609: Management Interface for Drive Conditions |url=https://members.snia.org/document/dl/27389 |access-date=27 April 2023 |date=7 July 2017}}</ref>
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SATA 2.6 is the first revision that defined the slimline connector, intended for smaller form-factors such as notebook optical drives. Pin 1 of the slimline power connector, denoting device presence, is shorter than the others to allow hot-swapping.
Low-cost adapters exist to convert from standard SATA to slimline SATA.
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[[File:Connector esata IMGP6050 wp.jpg|thumb|upright|eSATA ports]]
Standardized in 2004, eSATA (''e'' standing for external) provides a variant of SATA meant for external connectivity.
* Minimum transmit amplitude increased: Range is 500–600 mV instead of 400–600 mV.
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|archive-url = https://archive.today/20130809202201/https://www.sata-io.org/sata-revision-32
|archive-date = 2013-08-09
}}</ref> is an interface that supports either SATA or [[PCI Express]] storage devices.
|url = https://www.sata-io.org/sites/default/files/documents/MM_Nereus_Signage_Print_0719.pdf
|title = Connector Mating Matrix
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|archive-url = https://web.archive.org/web/20131004231134/https://www.sata-io.org/sites/default/files/documents/MM_Nereus_Signage_Print_0719.pdf
|archive-date = 2013-10-04
}}</ref>
|url = https://www.sata-io.org/sata-express
|title = Enabling Higher Speed Storage Applications with SATA Express
| |||