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In spite of all of the above, systolic arrays are often offered as a classic example of MISD architecture in textbooks on [[parallel computing]] and in the engineering class. If the array is viewed from the outside as [[atomic operation|atomic]] it should perhaps be classified as '''SFMuDMeR''' = Single Function, Multiple Data, Merged Result(s).
Systolic arrays use a pre-defined computational flow graph that connects their nodes. [[Kahn_process_networks|Kahn Process Networks]] use a similar flow graph, but are distinguished by the nodes
working in lock-step in the systolic array: in a Kahn network, there are FIFO queues
between each node.
==Detailed description==
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