psb_device.c revision 6607e024014e4920e8d3e43bcfeec0436d43d980
1/************************************************************************** 2 * Copyright (c) 2011, Intel Corporation. 3 * All Rights Reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2, as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program; if not, write to the Free Software Foundation, Inc., 16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 17 * 18 **************************************************************************/ 19 20#include <linux/backlight.h> 21#include <drm/drmP.h> 22#include <drm/drm.h> 23#include "gma_drm.h" 24#include "psb_drv.h" 25#include "psb_reg.h" 26#include "psb_intel_reg.h" 27#include "intel_bios.h" 28 29 30static int psb_output_init(struct drm_device *dev) 31{ 32 struct drm_psb_private *dev_priv = dev->dev_private; 33 psb_intel_lvds_init(dev, &dev_priv->mode_dev); 34 psb_intel_sdvo_init(dev, SDVOB); 35 return 0; 36} 37 38#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE 39 40/* 41 * Poulsbo Backlight Interfaces 42 */ 43 44#define BLC_PWM_PRECISION_FACTOR 100 /* 10000000 */ 45#define BLC_PWM_FREQ_CALC_CONSTANT 32 46#define MHz 1000000 47 48#define PSB_BLC_PWM_PRECISION_FACTOR 10 49#define PSB_BLC_MAX_PWM_REG_FREQ 0xFFFE 50#define PSB_BLC_MIN_PWM_REG_FREQ 0x2 51 52#define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE) 53#define PSB_BACKLIGHT_PWM_CTL_SHIFT (16) 54 55static int psb_brightness; 56static struct backlight_device *psb_backlight_device; 57 58static int psb_get_brightness(struct backlight_device *bd) 59{ 60 /* return locally cached var instead of HW read (due to DPST etc.) */ 61 /* FIXME: ideally return actual value in case firmware fiddled with 62 it */ 63 return psb_brightness; 64} 65 66 67static int psb_backlight_setup(struct drm_device *dev) 68{ 69 struct drm_psb_private *dev_priv = dev->dev_private; 70 unsigned long core_clock; 71 /* u32 bl_max_freq; */ 72 /* unsigned long value; */ 73 u16 bl_max_freq; 74 uint32_t value; 75 uint32_t blc_pwm_precision_factor; 76 77 /* get bl_max_freq and pol from dev_priv*/ 78 if (!dev_priv->lvds_bl) { 79 dev_err(dev->dev, "Has no valid LVDS backlight info\n"); 80 return -ENOENT; 81 } 82 bl_max_freq = dev_priv->lvds_bl->freq; 83 blc_pwm_precision_factor = PSB_BLC_PWM_PRECISION_FACTOR; 84 85 core_clock = dev_priv->core_freq; 86 87 value = (core_clock * MHz) / BLC_PWM_FREQ_CALC_CONSTANT; 88 value *= blc_pwm_precision_factor; 89 value /= bl_max_freq; 90 value /= blc_pwm_precision_factor; 91 92 if (value > (unsigned long long)PSB_BLC_MAX_PWM_REG_FREQ || 93 value < (unsigned long long)PSB_BLC_MIN_PWM_REG_FREQ) 94 return -ERANGE; 95 else { 96 value &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR; 97 REG_WRITE(BLC_PWM_CTL, 98 (value << PSB_BACKLIGHT_PWM_CTL_SHIFT) | (value)); 99 } 100 return 0; 101} 102 103static int psb_set_brightness(struct backlight_device *bd) 104{ 105 struct drm_device *dev = bl_get_data(psb_backlight_device); 106 int level = bd->props.brightness; 107 108 /* Percentage 1-100% being valid */ 109 if (level < 1) 110 level = 1; 111 112 psb_intel_lvds_set_brightness(dev, level); 113 psb_brightness = level; 114 return 0; 115} 116 117static const struct backlight_ops psb_ops = { 118 .get_brightness = psb_get_brightness, 119 .update_status = psb_set_brightness, 120}; 121 122static int psb_backlight_init(struct drm_device *dev) 123{ 124 struct drm_psb_private *dev_priv = dev->dev_private; 125 int ret; 126 struct backlight_properties props; 127 128 memset(&props, 0, sizeof(struct backlight_properties)); 129 props.max_brightness = 100; 130 props.type = BACKLIGHT_PLATFORM; 131 132 psb_backlight_device = backlight_device_register("psb-bl", 133 NULL, (void *)dev, &psb_ops, &props); 134 if (IS_ERR(psb_backlight_device)) 135 return PTR_ERR(psb_backlight_device); 136 137 ret = psb_backlight_setup(dev); 138 if (ret < 0) { 139 backlight_device_unregister(psb_backlight_device); 140 psb_backlight_device = NULL; 141 return ret; 142 } 143 psb_backlight_device->props.brightness = 100; 144 psb_backlight_device->props.max_brightness = 100; 145 backlight_update_status(psb_backlight_device); 146 dev_priv->backlight_device = psb_backlight_device; 147 return 0; 148} 149 150#endif 151 152/* 153 * Provide the Poulsbo specific chip logic and low level methods 154 * for power management 155 */ 156 157static void psb_init_pm(struct drm_device *dev) 158{ 159 struct drm_psb_private *dev_priv = dev->dev_private; 160 161 u32 gating = PSB_RSGX32(PSB_CR_CLKGATECTL); 162 gating &= ~3; /* Disable 2D clock gating */ 163 gating |= 1; 164 PSB_WSGX32(gating, PSB_CR_CLKGATECTL); 165 PSB_RSGX32(PSB_CR_CLKGATECTL); 166} 167 168/** 169 * psb_save_display_registers - save registers lost on suspend 170 * @dev: our DRM device 171 * 172 * Save the state we need in order to be able to restore the interface 173 * upon resume from suspend 174 */ 175static int psb_save_display_registers(struct drm_device *dev) 176{ 177 struct drm_psb_private *dev_priv = dev->dev_private; 178 struct drm_crtc *crtc; 179 struct drm_connector *connector; 180 struct psb_state *regs = &dev_priv->regs.psb; 181 182 /* Display arbitration control + watermarks */ 183 regs->saveDSPARB = PSB_RVDC32(DSPARB); 184 regs->saveDSPFW1 = PSB_RVDC32(DSPFW1); 185 regs->saveDSPFW2 = PSB_RVDC32(DSPFW2); 186 regs->saveDSPFW3 = PSB_RVDC32(DSPFW3); 187 regs->saveDSPFW4 = PSB_RVDC32(DSPFW4); 188 regs->saveDSPFW5 = PSB_RVDC32(DSPFW5); 189 regs->saveDSPFW6 = PSB_RVDC32(DSPFW6); 190 regs->saveCHICKENBIT = PSB_RVDC32(DSPCHICKENBIT); 191 192 /* Save crtc and output state */ 193 mutex_lock(&dev->mode_config.mutex); 194 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 195 if (drm_helper_crtc_in_use(crtc)) 196 crtc->funcs->save(crtc); 197 } 198 199 list_for_each_entry(connector, &dev->mode_config.connector_list, head) 200 connector->funcs->save(connector); 201 202 mutex_unlock(&dev->mode_config.mutex); 203 return 0; 204} 205 206/** 207 * psb_restore_display_registers - restore lost register state 208 * @dev: our DRM device 209 * 210 * Restore register state that was lost during suspend and resume. 211 */ 212static int psb_restore_display_registers(struct drm_device *dev) 213{ 214 struct drm_psb_private *dev_priv = dev->dev_private; 215 struct drm_crtc *crtc; 216 struct drm_connector *connector; 217 struct psb_state *regs = &dev_priv->regs.psb; 218 219 /* Display arbitration + watermarks */ 220 PSB_WVDC32(regs->saveDSPARB, DSPARB); 221 PSB_WVDC32(regs->saveDSPFW1, DSPFW1); 222 PSB_WVDC32(regs->saveDSPFW2, DSPFW2); 223 PSB_WVDC32(regs->saveDSPFW3, DSPFW3); 224 PSB_WVDC32(regs->saveDSPFW4, DSPFW4); 225 PSB_WVDC32(regs->saveDSPFW5, DSPFW5); 226 PSB_WVDC32(regs->saveDSPFW6, DSPFW6); 227 PSB_WVDC32(regs->saveCHICKENBIT, DSPCHICKENBIT); 228 229 /*make sure VGA plane is off. it initializes to on after reset!*/ 230 PSB_WVDC32(0x80000000, VGACNTRL); 231 232 mutex_lock(&dev->mode_config.mutex); 233 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) 234 if (drm_helper_crtc_in_use(crtc)) 235 crtc->funcs->restore(crtc); 236 237 list_for_each_entry(connector, &dev->mode_config.connector_list, head) 238 connector->funcs->restore(connector); 239 240 mutex_unlock(&dev->mode_config.mutex); 241 return 0; 242} 243 244static int psb_power_down(struct drm_device *dev) 245{ 246 return 0; 247} 248 249static int psb_power_up(struct drm_device *dev) 250{ 251 return 0; 252} 253 254static void psb_get_core_freq(struct drm_device *dev) 255{ 256 uint32_t clock; 257 struct pci_dev *pci_root = pci_get_bus_and_slot(0, 0); 258 struct drm_psb_private *dev_priv = dev->dev_private; 259 260 /*pci_write_config_dword(pci_root, 0xD4, 0x00C32004);*/ 261 /*pci_write_config_dword(pci_root, 0xD0, 0xE0033000);*/ 262 263 pci_write_config_dword(pci_root, 0xD0, 0xD0050300); 264 pci_read_config_dword(pci_root, 0xD4, &clock); 265 pci_dev_put(pci_root); 266 267 switch (clock & 0x07) { 268 case 0: 269 dev_priv->core_freq = 100; 270 break; 271 case 1: 272 dev_priv->core_freq = 133; 273 break; 274 case 2: 275 dev_priv->core_freq = 150; 276 break; 277 case 3: 278 dev_priv->core_freq = 178; 279 break; 280 case 4: 281 dev_priv->core_freq = 200; 282 break; 283 case 5: 284 case 6: 285 case 7: 286 dev_priv->core_freq = 266; 287 default: 288 dev_priv->core_freq = 0; 289 } 290} 291 292/* Poulsbo */ 293static const struct psb_offset psb_regmap[2] = { 294 { 295 .fp0 = FPA0, 296 .fp1 = FPA1, 297 .cntr = DSPACNTR, 298 .conf = PIPEACONF, 299 .src = PIPEASRC, 300 .dpll = DPLL_A, 301 .htotal = HTOTAL_A, 302 .hblank = HBLANK_A, 303 .hsync = HSYNC_A, 304 .vtotal = VTOTAL_A, 305 .vblank = VBLANK_A, 306 .vsync = VSYNC_A, 307 .stride = DSPASTRIDE, 308 .size = DSPASIZE, 309 .pos = DSPAPOS, 310 .base = DSPABASE, 311 .surf = DSPASURF, 312 .addr = DSPABASE, 313 .status = PIPEASTAT, 314 .linoff = DSPALINOFF, 315 .tileoff = DSPATILEOFF, 316 .palette = PALETTE_A, 317 }, 318 { 319 .fp0 = FPB0, 320 .fp1 = FPB1, 321 .cntr = DSPBCNTR, 322 .conf = PIPEBCONF, 323 .src = PIPEBSRC, 324 .dpll = DPLL_B, 325 .htotal = HTOTAL_B, 326 .hblank = HBLANK_B, 327 .hsync = HSYNC_B, 328 .vtotal = VTOTAL_B, 329 .vblank = VBLANK_B, 330 .vsync = VSYNC_B, 331 .stride = DSPBSTRIDE, 332 .size = DSPBSIZE, 333 .pos = DSPBPOS, 334 .base = DSPBBASE, 335 .surf = DSPBSURF, 336 .addr = DSPBBASE, 337 .status = PIPEBSTAT, 338 .linoff = DSPBLINOFF, 339 .tileoff = DSPBTILEOFF, 340 .palette = PALETTE_B, 341 } 342}; 343 344static int psb_chip_setup(struct drm_device *dev) 345{ 346 struct drm_psb_private *dev_priv = dev->dev_private; 347 dev_priv->regmap = psb_regmap; 348 psb_get_core_freq(dev); 349 gma_intel_setup_gmbus(dev); 350 psb_intel_opregion_init(dev); 351 psb_intel_init_bios(dev); 352 return 0; 353} 354 355/* Not exactly an erratum more an irritation */ 356static int psb_chip_errata(struct drm_device *dev) 357{ 358 struct drm_psb_private *dev_priv = dev->dev_private; 359 psb_lid_timer_init(dev_priv); 360} 361 362static void psb_chip_teardown(struct drm_device *dev) 363{ 364 struct drm_psb_private *dev_priv = dev->dev_private; 365 psb_lid_timer_takedown(dev_priv); 366 gma_intel_teardown_gmbus(dev); 367} 368 369const struct psb_ops psb_chip_ops = { 370 .name = "Poulsbo", 371 .accel_2d = 1, 372 .pipes = 2, 373 .crtcs = 2, 374 .hdmi_mask = (1 << 0), 375 .lvds_mask = (1 << 1), 376 .sgx_offset = PSB_SGX_OFFSET, 377 .chip_setup = psb_chip_setup, 378 .chip_teardown = psb_chip_teardown, 379 .errata = psb_chip_errata, 380 381 .crtc_helper = &psb_intel_helper_funcs, 382 .crtc_funcs = &psb_intel_crtc_funcs, 383 384 .output_init = psb_output_init, 385 386#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE 387 .backlight_init = psb_backlight_init, 388#endif 389 390 .init_pm = psb_init_pm, 391 .save_regs = psb_save_display_registers, 392 .restore_regs = psb_restore_display_registers, 393 .power_down = psb_power_down, 394 .power_up = psb_power_up, 395}; 396 397