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1/*
2 * BMG160 Gyro Sensor driver
3 * Copyright (c) 2014, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12 * more details.
13 */
14
15#include <linux/module.h>
16#include <linux/i2c.h>
17#include <linux/interrupt.h>
18#include <linux/delay.h>
19#include <linux/slab.h>
20#include <linux/acpi.h>
21#include <linux/gpio/consumer.h>
22#include <linux/pm.h>
23#include <linux/pm_runtime.h>
24#include <linux/iio/iio.h>
25#include <linux/iio/sysfs.h>
26#include <linux/iio/buffer.h>
27#include <linux/iio/trigger.h>
28#include <linux/iio/events.h>
29#include <linux/iio/trigger_consumer.h>
30#include <linux/iio/triggered_buffer.h>
31
32#define BMG160_DRV_NAME		"bmg160"
33#define BMG160_IRQ_NAME		"bmg160_event"
34#define BMG160_GPIO_NAME		"gpio_int"
35
36#define BMG160_REG_CHIP_ID		0x00
37#define BMG160_CHIP_ID_VAL		0x0F
38
39#define BMG160_REG_PMU_LPW		0x11
40#define BMG160_MODE_NORMAL		0x00
41#define BMG160_MODE_DEEP_SUSPEND	0x20
42#define BMG160_MODE_SUSPEND		0x80
43
44#define BMG160_REG_RANGE		0x0F
45
46#define BMG160_RANGE_2000DPS		0
47#define BMG160_RANGE_1000DPS		1
48#define BMG160_RANGE_500DPS		2
49#define BMG160_RANGE_250DPS		3
50#define BMG160_RANGE_125DPS		4
51
52#define BMG160_REG_PMU_BW		0x10
53#define BMG160_NO_FILTER		0
54#define BMG160_DEF_BW			100
55
56#define BMG160_REG_INT_MAP_0		0x17
57#define BMG160_INT_MAP_0_BIT_ANY	BIT(1)
58
59#define BMG160_REG_INT_MAP_1		0x18
60#define BMG160_INT_MAP_1_BIT_NEW_DATA	BIT(0)
61
62#define BMG160_REG_INT_RST_LATCH	0x21
63#define BMG160_INT_MODE_LATCH_RESET	0x80
64#define BMG160_INT_MODE_LATCH_INT	0x0F
65#define BMG160_INT_MODE_NON_LATCH_INT	0x00
66
67#define BMG160_REG_INT_EN_0		0x15
68#define BMG160_DATA_ENABLE_INT		BIT(7)
69
70#define BMG160_REG_INT_EN_1		0x16
71#define BMG160_INT1_BIT_OD		BIT(1)
72
73#define BMG160_REG_XOUT_L		0x02
74#define BMG160_AXIS_TO_REG(axis)	(BMG160_REG_XOUT_L + (axis * 2))
75
76#define BMG160_REG_SLOPE_THRES		0x1B
77#define BMG160_SLOPE_THRES_MASK	0x0F
78
79#define BMG160_REG_MOTION_INTR		0x1C
80#define BMG160_INT_MOTION_X		BIT(0)
81#define BMG160_INT_MOTION_Y		BIT(1)
82#define BMG160_INT_MOTION_Z		BIT(2)
83#define BMG160_ANY_DUR_MASK		0x30
84#define BMG160_ANY_DUR_SHIFT		4
85
86#define BMG160_REG_INT_STATUS_2	0x0B
87#define BMG160_ANY_MOTION_MASK		0x07
88#define BMG160_ANY_MOTION_BIT_X		BIT(0)
89#define BMG160_ANY_MOTION_BIT_Y		BIT(1)
90#define BMG160_ANY_MOTION_BIT_Z		BIT(2)
91
92#define BMG160_REG_TEMP		0x08
93#define BMG160_TEMP_CENTER_VAL		23
94
95#define BMG160_MAX_STARTUP_TIME_MS	80
96
97#define BMG160_AUTO_SUSPEND_DELAY_MS	2000
98
99struct bmg160_data {
100	struct i2c_client *client;
101	struct iio_trigger *dready_trig;
102	struct iio_trigger *motion_trig;
103	struct mutex mutex;
104	s16 buffer[8];
105	u8 bw_bits;
106	u32 dps_range;
107	int ev_enable_state;
108	int slope_thres;
109	bool dready_trigger_on;
110	bool motion_trigger_on;
111	int64_t timestamp;
112};
113
114enum bmg160_axis {
115	AXIS_X,
116	AXIS_Y,
117	AXIS_Z,
118};
119
120static const struct {
121	int val;
122	int bw_bits;
123} bmg160_samp_freq_table[] = { {100, 0x07},
124			       {200, 0x06},
125			       {400, 0x03},
126			       {1000, 0x02},
127			       {2000, 0x01} };
128
129static const struct {
130	int scale;
131	int dps_range;
132} bmg160_scale_table[] = { { 1065, BMG160_RANGE_2000DPS},
133			   { 532, BMG160_RANGE_1000DPS},
134			   { 266, BMG160_RANGE_500DPS},
135			   { 133, BMG160_RANGE_250DPS},
136			   { 66, BMG160_RANGE_125DPS} };
137
138static int bmg160_set_mode(struct bmg160_data *data, u8 mode)
139{
140	int ret;
141
142	ret = i2c_smbus_write_byte_data(data->client,
143					BMG160_REG_PMU_LPW, mode);
144	if (ret < 0) {
145		dev_err(&data->client->dev, "Error writing reg_pmu_lpw\n");
146		return ret;
147	}
148
149	return 0;
150}
151
152static int bmg160_convert_freq_to_bit(int val)
153{
154	int i;
155
156	for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
157		if (bmg160_samp_freq_table[i].val == val)
158			return bmg160_samp_freq_table[i].bw_bits;
159	}
160
161	return -EINVAL;
162}
163
164static int bmg160_set_bw(struct bmg160_data *data, int val)
165{
166	int ret;
167	int bw_bits;
168
169	bw_bits = bmg160_convert_freq_to_bit(val);
170	if (bw_bits < 0)
171		return bw_bits;
172
173	ret = i2c_smbus_write_byte_data(data->client, BMG160_REG_PMU_BW,
174					bw_bits);
175	if (ret < 0) {
176		dev_err(&data->client->dev, "Error writing reg_pmu_bw\n");
177		return ret;
178	}
179
180	data->bw_bits = bw_bits;
181
182	return 0;
183}
184
185static int bmg160_chip_init(struct bmg160_data *data)
186{
187	int ret;
188
189	ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_CHIP_ID);
190	if (ret < 0) {
191		dev_err(&data->client->dev, "Error reading reg_chip_id\n");
192		return ret;
193	}
194
195	dev_dbg(&data->client->dev, "Chip Id %x\n", ret);
196	if (ret != BMG160_CHIP_ID_VAL) {
197		dev_err(&data->client->dev, "invalid chip %x\n", ret);
198		return -ENODEV;
199	}
200
201	ret = bmg160_set_mode(data, BMG160_MODE_NORMAL);
202	if (ret < 0)
203		return ret;
204
205	/* Wait upto 500 ms to be ready after changing mode */
206	usleep_range(500, 1000);
207
208	/* Set Bandwidth */
209	ret = bmg160_set_bw(data, BMG160_DEF_BW);
210	if (ret < 0)
211		return ret;
212
213	/* Set Default Range */
214	ret = i2c_smbus_write_byte_data(data->client,
215					BMG160_REG_RANGE,
216					BMG160_RANGE_500DPS);
217	if (ret < 0) {
218		dev_err(&data->client->dev, "Error writing reg_range\n");
219		return ret;
220	}
221	data->dps_range = BMG160_RANGE_500DPS;
222
223	ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_SLOPE_THRES);
224	if (ret < 0) {
225		dev_err(&data->client->dev, "Error reading reg_slope_thres\n");
226		return ret;
227	}
228	data->slope_thres = ret;
229
230	/* Set default interrupt mode */
231	ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_INT_EN_1);
232	if (ret < 0) {
233		dev_err(&data->client->dev, "Error reading reg_int_en_1\n");
234		return ret;
235	}
236	ret &= ~BMG160_INT1_BIT_OD;
237	ret = i2c_smbus_write_byte_data(data->client,
238					BMG160_REG_INT_EN_1, ret);
239	if (ret < 0) {
240		dev_err(&data->client->dev, "Error writing reg_int_en_1\n");
241		return ret;
242	}
243
244	ret = i2c_smbus_write_byte_data(data->client,
245					BMG160_REG_INT_RST_LATCH,
246					BMG160_INT_MODE_LATCH_INT |
247					BMG160_INT_MODE_LATCH_RESET);
248	if (ret < 0) {
249		dev_err(&data->client->dev,
250			"Error writing reg_motion_intr\n");
251		return ret;
252	}
253
254	return 0;
255}
256
257static int bmg160_set_power_state(struct bmg160_data *data, bool on)
258{
259#ifdef CONFIG_PM_RUNTIME
260	int ret;
261
262	if (on)
263		ret = pm_runtime_get_sync(&data->client->dev);
264	else {
265		pm_runtime_mark_last_busy(&data->client->dev);
266		ret = pm_runtime_put_autosuspend(&data->client->dev);
267	}
268
269	if (ret < 0) {
270		dev_err(&data->client->dev,
271			"Failed: bmg160_set_power_state for %d\n", on);
272		if (on)
273			pm_runtime_put_noidle(&data->client->dev);
274
275		return ret;
276	}
277#endif
278
279	return 0;
280}
281
282static int bmg160_setup_any_motion_interrupt(struct bmg160_data *data,
283					     bool status)
284{
285	int ret;
286
287	/* Enable/Disable INT_MAP0 mapping */
288	ret = i2c_smbus_read_byte_data(data->client,  BMG160_REG_INT_MAP_0);
289	if (ret < 0) {
290		dev_err(&data->client->dev, "Error reading reg_int_map0\n");
291		return ret;
292	}
293	if (status)
294		ret |= BMG160_INT_MAP_0_BIT_ANY;
295	else
296		ret &= ~BMG160_INT_MAP_0_BIT_ANY;
297
298	ret = i2c_smbus_write_byte_data(data->client,
299					BMG160_REG_INT_MAP_0,
300					ret);
301	if (ret < 0) {
302		dev_err(&data->client->dev, "Error writing reg_int_map0\n");
303		return ret;
304	}
305
306	/* Enable/Disable slope interrupts */
307	if (status) {
308		/* Update slope thres */
309		ret = i2c_smbus_write_byte_data(data->client,
310						BMG160_REG_SLOPE_THRES,
311						data->slope_thres);
312		if (ret < 0) {
313			dev_err(&data->client->dev,
314				"Error writing reg_slope_thres\n");
315			return ret;
316		}
317
318		ret = i2c_smbus_write_byte_data(data->client,
319						BMG160_REG_MOTION_INTR,
320						BMG160_INT_MOTION_X |
321						BMG160_INT_MOTION_Y |
322						BMG160_INT_MOTION_Z);
323		if (ret < 0) {
324			dev_err(&data->client->dev,
325				"Error writing reg_motion_intr\n");
326			return ret;
327		}
328
329		/*
330		 * New data interrupt is always non-latched,
331		 * which will have higher priority, so no need
332		 * to set latched mode, we will be flooded anyway with INTR
333		 */
334		if (!data->dready_trigger_on) {
335			ret = i2c_smbus_write_byte_data(data->client,
336						BMG160_REG_INT_RST_LATCH,
337						BMG160_INT_MODE_LATCH_INT |
338						BMG160_INT_MODE_LATCH_RESET);
339			if (ret < 0) {
340				dev_err(&data->client->dev,
341					"Error writing reg_rst_latch\n");
342				return ret;
343			}
344		}
345
346		ret = i2c_smbus_write_byte_data(data->client,
347						BMG160_REG_INT_EN_0,
348						BMG160_DATA_ENABLE_INT);
349
350	} else
351		ret = i2c_smbus_write_byte_data(data->client,
352						BMG160_REG_INT_EN_0,
353						0);
354
355	if (ret < 0) {
356		dev_err(&data->client->dev, "Error writing reg_int_en0\n");
357		return ret;
358	}
359
360	return 0;
361}
362
363static int bmg160_setup_new_data_interrupt(struct bmg160_data *data,
364					   bool status)
365{
366	int ret;
367
368	/* Enable/Disable INT_MAP1 mapping */
369	ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_INT_MAP_1);
370	if (ret < 0) {
371		dev_err(&data->client->dev, "Error reading reg_int_map1\n");
372		return ret;
373	}
374
375	if (status)
376		ret |= BMG160_INT_MAP_1_BIT_NEW_DATA;
377	else
378		ret &= ~BMG160_INT_MAP_1_BIT_NEW_DATA;
379
380	ret = i2c_smbus_write_byte_data(data->client,
381					BMG160_REG_INT_MAP_1,
382					ret);
383	if (ret < 0) {
384		dev_err(&data->client->dev, "Error writing reg_int_map1\n");
385		return ret;
386	}
387
388	if (status) {
389		ret = i2c_smbus_write_byte_data(data->client,
390						BMG160_REG_INT_RST_LATCH,
391						BMG160_INT_MODE_NON_LATCH_INT |
392						BMG160_INT_MODE_LATCH_RESET);
393		if (ret < 0) {
394			dev_err(&data->client->dev,
395				"Error writing reg_rst_latch\n");
396				return ret;
397		}
398
399		ret = i2c_smbus_write_byte_data(data->client,
400						BMG160_REG_INT_EN_0,
401						BMG160_DATA_ENABLE_INT);
402
403	} else {
404		/* Restore interrupt mode */
405		ret = i2c_smbus_write_byte_data(data->client,
406						BMG160_REG_INT_RST_LATCH,
407						BMG160_INT_MODE_LATCH_INT |
408						BMG160_INT_MODE_LATCH_RESET);
409		if (ret < 0) {
410			dev_err(&data->client->dev,
411				"Error writing reg_rst_latch\n");
412				return ret;
413		}
414
415		ret = i2c_smbus_write_byte_data(data->client,
416						BMG160_REG_INT_EN_0,
417						0);
418	}
419
420	if (ret < 0) {
421		dev_err(&data->client->dev, "Error writing reg_int_en0\n");
422		return ret;
423	}
424
425	return 0;
426}
427
428static int bmg160_get_bw(struct bmg160_data *data, int *val)
429{
430	int i;
431
432	for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
433		if (bmg160_samp_freq_table[i].bw_bits == data->bw_bits) {
434			*val = bmg160_samp_freq_table[i].val;
435			return IIO_VAL_INT;
436		}
437	}
438
439	return -EINVAL;
440}
441
442static int bmg160_set_scale(struct bmg160_data *data, int val)
443{
444	int ret, i;
445
446	for (i = 0; i < ARRAY_SIZE(bmg160_scale_table); ++i) {
447		if (bmg160_scale_table[i].scale == val) {
448			ret = i2c_smbus_write_byte_data(
449					data->client,
450					BMG160_REG_RANGE,
451					bmg160_scale_table[i].dps_range);
452			if (ret < 0) {
453				dev_err(&data->client->dev,
454					"Error writing reg_range\n");
455				return ret;
456			}
457			data->dps_range = bmg160_scale_table[i].dps_range;
458			return 0;
459		}
460	}
461
462	return -EINVAL;
463}
464
465static int bmg160_get_temp(struct bmg160_data *data, int *val)
466{
467	int ret;
468
469	mutex_lock(&data->mutex);
470	ret = bmg160_set_power_state(data, true);
471	if (ret < 0) {
472		mutex_unlock(&data->mutex);
473		return ret;
474	}
475
476	ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_TEMP);
477	if (ret < 0) {
478		dev_err(&data->client->dev, "Error reading reg_temp\n");
479		bmg160_set_power_state(data, false);
480		mutex_unlock(&data->mutex);
481		return ret;
482	}
483
484	*val = sign_extend32(ret, 7);
485	ret = bmg160_set_power_state(data, false);
486	mutex_unlock(&data->mutex);
487	if (ret < 0)
488		return ret;
489
490	return IIO_VAL_INT;
491}
492
493static int bmg160_get_axis(struct bmg160_data *data, int axis, int *val)
494{
495	int ret;
496
497	mutex_lock(&data->mutex);
498	ret = bmg160_set_power_state(data, true);
499	if (ret < 0) {
500		mutex_unlock(&data->mutex);
501		return ret;
502	}
503
504	ret = i2c_smbus_read_word_data(data->client, BMG160_AXIS_TO_REG(axis));
505	if (ret < 0) {
506		dev_err(&data->client->dev, "Error reading axis %d\n", axis);
507		bmg160_set_power_state(data, false);
508		mutex_unlock(&data->mutex);
509		return ret;
510	}
511
512	*val = sign_extend32(ret, 15);
513	ret = bmg160_set_power_state(data, false);
514	mutex_unlock(&data->mutex);
515	if (ret < 0)
516		return ret;
517
518	return IIO_VAL_INT;
519}
520
521static int bmg160_read_raw(struct iio_dev *indio_dev,
522			   struct iio_chan_spec const *chan,
523			   int *val, int *val2, long mask)
524{
525	struct bmg160_data *data = iio_priv(indio_dev);
526	int ret;
527
528	switch (mask) {
529	case IIO_CHAN_INFO_RAW:
530		switch (chan->type) {
531		case IIO_TEMP:
532			return bmg160_get_temp(data, val);
533		case IIO_ANGL_VEL:
534			if (iio_buffer_enabled(indio_dev))
535				return -EBUSY;
536			else
537				return bmg160_get_axis(data, chan->scan_index,
538						       val);
539		default:
540			return -EINVAL;
541		}
542	case IIO_CHAN_INFO_OFFSET:
543		if (chan->type == IIO_TEMP) {
544			*val = BMG160_TEMP_CENTER_VAL;
545			return IIO_VAL_INT;
546		} else
547			return -EINVAL;
548	case IIO_CHAN_INFO_SCALE:
549		*val = 0;
550		switch (chan->type) {
551		case IIO_TEMP:
552			*val2 = 500000;
553			return IIO_VAL_INT_PLUS_MICRO;
554		case IIO_ANGL_VEL:
555		{
556			int i;
557
558			for (i = 0; i < ARRAY_SIZE(bmg160_scale_table); ++i) {
559				if (bmg160_scale_table[i].dps_range ==
560							data->dps_range) {
561					*val2 = bmg160_scale_table[i].scale;
562					return IIO_VAL_INT_PLUS_MICRO;
563				}
564			}
565			return -EINVAL;
566		}
567		default:
568			return -EINVAL;
569		}
570	case IIO_CHAN_INFO_SAMP_FREQ:
571		*val2 = 0;
572		mutex_lock(&data->mutex);
573		ret = bmg160_get_bw(data, val);
574		mutex_unlock(&data->mutex);
575		return ret;
576	default:
577		return -EINVAL;
578	}
579}
580
581static int bmg160_write_raw(struct iio_dev *indio_dev,
582			    struct iio_chan_spec const *chan,
583			    int val, int val2, long mask)
584{
585	struct bmg160_data *data = iio_priv(indio_dev);
586	int ret;
587
588	switch (mask) {
589	case IIO_CHAN_INFO_SAMP_FREQ:
590		mutex_lock(&data->mutex);
591		/*
592		 * Section 4.2 of spec
593		 * In suspend mode, the only supported operations are reading
594		 * registers as well as writing to the (0x14) softreset
595		 * register. Since we will be in suspend mode by default, change
596		 * mode to power on for other writes.
597		 */
598		ret = bmg160_set_power_state(data, true);
599		if (ret < 0) {
600			mutex_unlock(&data->mutex);
601			return ret;
602		}
603		ret = bmg160_set_bw(data, val);
604		if (ret < 0) {
605			bmg160_set_power_state(data, false);
606			mutex_unlock(&data->mutex);
607			return ret;
608		}
609		ret = bmg160_set_power_state(data, false);
610		mutex_unlock(&data->mutex);
611		return ret;
612	case IIO_CHAN_INFO_SCALE:
613		if (val)
614			return -EINVAL;
615
616		mutex_lock(&data->mutex);
617		/* Refer to comments above for the suspend mode ops */
618		ret = bmg160_set_power_state(data, true);
619		if (ret < 0) {
620			mutex_unlock(&data->mutex);
621			return ret;
622		}
623		ret = bmg160_set_scale(data, val2);
624		if (ret < 0) {
625			bmg160_set_power_state(data, false);
626			mutex_unlock(&data->mutex);
627			return ret;
628		}
629		ret = bmg160_set_power_state(data, false);
630		mutex_unlock(&data->mutex);
631		return ret;
632	default:
633		return -EINVAL;
634	}
635
636	return -EINVAL;
637}
638
639static int bmg160_read_event(struct iio_dev *indio_dev,
640			     const struct iio_chan_spec *chan,
641			     enum iio_event_type type,
642			     enum iio_event_direction dir,
643			     enum iio_event_info info,
644			     int *val, int *val2)
645{
646	struct bmg160_data *data = iio_priv(indio_dev);
647
648	*val2 = 0;
649	switch (info) {
650	case IIO_EV_INFO_VALUE:
651		*val = data->slope_thres & BMG160_SLOPE_THRES_MASK;
652		break;
653	default:
654		return -EINVAL;
655	}
656
657	return IIO_VAL_INT;
658}
659
660static int bmg160_write_event(struct iio_dev *indio_dev,
661			      const struct iio_chan_spec *chan,
662			      enum iio_event_type type,
663			      enum iio_event_direction dir,
664			      enum iio_event_info info,
665			      int val, int val2)
666{
667	struct bmg160_data *data = iio_priv(indio_dev);
668
669	switch (info) {
670	case IIO_EV_INFO_VALUE:
671		if (data->ev_enable_state)
672			return -EBUSY;
673		data->slope_thres &= ~BMG160_SLOPE_THRES_MASK;
674		data->slope_thres |= (val & BMG160_SLOPE_THRES_MASK);
675		break;
676	default:
677		return -EINVAL;
678	}
679
680	return 0;
681}
682
683static int bmg160_read_event_config(struct iio_dev *indio_dev,
684				    const struct iio_chan_spec *chan,
685				    enum iio_event_type type,
686				    enum iio_event_direction dir)
687{
688
689	struct bmg160_data *data = iio_priv(indio_dev);
690
691	return data->ev_enable_state;
692}
693
694static int bmg160_write_event_config(struct iio_dev *indio_dev,
695				     const struct iio_chan_spec *chan,
696				     enum iio_event_type type,
697				     enum iio_event_direction dir,
698				     int state)
699{
700	struct bmg160_data *data = iio_priv(indio_dev);
701	int ret;
702
703	if (state && data->ev_enable_state)
704		return 0;
705
706	mutex_lock(&data->mutex);
707
708	if (!state && data->motion_trigger_on) {
709		data->ev_enable_state = 0;
710		mutex_unlock(&data->mutex);
711		return 0;
712	}
713	/*
714	 * We will expect the enable and disable to do operation in
715	 * in reverse order. This will happen here anyway as our
716	 * resume operation uses sync mode runtime pm calls, the
717	 * suspend operation will be delayed by autosuspend delay
718	 * So the disable operation will still happen in reverse of
719	 * enable operation. When runtime pm is disabled the mode
720	 * is always on so sequence doesn't matter
721	 */
722	ret = bmg160_set_power_state(data, state);
723	if (ret < 0) {
724		mutex_unlock(&data->mutex);
725		return ret;
726	}
727
728	ret =  bmg160_setup_any_motion_interrupt(data, state);
729	if (ret < 0) {
730		bmg160_set_power_state(data, false);
731		mutex_unlock(&data->mutex);
732		return ret;
733	}
734
735	data->ev_enable_state = state;
736	mutex_unlock(&data->mutex);
737
738	return 0;
739}
740
741static int bmg160_validate_trigger(struct iio_dev *indio_dev,
742				   struct iio_trigger *trig)
743{
744	struct bmg160_data *data = iio_priv(indio_dev);
745
746	if (data->dready_trig != trig && data->motion_trig != trig)
747		return -EINVAL;
748
749	return 0;
750}
751
752static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("100 200 400 1000 2000");
753
754static IIO_CONST_ATTR(in_anglvel_scale_available,
755		      "0.001065 0.000532 0.000266 0.000133 0.000066");
756
757static struct attribute *bmg160_attributes[] = {
758	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
759	&iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
760	NULL,
761};
762
763static const struct attribute_group bmg160_attrs_group = {
764	.attrs = bmg160_attributes,
765};
766
767static const struct iio_event_spec bmg160_event = {
768		.type = IIO_EV_TYPE_ROC,
769		.dir = IIO_EV_DIR_EITHER,
770		.mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
771				       BIT(IIO_EV_INFO_ENABLE)
772};
773
774#define BMG160_CHANNEL(_axis) {					\
775	.type = IIO_ANGL_VEL,						\
776	.modified = 1,							\
777	.channel2 = IIO_MOD_##_axis,					\
778	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),			\
779	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |		\
780				    BIT(IIO_CHAN_INFO_SAMP_FREQ),	\
781	.scan_index = AXIS_##_axis,					\
782	.scan_type = {							\
783		.sign = 's',						\
784		.realbits = 16,					\
785		.storagebits = 16,					\
786	},								\
787	.event_spec = &bmg160_event,					\
788	.num_event_specs = 1						\
789}
790
791static const struct iio_chan_spec bmg160_channels[] = {
792	{
793		.type = IIO_TEMP,
794		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
795				      BIT(IIO_CHAN_INFO_SCALE) |
796				      BIT(IIO_CHAN_INFO_OFFSET),
797		.scan_index = -1,
798	},
799	BMG160_CHANNEL(X),
800	BMG160_CHANNEL(Y),
801	BMG160_CHANNEL(Z),
802	IIO_CHAN_SOFT_TIMESTAMP(3),
803};
804
805static const struct iio_info bmg160_info = {
806	.attrs			= &bmg160_attrs_group,
807	.read_raw		= bmg160_read_raw,
808	.write_raw		= bmg160_write_raw,
809	.read_event_value	= bmg160_read_event,
810	.write_event_value	= bmg160_write_event,
811	.write_event_config	= bmg160_write_event_config,
812	.read_event_config	= bmg160_read_event_config,
813	.validate_trigger	= bmg160_validate_trigger,
814	.driver_module		= THIS_MODULE,
815};
816
817static irqreturn_t bmg160_trigger_handler(int irq, void *p)
818{
819	struct iio_poll_func *pf = p;
820	struct iio_dev *indio_dev = pf->indio_dev;
821	struct bmg160_data *data = iio_priv(indio_dev);
822	int bit, ret, i = 0;
823
824	mutex_lock(&data->mutex);
825	for_each_set_bit(bit, indio_dev->buffer->scan_mask,
826			 indio_dev->masklength) {
827		ret = i2c_smbus_read_word_data(data->client,
828					       BMG160_AXIS_TO_REG(bit));
829		if (ret < 0) {
830			mutex_unlock(&data->mutex);
831			goto err;
832		}
833		data->buffer[i++] = ret;
834	}
835	mutex_unlock(&data->mutex);
836
837	iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
838					   data->timestamp);
839err:
840	iio_trigger_notify_done(indio_dev->trig);
841
842	return IRQ_HANDLED;
843}
844
845static int bmg160_trig_try_reen(struct iio_trigger *trig)
846{
847	struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
848	struct bmg160_data *data = iio_priv(indio_dev);
849	int ret;
850
851	/* new data interrupts don't need ack */
852	if (data->dready_trigger_on)
853		return 0;
854
855	/* Set latched mode interrupt and clear any latched interrupt */
856	ret = i2c_smbus_write_byte_data(data->client,
857					BMG160_REG_INT_RST_LATCH,
858					BMG160_INT_MODE_LATCH_INT |
859					BMG160_INT_MODE_LATCH_RESET);
860	if (ret < 0) {
861		dev_err(&data->client->dev, "Error writing reg_rst_latch\n");
862		return ret;
863	}
864
865	return 0;
866}
867
868static int bmg160_data_rdy_trigger_set_state(struct iio_trigger *trig,
869					     bool state)
870{
871	struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
872	struct bmg160_data *data = iio_priv(indio_dev);
873	int ret;
874
875	mutex_lock(&data->mutex);
876
877	if (!state && data->ev_enable_state && data->motion_trigger_on) {
878		data->motion_trigger_on = false;
879		mutex_unlock(&data->mutex);
880		return 0;
881	}
882
883	/*
884	 * Refer to comment in bmg160_write_event_config for
885	 * enable/disable operation order
886	 */
887	ret = bmg160_set_power_state(data, state);
888	if (ret < 0) {
889		mutex_unlock(&data->mutex);
890		return ret;
891	}
892	if (data->motion_trig == trig)
893		ret =  bmg160_setup_any_motion_interrupt(data, state);
894	else
895		ret = bmg160_setup_new_data_interrupt(data, state);
896	if (ret < 0) {
897		bmg160_set_power_state(data, false);
898		mutex_unlock(&data->mutex);
899		return ret;
900	}
901	if (data->motion_trig == trig)
902		data->motion_trigger_on = state;
903	else
904		data->dready_trigger_on = state;
905
906	mutex_unlock(&data->mutex);
907
908	return 0;
909}
910
911static const struct iio_trigger_ops bmg160_trigger_ops = {
912	.set_trigger_state = bmg160_data_rdy_trigger_set_state,
913	.try_reenable = bmg160_trig_try_reen,
914	.owner = THIS_MODULE,
915};
916
917static irqreturn_t bmg160_event_handler(int irq, void *private)
918{
919	struct iio_dev *indio_dev = private;
920	struct bmg160_data *data = iio_priv(indio_dev);
921	int ret;
922	int dir;
923
924	ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_INT_STATUS_2);
925	if (ret < 0) {
926		dev_err(&data->client->dev, "Error reading reg_int_status2\n");
927		goto ack_intr_status;
928	}
929
930	if (ret & 0x08)
931		dir = IIO_EV_DIR_RISING;
932	else
933		dir = IIO_EV_DIR_FALLING;
934
935	if (ret & BMG160_ANY_MOTION_BIT_X)
936		iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
937							0,
938							IIO_MOD_X,
939							IIO_EV_TYPE_ROC,
940							dir),
941							data->timestamp);
942	if (ret & BMG160_ANY_MOTION_BIT_Y)
943		iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
944							0,
945							IIO_MOD_Y,
946							IIO_EV_TYPE_ROC,
947							dir),
948							data->timestamp);
949	if (ret & BMG160_ANY_MOTION_BIT_Z)
950		iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
951							0,
952							IIO_MOD_Z,
953							IIO_EV_TYPE_ROC,
954							dir),
955							data->timestamp);
956
957ack_intr_status:
958	if (!data->dready_trigger_on) {
959		ret = i2c_smbus_write_byte_data(data->client,
960					BMG160_REG_INT_RST_LATCH,
961					BMG160_INT_MODE_LATCH_INT |
962					BMG160_INT_MODE_LATCH_RESET);
963		if (ret < 0)
964			dev_err(&data->client->dev,
965				"Error writing reg_rst_latch\n");
966	}
967
968	return IRQ_HANDLED;
969}
970
971static irqreturn_t bmg160_data_rdy_trig_poll(int irq, void *private)
972{
973	struct iio_dev *indio_dev = private;
974	struct bmg160_data *data = iio_priv(indio_dev);
975
976	data->timestamp = iio_get_time_ns();
977
978	if (data->dready_trigger_on)
979		iio_trigger_poll(data->dready_trig);
980	else if (data->motion_trigger_on)
981		iio_trigger_poll(data->motion_trig);
982
983	if (data->ev_enable_state)
984		return IRQ_WAKE_THREAD;
985	else
986		return IRQ_HANDLED;
987
988}
989
990static int bmg160_gpio_probe(struct i2c_client *client,
991			     struct bmg160_data *data)
992
993{
994	struct device *dev;
995	struct gpio_desc *gpio;
996	int ret;
997
998	if (!client)
999		return -EINVAL;
1000
1001	dev = &client->dev;
1002
1003	/* data ready gpio interrupt pin */
1004	gpio = devm_gpiod_get_index(dev, BMG160_GPIO_NAME, 0);
1005	if (IS_ERR(gpio)) {
1006		dev_err(dev, "acpi gpio get index failed\n");
1007		return PTR_ERR(gpio);
1008	}
1009
1010	ret = gpiod_direction_input(gpio);
1011	if (ret)
1012		return ret;
1013
1014	ret = gpiod_to_irq(gpio);
1015
1016	dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret);
1017
1018	return ret;
1019}
1020
1021static const char *bmg160_match_acpi_device(struct device *dev)
1022{
1023	const struct acpi_device_id *id;
1024
1025	id = acpi_match_device(dev->driver->acpi_match_table, dev);
1026	if (!id)
1027		return NULL;
1028
1029	return dev_name(dev);
1030}
1031
1032static int bmg160_probe(struct i2c_client *client,
1033			const struct i2c_device_id *id)
1034{
1035	struct bmg160_data *data;
1036	struct iio_dev *indio_dev;
1037	int ret;
1038	const char *name = NULL;
1039
1040	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1041	if (!indio_dev)
1042		return -ENOMEM;
1043
1044	data = iio_priv(indio_dev);
1045	i2c_set_clientdata(client, indio_dev);
1046	data->client = client;
1047
1048	ret = bmg160_chip_init(data);
1049	if (ret < 0)
1050		return ret;
1051
1052	mutex_init(&data->mutex);
1053
1054	if (id)
1055		name = id->name;
1056
1057	if (ACPI_HANDLE(&client->dev))
1058		name = bmg160_match_acpi_device(&client->dev);
1059
1060	indio_dev->dev.parent = &client->dev;
1061	indio_dev->channels = bmg160_channels;
1062	indio_dev->num_channels = ARRAY_SIZE(bmg160_channels);
1063	indio_dev->name = name;
1064	indio_dev->modes = INDIO_DIRECT_MODE;
1065	indio_dev->info = &bmg160_info;
1066
1067	if (client->irq <= 0)
1068		client->irq = bmg160_gpio_probe(client, data);
1069
1070	if (client->irq > 0) {
1071		ret = devm_request_threaded_irq(&client->dev,
1072						client->irq,
1073						bmg160_data_rdy_trig_poll,
1074						bmg160_event_handler,
1075						IRQF_TRIGGER_RISING,
1076						BMG160_IRQ_NAME,
1077						indio_dev);
1078		if (ret)
1079			return ret;
1080
1081		data->dready_trig = devm_iio_trigger_alloc(&client->dev,
1082							   "%s-dev%d",
1083							   indio_dev->name,
1084							   indio_dev->id);
1085		if (!data->dready_trig)
1086			return -ENOMEM;
1087
1088		data->motion_trig = devm_iio_trigger_alloc(&client->dev,
1089							  "%s-any-motion-dev%d",
1090							  indio_dev->name,
1091							  indio_dev->id);
1092		if (!data->motion_trig)
1093			return -ENOMEM;
1094
1095		data->dready_trig->dev.parent = &client->dev;
1096		data->dready_trig->ops = &bmg160_trigger_ops;
1097		iio_trigger_set_drvdata(data->dready_trig, indio_dev);
1098		ret = iio_trigger_register(data->dready_trig);
1099		if (ret)
1100			return ret;
1101
1102		data->motion_trig->dev.parent = &client->dev;
1103		data->motion_trig->ops = &bmg160_trigger_ops;
1104		iio_trigger_set_drvdata(data->motion_trig, indio_dev);
1105		ret = iio_trigger_register(data->motion_trig);
1106		if (ret) {
1107			data->motion_trig = NULL;
1108			goto err_trigger_unregister;
1109		}
1110
1111		ret = iio_triggered_buffer_setup(indio_dev,
1112						 NULL,
1113						 bmg160_trigger_handler,
1114						 NULL);
1115		if (ret < 0) {
1116			dev_err(&client->dev,
1117				"iio triggered buffer setup failed\n");
1118			goto err_trigger_unregister;
1119		}
1120	}
1121
1122	ret = iio_device_register(indio_dev);
1123	if (ret < 0) {
1124		dev_err(&client->dev, "unable to register iio device\n");
1125		goto err_buffer_cleanup;
1126	}
1127
1128	ret = pm_runtime_set_active(&client->dev);
1129	if (ret)
1130		goto err_iio_unregister;
1131
1132	pm_runtime_enable(&client->dev);
1133	pm_runtime_set_autosuspend_delay(&client->dev,
1134					 BMG160_AUTO_SUSPEND_DELAY_MS);
1135	pm_runtime_use_autosuspend(&client->dev);
1136
1137	return 0;
1138
1139err_iio_unregister:
1140	iio_device_unregister(indio_dev);
1141err_buffer_cleanup:
1142	if (data->dready_trig)
1143		iio_triggered_buffer_cleanup(indio_dev);
1144err_trigger_unregister:
1145	if (data->dready_trig)
1146		iio_trigger_unregister(data->dready_trig);
1147	if (data->motion_trig)
1148		iio_trigger_unregister(data->motion_trig);
1149
1150	return ret;
1151}
1152
1153static int bmg160_remove(struct i2c_client *client)
1154{
1155	struct iio_dev *indio_dev = i2c_get_clientdata(client);
1156	struct bmg160_data *data = iio_priv(indio_dev);
1157
1158	pm_runtime_disable(&client->dev);
1159	pm_runtime_set_suspended(&client->dev);
1160	pm_runtime_put_noidle(&client->dev);
1161
1162	iio_device_unregister(indio_dev);
1163
1164	if (data->dready_trig) {
1165		iio_triggered_buffer_cleanup(indio_dev);
1166		iio_trigger_unregister(data->dready_trig);
1167		iio_trigger_unregister(data->motion_trig);
1168	}
1169
1170	mutex_lock(&data->mutex);
1171	bmg160_set_mode(data, BMG160_MODE_DEEP_SUSPEND);
1172	mutex_unlock(&data->mutex);
1173
1174	return 0;
1175}
1176
1177#ifdef CONFIG_PM_SLEEP
1178static int bmg160_suspend(struct device *dev)
1179{
1180	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1181	struct bmg160_data *data = iio_priv(indio_dev);
1182
1183	mutex_lock(&data->mutex);
1184	bmg160_set_mode(data, BMG160_MODE_SUSPEND);
1185	mutex_unlock(&data->mutex);
1186
1187	return 0;
1188}
1189
1190static int bmg160_resume(struct device *dev)
1191{
1192	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1193	struct bmg160_data *data = iio_priv(indio_dev);
1194
1195	mutex_lock(&data->mutex);
1196	if (data->dready_trigger_on || data->motion_trigger_on ||
1197							data->ev_enable_state)
1198		bmg160_set_mode(data, BMG160_MODE_NORMAL);
1199	mutex_unlock(&data->mutex);
1200
1201	return 0;
1202}
1203#endif
1204
1205#ifdef CONFIG_PM_RUNTIME
1206static int bmg160_runtime_suspend(struct device *dev)
1207{
1208	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1209	struct bmg160_data *data = iio_priv(indio_dev);
1210	int ret;
1211
1212	ret = bmg160_set_mode(data, BMG160_MODE_SUSPEND);
1213	if (ret < 0) {
1214		dev_err(&data->client->dev, "set mode failed\n");
1215		return -EAGAIN;
1216	}
1217
1218	return 0;
1219}
1220
1221static int bmg160_runtime_resume(struct device *dev)
1222{
1223	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1224	struct bmg160_data *data = iio_priv(indio_dev);
1225	int ret;
1226
1227	ret = bmg160_set_mode(data, BMG160_MODE_NORMAL);
1228	if (ret < 0)
1229		return ret;
1230
1231	msleep_interruptible(BMG160_MAX_STARTUP_TIME_MS);
1232
1233	return 0;
1234}
1235#endif
1236
1237static const struct dev_pm_ops bmg160_pm_ops = {
1238	SET_SYSTEM_SLEEP_PM_OPS(bmg160_suspend, bmg160_resume)
1239	SET_RUNTIME_PM_OPS(bmg160_runtime_suspend,
1240			   bmg160_runtime_resume, NULL)
1241};
1242
1243static const struct acpi_device_id bmg160_acpi_match[] = {
1244	{"BMG0160", 0},
1245	{"BMI055B", 0},
1246	{},
1247};
1248
1249MODULE_DEVICE_TABLE(acpi, bmg160_acpi_match);
1250
1251static const struct i2c_device_id bmg160_id[] = {
1252	{"bmg160", 0},
1253	{"bmi055_gyro", 0},
1254	{}
1255};
1256
1257MODULE_DEVICE_TABLE(i2c, bmg160_id);
1258
1259static struct i2c_driver bmg160_driver = {
1260	.driver = {
1261		.name	= BMG160_DRV_NAME,
1262		.acpi_match_table = ACPI_PTR(bmg160_acpi_match),
1263		.pm	= &bmg160_pm_ops,
1264	},
1265	.probe		= bmg160_probe,
1266	.remove		= bmg160_remove,
1267	.id_table	= bmg160_id,
1268};
1269module_i2c_driver(bmg160_driver);
1270
1271MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
1272MODULE_LICENSE("GPL v2");
1273MODULE_DESCRIPTION("BMG160 Gyro driver");
1274