1/* 2 * ispresizer.c 3 * 4 * TI OMAP3 ISP - Resizer module 5 * 6 * Copyright (C) 2010 Nokia Corporation 7 * Copyright (C) 2009 Texas Instruments, Inc 8 * 9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com> 10 * Sakari Ailus <sakari.ailus@iki.fi> 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License version 2 as 14 * published by the Free Software Foundation. 15 */ 16 17#include <linux/device.h> 18#include <linux/mm.h> 19#include <linux/module.h> 20 21#include "isp.h" 22#include "ispreg.h" 23#include "ispresizer.h" 24 25/* 26 * Resizer Constants 27 */ 28#define MIN_RESIZE_VALUE 64 29#define MID_RESIZE_VALUE 512 30#define MAX_RESIZE_VALUE 1024 31 32#define MIN_IN_WIDTH 32 33#define MIN_IN_HEIGHT 32 34#define MAX_IN_WIDTH_MEMORY_MODE 4095 35#define MAX_IN_WIDTH_ONTHEFLY_MODE_ES1 1280 36#define MAX_IN_WIDTH_ONTHEFLY_MODE_ES2 4095 37#define MAX_IN_HEIGHT 4095 38 39#define MIN_OUT_WIDTH 16 40#define MIN_OUT_HEIGHT 2 41#define MAX_OUT_HEIGHT 4095 42 43/* 44 * Resizer Use Constraints 45 * "TRM ES3.1, table 12-46" 46 */ 47#define MAX_4TAP_OUT_WIDTH_ES1 1280 48#define MAX_7TAP_OUT_WIDTH_ES1 640 49#define MAX_4TAP_OUT_WIDTH_ES2 3312 50#define MAX_7TAP_OUT_WIDTH_ES2 1650 51#define MAX_4TAP_OUT_WIDTH_3630 4096 52#define MAX_7TAP_OUT_WIDTH_3630 2048 53 54/* 55 * Constants for ratio calculation 56 */ 57#define RESIZE_DIVISOR 256 58#define DEFAULT_PHASE 1 59 60/* 61 * Default (and only) configuration of filter coefficients. 62 * 7-tap mode is for scale factors 0.25x to 0.5x. 63 * 4-tap mode is for scale factors 0.5x to 4.0x. 64 * There shouldn't be any reason to recalculate these, EVER. 65 */ 66static const struct isprsz_coef filter_coefs = { 67 /* For 8-phase 4-tap horizontal filter: */ 68 { 69 0x0000, 0x0100, 0x0000, 0x0000, 70 0x03FA, 0x00F6, 0x0010, 0x0000, 71 0x03F9, 0x00DB, 0x002C, 0x0000, 72 0x03FB, 0x00B3, 0x0053, 0x03FF, 73 0x03FD, 0x0082, 0x0084, 0x03FD, 74 0x03FF, 0x0053, 0x00B3, 0x03FB, 75 0x0000, 0x002C, 0x00DB, 0x03F9, 76 0x0000, 0x0010, 0x00F6, 0x03FA 77 }, 78 /* For 8-phase 4-tap vertical filter: */ 79 { 80 0x0000, 0x0100, 0x0000, 0x0000, 81 0x03FA, 0x00F6, 0x0010, 0x0000, 82 0x03F9, 0x00DB, 0x002C, 0x0000, 83 0x03FB, 0x00B3, 0x0053, 0x03FF, 84 0x03FD, 0x0082, 0x0084, 0x03FD, 85 0x03FF, 0x0053, 0x00B3, 0x03FB, 86 0x0000, 0x002C, 0x00DB, 0x03F9, 87 0x0000, 0x0010, 0x00F6, 0x03FA 88 }, 89 /* For 4-phase 7-tap horizontal filter: */ 90 #define DUMMY 0 91 { 92 0x0004, 0x0023, 0x005A, 0x0058, 0x0023, 0x0004, 0x0000, DUMMY, 93 0x0002, 0x0018, 0x004d, 0x0060, 0x0031, 0x0008, 0x0000, DUMMY, 94 0x0001, 0x000f, 0x003f, 0x0062, 0x003f, 0x000f, 0x0001, DUMMY, 95 0x0000, 0x0008, 0x0031, 0x0060, 0x004d, 0x0018, 0x0002, DUMMY 96 }, 97 /* For 4-phase 7-tap vertical filter: */ 98 { 99 0x0004, 0x0023, 0x005A, 0x0058, 0x0023, 0x0004, 0x0000, DUMMY, 100 0x0002, 0x0018, 0x004d, 0x0060, 0x0031, 0x0008, 0x0000, DUMMY, 101 0x0001, 0x000f, 0x003f, 0x0062, 0x003f, 0x000f, 0x0001, DUMMY, 102 0x0000, 0x0008, 0x0031, 0x0060, 0x004d, 0x0018, 0x0002, DUMMY 103 } 104 /* 105 * The dummy padding is required in 7-tap mode because of how the 106 * registers are arranged physically. 107 */ 108 #undef DUMMY 109}; 110 111/* 112 * __resizer_get_format - helper function for getting resizer format 113 * @res : pointer to resizer private structure 114 * @pad : pad number 115 * @fh : V4L2 subdev file handle 116 * @which : wanted subdev format 117 * return zero 118 */ 119static struct v4l2_mbus_framefmt * 120__resizer_get_format(struct isp_res_device *res, struct v4l2_subdev_fh *fh, 121 unsigned int pad, enum v4l2_subdev_format_whence which) 122{ 123 if (which == V4L2_SUBDEV_FORMAT_TRY) 124 return v4l2_subdev_get_try_format(fh, pad); 125 else 126 return &res->formats[pad]; 127} 128 129/* 130 * __resizer_get_crop - helper function for getting resizer crop rectangle 131 * @res : pointer to resizer private structure 132 * @fh : V4L2 subdev file handle 133 * @which : wanted subdev crop rectangle 134 */ 135static struct v4l2_rect * 136__resizer_get_crop(struct isp_res_device *res, struct v4l2_subdev_fh *fh, 137 enum v4l2_subdev_format_whence which) 138{ 139 if (which == V4L2_SUBDEV_FORMAT_TRY) 140 return v4l2_subdev_get_try_crop(fh, RESZ_PAD_SINK); 141 else 142 return &res->crop.request; 143} 144 145/* 146 * resizer_set_filters - Set resizer filters 147 * @res: Device context. 148 * @h_coeff: horizontal coefficient 149 * @v_coeff: vertical coefficient 150 * Return none 151 */ 152static void resizer_set_filters(struct isp_res_device *res, const u16 *h_coeff, 153 const u16 *v_coeff) 154{ 155 struct isp_device *isp = to_isp_device(res); 156 u32 startaddr_h, startaddr_v, tmp_h, tmp_v; 157 int i; 158 159 startaddr_h = ISPRSZ_HFILT10; 160 startaddr_v = ISPRSZ_VFILT10; 161 162 for (i = 0; i < COEFF_CNT; i += 2) { 163 tmp_h = h_coeff[i] | 164 (h_coeff[i + 1] << ISPRSZ_HFILT_COEF1_SHIFT); 165 tmp_v = v_coeff[i] | 166 (v_coeff[i + 1] << ISPRSZ_VFILT_COEF1_SHIFT); 167 isp_reg_writel(isp, tmp_h, OMAP3_ISP_IOMEM_RESZ, startaddr_h); 168 isp_reg_writel(isp, tmp_v, OMAP3_ISP_IOMEM_RESZ, startaddr_v); 169 startaddr_h += 4; 170 startaddr_v += 4; 171 } 172} 173 174/* 175 * resizer_set_bilinear - Chrominance horizontal algorithm select 176 * @res: Device context. 177 * @type: Filtering interpolation type. 178 * 179 * Filtering that is same as luminance processing is 180 * intended only for downsampling, and bilinear interpolation 181 * is intended only for upsampling. 182 */ 183static void resizer_set_bilinear(struct isp_res_device *res, 184 enum resizer_chroma_algo type) 185{ 186 struct isp_device *isp = to_isp_device(res); 187 188 if (type == RSZ_BILINEAR) 189 isp_reg_set(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT, 190 ISPRSZ_CNT_CBILIN); 191 else 192 isp_reg_clr(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT, 193 ISPRSZ_CNT_CBILIN); 194} 195 196/* 197 * resizer_set_ycpos - Luminance and chrominance order 198 * @res: Device context. 199 * @pixelcode: pixel code. 200 */ 201static void resizer_set_ycpos(struct isp_res_device *res, 202 enum v4l2_mbus_pixelcode pixelcode) 203{ 204 struct isp_device *isp = to_isp_device(res); 205 206 switch (pixelcode) { 207 case V4L2_MBUS_FMT_YUYV8_1X16: 208 isp_reg_set(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT, 209 ISPRSZ_CNT_YCPOS); 210 break; 211 case V4L2_MBUS_FMT_UYVY8_1X16: 212 isp_reg_clr(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT, 213 ISPRSZ_CNT_YCPOS); 214 break; 215 default: 216 return; 217 } 218} 219 220/* 221 * resizer_set_phase - Setup horizontal and vertical starting phase 222 * @res: Device context. 223 * @h_phase: horizontal phase parameters. 224 * @v_phase: vertical phase parameters. 225 * 226 * Horizontal and vertical phase range is 0 to 7 227 */ 228static void resizer_set_phase(struct isp_res_device *res, u32 h_phase, 229 u32 v_phase) 230{ 231 struct isp_device *isp = to_isp_device(res); 232 u32 rgval; 233 234 rgval = isp_reg_readl(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT) & 235 ~(ISPRSZ_CNT_HSTPH_MASK | ISPRSZ_CNT_VSTPH_MASK); 236 rgval |= (h_phase << ISPRSZ_CNT_HSTPH_SHIFT) & ISPRSZ_CNT_HSTPH_MASK; 237 rgval |= (v_phase << ISPRSZ_CNT_VSTPH_SHIFT) & ISPRSZ_CNT_VSTPH_MASK; 238 239 isp_reg_writel(isp, rgval, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT); 240} 241 242/* 243 * resizer_set_luma - Setup luminance enhancer parameters 244 * @res: Device context. 245 * @luma: Structure for luminance enhancer parameters. 246 * 247 * Algorithm select: 248 * 0x0: Disable 249 * 0x1: [-1 2 -1]/2 high-pass filter 250 * 0x2: [-1 -2 6 -2 -1]/4 high-pass filter 251 * 252 * Maximum gain: 253 * The data is coded in U4Q4 representation. 254 * 255 * Slope: 256 * The data is coded in U4Q4 representation. 257 * 258 * Coring offset: 259 * The data is coded in U8Q0 representation. 260 * 261 * The new luminance value is computed as: 262 * Y += HPF(Y) x max(GAIN, (HPF(Y) - CORE) x SLOP + 8) >> 4. 263 */ 264static void resizer_set_luma(struct isp_res_device *res, 265 struct resizer_luma_yenh *luma) 266{ 267 struct isp_device *isp = to_isp_device(res); 268 u32 rgval; 269 270 rgval = (luma->algo << ISPRSZ_YENH_ALGO_SHIFT) 271 & ISPRSZ_YENH_ALGO_MASK; 272 rgval |= (luma->gain << ISPRSZ_YENH_GAIN_SHIFT) 273 & ISPRSZ_YENH_GAIN_MASK; 274 rgval |= (luma->slope << ISPRSZ_YENH_SLOP_SHIFT) 275 & ISPRSZ_YENH_SLOP_MASK; 276 rgval |= (luma->core << ISPRSZ_YENH_CORE_SHIFT) 277 & ISPRSZ_YENH_CORE_MASK; 278 279 isp_reg_writel(isp, rgval, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_YENH); 280} 281 282/* 283 * resizer_set_source - Input source select 284 * @res: Device context. 285 * @source: Input source type 286 * 287 * If this field is set to RESIZER_INPUT_VP, the resizer input is fed from 288 * Preview/CCDC engine, otherwise from memory. 289 */ 290static void resizer_set_source(struct isp_res_device *res, 291 enum resizer_input_entity source) 292{ 293 struct isp_device *isp = to_isp_device(res); 294 295 if (source == RESIZER_INPUT_MEMORY) 296 isp_reg_set(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT, 297 ISPRSZ_CNT_INPSRC); 298 else 299 isp_reg_clr(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT, 300 ISPRSZ_CNT_INPSRC); 301} 302 303/* 304 * resizer_set_ratio - Setup horizontal and vertical resizing value 305 * @res: Device context. 306 * @ratio: Structure for ratio parameters. 307 * 308 * Resizing range from 64 to 1024 309 */ 310static void resizer_set_ratio(struct isp_res_device *res, 311 const struct resizer_ratio *ratio) 312{ 313 struct isp_device *isp = to_isp_device(res); 314 const u16 *h_filter, *v_filter; 315 u32 rgval; 316 317 rgval = isp_reg_readl(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT) & 318 ~(ISPRSZ_CNT_HRSZ_MASK | ISPRSZ_CNT_VRSZ_MASK); 319 rgval |= ((ratio->horz - 1) << ISPRSZ_CNT_HRSZ_SHIFT) 320 & ISPRSZ_CNT_HRSZ_MASK; 321 rgval |= ((ratio->vert - 1) << ISPRSZ_CNT_VRSZ_SHIFT) 322 & ISPRSZ_CNT_VRSZ_MASK; 323 isp_reg_writel(isp, rgval, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT); 324 325 /* prepare horizontal filter coefficients */ 326 if (ratio->horz > MID_RESIZE_VALUE) 327 h_filter = &filter_coefs.h_filter_coef_7tap[0]; 328 else 329 h_filter = &filter_coefs.h_filter_coef_4tap[0]; 330 331 /* prepare vertical filter coefficients */ 332 if (ratio->vert > MID_RESIZE_VALUE) 333 v_filter = &filter_coefs.v_filter_coef_7tap[0]; 334 else 335 v_filter = &filter_coefs.v_filter_coef_4tap[0]; 336 337 resizer_set_filters(res, h_filter, v_filter); 338} 339 340/* 341 * resizer_set_dst_size - Setup the output height and width 342 * @res: Device context. 343 * @width: Output width. 344 * @height: Output height. 345 * 346 * Width : 347 * The value must be EVEN. 348 * 349 * Height: 350 * The number of bytes written to SDRAM must be 351 * a multiple of 16-bytes if the vertical resizing factor 352 * is greater than 1x (upsizing) 353 */ 354static void resizer_set_output_size(struct isp_res_device *res, 355 u32 width, u32 height) 356{ 357 struct isp_device *isp = to_isp_device(res); 358 u32 rgval; 359 360 rgval = (width << ISPRSZ_OUT_SIZE_HORZ_SHIFT) 361 & ISPRSZ_OUT_SIZE_HORZ_MASK; 362 rgval |= (height << ISPRSZ_OUT_SIZE_VERT_SHIFT) 363 & ISPRSZ_OUT_SIZE_VERT_MASK; 364 isp_reg_writel(isp, rgval, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_OUT_SIZE); 365} 366 367/* 368 * resizer_set_output_offset - Setup memory offset for the output lines. 369 * @res: Device context. 370 * @offset: Memory offset. 371 * 372 * The 5 LSBs are forced to be zeros by the hardware to align on a 32-byte 373 * boundary; the 5 LSBs are read-only. For optimal use of SDRAM bandwidth, 374 * the SDRAM line offset must be set on a 256-byte boundary 375 */ 376static void resizer_set_output_offset(struct isp_res_device *res, u32 offset) 377{ 378 struct isp_device *isp = to_isp_device(res); 379 380 isp_reg_writel(isp, offset, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_SDR_OUTOFF); 381} 382 383/* 384 * resizer_set_start - Setup vertical and horizontal start position 385 * @res: Device context. 386 * @left: Horizontal start position. 387 * @top: Vertical start position. 388 * 389 * Vertical start line: 390 * This field makes sense only when the resizer obtains its input 391 * from the preview engine/CCDC 392 * 393 * Horizontal start pixel: 394 * Pixels are coded on 16 bits for YUV and 8 bits for color separate data. 395 * When the resizer gets its input from SDRAM, this field must be set 396 * to <= 15 for YUV 16-bit data and <= 31 for 8-bit color separate data 397 */ 398static void resizer_set_start(struct isp_res_device *res, u32 left, u32 top) 399{ 400 struct isp_device *isp = to_isp_device(res); 401 u32 rgval; 402 403 rgval = (left << ISPRSZ_IN_START_HORZ_ST_SHIFT) 404 & ISPRSZ_IN_START_HORZ_ST_MASK; 405 rgval |= (top << ISPRSZ_IN_START_VERT_ST_SHIFT) 406 & ISPRSZ_IN_START_VERT_ST_MASK; 407 408 isp_reg_writel(isp, rgval, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_IN_START); 409} 410 411/* 412 * resizer_set_input_size - Setup the input size 413 * @res: Device context. 414 * @width: The range is 0 to 4095 pixels 415 * @height: The range is 0 to 4095 lines 416 */ 417static void resizer_set_input_size(struct isp_res_device *res, 418 u32 width, u32 height) 419{ 420 struct isp_device *isp = to_isp_device(res); 421 u32 rgval; 422 423 rgval = (width << ISPRSZ_IN_SIZE_HORZ_SHIFT) 424 & ISPRSZ_IN_SIZE_HORZ_MASK; 425 rgval |= (height << ISPRSZ_IN_SIZE_VERT_SHIFT) 426 & ISPRSZ_IN_SIZE_VERT_MASK; 427 428 isp_reg_writel(isp, rgval, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_IN_SIZE); 429} 430 431/* 432 * resizer_set_src_offs - Setup the memory offset for the input lines 433 * @res: Device context. 434 * @offset: Memory offset. 435 * 436 * The 5 LSBs are forced to be zeros by the hardware to align on a 32-byte 437 * boundary; the 5 LSBs are read-only. This field must be programmed to be 438 * 0x0 if the resizer input is from preview engine/CCDC. 439 */ 440static void resizer_set_input_offset(struct isp_res_device *res, u32 offset) 441{ 442 struct isp_device *isp = to_isp_device(res); 443 444 isp_reg_writel(isp, offset, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_SDR_INOFF); 445} 446 447/* 448 * resizer_set_intype - Input type select 449 * @res: Device context. 450 * @type: Pixel format type. 451 */ 452static void resizer_set_intype(struct isp_res_device *res, 453 enum resizer_colors_type type) 454{ 455 struct isp_device *isp = to_isp_device(res); 456 457 if (type == RSZ_COLOR8) 458 isp_reg_set(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT, 459 ISPRSZ_CNT_INPTYP); 460 else 461 isp_reg_clr(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT, 462 ISPRSZ_CNT_INPTYP); 463} 464 465/* 466 * __resizer_set_inaddr - Helper function for set input address 467 * @res : pointer to resizer private data structure 468 * @addr: input address 469 * return none 470 */ 471static void __resizer_set_inaddr(struct isp_res_device *res, u32 addr) 472{ 473 struct isp_device *isp = to_isp_device(res); 474 475 isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_SDR_INADD); 476} 477 478/* 479 * The data rate at the horizontal resizer output must not exceed half the 480 * functional clock or 100 MP/s, whichever is lower. According to the TRM 481 * there's no similar requirement for the vertical resizer output. However 482 * experience showed that vertical upscaling by 4 leads to SBL overflows (with 483 * data rates at the resizer output exceeding 300 MP/s). Limiting the resizer 484 * output data rate to the functional clock or 200 MP/s, whichever is lower, 485 * seems to get rid of SBL overflows. 486 * 487 * The maximum data rate at the output of the horizontal resizer can thus be 488 * computed with 489 * 490 * max intermediate rate <= L3 clock * input height / output height 491 * max intermediate rate <= L3 clock / 2 492 * 493 * The maximum data rate at the resizer input is then 494 * 495 * max input rate <= max intermediate rate * input width / output width 496 * 497 * where the input width and height are the resizer input crop rectangle size. 498 * The TRM doesn't clearly explain if that's a maximum instant data rate or a 499 * maximum average data rate. 500 */ 501void omap3isp_resizer_max_rate(struct isp_res_device *res, 502 unsigned int *max_rate) 503{ 504 struct isp_pipeline *pipe = to_isp_pipeline(&res->subdev.entity); 505 const struct v4l2_mbus_framefmt *ofmt = &res->formats[RESZ_PAD_SOURCE]; 506 unsigned long limit = min(pipe->l3_ick, 200000000UL); 507 unsigned long clock; 508 509 clock = div_u64((u64)limit * res->crop.active.height, ofmt->height); 510 clock = min(clock, limit / 2); 511 *max_rate = div_u64((u64)clock * res->crop.active.width, ofmt->width); 512} 513 514/* 515 * When the resizer processes images from memory, the driver must slow down read 516 * requests on the input to at least comply with the internal data rate 517 * requirements. If the application real-time requirements can cope with slower 518 * processing, the resizer can be slowed down even more to put less pressure on 519 * the overall system. 520 * 521 * When the resizer processes images on the fly (either from the CCDC or the 522 * preview module), the same data rate requirements apply but they can't be 523 * enforced at the resizer level. The image input module (sensor, CCP2 or 524 * preview module) must not provide image data faster than the resizer can 525 * process. 526 * 527 * For live image pipelines, the data rate is set by the frame format, size and 528 * rate. The sensor output frame rate must not exceed the maximum resizer data 529 * rate. 530 * 531 * The resizer slows down read requests by inserting wait cycles in the SBL 532 * requests. The maximum number of 256-byte requests per second can be computed 533 * as (the data rate is multiplied by 2 to convert from pixels per second to 534 * bytes per second) 535 * 536 * request per second = data rate * 2 / 256 537 * cycles per request = cycles per second / requests per second 538 * 539 * The number of cycles per second is controlled by the L3 clock, leading to 540 * 541 * cycles per request = L3 frequency / 2 * 256 / data rate 542 */ 543static void resizer_adjust_bandwidth(struct isp_res_device *res) 544{ 545 struct isp_pipeline *pipe = to_isp_pipeline(&res->subdev.entity); 546 struct isp_device *isp = to_isp_device(res); 547 unsigned long l3_ick = pipe->l3_ick; 548 struct v4l2_fract *timeperframe; 549 unsigned int cycles_per_frame; 550 unsigned int requests_per_frame; 551 unsigned int cycles_per_request; 552 unsigned int granularity; 553 unsigned int minimum; 554 unsigned int maximum; 555 unsigned int value; 556 557 if (res->input != RESIZER_INPUT_MEMORY) { 558 isp_reg_clr(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_SDR_REQ_EXP, 559 ISPSBL_SDR_REQ_RSZ_EXP_MASK); 560 return; 561 } 562 563 switch (isp->revision) { 564 case ISP_REVISION_1_0: 565 case ISP_REVISION_2_0: 566 default: 567 granularity = 1024; 568 break; 569 570 case ISP_REVISION_15_0: 571 granularity = 32; 572 break; 573 } 574 575 /* Compute the minimum number of cycles per request, based on the 576 * pipeline maximum data rate. This is an absolute lower bound if we 577 * don't want SBL overflows, so round the value up. 578 */ 579 cycles_per_request = div_u64((u64)l3_ick / 2 * 256 + pipe->max_rate - 1, 580 pipe->max_rate); 581 minimum = DIV_ROUND_UP(cycles_per_request, granularity); 582 583 /* Compute the maximum number of cycles per request, based on the 584 * requested frame rate. This is a soft upper bound to achieve a frame 585 * rate equal or higher than the requested value, so round the value 586 * down. 587 */ 588 timeperframe = &pipe->max_timeperframe; 589 590 requests_per_frame = DIV_ROUND_UP(res->crop.active.width * 2, 256) 591 * res->crop.active.height; 592 cycles_per_frame = div_u64((u64)l3_ick * timeperframe->numerator, 593 timeperframe->denominator); 594 cycles_per_request = cycles_per_frame / requests_per_frame; 595 596 maximum = cycles_per_request / granularity; 597 598 value = max(minimum, maximum); 599 600 dev_dbg(isp->dev, "%s: cycles per request = %u\n", __func__, value); 601 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_SDR_REQ_EXP, 602 ISPSBL_SDR_REQ_RSZ_EXP_MASK, 603 value << ISPSBL_SDR_REQ_RSZ_EXP_SHIFT); 604} 605 606/* 607 * omap3isp_resizer_busy - Checks if ISP resizer is busy. 608 * 609 * Returns busy field from ISPRSZ_PCR register. 610 */ 611int omap3isp_resizer_busy(struct isp_res_device *res) 612{ 613 struct isp_device *isp = to_isp_device(res); 614 615 return isp_reg_readl(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_PCR) & 616 ISPRSZ_PCR_BUSY; 617} 618 619/* 620 * resizer_set_inaddr - Sets the memory address of the input frame. 621 * @addr: 32bit memory address aligned on 32byte boundary. 622 */ 623static void resizer_set_inaddr(struct isp_res_device *res, u32 addr) 624{ 625 res->addr_base = addr; 626 627 /* This will handle crop settings in stream off state */ 628 if (res->crop_offset) 629 addr += res->crop_offset & ~0x1f; 630 631 __resizer_set_inaddr(res, addr); 632} 633 634/* 635 * Configures the memory address to which the output frame is written. 636 * @addr: 32bit memory address aligned on 32byte boundary. 637 * Note: For SBL efficiency reasons the address should be on a 256-byte 638 * boundary. 639 */ 640static void resizer_set_outaddr(struct isp_res_device *res, u32 addr) 641{ 642 struct isp_device *isp = to_isp_device(res); 643 644 /* 645 * Set output address. This needs to be in its own function 646 * because it changes often. 647 */ 648 isp_reg_writel(isp, addr << ISPRSZ_SDR_OUTADD_ADDR_SHIFT, 649 OMAP3_ISP_IOMEM_RESZ, ISPRSZ_SDR_OUTADD); 650} 651 652/* 653 * resizer_print_status - Prints the values of the resizer module registers. 654 */ 655#define RSZ_PRINT_REGISTER(isp, name)\ 656 dev_dbg(isp->dev, "###RSZ " #name "=0x%08x\n", \ 657 isp_reg_readl(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_##name)) 658 659static void resizer_print_status(struct isp_res_device *res) 660{ 661 struct isp_device *isp = to_isp_device(res); 662 663 dev_dbg(isp->dev, "-------------Resizer Register dump----------\n"); 664 665 RSZ_PRINT_REGISTER(isp, PCR); 666 RSZ_PRINT_REGISTER(isp, CNT); 667 RSZ_PRINT_REGISTER(isp, OUT_SIZE); 668 RSZ_PRINT_REGISTER(isp, IN_START); 669 RSZ_PRINT_REGISTER(isp, IN_SIZE); 670 RSZ_PRINT_REGISTER(isp, SDR_INADD); 671 RSZ_PRINT_REGISTER(isp, SDR_INOFF); 672 RSZ_PRINT_REGISTER(isp, SDR_OUTADD); 673 RSZ_PRINT_REGISTER(isp, SDR_OUTOFF); 674 RSZ_PRINT_REGISTER(isp, YENH); 675 676 dev_dbg(isp->dev, "--------------------------------------------\n"); 677} 678 679/* 680 * resizer_calc_ratios - Helper function for calculating resizer ratios 681 * @res: pointer to resizer private data structure 682 * @input: input frame size 683 * @output: output frame size 684 * @ratio : return calculated ratios 685 * return none 686 * 687 * The resizer uses a polyphase sample rate converter. The upsampling filter 688 * has a fixed number of phases that depend on the resizing ratio. As the ratio 689 * computation depends on the number of phases, we need to compute a first 690 * approximation and then refine it. 691 * 692 * The input/output/ratio relationship is given by the OMAP34xx TRM: 693 * 694 * - 8-phase, 4-tap mode (RSZ = 64 ~ 512) 695 * iw = (32 * sph + (ow - 1) * hrsz + 16) >> 8 + 7 696 * ih = (32 * spv + (oh - 1) * vrsz + 16) >> 8 + 4 697 * - 4-phase, 7-tap mode (RSZ = 513 ~ 1024) 698 * iw = (64 * sph + (ow - 1) * hrsz + 32) >> 8 + 7 699 * ih = (64 * spv + (oh - 1) * vrsz + 32) >> 8 + 7 700 * 701 * iw and ih are the input width and height after cropping. Those equations need 702 * to be satisfied exactly for the resizer to work correctly. 703 * 704 * The equations can't be easily reverted, as the >> 8 operation is not linear. 705 * In addition, not all input sizes can be achieved for a given output size. To 706 * get the highest input size lower than or equal to the requested input size, 707 * we need to compute the highest resizing ratio that satisfies the following 708 * inequality (taking the 4-tap mode width equation as an example) 709 * 710 * iw >= (32 * sph + (ow - 1) * hrsz + 16) >> 8 - 7 711 * 712 * (where iw is the requested input width) which can be rewritten as 713 * 714 * iw - 7 >= (32 * sph + (ow - 1) * hrsz + 16) >> 8 715 * (iw - 7) << 8 >= 32 * sph + (ow - 1) * hrsz + 16 - b 716 * ((iw - 7) << 8) + b >= 32 * sph + (ow - 1) * hrsz + 16 717 * 718 * where b is the value of the 8 least significant bits of the right hand side 719 * expression of the last inequality. The highest resizing ratio value will be 720 * achieved when b is equal to its maximum value of 255. That resizing ratio 721 * value will still satisfy the original inequality, as b will disappear when 722 * the expression will be shifted right by 8. 723 * 724 * The reverted equations thus become 725 * 726 * - 8-phase, 4-tap mode 727 * hrsz = ((iw - 7) * 256 + 255 - 16 - 32 * sph) / (ow - 1) 728 * vrsz = ((ih - 4) * 256 + 255 - 16 - 32 * spv) / (oh - 1) 729 * - 4-phase, 7-tap mode 730 * hrsz = ((iw - 7) * 256 + 255 - 32 - 64 * sph) / (ow - 1) 731 * vrsz = ((ih - 7) * 256 + 255 - 32 - 64 * spv) / (oh - 1) 732 * 733 * The ratios are integer values, and are rounded down to ensure that the 734 * cropped input size is not bigger than the uncropped input size. 735 * 736 * As the number of phases/taps, used to select the correct equations to compute 737 * the ratio, depends on the ratio, we start with the 4-tap mode equations to 738 * compute an approximation of the ratio, and switch to the 7-tap mode equations 739 * if the approximation is higher than the ratio threshold. 740 * 741 * As the 7-tap mode equations will return a ratio smaller than or equal to the 742 * 4-tap mode equations, the resulting ratio could become lower than or equal to 743 * the ratio threshold. This 'equations loop' isn't an issue as long as the 744 * correct equations are used to compute the final input size. Starting with the 745 * 4-tap mode equations ensure that, in case of values resulting in a 'ratio 746 * loop', the smallest of the ratio values will be used, never exceeding the 747 * requested input size. 748 * 749 * We first clamp the output size according to the hardware capability to avoid 750 * auto-cropping the input more than required to satisfy the TRM equations. The 751 * minimum output size is achieved with a scaling factor of 1024. It is thus 752 * computed using the 7-tap equations. 753 * 754 * min ow = ((iw - 7) * 256 - 32 - 64 * sph) / 1024 + 1 755 * min oh = ((ih - 7) * 256 - 32 - 64 * spv) / 1024 + 1 756 * 757 * Similarly, the maximum output size is achieved with a scaling factor of 64 758 * and computed using the 4-tap equations. 759 * 760 * max ow = ((iw - 7) * 256 + 255 - 16 - 32 * sph) / 64 + 1 761 * max oh = ((ih - 4) * 256 + 255 - 16 - 32 * spv) / 64 + 1 762 * 763 * The additional +255 term compensates for the round down operation performed 764 * by the TRM equations when shifting the value right by 8 bits. 765 * 766 * We then compute and clamp the ratios (x1/4 ~ x4). Clamping the output size to 767 * the maximum value guarantees that the ratio value will never be smaller than 768 * the minimum, but it could still slightly exceed the maximum. Clamping the 769 * ratio will thus result in a resizing factor slightly larger than the 770 * requested value. 771 * 772 * To accommodate that, and make sure the TRM equations are satisfied exactly, we 773 * compute the input crop rectangle as the last step. 774 * 775 * As if the situation wasn't complex enough, the maximum output width depends 776 * on the vertical resizing ratio. Fortunately, the output height doesn't 777 * depend on the horizontal resizing ratio. We can then start by computing the 778 * output height and the vertical ratio, and then move to computing the output 779 * width and the horizontal ratio. 780 */ 781static void resizer_calc_ratios(struct isp_res_device *res, 782 struct v4l2_rect *input, 783 struct v4l2_mbus_framefmt *output, 784 struct resizer_ratio *ratio) 785{ 786 struct isp_device *isp = to_isp_device(res); 787 const unsigned int spv = DEFAULT_PHASE; 788 const unsigned int sph = DEFAULT_PHASE; 789 unsigned int upscaled_width; 790 unsigned int upscaled_height; 791 unsigned int min_width; 792 unsigned int min_height; 793 unsigned int max_width; 794 unsigned int max_height; 795 unsigned int width_alignment; 796 unsigned int width; 797 unsigned int height; 798 799 /* 800 * Clamp the output height based on the hardware capabilities and 801 * compute the vertical resizing ratio. 802 */ 803 min_height = ((input->height - 7) * 256 - 32 - 64 * spv) / 1024 + 1; 804 min_height = max_t(unsigned int, min_height, MIN_OUT_HEIGHT); 805 max_height = ((input->height - 4) * 256 + 255 - 16 - 32 * spv) / 64 + 1; 806 max_height = min_t(unsigned int, max_height, MAX_OUT_HEIGHT); 807 output->height = clamp(output->height, min_height, max_height); 808 809 ratio->vert = ((input->height - 4) * 256 + 255 - 16 - 32 * spv) 810 / (output->height - 1); 811 if (ratio->vert > MID_RESIZE_VALUE) 812 ratio->vert = ((input->height - 7) * 256 + 255 - 32 - 64 * spv) 813 / (output->height - 1); 814 ratio->vert = clamp_t(unsigned int, ratio->vert, 815 MIN_RESIZE_VALUE, MAX_RESIZE_VALUE); 816 817 if (ratio->vert <= MID_RESIZE_VALUE) { 818 upscaled_height = (output->height - 1) * ratio->vert 819 + 32 * spv + 16; 820 height = (upscaled_height >> 8) + 4; 821 } else { 822 upscaled_height = (output->height - 1) * ratio->vert 823 + 64 * spv + 32; 824 height = (upscaled_height >> 8) + 7; 825 } 826 827 /* 828 * Compute the minimum and maximum output widths based on the hardware 829 * capabilities. The maximum depends on the vertical resizing ratio. 830 */ 831 min_width = ((input->width - 7) * 256 - 32 - 64 * sph) / 1024 + 1; 832 min_width = max_t(unsigned int, min_width, MIN_OUT_WIDTH); 833 834 if (ratio->vert <= MID_RESIZE_VALUE) { 835 switch (isp->revision) { 836 case ISP_REVISION_1_0: 837 max_width = MAX_4TAP_OUT_WIDTH_ES1; 838 break; 839 840 case ISP_REVISION_2_0: 841 default: 842 max_width = MAX_4TAP_OUT_WIDTH_ES2; 843 break; 844 845 case ISP_REVISION_15_0: 846 max_width = MAX_4TAP_OUT_WIDTH_3630; 847 break; 848 } 849 } else { 850 switch (isp->revision) { 851 case ISP_REVISION_1_0: 852 max_width = MAX_7TAP_OUT_WIDTH_ES1; 853 break; 854 855 case ISP_REVISION_2_0: 856 default: 857 max_width = MAX_7TAP_OUT_WIDTH_ES2; 858 break; 859 860 case ISP_REVISION_15_0: 861 max_width = MAX_7TAP_OUT_WIDTH_3630; 862 break; 863 } 864 } 865 max_width = min(((input->width - 7) * 256 + 255 - 16 - 32 * sph) / 64 866 + 1, max_width); 867 868 /* 869 * The output width must be even, and must be a multiple of 16 bytes 870 * when upscaling vertically. Clamp the output width to the valid range. 871 * Take the alignment into account (the maximum width in 7-tap mode on 872 * ES2 isn't a multiple of 8) and align the result up to make sure it 873 * won't be smaller than the minimum. 874 */ 875 width_alignment = ratio->vert < 256 ? 8 : 2; 876 output->width = clamp(output->width, min_width, 877 max_width & ~(width_alignment - 1)); 878 output->width = ALIGN(output->width, width_alignment); 879 880 ratio->horz = ((input->width - 7) * 256 + 255 - 16 - 32 * sph) 881 / (output->width - 1); 882 if (ratio->horz > MID_RESIZE_VALUE) 883 ratio->horz = ((input->width - 7) * 256 + 255 - 32 - 64 * sph) 884 / (output->width - 1); 885 ratio->horz = clamp_t(unsigned int, ratio->horz, 886 MIN_RESIZE_VALUE, MAX_RESIZE_VALUE); 887 888 if (ratio->horz <= MID_RESIZE_VALUE) { 889 upscaled_width = (output->width - 1) * ratio->horz 890 + 32 * sph + 16; 891 width = (upscaled_width >> 8) + 7; 892 } else { 893 upscaled_width = (output->width - 1) * ratio->horz 894 + 64 * sph + 32; 895 width = (upscaled_width >> 8) + 7; 896 } 897 898 /* Center the new crop rectangle. */ 899 input->left += (input->width - width) / 2; 900 input->top += (input->height - height) / 2; 901 input->width = width; 902 input->height = height; 903} 904 905/* 906 * resizer_set_crop_params - Setup hardware with cropping parameters 907 * @res : resizer private structure 908 * @input : format on sink pad 909 * @output : format on source pad 910 * return none 911 */ 912static void resizer_set_crop_params(struct isp_res_device *res, 913 const struct v4l2_mbus_framefmt *input, 914 const struct v4l2_mbus_framefmt *output) 915{ 916 resizer_set_ratio(res, &res->ratio); 917 918 /* Set chrominance horizontal algorithm */ 919 if (res->ratio.horz >= RESIZE_DIVISOR) 920 resizer_set_bilinear(res, RSZ_THE_SAME); 921 else 922 resizer_set_bilinear(res, RSZ_BILINEAR); 923 924 resizer_adjust_bandwidth(res); 925 926 if (res->input == RESIZER_INPUT_MEMORY) { 927 /* Calculate additional offset for crop */ 928 res->crop_offset = (res->crop.active.top * input->width + 929 res->crop.active.left) * 2; 930 /* 931 * Write lowest 4 bits of horizontal pixel offset (in pixels), 932 * vertical start must be 0. 933 */ 934 resizer_set_start(res, (res->crop_offset / 2) & 0xf, 0); 935 936 /* 937 * Set start (read) address for cropping, in bytes. 938 * Lowest 5 bits must be zero. 939 */ 940 __resizer_set_inaddr(res, 941 res->addr_base + (res->crop_offset & ~0x1f)); 942 } else { 943 /* 944 * Set vertical start line and horizontal starting pixel. 945 * If the input is from CCDC/PREV, horizontal start field is 946 * in bytes (twice number of pixels). 947 */ 948 resizer_set_start(res, res->crop.active.left * 2, 949 res->crop.active.top); 950 /* Input address and offset must be 0 for preview/ccdc input */ 951 __resizer_set_inaddr(res, 0); 952 resizer_set_input_offset(res, 0); 953 } 954 955 /* Set the input size */ 956 resizer_set_input_size(res, res->crop.active.width, 957 res->crop.active.height); 958} 959 960static void resizer_configure(struct isp_res_device *res) 961{ 962 struct v4l2_mbus_framefmt *informat, *outformat; 963 struct resizer_luma_yenh luma = {0, 0, 0, 0}; 964 965 resizer_set_source(res, res->input); 966 967 informat = &res->formats[RESZ_PAD_SINK]; 968 outformat = &res->formats[RESZ_PAD_SOURCE]; 969 970 /* RESZ_PAD_SINK */ 971 if (res->input == RESIZER_INPUT_VP) 972 resizer_set_input_offset(res, 0); 973 else 974 resizer_set_input_offset(res, ALIGN(informat->width, 0x10) * 2); 975 976 /* YUV422 interleaved, default phase, no luma enhancement */ 977 resizer_set_intype(res, RSZ_YUV422); 978 resizer_set_ycpos(res, informat->code); 979 resizer_set_phase(res, DEFAULT_PHASE, DEFAULT_PHASE); 980 resizer_set_luma(res, &luma); 981 982 /* RESZ_PAD_SOURCE */ 983 resizer_set_output_offset(res, ALIGN(outformat->width * 2, 32)); 984 resizer_set_output_size(res, outformat->width, outformat->height); 985 986 resizer_set_crop_params(res, informat, outformat); 987} 988 989/* ----------------------------------------------------------------------------- 990 * Interrupt handling 991 */ 992 993static void resizer_enable_oneshot(struct isp_res_device *res) 994{ 995 struct isp_device *isp = to_isp_device(res); 996 997 isp_reg_set(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_PCR, 998 ISPRSZ_PCR_ENABLE | ISPRSZ_PCR_ONESHOT); 999} 1000 1001void omap3isp_resizer_isr_frame_sync(struct isp_res_device *res) 1002{ 1003 /* 1004 * If ISP_VIDEO_DMAQUEUE_QUEUED is set, DMA queue had an underrun 1005 * condition, the module was paused and now we have a buffer queued 1006 * on the output again. Restart the pipeline if running in continuous 1007 * mode. 1008 */ 1009 if (res->state == ISP_PIPELINE_STREAM_CONTINUOUS && 1010 res->video_out.dmaqueue_flags & ISP_VIDEO_DMAQUEUE_QUEUED) { 1011 resizer_enable_oneshot(res); 1012 isp_video_dmaqueue_flags_clr(&res->video_out); 1013 } 1014} 1015 1016static void resizer_isr_buffer(struct isp_res_device *res) 1017{ 1018 struct isp_pipeline *pipe = to_isp_pipeline(&res->subdev.entity); 1019 struct isp_buffer *buffer; 1020 int restart = 0; 1021 1022 if (res->state == ISP_PIPELINE_STREAM_STOPPED) 1023 return; 1024 1025 /* Complete the output buffer and, if reading from memory, the input 1026 * buffer. 1027 */ 1028 buffer = omap3isp_video_buffer_next(&res->video_out); 1029 if (buffer != NULL) { 1030 resizer_set_outaddr(res, buffer->dma); 1031 restart = 1; 1032 } 1033 1034 pipe->state |= ISP_PIPELINE_IDLE_OUTPUT; 1035 1036 if (res->input == RESIZER_INPUT_MEMORY) { 1037 buffer = omap3isp_video_buffer_next(&res->video_in); 1038 if (buffer != NULL) 1039 resizer_set_inaddr(res, buffer->dma); 1040 pipe->state |= ISP_PIPELINE_IDLE_INPUT; 1041 } 1042 1043 if (res->state == ISP_PIPELINE_STREAM_SINGLESHOT) { 1044 if (isp_pipeline_ready(pipe)) 1045 omap3isp_pipeline_set_stream(pipe, 1046 ISP_PIPELINE_STREAM_SINGLESHOT); 1047 } else { 1048 /* If an underrun occurs, the video queue operation handler will 1049 * restart the resizer. Otherwise restart it immediately. 1050 */ 1051 if (restart) 1052 resizer_enable_oneshot(res); 1053 } 1054} 1055 1056/* 1057 * omap3isp_resizer_isr - ISP resizer interrupt handler 1058 * 1059 * Manage the resizer video buffers and configure shadowed and busy-locked 1060 * registers. 1061 */ 1062void omap3isp_resizer_isr(struct isp_res_device *res) 1063{ 1064 struct v4l2_mbus_framefmt *informat, *outformat; 1065 unsigned long flags; 1066 1067 if (omap3isp_module_sync_is_stopping(&res->wait, &res->stopping)) 1068 return; 1069 1070 spin_lock_irqsave(&res->lock, flags); 1071 1072 if (res->applycrop) { 1073 outformat = __resizer_get_format(res, NULL, RESZ_PAD_SOURCE, 1074 V4L2_SUBDEV_FORMAT_ACTIVE); 1075 informat = __resizer_get_format(res, NULL, RESZ_PAD_SINK, 1076 V4L2_SUBDEV_FORMAT_ACTIVE); 1077 resizer_set_crop_params(res, informat, outformat); 1078 res->applycrop = 0; 1079 } 1080 1081 spin_unlock_irqrestore(&res->lock, flags); 1082 1083 resizer_isr_buffer(res); 1084} 1085 1086/* ----------------------------------------------------------------------------- 1087 * ISP video operations 1088 */ 1089 1090static int resizer_video_queue(struct isp_video *video, 1091 struct isp_buffer *buffer) 1092{ 1093 struct isp_res_device *res = &video->isp->isp_res; 1094 1095 if (video->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) 1096 resizer_set_inaddr(res, buffer->dma); 1097 1098 /* 1099 * We now have a buffer queued on the output. Despite what the 1100 * TRM says, the resizer can't be restarted immediately. 1101 * Enabling it in one shot mode in the middle of a frame (or at 1102 * least asynchronously to the frame) results in the output 1103 * being shifted randomly left/right and up/down, as if the 1104 * hardware didn't synchronize itself to the beginning of the 1105 * frame correctly. 1106 * 1107 * Restart the resizer on the next sync interrupt if running in 1108 * continuous mode or when starting the stream. 1109 */ 1110 if (video->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) 1111 resizer_set_outaddr(res, buffer->dma); 1112 1113 return 0; 1114} 1115 1116static const struct isp_video_operations resizer_video_ops = { 1117 .queue = resizer_video_queue, 1118}; 1119 1120/* ----------------------------------------------------------------------------- 1121 * V4L2 subdev operations 1122 */ 1123 1124/* 1125 * resizer_set_stream - Enable/Disable streaming on resizer subdev 1126 * @sd: ISP resizer V4L2 subdev 1127 * @enable: 1 == Enable, 0 == Disable 1128 * 1129 * The resizer hardware can't be enabled without a memory buffer to write to. 1130 * As the s_stream operation is called in response to a STREAMON call without 1131 * any buffer queued yet, just update the state field and return immediately. 1132 * The resizer will be enabled in resizer_video_queue(). 1133 */ 1134static int resizer_set_stream(struct v4l2_subdev *sd, int enable) 1135{ 1136 struct isp_res_device *res = v4l2_get_subdevdata(sd); 1137 struct isp_video *video_out = &res->video_out; 1138 struct isp_device *isp = to_isp_device(res); 1139 struct device *dev = to_device(res); 1140 1141 if (res->state == ISP_PIPELINE_STREAM_STOPPED) { 1142 if (enable == ISP_PIPELINE_STREAM_STOPPED) 1143 return 0; 1144 1145 omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_RESIZER); 1146 resizer_configure(res); 1147 resizer_print_status(res); 1148 } 1149 1150 switch (enable) { 1151 case ISP_PIPELINE_STREAM_CONTINUOUS: 1152 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_RESIZER_WRITE); 1153 if (video_out->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_QUEUED) { 1154 resizer_enable_oneshot(res); 1155 isp_video_dmaqueue_flags_clr(video_out); 1156 } 1157 break; 1158 1159 case ISP_PIPELINE_STREAM_SINGLESHOT: 1160 if (res->input == RESIZER_INPUT_MEMORY) 1161 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_RESIZER_READ); 1162 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_RESIZER_WRITE); 1163 1164 resizer_enable_oneshot(res); 1165 break; 1166 1167 case ISP_PIPELINE_STREAM_STOPPED: 1168 if (omap3isp_module_sync_idle(&sd->entity, &res->wait, 1169 &res->stopping)) 1170 dev_dbg(dev, "%s: module stop timeout.\n", sd->name); 1171 omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_RESIZER_READ | 1172 OMAP3_ISP_SBL_RESIZER_WRITE); 1173 omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_RESIZER); 1174 isp_video_dmaqueue_flags_clr(video_out); 1175 break; 1176 } 1177 1178 res->state = enable; 1179 return 0; 1180} 1181 1182/* 1183 * resizer_try_crop - mangles crop parameters. 1184 */ 1185static void resizer_try_crop(const struct v4l2_mbus_framefmt *sink, 1186 const struct v4l2_mbus_framefmt *source, 1187 struct v4l2_rect *crop) 1188{ 1189 const unsigned int spv = DEFAULT_PHASE; 1190 const unsigned int sph = DEFAULT_PHASE; 1191 1192 /* Crop rectangle is constrained by the output size so that zoom ratio 1193 * cannot exceed +/-4.0. 1194 */ 1195 unsigned int min_width = 1196 ((32 * sph + (source->width - 1) * 64 + 16) >> 8) + 7; 1197 unsigned int min_height = 1198 ((32 * spv + (source->height - 1) * 64 + 16) >> 8) + 4; 1199 unsigned int max_width = 1200 ((64 * sph + (source->width - 1) * 1024 + 32) >> 8) + 7; 1201 unsigned int max_height = 1202 ((64 * spv + (source->height - 1) * 1024 + 32) >> 8) + 7; 1203 1204 crop->width = clamp_t(u32, crop->width, min_width, max_width); 1205 crop->height = clamp_t(u32, crop->height, min_height, max_height); 1206 1207 /* Crop can not go beyond of the input rectangle */ 1208 crop->left = clamp_t(u32, crop->left, 0, sink->width - MIN_IN_WIDTH); 1209 crop->width = clamp_t(u32, crop->width, MIN_IN_WIDTH, 1210 sink->width - crop->left); 1211 crop->top = clamp_t(u32, crop->top, 0, sink->height - MIN_IN_HEIGHT); 1212 crop->height = clamp_t(u32, crop->height, MIN_IN_HEIGHT, 1213 sink->height - crop->top); 1214} 1215 1216/* 1217 * resizer_get_selection - Retrieve a selection rectangle on a pad 1218 * @sd: ISP resizer V4L2 subdevice 1219 * @fh: V4L2 subdev file handle 1220 * @sel: Selection rectangle 1221 * 1222 * The only supported rectangles are the crop rectangles on the sink pad. 1223 * 1224 * Return 0 on success or a negative error code otherwise. 1225 */ 1226static int resizer_get_selection(struct v4l2_subdev *sd, 1227 struct v4l2_subdev_fh *fh, 1228 struct v4l2_subdev_selection *sel) 1229{ 1230 struct isp_res_device *res = v4l2_get_subdevdata(sd); 1231 struct v4l2_mbus_framefmt *format_source; 1232 struct v4l2_mbus_framefmt *format_sink; 1233 struct resizer_ratio ratio; 1234 1235 if (sel->pad != RESZ_PAD_SINK) 1236 return -EINVAL; 1237 1238 format_sink = __resizer_get_format(res, fh, RESZ_PAD_SINK, 1239 sel->which); 1240 format_source = __resizer_get_format(res, fh, RESZ_PAD_SOURCE, 1241 sel->which); 1242 1243 switch (sel->target) { 1244 case V4L2_SEL_TGT_CROP_BOUNDS: 1245 sel->r.left = 0; 1246 sel->r.top = 0; 1247 sel->r.width = INT_MAX; 1248 sel->r.height = INT_MAX; 1249 1250 resizer_try_crop(format_sink, format_source, &sel->r); 1251 resizer_calc_ratios(res, &sel->r, format_source, &ratio); 1252 break; 1253 1254 case V4L2_SEL_TGT_CROP: 1255 sel->r = *__resizer_get_crop(res, fh, sel->which); 1256 resizer_calc_ratios(res, &sel->r, format_source, &ratio); 1257 break; 1258 1259 default: 1260 return -EINVAL; 1261 } 1262 1263 return 0; 1264} 1265 1266/* 1267 * resizer_set_selection - Set a selection rectangle on a pad 1268 * @sd: ISP resizer V4L2 subdevice 1269 * @fh: V4L2 subdev file handle 1270 * @sel: Selection rectangle 1271 * 1272 * The only supported rectangle is the actual crop rectangle on the sink pad. 1273 * 1274 * FIXME: This function currently behaves as if the KEEP_CONFIG selection flag 1275 * was always set. 1276 * 1277 * Return 0 on success or a negative error code otherwise. 1278 */ 1279static int resizer_set_selection(struct v4l2_subdev *sd, 1280 struct v4l2_subdev_fh *fh, 1281 struct v4l2_subdev_selection *sel) 1282{ 1283 struct isp_res_device *res = v4l2_get_subdevdata(sd); 1284 struct isp_device *isp = to_isp_device(res); 1285 const struct v4l2_mbus_framefmt *format_sink; 1286 struct v4l2_mbus_framefmt format_source; 1287 struct resizer_ratio ratio; 1288 unsigned long flags; 1289 1290 if (sel->target != V4L2_SEL_TGT_CROP || 1291 sel->pad != RESZ_PAD_SINK) 1292 return -EINVAL; 1293 1294 format_sink = __resizer_get_format(res, fh, RESZ_PAD_SINK, 1295 sel->which); 1296 format_source = *__resizer_get_format(res, fh, RESZ_PAD_SOURCE, 1297 sel->which); 1298 1299 dev_dbg(isp->dev, "%s(%s): req %ux%u -> (%d,%d)/%ux%u -> %ux%u\n", 1300 __func__, sel->which == V4L2_SUBDEV_FORMAT_TRY ? "try" : "act", 1301 format_sink->width, format_sink->height, 1302 sel->r.left, sel->r.top, sel->r.width, sel->r.height, 1303 format_source.width, format_source.height); 1304 1305 /* Clamp the crop rectangle to the bounds, and then mangle it further to 1306 * fulfill the TRM equations. Store the clamped but otherwise unmangled 1307 * rectangle to avoid cropping the input multiple times: when an 1308 * application sets the output format, the current crop rectangle is 1309 * mangled during crop rectangle computation, which would lead to a new, 1310 * smaller input crop rectangle every time the output size is set if we 1311 * stored the mangled rectangle. 1312 */ 1313 resizer_try_crop(format_sink, &format_source, &sel->r); 1314 *__resizer_get_crop(res, fh, sel->which) = sel->r; 1315 resizer_calc_ratios(res, &sel->r, &format_source, &ratio); 1316 1317 dev_dbg(isp->dev, "%s(%s): got %ux%u -> (%d,%d)/%ux%u -> %ux%u\n", 1318 __func__, sel->which == V4L2_SUBDEV_FORMAT_TRY ? "try" : "act", 1319 format_sink->width, format_sink->height, 1320 sel->r.left, sel->r.top, sel->r.width, sel->r.height, 1321 format_source.width, format_source.height); 1322 1323 if (sel->which == V4L2_SUBDEV_FORMAT_TRY) { 1324 *__resizer_get_format(res, fh, RESZ_PAD_SOURCE, sel->which) = 1325 format_source; 1326 return 0; 1327 } 1328 1329 /* Update the source format, resizing ratios and crop rectangle. If 1330 * streaming is on the IRQ handler will reprogram the resizer after the 1331 * current frame. We thus we need to protect against race conditions. 1332 */ 1333 spin_lock_irqsave(&res->lock, flags); 1334 1335 *__resizer_get_format(res, fh, RESZ_PAD_SOURCE, sel->which) = 1336 format_source; 1337 1338 res->ratio = ratio; 1339 res->crop.active = sel->r; 1340 1341 if (res->state != ISP_PIPELINE_STREAM_STOPPED) 1342 res->applycrop = 1; 1343 1344 spin_unlock_irqrestore(&res->lock, flags); 1345 1346 return 0; 1347} 1348 1349/* resizer pixel formats */ 1350static const unsigned int resizer_formats[] = { 1351 V4L2_MBUS_FMT_UYVY8_1X16, 1352 V4L2_MBUS_FMT_YUYV8_1X16, 1353}; 1354 1355static unsigned int resizer_max_in_width(struct isp_res_device *res) 1356{ 1357 struct isp_device *isp = to_isp_device(res); 1358 1359 if (res->input == RESIZER_INPUT_MEMORY) { 1360 return MAX_IN_WIDTH_MEMORY_MODE; 1361 } else { 1362 if (isp->revision == ISP_REVISION_1_0) 1363 return MAX_IN_WIDTH_ONTHEFLY_MODE_ES1; 1364 else 1365 return MAX_IN_WIDTH_ONTHEFLY_MODE_ES2; 1366 } 1367} 1368 1369/* 1370 * resizer_try_format - Handle try format by pad subdev method 1371 * @res : ISP resizer device 1372 * @fh : V4L2 subdev file handle 1373 * @pad : pad num 1374 * @fmt : pointer to v4l2 format structure 1375 * @which : wanted subdev format 1376 */ 1377static void resizer_try_format(struct isp_res_device *res, 1378 struct v4l2_subdev_fh *fh, unsigned int pad, 1379 struct v4l2_mbus_framefmt *fmt, 1380 enum v4l2_subdev_format_whence which) 1381{ 1382 struct v4l2_mbus_framefmt *format; 1383 struct resizer_ratio ratio; 1384 struct v4l2_rect crop; 1385 1386 switch (pad) { 1387 case RESZ_PAD_SINK: 1388 if (fmt->code != V4L2_MBUS_FMT_YUYV8_1X16 && 1389 fmt->code != V4L2_MBUS_FMT_UYVY8_1X16) 1390 fmt->code = V4L2_MBUS_FMT_YUYV8_1X16; 1391 1392 fmt->width = clamp_t(u32, fmt->width, MIN_IN_WIDTH, 1393 resizer_max_in_width(res)); 1394 fmt->height = clamp_t(u32, fmt->height, MIN_IN_HEIGHT, 1395 MAX_IN_HEIGHT); 1396 break; 1397 1398 case RESZ_PAD_SOURCE: 1399 format = __resizer_get_format(res, fh, RESZ_PAD_SINK, which); 1400 fmt->code = format->code; 1401 1402 crop = *__resizer_get_crop(res, fh, which); 1403 resizer_calc_ratios(res, &crop, fmt, &ratio); 1404 break; 1405 } 1406 1407 fmt->colorspace = V4L2_COLORSPACE_JPEG; 1408 fmt->field = V4L2_FIELD_NONE; 1409} 1410 1411/* 1412 * resizer_enum_mbus_code - Handle pixel format enumeration 1413 * @sd : pointer to v4l2 subdev structure 1414 * @fh : V4L2 subdev file handle 1415 * @code : pointer to v4l2_subdev_mbus_code_enum structure 1416 * return -EINVAL or zero on success 1417 */ 1418static int resizer_enum_mbus_code(struct v4l2_subdev *sd, 1419 struct v4l2_subdev_fh *fh, 1420 struct v4l2_subdev_mbus_code_enum *code) 1421{ 1422 struct isp_res_device *res = v4l2_get_subdevdata(sd); 1423 struct v4l2_mbus_framefmt *format; 1424 1425 if (code->pad == RESZ_PAD_SINK) { 1426 if (code->index >= ARRAY_SIZE(resizer_formats)) 1427 return -EINVAL; 1428 1429 code->code = resizer_formats[code->index]; 1430 } else { 1431 if (code->index != 0) 1432 return -EINVAL; 1433 1434 format = __resizer_get_format(res, fh, RESZ_PAD_SINK, 1435 V4L2_SUBDEV_FORMAT_TRY); 1436 code->code = format->code; 1437 } 1438 1439 return 0; 1440} 1441 1442static int resizer_enum_frame_size(struct v4l2_subdev *sd, 1443 struct v4l2_subdev_fh *fh, 1444 struct v4l2_subdev_frame_size_enum *fse) 1445{ 1446 struct isp_res_device *res = v4l2_get_subdevdata(sd); 1447 struct v4l2_mbus_framefmt format; 1448 1449 if (fse->index != 0) 1450 return -EINVAL; 1451 1452 format.code = fse->code; 1453 format.width = 1; 1454 format.height = 1; 1455 resizer_try_format(res, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY); 1456 fse->min_width = format.width; 1457 fse->min_height = format.height; 1458 1459 if (format.code != fse->code) 1460 return -EINVAL; 1461 1462 format.code = fse->code; 1463 format.width = -1; 1464 format.height = -1; 1465 resizer_try_format(res, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY); 1466 fse->max_width = format.width; 1467 fse->max_height = format.height; 1468 1469 return 0; 1470} 1471 1472/* 1473 * resizer_get_format - Handle get format by pads subdev method 1474 * @sd : pointer to v4l2 subdev structure 1475 * @fh : V4L2 subdev file handle 1476 * @fmt : pointer to v4l2 subdev format structure 1477 * return -EINVAL or zero on success 1478 */ 1479static int resizer_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh, 1480 struct v4l2_subdev_format *fmt) 1481{ 1482 struct isp_res_device *res = v4l2_get_subdevdata(sd); 1483 struct v4l2_mbus_framefmt *format; 1484 1485 format = __resizer_get_format(res, fh, fmt->pad, fmt->which); 1486 if (format == NULL) 1487 return -EINVAL; 1488 1489 fmt->format = *format; 1490 return 0; 1491} 1492 1493/* 1494 * resizer_set_format - Handle set format by pads subdev method 1495 * @sd : pointer to v4l2 subdev structure 1496 * @fh : V4L2 subdev file handle 1497 * @fmt : pointer to v4l2 subdev format structure 1498 * return -EINVAL or zero on success 1499 */ 1500static int resizer_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh, 1501 struct v4l2_subdev_format *fmt) 1502{ 1503 struct isp_res_device *res = v4l2_get_subdevdata(sd); 1504 struct v4l2_mbus_framefmt *format; 1505 struct v4l2_rect *crop; 1506 1507 format = __resizer_get_format(res, fh, fmt->pad, fmt->which); 1508 if (format == NULL) 1509 return -EINVAL; 1510 1511 resizer_try_format(res, fh, fmt->pad, &fmt->format, fmt->which); 1512 *format = fmt->format; 1513 1514 if (fmt->pad == RESZ_PAD_SINK) { 1515 /* reset crop rectangle */ 1516 crop = __resizer_get_crop(res, fh, fmt->which); 1517 crop->left = 0; 1518 crop->top = 0; 1519 crop->width = fmt->format.width; 1520 crop->height = fmt->format.height; 1521 1522 /* Propagate the format from sink to source */ 1523 format = __resizer_get_format(res, fh, RESZ_PAD_SOURCE, 1524 fmt->which); 1525 *format = fmt->format; 1526 resizer_try_format(res, fh, RESZ_PAD_SOURCE, format, 1527 fmt->which); 1528 } 1529 1530 if (fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE) { 1531 /* Compute and store the active crop rectangle and resizer 1532 * ratios. format already points to the source pad active 1533 * format. 1534 */ 1535 res->crop.active = res->crop.request; 1536 resizer_calc_ratios(res, &res->crop.active, format, 1537 &res->ratio); 1538 } 1539 1540 return 0; 1541} 1542 1543static int resizer_link_validate(struct v4l2_subdev *sd, 1544 struct media_link *link, 1545 struct v4l2_subdev_format *source_fmt, 1546 struct v4l2_subdev_format *sink_fmt) 1547{ 1548 struct isp_res_device *res = v4l2_get_subdevdata(sd); 1549 struct isp_pipeline *pipe = to_isp_pipeline(&sd->entity); 1550 1551 omap3isp_resizer_max_rate(res, &pipe->max_rate); 1552 1553 return v4l2_subdev_link_validate_default(sd, link, 1554 source_fmt, sink_fmt); 1555} 1556 1557/* 1558 * resizer_init_formats - Initialize formats on all pads 1559 * @sd: ISP resizer V4L2 subdevice 1560 * @fh: V4L2 subdev file handle 1561 * 1562 * Initialize all pad formats with default values. If fh is not NULL, try 1563 * formats are initialized on the file handle. Otherwise active formats are 1564 * initialized on the device. 1565 */ 1566static int resizer_init_formats(struct v4l2_subdev *sd, 1567 struct v4l2_subdev_fh *fh) 1568{ 1569 struct v4l2_subdev_format format; 1570 1571 memset(&format, 0, sizeof(format)); 1572 format.pad = RESZ_PAD_SINK; 1573 format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE; 1574 format.format.code = V4L2_MBUS_FMT_YUYV8_1X16; 1575 format.format.width = 4096; 1576 format.format.height = 4096; 1577 resizer_set_format(sd, fh, &format); 1578 1579 return 0; 1580} 1581 1582/* subdev video operations */ 1583static const struct v4l2_subdev_video_ops resizer_v4l2_video_ops = { 1584 .s_stream = resizer_set_stream, 1585}; 1586 1587/* subdev pad operations */ 1588static const struct v4l2_subdev_pad_ops resizer_v4l2_pad_ops = { 1589 .enum_mbus_code = resizer_enum_mbus_code, 1590 .enum_frame_size = resizer_enum_frame_size, 1591 .get_fmt = resizer_get_format, 1592 .set_fmt = resizer_set_format, 1593 .get_selection = resizer_get_selection, 1594 .set_selection = resizer_set_selection, 1595 .link_validate = resizer_link_validate, 1596}; 1597 1598/* subdev operations */ 1599static const struct v4l2_subdev_ops resizer_v4l2_ops = { 1600 .video = &resizer_v4l2_video_ops, 1601 .pad = &resizer_v4l2_pad_ops, 1602}; 1603 1604/* subdev internal operations */ 1605static const struct v4l2_subdev_internal_ops resizer_v4l2_internal_ops = { 1606 .open = resizer_init_formats, 1607}; 1608 1609/* ----------------------------------------------------------------------------- 1610 * Media entity operations 1611 */ 1612 1613/* 1614 * resizer_link_setup - Setup resizer connections. 1615 * @entity : Pointer to media entity structure 1616 * @local : Pointer to local pad array 1617 * @remote : Pointer to remote pad array 1618 * @flags : Link flags 1619 * return -EINVAL or zero on success 1620 */ 1621static int resizer_link_setup(struct media_entity *entity, 1622 const struct media_pad *local, 1623 const struct media_pad *remote, u32 flags) 1624{ 1625 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity); 1626 struct isp_res_device *res = v4l2_get_subdevdata(sd); 1627 1628 switch (local->index | media_entity_type(remote->entity)) { 1629 case RESZ_PAD_SINK | MEDIA_ENT_T_DEVNODE: 1630 /* read from memory */ 1631 if (flags & MEDIA_LNK_FL_ENABLED) { 1632 if (res->input == RESIZER_INPUT_VP) 1633 return -EBUSY; 1634 res->input = RESIZER_INPUT_MEMORY; 1635 } else { 1636 if (res->input == RESIZER_INPUT_MEMORY) 1637 res->input = RESIZER_INPUT_NONE; 1638 } 1639 break; 1640 1641 case RESZ_PAD_SINK | MEDIA_ENT_T_V4L2_SUBDEV: 1642 /* read from ccdc or previewer */ 1643 if (flags & MEDIA_LNK_FL_ENABLED) { 1644 if (res->input == RESIZER_INPUT_MEMORY) 1645 return -EBUSY; 1646 res->input = RESIZER_INPUT_VP; 1647 } else { 1648 if (res->input == RESIZER_INPUT_VP) 1649 res->input = RESIZER_INPUT_NONE; 1650 } 1651 break; 1652 1653 case RESZ_PAD_SOURCE | MEDIA_ENT_T_DEVNODE: 1654 /* resizer always write to memory */ 1655 break; 1656 1657 default: 1658 return -EINVAL; 1659 } 1660 1661 return 0; 1662} 1663 1664/* media operations */ 1665static const struct media_entity_operations resizer_media_ops = { 1666 .link_setup = resizer_link_setup, 1667 .link_validate = v4l2_subdev_link_validate, 1668}; 1669 1670void omap3isp_resizer_unregister_entities(struct isp_res_device *res) 1671{ 1672 v4l2_device_unregister_subdev(&res->subdev); 1673 omap3isp_video_unregister(&res->video_in); 1674 omap3isp_video_unregister(&res->video_out); 1675} 1676 1677int omap3isp_resizer_register_entities(struct isp_res_device *res, 1678 struct v4l2_device *vdev) 1679{ 1680 int ret; 1681 1682 /* Register the subdev and video nodes. */ 1683 ret = v4l2_device_register_subdev(vdev, &res->subdev); 1684 if (ret < 0) 1685 goto error; 1686 1687 ret = omap3isp_video_register(&res->video_in, vdev); 1688 if (ret < 0) 1689 goto error; 1690 1691 ret = omap3isp_video_register(&res->video_out, vdev); 1692 if (ret < 0) 1693 goto error; 1694 1695 return 0; 1696 1697error: 1698 omap3isp_resizer_unregister_entities(res); 1699 return ret; 1700} 1701 1702/* ----------------------------------------------------------------------------- 1703 * ISP resizer initialization and cleanup 1704 */ 1705 1706/* 1707 * resizer_init_entities - Initialize resizer subdev and media entity. 1708 * @res : Pointer to resizer device structure 1709 * return -ENOMEM or zero on success 1710 */ 1711static int resizer_init_entities(struct isp_res_device *res) 1712{ 1713 struct v4l2_subdev *sd = &res->subdev; 1714 struct media_pad *pads = res->pads; 1715 struct media_entity *me = &sd->entity; 1716 int ret; 1717 1718 res->input = RESIZER_INPUT_NONE; 1719 1720 v4l2_subdev_init(sd, &resizer_v4l2_ops); 1721 sd->internal_ops = &resizer_v4l2_internal_ops; 1722 strlcpy(sd->name, "OMAP3 ISP resizer", sizeof(sd->name)); 1723 sd->grp_id = 1 << 16; /* group ID for isp subdevs */ 1724 v4l2_set_subdevdata(sd, res); 1725 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; 1726 1727 pads[RESZ_PAD_SINK].flags = MEDIA_PAD_FL_SINK 1728 | MEDIA_PAD_FL_MUST_CONNECT; 1729 pads[RESZ_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE; 1730 1731 me->ops = &resizer_media_ops; 1732 ret = media_entity_init(me, RESZ_PADS_NUM, pads, 0); 1733 if (ret < 0) 1734 return ret; 1735 1736 resizer_init_formats(sd, NULL); 1737 1738 res->video_in.type = V4L2_BUF_TYPE_VIDEO_OUTPUT; 1739 res->video_in.ops = &resizer_video_ops; 1740 res->video_in.isp = to_isp_device(res); 1741 res->video_in.capture_mem = PAGE_ALIGN(4096 * 4096) * 2 * 3; 1742 res->video_in.bpl_alignment = 32; 1743 res->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 1744 res->video_out.ops = &resizer_video_ops; 1745 res->video_out.isp = to_isp_device(res); 1746 res->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 2 * 3; 1747 res->video_out.bpl_alignment = 32; 1748 1749 ret = omap3isp_video_init(&res->video_in, "resizer"); 1750 if (ret < 0) 1751 goto error_video_in; 1752 1753 ret = omap3isp_video_init(&res->video_out, "resizer"); 1754 if (ret < 0) 1755 goto error_video_out; 1756 1757 res->video_out.video.entity.flags |= MEDIA_ENT_FL_DEFAULT; 1758 1759 /* Connect the video nodes to the resizer subdev. */ 1760 ret = media_entity_create_link(&res->video_in.video.entity, 0, 1761 &res->subdev.entity, RESZ_PAD_SINK, 0); 1762 if (ret < 0) 1763 goto error_link; 1764 1765 ret = media_entity_create_link(&res->subdev.entity, RESZ_PAD_SOURCE, 1766 &res->video_out.video.entity, 0, 0); 1767 if (ret < 0) 1768 goto error_link; 1769 1770 return 0; 1771 1772error_link: 1773 omap3isp_video_cleanup(&res->video_out); 1774error_video_out: 1775 omap3isp_video_cleanup(&res->video_in); 1776error_video_in: 1777 media_entity_cleanup(&res->subdev.entity); 1778 return ret; 1779} 1780 1781/* 1782 * isp_resizer_init - Resizer initialization. 1783 * @isp : Pointer to ISP device 1784 * return -ENOMEM or zero on success 1785 */ 1786int omap3isp_resizer_init(struct isp_device *isp) 1787{ 1788 struct isp_res_device *res = &isp->isp_res; 1789 1790 init_waitqueue_head(&res->wait); 1791 atomic_set(&res->stopping, 0); 1792 spin_lock_init(&res->lock); 1793 1794 return resizer_init_entities(res); 1795} 1796 1797void omap3isp_resizer_cleanup(struct isp_device *isp) 1798{ 1799 struct isp_res_device *res = &isp->isp_res; 1800 1801 omap3isp_video_cleanup(&res->video_in); 1802 omap3isp_video_cleanup(&res->video_out); 1803 media_entity_cleanup(&res->subdev.entity); 1804} 1805