1/* 2 * Copyright (C) ST-Ericsson SA 2010 3 * 4 * License Terms: GNU General Public License v2 5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> 6 * Author: Rabin Vincent <rabin.vincent@stericsson.com> 7 * Author: Mattias Wallin <mattias.wallin@stericsson.com> 8 */ 9 10#include <linux/kernel.h> 11#include <linux/slab.h> 12#include <linux/init.h> 13#include <linux/irq.h> 14#include <linux/irqdomain.h> 15#include <linux/delay.h> 16#include <linux/interrupt.h> 17#include <linux/module.h> 18#include <linux/platform_device.h> 19#include <linux/mfd/core.h> 20#include <linux/mfd/abx500.h> 21#include <linux/mfd/abx500/ab8500.h> 22#include <linux/mfd/abx500/ab8500-bm.h> 23#include <linux/mfd/dbx500-prcmu.h> 24#include <linux/regulator/ab8500.h> 25#include <linux/of.h> 26#include <linux/of_device.h> 27 28/* 29 * Interrupt register offsets 30 * Bank : 0x0E 31 */ 32#define AB8500_IT_SOURCE1_REG 0x00 33#define AB8500_IT_SOURCE2_REG 0x01 34#define AB8500_IT_SOURCE3_REG 0x02 35#define AB8500_IT_SOURCE4_REG 0x03 36#define AB8500_IT_SOURCE5_REG 0x04 37#define AB8500_IT_SOURCE6_REG 0x05 38#define AB8500_IT_SOURCE7_REG 0x06 39#define AB8500_IT_SOURCE8_REG 0x07 40#define AB9540_IT_SOURCE13_REG 0x0C 41#define AB8500_IT_SOURCE19_REG 0x12 42#define AB8500_IT_SOURCE20_REG 0x13 43#define AB8500_IT_SOURCE21_REG 0x14 44#define AB8500_IT_SOURCE22_REG 0x15 45#define AB8500_IT_SOURCE23_REG 0x16 46#define AB8500_IT_SOURCE24_REG 0x17 47 48/* 49 * latch registers 50 */ 51#define AB8500_IT_LATCH1_REG 0x20 52#define AB8500_IT_LATCH2_REG 0x21 53#define AB8500_IT_LATCH3_REG 0x22 54#define AB8500_IT_LATCH4_REG 0x23 55#define AB8500_IT_LATCH5_REG 0x24 56#define AB8500_IT_LATCH6_REG 0x25 57#define AB8500_IT_LATCH7_REG 0x26 58#define AB8500_IT_LATCH8_REG 0x27 59#define AB8500_IT_LATCH9_REG 0x28 60#define AB8500_IT_LATCH10_REG 0x29 61#define AB8500_IT_LATCH12_REG 0x2B 62#define AB9540_IT_LATCH13_REG 0x2C 63#define AB8500_IT_LATCH19_REG 0x32 64#define AB8500_IT_LATCH20_REG 0x33 65#define AB8500_IT_LATCH21_REG 0x34 66#define AB8500_IT_LATCH22_REG 0x35 67#define AB8500_IT_LATCH23_REG 0x36 68#define AB8500_IT_LATCH24_REG 0x37 69 70/* 71 * mask registers 72 */ 73 74#define AB8500_IT_MASK1_REG 0x40 75#define AB8500_IT_MASK2_REG 0x41 76#define AB8500_IT_MASK3_REG 0x42 77#define AB8500_IT_MASK4_REG 0x43 78#define AB8500_IT_MASK5_REG 0x44 79#define AB8500_IT_MASK6_REG 0x45 80#define AB8500_IT_MASK7_REG 0x46 81#define AB8500_IT_MASK8_REG 0x47 82#define AB8500_IT_MASK9_REG 0x48 83#define AB8500_IT_MASK10_REG 0x49 84#define AB8500_IT_MASK11_REG 0x4A 85#define AB8500_IT_MASK12_REG 0x4B 86#define AB8500_IT_MASK13_REG 0x4C 87#define AB8500_IT_MASK14_REG 0x4D 88#define AB8500_IT_MASK15_REG 0x4E 89#define AB8500_IT_MASK16_REG 0x4F 90#define AB8500_IT_MASK17_REG 0x50 91#define AB8500_IT_MASK18_REG 0x51 92#define AB8500_IT_MASK19_REG 0x52 93#define AB8500_IT_MASK20_REG 0x53 94#define AB8500_IT_MASK21_REG 0x54 95#define AB8500_IT_MASK22_REG 0x55 96#define AB8500_IT_MASK23_REG 0x56 97#define AB8500_IT_MASK24_REG 0x57 98#define AB8500_IT_MASK25_REG 0x58 99 100/* 101 * latch hierarchy registers 102 */ 103#define AB8500_IT_LATCHHIER1_REG 0x60 104#define AB8500_IT_LATCHHIER2_REG 0x61 105#define AB8500_IT_LATCHHIER3_REG 0x62 106#define AB8540_IT_LATCHHIER4_REG 0x63 107 108#define AB8500_IT_LATCHHIER_NUM 3 109#define AB8540_IT_LATCHHIER_NUM 4 110 111#define AB8500_REV_REG 0x80 112#define AB8500_IC_NAME_REG 0x82 113#define AB8500_SWITCH_OFF_STATUS 0x00 114 115#define AB8500_TURN_ON_STATUS 0x00 116#define AB8505_TURN_ON_STATUS_2 0x04 117 118#define AB8500_CH_USBCH_STAT1_REG 0x02 119#define VBUS_DET_DBNC100 0x02 120#define VBUS_DET_DBNC1 0x01 121 122static DEFINE_SPINLOCK(on_stat_lock); 123static u8 turn_on_stat_mask = 0xFF; 124static u8 turn_on_stat_set; 125static bool no_bm; /* No battery management */ 126module_param(no_bm, bool, S_IRUGO); 127 128#define AB9540_MODEM_CTRL2_REG 0x23 129#define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2) 130 131/* 132 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt 133 * numbers are indexed into this array with (num / 8). The interupts are 134 * defined in linux/mfd/ab8500.h 135 * 136 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at 137 * offset 0. 138 */ 139/* AB8500 support */ 140static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = { 141 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 142}; 143 144/* AB9540 / AB8505 support */ 145static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = { 146 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22, 23 147}; 148 149/* AB8540 support */ 150static const int ab8540_irq_regoffset[AB8540_NUM_IRQ_REGS] = { 151 0, 1, 2, 3, 4, -1, -1, -1, -1, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22, 152 23, 25, 26, 27, 28, 29, 30, 31, 153}; 154 155static const char ab8500_version_str[][7] = { 156 [AB8500_VERSION_AB8500] = "AB8500", 157 [AB8500_VERSION_AB8505] = "AB8505", 158 [AB8500_VERSION_AB9540] = "AB9540", 159 [AB8500_VERSION_AB8540] = "AB8540", 160}; 161 162static int ab8500_prcmu_write(struct ab8500 *ab8500, u16 addr, u8 data) 163{ 164 int ret; 165 166 ret = prcmu_abb_write((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1); 167 if (ret < 0) 168 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); 169 return ret; 170} 171 172static int ab8500_prcmu_write_masked(struct ab8500 *ab8500, u16 addr, u8 mask, 173 u8 data) 174{ 175 int ret; 176 177 ret = prcmu_abb_write_masked((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 178 &mask, 1); 179 if (ret < 0) 180 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); 181 return ret; 182} 183 184static int ab8500_prcmu_read(struct ab8500 *ab8500, u16 addr) 185{ 186 int ret; 187 u8 data; 188 189 ret = prcmu_abb_read((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1); 190 if (ret < 0) { 191 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); 192 return ret; 193 } 194 return (int)data; 195} 196 197static int ab8500_get_chip_id(struct device *dev) 198{ 199 struct ab8500 *ab8500; 200 201 if (!dev) 202 return -EINVAL; 203 ab8500 = dev_get_drvdata(dev->parent); 204 return ab8500 ? (int)ab8500->chip_id : -EINVAL; 205} 206 207static int set_register_interruptible(struct ab8500 *ab8500, u8 bank, 208 u8 reg, u8 data) 209{ 210 int ret; 211 /* 212 * Put the u8 bank and u8 register together into a an u16. 213 * The bank on higher 8 bits and register in lower 8 bits. 214 * */ 215 u16 addr = ((u16)bank) << 8 | reg; 216 217 dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data); 218 219 mutex_lock(&ab8500->lock); 220 221 ret = ab8500->write(ab8500, addr, data); 222 if (ret < 0) 223 dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 224 addr, ret); 225 mutex_unlock(&ab8500->lock); 226 227 return ret; 228} 229 230static int ab8500_set_register(struct device *dev, u8 bank, 231 u8 reg, u8 value) 232{ 233 int ret; 234 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 235 236 atomic_inc(&ab8500->transfer_ongoing); 237 ret = set_register_interruptible(ab8500, bank, reg, value); 238 atomic_dec(&ab8500->transfer_ongoing); 239 return ret; 240} 241 242static int get_register_interruptible(struct ab8500 *ab8500, u8 bank, 243 u8 reg, u8 *value) 244{ 245 int ret; 246 /* put the u8 bank and u8 reg together into a an u16. 247 * bank on higher 8 bits and reg in lower */ 248 u16 addr = ((u16)bank) << 8 | reg; 249 250 mutex_lock(&ab8500->lock); 251 252 ret = ab8500->read(ab8500, addr); 253 if (ret < 0) 254 dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 255 addr, ret); 256 else 257 *value = ret; 258 259 mutex_unlock(&ab8500->lock); 260 dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret); 261 262 return ret; 263} 264 265static int ab8500_get_register(struct device *dev, u8 bank, 266 u8 reg, u8 *value) 267{ 268 int ret; 269 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 270 271 atomic_inc(&ab8500->transfer_ongoing); 272 ret = get_register_interruptible(ab8500, bank, reg, value); 273 atomic_dec(&ab8500->transfer_ongoing); 274 return ret; 275} 276 277static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank, 278 u8 reg, u8 bitmask, u8 bitvalues) 279{ 280 int ret; 281 /* put the u8 bank and u8 reg together into a an u16. 282 * bank on higher 8 bits and reg in lower */ 283 u16 addr = ((u16)bank) << 8 | reg; 284 285 mutex_lock(&ab8500->lock); 286 287 if (ab8500->write_masked == NULL) { 288 u8 data; 289 290 ret = ab8500->read(ab8500, addr); 291 if (ret < 0) { 292 dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 293 addr, ret); 294 goto out; 295 } 296 297 data = (u8)ret; 298 data = (~bitmask & data) | (bitmask & bitvalues); 299 300 ret = ab8500->write(ab8500, addr, data); 301 if (ret < 0) 302 dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 303 addr, ret); 304 305 dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, 306 data); 307 goto out; 308 } 309 ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues); 310 if (ret < 0) 311 dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr, 312 ret); 313out: 314 mutex_unlock(&ab8500->lock); 315 return ret; 316} 317 318static int ab8500_mask_and_set_register(struct device *dev, 319 u8 bank, u8 reg, u8 bitmask, u8 bitvalues) 320{ 321 int ret; 322 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 323 324 atomic_inc(&ab8500->transfer_ongoing); 325 ret = mask_and_set_register_interruptible(ab8500, bank, reg, 326 bitmask, bitvalues); 327 atomic_dec(&ab8500->transfer_ongoing); 328 return ret; 329} 330 331static struct abx500_ops ab8500_ops = { 332 .get_chip_id = ab8500_get_chip_id, 333 .get_register = ab8500_get_register, 334 .set_register = ab8500_set_register, 335 .get_register_page = NULL, 336 .set_register_page = NULL, 337 .mask_and_set_register = ab8500_mask_and_set_register, 338 .event_registers_startup_state_get = NULL, 339 .startup_irq_enabled = NULL, 340 .dump_all_banks = ab8500_dump_all_banks, 341}; 342 343static void ab8500_irq_lock(struct irq_data *data) 344{ 345 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 346 347 mutex_lock(&ab8500->irq_lock); 348 atomic_inc(&ab8500->transfer_ongoing); 349} 350 351static void ab8500_irq_sync_unlock(struct irq_data *data) 352{ 353 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 354 int i; 355 356 for (i = 0; i < ab8500->mask_size; i++) { 357 u8 old = ab8500->oldmask[i]; 358 u8 new = ab8500->mask[i]; 359 int reg; 360 361 if (new == old) 362 continue; 363 364 /* 365 * Interrupt register 12 doesn't exist prior to AB8500 version 366 * 2.0 367 */ 368 if (ab8500->irq_reg_offset[i] == 11 && 369 is_ab8500_1p1_or_earlier(ab8500)) 370 continue; 371 372 if (ab8500->irq_reg_offset[i] < 0) 373 continue; 374 375 ab8500->oldmask[i] = new; 376 377 reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i]; 378 set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new); 379 } 380 atomic_dec(&ab8500->transfer_ongoing); 381 mutex_unlock(&ab8500->irq_lock); 382} 383 384static void ab8500_irq_mask(struct irq_data *data) 385{ 386 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 387 int offset = data->hwirq; 388 int index = offset / 8; 389 int mask = 1 << (offset % 8); 390 391 ab8500->mask[index] |= mask; 392 393 /* The AB8500 GPIOs have two interrupts each (rising & falling). */ 394 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R) 395 ab8500->mask[index + 2] |= mask; 396 if (offset >= AB9540_INT_GPIO50R && offset <= AB9540_INT_GPIO54R) 397 ab8500->mask[index + 1] |= mask; 398 if (offset == AB8540_INT_GPIO43R || offset == AB8540_INT_GPIO44R) 399 /* Here the falling IRQ is one bit lower */ 400 ab8500->mask[index] |= (mask << 1); 401} 402 403static void ab8500_irq_unmask(struct irq_data *data) 404{ 405 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 406 unsigned int type = irqd_get_trigger_type(data); 407 int offset = data->hwirq; 408 int index = offset / 8; 409 int mask = 1 << (offset % 8); 410 411 if (type & IRQ_TYPE_EDGE_RISING) 412 ab8500->mask[index] &= ~mask; 413 414 /* The AB8500 GPIOs have two interrupts each (rising & falling). */ 415 if (type & IRQ_TYPE_EDGE_FALLING) { 416 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R) 417 ab8500->mask[index + 2] &= ~mask; 418 else if (offset >= AB9540_INT_GPIO50R && 419 offset <= AB9540_INT_GPIO54R) 420 ab8500->mask[index + 1] &= ~mask; 421 else if (offset == AB8540_INT_GPIO43R || 422 offset == AB8540_INT_GPIO44R) 423 /* Here the falling IRQ is one bit lower */ 424 ab8500->mask[index] &= ~(mask << 1); 425 else 426 ab8500->mask[index] &= ~mask; 427 } else { 428 /* Satisfies the case where type is not set. */ 429 ab8500->mask[index] &= ~mask; 430 } 431} 432 433static int ab8500_irq_set_type(struct irq_data *data, unsigned int type) 434{ 435 return 0; 436} 437 438static struct irq_chip ab8500_irq_chip = { 439 .name = "ab8500", 440 .irq_bus_lock = ab8500_irq_lock, 441 .irq_bus_sync_unlock = ab8500_irq_sync_unlock, 442 .irq_mask = ab8500_irq_mask, 443 .irq_disable = ab8500_irq_mask, 444 .irq_unmask = ab8500_irq_unmask, 445 .irq_set_type = ab8500_irq_set_type, 446}; 447 448static void update_latch_offset(u8 *offset, int i) 449{ 450 /* Fix inconsistent ITFromLatch25 bit mapping... */ 451 if (unlikely(*offset == 17)) 452 *offset = 24; 453 /* Fix inconsistent ab8540 bit mapping... */ 454 if (unlikely(*offset == 16)) 455 *offset = 25; 456 if ((i == 3) && (*offset >= 24)) 457 *offset += 2; 458} 459 460static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500, 461 int latch_offset, u8 latch_val) 462{ 463 int int_bit, line, i; 464 465 for (i = 0; i < ab8500->mask_size; i++) 466 if (ab8500->irq_reg_offset[i] == latch_offset) 467 break; 468 469 if (i >= ab8500->mask_size) { 470 dev_err(ab8500->dev, "Register offset 0x%2x not declared\n", 471 latch_offset); 472 return -ENXIO; 473 } 474 475 /* ignore masked out interrupts */ 476 latch_val &= ~ab8500->mask[i]; 477 478 while (latch_val) { 479 int_bit = __ffs(latch_val); 480 line = (i << 3) + int_bit; 481 latch_val &= ~(1 << int_bit); 482 483 /* 484 * This handles the falling edge hwirqs from the GPIO 485 * lines. Route them back to the line registered for the 486 * rising IRQ, as this is merely a flag for the same IRQ 487 * in linux terms. 488 */ 489 if (line >= AB8500_INT_GPIO6F && line <= AB8500_INT_GPIO41F) 490 line -= 16; 491 if (line >= AB9540_INT_GPIO50F && line <= AB9540_INT_GPIO54F) 492 line -= 8; 493 if (line == AB8540_INT_GPIO43F || line == AB8540_INT_GPIO44F) 494 line += 1; 495 496 handle_nested_irq(irq_create_mapping(ab8500->domain, line)); 497 } 498 499 return 0; 500} 501 502static int ab8500_handle_hierarchical_latch(struct ab8500 *ab8500, 503 int hier_offset, u8 hier_val) 504{ 505 int latch_bit, status; 506 u8 latch_offset, latch_val; 507 508 do { 509 latch_bit = __ffs(hier_val); 510 latch_offset = (hier_offset << 3) + latch_bit; 511 512 update_latch_offset(&latch_offset, hier_offset); 513 514 status = get_register_interruptible(ab8500, 515 AB8500_INTERRUPT, 516 AB8500_IT_LATCH1_REG + latch_offset, 517 &latch_val); 518 if (status < 0 || latch_val == 0) 519 goto discard; 520 521 status = ab8500_handle_hierarchical_line(ab8500, 522 latch_offset, latch_val); 523 if (status < 0) 524 return status; 525discard: 526 hier_val &= ~(1 << latch_bit); 527 } while (hier_val); 528 529 return 0; 530} 531 532static irqreturn_t ab8500_hierarchical_irq(int irq, void *dev) 533{ 534 struct ab8500 *ab8500 = dev; 535 u8 i; 536 537 dev_vdbg(ab8500->dev, "interrupt\n"); 538 539 /* Hierarchical interrupt version */ 540 for (i = 0; i < (ab8500->it_latchhier_num); i++) { 541 int status; 542 u8 hier_val; 543 544 status = get_register_interruptible(ab8500, AB8500_INTERRUPT, 545 AB8500_IT_LATCHHIER1_REG + i, &hier_val); 546 if (status < 0 || hier_val == 0) 547 continue; 548 549 status = ab8500_handle_hierarchical_latch(ab8500, i, hier_val); 550 if (status < 0) 551 break; 552 } 553 return IRQ_HANDLED; 554} 555 556static int ab8500_irq_map(struct irq_domain *d, unsigned int virq, 557 irq_hw_number_t hwirq) 558{ 559 struct ab8500 *ab8500 = d->host_data; 560 561 if (!ab8500) 562 return -EINVAL; 563 564 irq_set_chip_data(virq, ab8500); 565 irq_set_chip_and_handler(virq, &ab8500_irq_chip, 566 handle_simple_irq); 567 irq_set_nested_thread(virq, 1); 568#ifdef CONFIG_ARM 569 set_irq_flags(virq, IRQF_VALID); 570#else 571 irq_set_noprobe(virq); 572#endif 573 574 return 0; 575} 576 577static struct irq_domain_ops ab8500_irq_ops = { 578 .map = ab8500_irq_map, 579 .xlate = irq_domain_xlate_twocell, 580}; 581 582static int ab8500_irq_init(struct ab8500 *ab8500, struct device_node *np) 583{ 584 int num_irqs; 585 586 if (is_ab8540(ab8500)) 587 num_irqs = AB8540_NR_IRQS; 588 else if (is_ab9540(ab8500)) 589 num_irqs = AB9540_NR_IRQS; 590 else if (is_ab8505(ab8500)) 591 num_irqs = AB8505_NR_IRQS; 592 else 593 num_irqs = AB8500_NR_IRQS; 594 595 /* If ->irq_base is zero this will give a linear mapping */ 596 ab8500->domain = irq_domain_add_simple(ab8500->dev->of_node, 597 num_irqs, 0, 598 &ab8500_irq_ops, ab8500); 599 600 if (!ab8500->domain) { 601 dev_err(ab8500->dev, "Failed to create irqdomain\n"); 602 return -ENOSYS; 603 } 604 605 return 0; 606} 607 608int ab8500_suspend(struct ab8500 *ab8500) 609{ 610 if (atomic_read(&ab8500->transfer_ongoing)) 611 return -EINVAL; 612 613 return 0; 614} 615 616static struct resource ab8500_gpadc_resources[] = { 617 { 618 .name = "HW_CONV_END", 619 .start = AB8500_INT_GP_HW_ADC_CONV_END, 620 .end = AB8500_INT_GP_HW_ADC_CONV_END, 621 .flags = IORESOURCE_IRQ, 622 }, 623 { 624 .name = "SW_CONV_END", 625 .start = AB8500_INT_GP_SW_ADC_CONV_END, 626 .end = AB8500_INT_GP_SW_ADC_CONV_END, 627 .flags = IORESOURCE_IRQ, 628 }, 629}; 630 631static struct resource ab8505_gpadc_resources[] = { 632 { 633 .name = "SW_CONV_END", 634 .start = AB8500_INT_GP_SW_ADC_CONV_END, 635 .end = AB8500_INT_GP_SW_ADC_CONV_END, 636 .flags = IORESOURCE_IRQ, 637 }, 638}; 639 640static struct resource ab8500_rtc_resources[] = { 641 { 642 .name = "60S", 643 .start = AB8500_INT_RTC_60S, 644 .end = AB8500_INT_RTC_60S, 645 .flags = IORESOURCE_IRQ, 646 }, 647 { 648 .name = "ALARM", 649 .start = AB8500_INT_RTC_ALARM, 650 .end = AB8500_INT_RTC_ALARM, 651 .flags = IORESOURCE_IRQ, 652 }, 653}; 654 655static struct resource ab8540_rtc_resources[] = { 656 { 657 .name = "1S", 658 .start = AB8540_INT_RTC_1S, 659 .end = AB8540_INT_RTC_1S, 660 .flags = IORESOURCE_IRQ, 661 }, 662 { 663 .name = "ALARM", 664 .start = AB8500_INT_RTC_ALARM, 665 .end = AB8500_INT_RTC_ALARM, 666 .flags = IORESOURCE_IRQ, 667 }, 668}; 669 670static struct resource ab8500_poweronkey_db_resources[] = { 671 { 672 .name = "ONKEY_DBF", 673 .start = AB8500_INT_PON_KEY1DB_F, 674 .end = AB8500_INT_PON_KEY1DB_F, 675 .flags = IORESOURCE_IRQ, 676 }, 677 { 678 .name = "ONKEY_DBR", 679 .start = AB8500_INT_PON_KEY1DB_R, 680 .end = AB8500_INT_PON_KEY1DB_R, 681 .flags = IORESOURCE_IRQ, 682 }, 683}; 684 685static struct resource ab8500_av_acc_detect_resources[] = { 686 { 687 .name = "ACC_DETECT_1DB_F", 688 .start = AB8500_INT_ACC_DETECT_1DB_F, 689 .end = AB8500_INT_ACC_DETECT_1DB_F, 690 .flags = IORESOURCE_IRQ, 691 }, 692 { 693 .name = "ACC_DETECT_1DB_R", 694 .start = AB8500_INT_ACC_DETECT_1DB_R, 695 .end = AB8500_INT_ACC_DETECT_1DB_R, 696 .flags = IORESOURCE_IRQ, 697 }, 698 { 699 .name = "ACC_DETECT_21DB_F", 700 .start = AB8500_INT_ACC_DETECT_21DB_F, 701 .end = AB8500_INT_ACC_DETECT_21DB_F, 702 .flags = IORESOURCE_IRQ, 703 }, 704 { 705 .name = "ACC_DETECT_21DB_R", 706 .start = AB8500_INT_ACC_DETECT_21DB_R, 707 .end = AB8500_INT_ACC_DETECT_21DB_R, 708 .flags = IORESOURCE_IRQ, 709 }, 710 { 711 .name = "ACC_DETECT_22DB_F", 712 .start = AB8500_INT_ACC_DETECT_22DB_F, 713 .end = AB8500_INT_ACC_DETECT_22DB_F, 714 .flags = IORESOURCE_IRQ, 715 }, 716 { 717 .name = "ACC_DETECT_22DB_R", 718 .start = AB8500_INT_ACC_DETECT_22DB_R, 719 .end = AB8500_INT_ACC_DETECT_22DB_R, 720 .flags = IORESOURCE_IRQ, 721 }, 722}; 723 724static struct resource ab8500_charger_resources[] = { 725 { 726 .name = "MAIN_CH_UNPLUG_DET", 727 .start = AB8500_INT_MAIN_CH_UNPLUG_DET, 728 .end = AB8500_INT_MAIN_CH_UNPLUG_DET, 729 .flags = IORESOURCE_IRQ, 730 }, 731 { 732 .name = "MAIN_CHARGE_PLUG_DET", 733 .start = AB8500_INT_MAIN_CH_PLUG_DET, 734 .end = AB8500_INT_MAIN_CH_PLUG_DET, 735 .flags = IORESOURCE_IRQ, 736 }, 737 { 738 .name = "VBUS_DET_R", 739 .start = AB8500_INT_VBUS_DET_R, 740 .end = AB8500_INT_VBUS_DET_R, 741 .flags = IORESOURCE_IRQ, 742 }, 743 { 744 .name = "VBUS_DET_F", 745 .start = AB8500_INT_VBUS_DET_F, 746 .end = AB8500_INT_VBUS_DET_F, 747 .flags = IORESOURCE_IRQ, 748 }, 749 { 750 .name = "USB_LINK_STATUS", 751 .start = AB8500_INT_USB_LINK_STATUS, 752 .end = AB8500_INT_USB_LINK_STATUS, 753 .flags = IORESOURCE_IRQ, 754 }, 755 { 756 .name = "VBUS_OVV", 757 .start = AB8500_INT_VBUS_OVV, 758 .end = AB8500_INT_VBUS_OVV, 759 .flags = IORESOURCE_IRQ, 760 }, 761 { 762 .name = "USB_CH_TH_PROT_R", 763 .start = AB8500_INT_USB_CH_TH_PROT_R, 764 .end = AB8500_INT_USB_CH_TH_PROT_R, 765 .flags = IORESOURCE_IRQ, 766 }, 767 { 768 .name = "USB_CH_TH_PROT_F", 769 .start = AB8500_INT_USB_CH_TH_PROT_F, 770 .end = AB8500_INT_USB_CH_TH_PROT_F, 771 .flags = IORESOURCE_IRQ, 772 }, 773 { 774 .name = "MAIN_EXT_CH_NOT_OK", 775 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, 776 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, 777 .flags = IORESOURCE_IRQ, 778 }, 779 { 780 .name = "MAIN_CH_TH_PROT_R", 781 .start = AB8500_INT_MAIN_CH_TH_PROT_R, 782 .end = AB8500_INT_MAIN_CH_TH_PROT_R, 783 .flags = IORESOURCE_IRQ, 784 }, 785 { 786 .name = "MAIN_CH_TH_PROT_F", 787 .start = AB8500_INT_MAIN_CH_TH_PROT_F, 788 .end = AB8500_INT_MAIN_CH_TH_PROT_F, 789 .flags = IORESOURCE_IRQ, 790 }, 791 { 792 .name = "USB_CHARGER_NOT_OKR", 793 .start = AB8500_INT_USB_CHARGER_NOT_OKR, 794 .end = AB8500_INT_USB_CHARGER_NOT_OKR, 795 .flags = IORESOURCE_IRQ, 796 }, 797 { 798 .name = "CH_WD_EXP", 799 .start = AB8500_INT_CH_WD_EXP, 800 .end = AB8500_INT_CH_WD_EXP, 801 .flags = IORESOURCE_IRQ, 802 }, 803 { 804 .name = "VBUS_CH_DROP_END", 805 .start = AB8500_INT_VBUS_CH_DROP_END, 806 .end = AB8500_INT_VBUS_CH_DROP_END, 807 .flags = IORESOURCE_IRQ, 808 }, 809}; 810 811static struct resource ab8500_btemp_resources[] = { 812 { 813 .name = "BAT_CTRL_INDB", 814 .start = AB8500_INT_BAT_CTRL_INDB, 815 .end = AB8500_INT_BAT_CTRL_INDB, 816 .flags = IORESOURCE_IRQ, 817 }, 818 { 819 .name = "BTEMP_LOW", 820 .start = AB8500_INT_BTEMP_LOW, 821 .end = AB8500_INT_BTEMP_LOW, 822 .flags = IORESOURCE_IRQ, 823 }, 824 { 825 .name = "BTEMP_HIGH", 826 .start = AB8500_INT_BTEMP_HIGH, 827 .end = AB8500_INT_BTEMP_HIGH, 828 .flags = IORESOURCE_IRQ, 829 }, 830 { 831 .name = "BTEMP_LOW_MEDIUM", 832 .start = AB8500_INT_BTEMP_LOW_MEDIUM, 833 .end = AB8500_INT_BTEMP_LOW_MEDIUM, 834 .flags = IORESOURCE_IRQ, 835 }, 836 { 837 .name = "BTEMP_MEDIUM_HIGH", 838 .start = AB8500_INT_BTEMP_MEDIUM_HIGH, 839 .end = AB8500_INT_BTEMP_MEDIUM_HIGH, 840 .flags = IORESOURCE_IRQ, 841 }, 842}; 843 844static struct resource ab8500_fg_resources[] = { 845 { 846 .name = "NCONV_ACCU", 847 .start = AB8500_INT_CCN_CONV_ACC, 848 .end = AB8500_INT_CCN_CONV_ACC, 849 .flags = IORESOURCE_IRQ, 850 }, 851 { 852 .name = "BATT_OVV", 853 .start = AB8500_INT_BATT_OVV, 854 .end = AB8500_INT_BATT_OVV, 855 .flags = IORESOURCE_IRQ, 856 }, 857 { 858 .name = "LOW_BAT_F", 859 .start = AB8500_INT_LOW_BAT_F, 860 .end = AB8500_INT_LOW_BAT_F, 861 .flags = IORESOURCE_IRQ, 862 }, 863 { 864 .name = "LOW_BAT_R", 865 .start = AB8500_INT_LOW_BAT_R, 866 .end = AB8500_INT_LOW_BAT_R, 867 .flags = IORESOURCE_IRQ, 868 }, 869 { 870 .name = "CC_INT_CALIB", 871 .start = AB8500_INT_CC_INT_CALIB, 872 .end = AB8500_INT_CC_INT_CALIB, 873 .flags = IORESOURCE_IRQ, 874 }, 875 { 876 .name = "CCEOC", 877 .start = AB8500_INT_CCEOC, 878 .end = AB8500_INT_CCEOC, 879 .flags = IORESOURCE_IRQ, 880 }, 881}; 882 883static struct resource ab8500_chargalg_resources[] = {}; 884 885#ifdef CONFIG_DEBUG_FS 886static struct resource ab8500_debug_resources[] = { 887 { 888 .name = "IRQ_AB8500", 889 /* 890 * Number will be filled in. NOTE: this is deliberately 891 * not flagged as an IRQ in ordet to avoid remapping using 892 * the irqdomain in the MFD core, so that this IRQ passes 893 * unremapped to the debug code. 894 */ 895 }, 896 { 897 .name = "IRQ_FIRST", 898 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, 899 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, 900 .flags = IORESOURCE_IRQ, 901 }, 902 { 903 .name = "IRQ_LAST", 904 .start = AB8500_INT_XTAL32K_KO, 905 .end = AB8500_INT_XTAL32K_KO, 906 .flags = IORESOURCE_IRQ, 907 }, 908}; 909#endif 910 911static struct resource ab8500_usb_resources[] = { 912 { 913 .name = "ID_WAKEUP_R", 914 .start = AB8500_INT_ID_WAKEUP_R, 915 .end = AB8500_INT_ID_WAKEUP_R, 916 .flags = IORESOURCE_IRQ, 917 }, 918 { 919 .name = "ID_WAKEUP_F", 920 .start = AB8500_INT_ID_WAKEUP_F, 921 .end = AB8500_INT_ID_WAKEUP_F, 922 .flags = IORESOURCE_IRQ, 923 }, 924 { 925 .name = "VBUS_DET_F", 926 .start = AB8500_INT_VBUS_DET_F, 927 .end = AB8500_INT_VBUS_DET_F, 928 .flags = IORESOURCE_IRQ, 929 }, 930 { 931 .name = "VBUS_DET_R", 932 .start = AB8500_INT_VBUS_DET_R, 933 .end = AB8500_INT_VBUS_DET_R, 934 .flags = IORESOURCE_IRQ, 935 }, 936 { 937 .name = "USB_LINK_STATUS", 938 .start = AB8500_INT_USB_LINK_STATUS, 939 .end = AB8500_INT_USB_LINK_STATUS, 940 .flags = IORESOURCE_IRQ, 941 }, 942 { 943 .name = "USB_ADP_PROBE_PLUG", 944 .start = AB8500_INT_ADP_PROBE_PLUG, 945 .end = AB8500_INT_ADP_PROBE_PLUG, 946 .flags = IORESOURCE_IRQ, 947 }, 948 { 949 .name = "USB_ADP_PROBE_UNPLUG", 950 .start = AB8500_INT_ADP_PROBE_UNPLUG, 951 .end = AB8500_INT_ADP_PROBE_UNPLUG, 952 .flags = IORESOURCE_IRQ, 953 }, 954}; 955 956static struct resource ab8505_iddet_resources[] = { 957 { 958 .name = "KeyDeglitch", 959 .start = AB8505_INT_KEYDEGLITCH, 960 .end = AB8505_INT_KEYDEGLITCH, 961 .flags = IORESOURCE_IRQ, 962 }, 963 { 964 .name = "KP", 965 .start = AB8505_INT_KP, 966 .end = AB8505_INT_KP, 967 .flags = IORESOURCE_IRQ, 968 }, 969 { 970 .name = "IKP", 971 .start = AB8505_INT_IKP, 972 .end = AB8505_INT_IKP, 973 .flags = IORESOURCE_IRQ, 974 }, 975 { 976 .name = "IKR", 977 .start = AB8505_INT_IKR, 978 .end = AB8505_INT_IKR, 979 .flags = IORESOURCE_IRQ, 980 }, 981 { 982 .name = "KeyStuck", 983 .start = AB8505_INT_KEYSTUCK, 984 .end = AB8505_INT_KEYSTUCK, 985 .flags = IORESOURCE_IRQ, 986 }, 987 { 988 .name = "VBUS_DET_R", 989 .start = AB8500_INT_VBUS_DET_R, 990 .end = AB8500_INT_VBUS_DET_R, 991 .flags = IORESOURCE_IRQ, 992 }, 993 { 994 .name = "VBUS_DET_F", 995 .start = AB8500_INT_VBUS_DET_F, 996 .end = AB8500_INT_VBUS_DET_F, 997 .flags = IORESOURCE_IRQ, 998 }, 999 { 1000 .name = "ID_DET_PLUGR", 1001 .start = AB8500_INT_ID_DET_PLUGR, 1002 .end = AB8500_INT_ID_DET_PLUGR, 1003 .flags = IORESOURCE_IRQ, 1004 }, 1005 { 1006 .name = "ID_DET_PLUGF", 1007 .start = AB8500_INT_ID_DET_PLUGF, 1008 .end = AB8500_INT_ID_DET_PLUGF, 1009 .flags = IORESOURCE_IRQ, 1010 }, 1011}; 1012 1013static struct resource ab8500_temp_resources[] = { 1014 { 1015 .name = "ABX500_TEMP_WARM", 1016 .start = AB8500_INT_TEMP_WARM, 1017 .end = AB8500_INT_TEMP_WARM, 1018 .flags = IORESOURCE_IRQ, 1019 }, 1020}; 1021 1022static const struct mfd_cell ab8500_bm_devs[] = { 1023 { 1024 .name = "ab8500-charger", 1025 .of_compatible = "stericsson,ab8500-charger", 1026 .num_resources = ARRAY_SIZE(ab8500_charger_resources), 1027 .resources = ab8500_charger_resources, 1028 .platform_data = &ab8500_bm_data, 1029 .pdata_size = sizeof(ab8500_bm_data), 1030 }, 1031 { 1032 .name = "ab8500-btemp", 1033 .of_compatible = "stericsson,ab8500-btemp", 1034 .num_resources = ARRAY_SIZE(ab8500_btemp_resources), 1035 .resources = ab8500_btemp_resources, 1036 .platform_data = &ab8500_bm_data, 1037 .pdata_size = sizeof(ab8500_bm_data), 1038 }, 1039 { 1040 .name = "ab8500-fg", 1041 .of_compatible = "stericsson,ab8500-fg", 1042 .num_resources = ARRAY_SIZE(ab8500_fg_resources), 1043 .resources = ab8500_fg_resources, 1044 .platform_data = &ab8500_bm_data, 1045 .pdata_size = sizeof(ab8500_bm_data), 1046 }, 1047 { 1048 .name = "ab8500-chargalg", 1049 .of_compatible = "stericsson,ab8500-chargalg", 1050 .num_resources = ARRAY_SIZE(ab8500_chargalg_resources), 1051 .resources = ab8500_chargalg_resources, 1052 .platform_data = &ab8500_bm_data, 1053 .pdata_size = sizeof(ab8500_bm_data), 1054 }, 1055}; 1056 1057static const struct mfd_cell ab8500_devs[] = { 1058#ifdef CONFIG_DEBUG_FS 1059 { 1060 .name = "ab8500-debug", 1061 .of_compatible = "stericsson,ab8500-debug", 1062 .num_resources = ARRAY_SIZE(ab8500_debug_resources), 1063 .resources = ab8500_debug_resources, 1064 }, 1065#endif 1066 { 1067 .name = "ab8500-sysctrl", 1068 .of_compatible = "stericsson,ab8500-sysctrl", 1069 }, 1070 { 1071 .name = "ab8500-ext-regulator", 1072 .of_compatible = "stericsson,ab8500-ext-regulator", 1073 }, 1074 { 1075 .name = "ab8500-regulator", 1076 .of_compatible = "stericsson,ab8500-regulator", 1077 }, 1078 { 1079 .name = "abx500-clk", 1080 .of_compatible = "stericsson,abx500-clk", 1081 }, 1082 { 1083 .name = "ab8500-gpadc", 1084 .of_compatible = "stericsson,ab8500-gpadc", 1085 .num_resources = ARRAY_SIZE(ab8500_gpadc_resources), 1086 .resources = ab8500_gpadc_resources, 1087 }, 1088 { 1089 .name = "ab8500-rtc", 1090 .of_compatible = "stericsson,ab8500-rtc", 1091 .num_resources = ARRAY_SIZE(ab8500_rtc_resources), 1092 .resources = ab8500_rtc_resources, 1093 }, 1094 { 1095 .name = "ab8500-acc-det", 1096 .of_compatible = "stericsson,ab8500-acc-det", 1097 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources), 1098 .resources = ab8500_av_acc_detect_resources, 1099 }, 1100 { 1101 1102 .name = "ab8500-poweron-key", 1103 .of_compatible = "stericsson,ab8500-poweron-key", 1104 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources), 1105 .resources = ab8500_poweronkey_db_resources, 1106 }, 1107 { 1108 .name = "ab8500-pwm", 1109 .of_compatible = "stericsson,ab8500-pwm", 1110 .id = 1, 1111 }, 1112 { 1113 .name = "ab8500-pwm", 1114 .of_compatible = "stericsson,ab8500-pwm", 1115 .id = 2, 1116 }, 1117 { 1118 .name = "ab8500-pwm", 1119 .of_compatible = "stericsson,ab8500-pwm", 1120 .id = 3, 1121 }, 1122 { 1123 .name = "ab8500-denc", 1124 .of_compatible = "stericsson,ab8500-denc", 1125 }, 1126 { 1127 .name = "pinctrl-ab8500", 1128 .of_compatible = "stericsson,ab8500-gpio", 1129 }, 1130 { 1131 .name = "abx500-temp", 1132 .of_compatible = "stericsson,abx500-temp", 1133 .num_resources = ARRAY_SIZE(ab8500_temp_resources), 1134 .resources = ab8500_temp_resources, 1135 }, 1136 { 1137 .name = "ab8500-usb", 1138 .of_compatible = "stericsson,ab8500-usb", 1139 .num_resources = ARRAY_SIZE(ab8500_usb_resources), 1140 .resources = ab8500_usb_resources, 1141 }, 1142 { 1143 .name = "ab8500-codec", 1144 .of_compatible = "stericsson,ab8500-codec", 1145 }, 1146}; 1147 1148static const struct mfd_cell ab9540_devs[] = { 1149#ifdef CONFIG_DEBUG_FS 1150 { 1151 .name = "ab8500-debug", 1152 .num_resources = ARRAY_SIZE(ab8500_debug_resources), 1153 .resources = ab8500_debug_resources, 1154 }, 1155#endif 1156 { 1157 .name = "ab8500-sysctrl", 1158 }, 1159 { 1160 .name = "ab8500-ext-regulator", 1161 }, 1162 { 1163 .name = "ab8500-regulator", 1164 }, 1165 { 1166 .name = "abx500-clk", 1167 .of_compatible = "stericsson,abx500-clk", 1168 }, 1169 { 1170 .name = "ab8500-gpadc", 1171 .of_compatible = "stericsson,ab8500-gpadc", 1172 .num_resources = ARRAY_SIZE(ab8500_gpadc_resources), 1173 .resources = ab8500_gpadc_resources, 1174 }, 1175 { 1176 .name = "ab8500-rtc", 1177 .num_resources = ARRAY_SIZE(ab8500_rtc_resources), 1178 .resources = ab8500_rtc_resources, 1179 }, 1180 { 1181 .name = "ab8500-acc-det", 1182 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources), 1183 .resources = ab8500_av_acc_detect_resources, 1184 }, 1185 { 1186 .name = "ab8500-poweron-key", 1187 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources), 1188 .resources = ab8500_poweronkey_db_resources, 1189 }, 1190 { 1191 .name = "ab8500-pwm", 1192 .id = 1, 1193 }, 1194 { 1195 .name = "abx500-temp", 1196 .num_resources = ARRAY_SIZE(ab8500_temp_resources), 1197 .resources = ab8500_temp_resources, 1198 }, 1199 { 1200 .name = "pinctrl-ab9540", 1201 .of_compatible = "stericsson,ab9540-gpio", 1202 }, 1203 { 1204 .name = "ab9540-usb", 1205 .num_resources = ARRAY_SIZE(ab8500_usb_resources), 1206 .resources = ab8500_usb_resources, 1207 }, 1208 { 1209 .name = "ab9540-codec", 1210 }, 1211 { 1212 .name = "ab-iddet", 1213 .num_resources = ARRAY_SIZE(ab8505_iddet_resources), 1214 .resources = ab8505_iddet_resources, 1215 }, 1216}; 1217 1218/* Device list for ab8505 */ 1219static const struct mfd_cell ab8505_devs[] = { 1220#ifdef CONFIG_DEBUG_FS 1221 { 1222 .name = "ab8500-debug", 1223 .num_resources = ARRAY_SIZE(ab8500_debug_resources), 1224 .resources = ab8500_debug_resources, 1225 }, 1226#endif 1227 { 1228 .name = "ab8500-sysctrl", 1229 }, 1230 { 1231 .name = "ab8500-regulator", 1232 }, 1233 { 1234 .name = "abx500-clk", 1235 .of_compatible = "stericsson,abx500-clk", 1236 }, 1237 { 1238 .name = "ab8500-gpadc", 1239 .of_compatible = "stericsson,ab8500-gpadc", 1240 .num_resources = ARRAY_SIZE(ab8505_gpadc_resources), 1241 .resources = ab8505_gpadc_resources, 1242 }, 1243 { 1244 .name = "ab8500-rtc", 1245 .num_resources = ARRAY_SIZE(ab8500_rtc_resources), 1246 .resources = ab8500_rtc_resources, 1247 }, 1248 { 1249 .name = "ab8500-acc-det", 1250 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources), 1251 .resources = ab8500_av_acc_detect_resources, 1252 }, 1253 { 1254 .name = "ab8500-poweron-key", 1255 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources), 1256 .resources = ab8500_poweronkey_db_resources, 1257 }, 1258 { 1259 .name = "ab8500-pwm", 1260 .id = 1, 1261 }, 1262 { 1263 .name = "pinctrl-ab8505", 1264 }, 1265 { 1266 .name = "ab8500-usb", 1267 .num_resources = ARRAY_SIZE(ab8500_usb_resources), 1268 .resources = ab8500_usb_resources, 1269 }, 1270 { 1271 .name = "ab8500-codec", 1272 }, 1273 { 1274 .name = "ab-iddet", 1275 .num_resources = ARRAY_SIZE(ab8505_iddet_resources), 1276 .resources = ab8505_iddet_resources, 1277 }, 1278}; 1279 1280static const struct mfd_cell ab8540_devs[] = { 1281#ifdef CONFIG_DEBUG_FS 1282 { 1283 .name = "ab8500-debug", 1284 .num_resources = ARRAY_SIZE(ab8500_debug_resources), 1285 .resources = ab8500_debug_resources, 1286 }, 1287#endif 1288 { 1289 .name = "ab8500-sysctrl", 1290 }, 1291 { 1292 .name = "ab8500-ext-regulator", 1293 }, 1294 { 1295 .name = "ab8500-regulator", 1296 }, 1297 { 1298 .name = "abx500-clk", 1299 .of_compatible = "stericsson,abx500-clk", 1300 }, 1301 { 1302 .name = "ab8500-gpadc", 1303 .of_compatible = "stericsson,ab8500-gpadc", 1304 .num_resources = ARRAY_SIZE(ab8505_gpadc_resources), 1305 .resources = ab8505_gpadc_resources, 1306 }, 1307 { 1308 .name = "ab8500-acc-det", 1309 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources), 1310 .resources = ab8500_av_acc_detect_resources, 1311 }, 1312 { 1313 .name = "ab8500-poweron-key", 1314 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources), 1315 .resources = ab8500_poweronkey_db_resources, 1316 }, 1317 { 1318 .name = "ab8500-pwm", 1319 .id = 1, 1320 }, 1321 { 1322 .name = "abx500-temp", 1323 .num_resources = ARRAY_SIZE(ab8500_temp_resources), 1324 .resources = ab8500_temp_resources, 1325 }, 1326 { 1327 .name = "pinctrl-ab8540", 1328 }, 1329 { 1330 .name = "ab8540-usb", 1331 .num_resources = ARRAY_SIZE(ab8500_usb_resources), 1332 .resources = ab8500_usb_resources, 1333 }, 1334 { 1335 .name = "ab8540-codec", 1336 }, 1337 { 1338 .name = "ab-iddet", 1339 .num_resources = ARRAY_SIZE(ab8505_iddet_resources), 1340 .resources = ab8505_iddet_resources, 1341 }, 1342}; 1343 1344static const struct mfd_cell ab8540_cut1_devs[] = { 1345 { 1346 .name = "ab8500-rtc", 1347 .of_compatible = "stericsson,ab8500-rtc", 1348 .num_resources = ARRAY_SIZE(ab8500_rtc_resources), 1349 .resources = ab8500_rtc_resources, 1350 }, 1351}; 1352 1353static const struct mfd_cell ab8540_cut2_devs[] = { 1354 { 1355 .name = "ab8540-rtc", 1356 .of_compatible = "stericsson,ab8540-rtc", 1357 .num_resources = ARRAY_SIZE(ab8540_rtc_resources), 1358 .resources = ab8540_rtc_resources, 1359 }, 1360}; 1361 1362static ssize_t show_chip_id(struct device *dev, 1363 struct device_attribute *attr, char *buf) 1364{ 1365 struct ab8500 *ab8500; 1366 1367 ab8500 = dev_get_drvdata(dev); 1368 1369 return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL); 1370} 1371 1372/* 1373 * ab8500 has switched off due to (SWITCH_OFF_STATUS): 1374 * 0x01 Swoff bit programming 1375 * 0x02 Thermal protection activation 1376 * 0x04 Vbat lower then BattOk falling threshold 1377 * 0x08 Watchdog expired 1378 * 0x10 Non presence of 32kHz clock 1379 * 0x20 Battery level lower than power on reset threshold 1380 * 0x40 Power on key 1 pressed longer than 10 seconds 1381 * 0x80 DB8500 thermal shutdown 1382 */ 1383static ssize_t show_switch_off_status(struct device *dev, 1384 struct device_attribute *attr, char *buf) 1385{ 1386 int ret; 1387 u8 value; 1388 struct ab8500 *ab8500; 1389 1390 ab8500 = dev_get_drvdata(dev); 1391 ret = get_register_interruptible(ab8500, AB8500_RTC, 1392 AB8500_SWITCH_OFF_STATUS, &value); 1393 if (ret < 0) 1394 return ret; 1395 return sprintf(buf, "%#x\n", value); 1396} 1397 1398/* use mask and set to override the register turn_on_stat value */ 1399void ab8500_override_turn_on_stat(u8 mask, u8 set) 1400{ 1401 spin_lock(&on_stat_lock); 1402 turn_on_stat_mask = mask; 1403 turn_on_stat_set = set; 1404 spin_unlock(&on_stat_lock); 1405} 1406 1407/* 1408 * ab8500 has turned on due to (TURN_ON_STATUS): 1409 * 0x01 PORnVbat 1410 * 0x02 PonKey1dbF 1411 * 0x04 PonKey2dbF 1412 * 0x08 RTCAlarm 1413 * 0x10 MainChDet 1414 * 0x20 VbusDet 1415 * 0x40 UsbIDDetect 1416 * 0x80 Reserved 1417 */ 1418static ssize_t show_turn_on_status(struct device *dev, 1419 struct device_attribute *attr, char *buf) 1420{ 1421 int ret; 1422 u8 value; 1423 struct ab8500 *ab8500; 1424 1425 ab8500 = dev_get_drvdata(dev); 1426 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK, 1427 AB8500_TURN_ON_STATUS, &value); 1428 if (ret < 0) 1429 return ret; 1430 1431 /* 1432 * In L9540, turn_on_status register is not updated correctly if 1433 * the device is rebooted with AC/USB charger connected. Due to 1434 * this, the device boots android instead of entering into charge 1435 * only mode. Read the AC/USB status register to detect the charger 1436 * presence and update the turn on status manually. 1437 */ 1438 if (is_ab9540(ab8500)) { 1439 spin_lock(&on_stat_lock); 1440 value = (value & turn_on_stat_mask) | turn_on_stat_set; 1441 spin_unlock(&on_stat_lock); 1442 } 1443 1444 return sprintf(buf, "%#x\n", value); 1445} 1446 1447static ssize_t show_turn_on_status_2(struct device *dev, 1448 struct device_attribute *attr, char *buf) 1449{ 1450 int ret; 1451 u8 value; 1452 struct ab8500 *ab8500; 1453 1454 ab8500 = dev_get_drvdata(dev); 1455 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK, 1456 AB8505_TURN_ON_STATUS_2, &value); 1457 if (ret < 0) 1458 return ret; 1459 return sprintf(buf, "%#x\n", (value & 0x1)); 1460} 1461 1462static ssize_t show_ab9540_dbbrstn(struct device *dev, 1463 struct device_attribute *attr, char *buf) 1464{ 1465 struct ab8500 *ab8500; 1466 int ret; 1467 u8 value; 1468 1469 ab8500 = dev_get_drvdata(dev); 1470 1471 ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2, 1472 AB9540_MODEM_CTRL2_REG, &value); 1473 if (ret < 0) 1474 return ret; 1475 1476 return sprintf(buf, "%d\n", 1477 (value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0); 1478} 1479 1480static ssize_t store_ab9540_dbbrstn(struct device *dev, 1481 struct device_attribute *attr, const char *buf, size_t count) 1482{ 1483 struct ab8500 *ab8500; 1484 int ret = count; 1485 int err; 1486 u8 bitvalues; 1487 1488 ab8500 = dev_get_drvdata(dev); 1489 1490 if (count > 0) { 1491 switch (buf[0]) { 1492 case '0': 1493 bitvalues = 0; 1494 break; 1495 case '1': 1496 bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT; 1497 break; 1498 default: 1499 goto exit; 1500 } 1501 1502 err = mask_and_set_register_interruptible(ab8500, 1503 AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG, 1504 AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues); 1505 if (err) 1506 dev_info(ab8500->dev, 1507 "Failed to set DBBRSTN %c, err %#x\n", 1508 buf[0], err); 1509 } 1510 1511exit: 1512 return ret; 1513} 1514 1515static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL); 1516static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL); 1517static DEVICE_ATTR(turn_on_status, S_IRUGO, show_turn_on_status, NULL); 1518static DEVICE_ATTR(turn_on_status_2, S_IRUGO, show_turn_on_status_2, NULL); 1519static DEVICE_ATTR(dbbrstn, S_IRUGO | S_IWUSR, 1520 show_ab9540_dbbrstn, store_ab9540_dbbrstn); 1521 1522static struct attribute *ab8500_sysfs_entries[] = { 1523 &dev_attr_chip_id.attr, 1524 &dev_attr_switch_off_status.attr, 1525 &dev_attr_turn_on_status.attr, 1526 NULL, 1527}; 1528 1529static struct attribute *ab8505_sysfs_entries[] = { 1530 &dev_attr_turn_on_status_2.attr, 1531 NULL, 1532}; 1533 1534static struct attribute *ab9540_sysfs_entries[] = { 1535 &dev_attr_chip_id.attr, 1536 &dev_attr_switch_off_status.attr, 1537 &dev_attr_turn_on_status.attr, 1538 &dev_attr_dbbrstn.attr, 1539 NULL, 1540}; 1541 1542static struct attribute_group ab8500_attr_group = { 1543 .attrs = ab8500_sysfs_entries, 1544}; 1545 1546static struct attribute_group ab8505_attr_group = { 1547 .attrs = ab8505_sysfs_entries, 1548}; 1549 1550static struct attribute_group ab9540_attr_group = { 1551 .attrs = ab9540_sysfs_entries, 1552}; 1553 1554static int ab8500_probe(struct platform_device *pdev) 1555{ 1556 static const char *switch_off_status[] = { 1557 "Swoff bit programming", 1558 "Thermal protection activation", 1559 "Vbat lower then BattOk falling threshold", 1560 "Watchdog expired", 1561 "Non presence of 32kHz clock", 1562 "Battery level lower than power on reset threshold", 1563 "Power on key 1 pressed longer than 10 seconds", 1564 "DB8500 thermal shutdown"}; 1565 static const char *turn_on_status[] = { 1566 "Battery rising (Vbat)", 1567 "Power On Key 1 dbF", 1568 "Power On Key 2 dbF", 1569 "RTC Alarm", 1570 "Main Charger Detect", 1571 "Vbus Detect (USB)", 1572 "USB ID Detect", 1573 "UART Factory Mode Detect"}; 1574 struct ab8500_platform_data *plat = dev_get_platdata(&pdev->dev); 1575 const struct platform_device_id *platid = platform_get_device_id(pdev); 1576 enum ab8500_version version = AB8500_VERSION_UNDEFINED; 1577 struct device_node *np = pdev->dev.of_node; 1578 struct ab8500 *ab8500; 1579 struct resource *resource; 1580 int ret; 1581 int i; 1582 u8 value; 1583 1584 ab8500 = devm_kzalloc(&pdev->dev, sizeof(*ab8500), GFP_KERNEL); 1585 if (!ab8500) 1586 return -ENOMEM; 1587 1588 ab8500->dev = &pdev->dev; 1589 1590 resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 1591 if (!resource) { 1592 dev_err(&pdev->dev, "no IRQ resource\n"); 1593 return -ENODEV; 1594 } 1595 1596 ab8500->irq = resource->start; 1597 1598 ab8500->read = ab8500_prcmu_read; 1599 ab8500->write = ab8500_prcmu_write; 1600 ab8500->write_masked = ab8500_prcmu_write_masked; 1601 1602 mutex_init(&ab8500->lock); 1603 mutex_init(&ab8500->irq_lock); 1604 atomic_set(&ab8500->transfer_ongoing, 0); 1605 1606 platform_set_drvdata(pdev, ab8500); 1607 1608 if (platid) 1609 version = platid->driver_data; 1610 1611 if (version != AB8500_VERSION_UNDEFINED) 1612 ab8500->version = version; 1613 else { 1614 ret = get_register_interruptible(ab8500, AB8500_MISC, 1615 AB8500_IC_NAME_REG, &value); 1616 if (ret < 0) { 1617 dev_err(&pdev->dev, "could not probe HW\n"); 1618 return ret; 1619 } 1620 1621 ab8500->version = value; 1622 } 1623 1624 ret = get_register_interruptible(ab8500, AB8500_MISC, 1625 AB8500_REV_REG, &value); 1626 if (ret < 0) 1627 return ret; 1628 1629 ab8500->chip_id = value; 1630 1631 dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n", 1632 ab8500_version_str[ab8500->version], 1633 ab8500->chip_id >> 4, 1634 ab8500->chip_id & 0x0F); 1635 1636 /* Configure AB8540 */ 1637 if (is_ab8540(ab8500)) { 1638 ab8500->mask_size = AB8540_NUM_IRQ_REGS; 1639 ab8500->irq_reg_offset = ab8540_irq_regoffset; 1640 ab8500->it_latchhier_num = AB8540_IT_LATCHHIER_NUM; 1641 } /* Configure AB8500 or AB9540 IRQ */ 1642 else if (is_ab9540(ab8500) || is_ab8505(ab8500)) { 1643 ab8500->mask_size = AB9540_NUM_IRQ_REGS; 1644 ab8500->irq_reg_offset = ab9540_irq_regoffset; 1645 ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM; 1646 } else { 1647 ab8500->mask_size = AB8500_NUM_IRQ_REGS; 1648 ab8500->irq_reg_offset = ab8500_irq_regoffset; 1649 ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM; 1650 } 1651 ab8500->mask = devm_kzalloc(&pdev->dev, ab8500->mask_size, 1652 GFP_KERNEL); 1653 if (!ab8500->mask) 1654 return -ENOMEM; 1655 ab8500->oldmask = devm_kzalloc(&pdev->dev, ab8500->mask_size, 1656 GFP_KERNEL); 1657 if (!ab8500->oldmask) 1658 return -ENOMEM; 1659 1660 /* 1661 * ab8500 has switched off due to (SWITCH_OFF_STATUS): 1662 * 0x01 Swoff bit programming 1663 * 0x02 Thermal protection activation 1664 * 0x04 Vbat lower then BattOk falling threshold 1665 * 0x08 Watchdog expired 1666 * 0x10 Non presence of 32kHz clock 1667 * 0x20 Battery level lower than power on reset threshold 1668 * 0x40 Power on key 1 pressed longer than 10 seconds 1669 * 0x80 DB8500 thermal shutdown 1670 */ 1671 1672 ret = get_register_interruptible(ab8500, AB8500_RTC, 1673 AB8500_SWITCH_OFF_STATUS, &value); 1674 if (ret < 0) 1675 return ret; 1676 dev_info(ab8500->dev, "switch off cause(s) (%#x): ", value); 1677 1678 if (value) { 1679 for (i = 0; i < ARRAY_SIZE(switch_off_status); i++) { 1680 if (value & 1) 1681 pr_cont(" \"%s\"", switch_off_status[i]); 1682 value = value >> 1; 1683 1684 } 1685 pr_cont("\n"); 1686 } else { 1687 pr_cont(" None\n"); 1688 } 1689 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK, 1690 AB8500_TURN_ON_STATUS, &value); 1691 if (ret < 0) 1692 return ret; 1693 dev_info(ab8500->dev, "turn on reason(s) (%#x): ", value); 1694 1695 if (value) { 1696 for (i = 0; i < ARRAY_SIZE(turn_on_status); i++) { 1697 if (value & 1) 1698 pr_cont("\"%s\" ", turn_on_status[i]); 1699 value = value >> 1; 1700 } 1701 pr_cont("\n"); 1702 } else { 1703 pr_cont("None\n"); 1704 } 1705 1706 if (plat && plat->init) 1707 plat->init(ab8500); 1708 1709 if (is_ab9540(ab8500)) { 1710 ret = get_register_interruptible(ab8500, AB8500_CHARGER, 1711 AB8500_CH_USBCH_STAT1_REG, &value); 1712 if (ret < 0) 1713 return ret; 1714 if ((value & VBUS_DET_DBNC1) && (value & VBUS_DET_DBNC100)) 1715 ab8500_override_turn_on_stat(~AB8500_POW_KEY_1_ON, 1716 AB8500_VBUS_DET); 1717 } 1718 1719 /* Clear and mask all interrupts */ 1720 for (i = 0; i < ab8500->mask_size; i++) { 1721 /* 1722 * Interrupt register 12 doesn't exist prior to AB8500 version 1723 * 2.0 1724 */ 1725 if (ab8500->irq_reg_offset[i] == 11 && 1726 is_ab8500_1p1_or_earlier(ab8500)) 1727 continue; 1728 1729 if (ab8500->irq_reg_offset[i] < 0) 1730 continue; 1731 1732 get_register_interruptible(ab8500, AB8500_INTERRUPT, 1733 AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i], 1734 &value); 1735 set_register_interruptible(ab8500, AB8500_INTERRUPT, 1736 AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff); 1737 } 1738 1739 ret = abx500_register_ops(ab8500->dev, &ab8500_ops); 1740 if (ret) 1741 return ret; 1742 1743 for (i = 0; i < ab8500->mask_size; i++) 1744 ab8500->mask[i] = ab8500->oldmask[i] = 0xff; 1745 1746 ret = ab8500_irq_init(ab8500, np); 1747 if (ret) 1748 return ret; 1749 1750 ret = devm_request_threaded_irq(&pdev->dev, ab8500->irq, NULL, 1751 ab8500_hierarchical_irq, 1752 IRQF_ONESHOT | IRQF_NO_SUSPEND, 1753 "ab8500", ab8500); 1754 if (ret) 1755 return ret; 1756 1757#ifdef CONFIG_DEBUG_FS 1758 /* Pass to debugfs */ 1759 ab8500_debug_resources[0].start = ab8500->irq; 1760 ab8500_debug_resources[0].end = ab8500->irq; 1761#endif 1762 1763 if (is_ab9540(ab8500)) 1764 ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs, 1765 ARRAY_SIZE(ab9540_devs), NULL, 1766 0, ab8500->domain); 1767 else if (is_ab8540(ab8500)) { 1768 ret = mfd_add_devices(ab8500->dev, 0, ab8540_devs, 1769 ARRAY_SIZE(ab8540_devs), NULL, 1770 0, ab8500->domain); 1771 if (ret) 1772 return ret; 1773 1774 if (is_ab8540_1p2_or_earlier(ab8500)) 1775 ret = mfd_add_devices(ab8500->dev, 0, ab8540_cut1_devs, 1776 ARRAY_SIZE(ab8540_cut1_devs), NULL, 1777 0, ab8500->domain); 1778 else /* ab8540 >= cut2 */ 1779 ret = mfd_add_devices(ab8500->dev, 0, ab8540_cut2_devs, 1780 ARRAY_SIZE(ab8540_cut2_devs), NULL, 1781 0, ab8500->domain); 1782 } else if (is_ab8505(ab8500)) 1783 ret = mfd_add_devices(ab8500->dev, 0, ab8505_devs, 1784 ARRAY_SIZE(ab8505_devs), NULL, 1785 0, ab8500->domain); 1786 else 1787 ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs, 1788 ARRAY_SIZE(ab8500_devs), NULL, 1789 0, ab8500->domain); 1790 if (ret) 1791 return ret; 1792 1793 if (!no_bm) { 1794 /* Add battery management devices */ 1795 ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs, 1796 ARRAY_SIZE(ab8500_bm_devs), NULL, 1797 0, ab8500->domain); 1798 if (ret) 1799 dev_err(ab8500->dev, "error adding bm devices\n"); 1800 } 1801 1802 if (((is_ab8505(ab8500) || is_ab9540(ab8500)) && 1803 ab8500->chip_id >= AB8500_CUT2P0) || is_ab8540(ab8500)) 1804 ret = sysfs_create_group(&ab8500->dev->kobj, 1805 &ab9540_attr_group); 1806 else 1807 ret = sysfs_create_group(&ab8500->dev->kobj, 1808 &ab8500_attr_group); 1809 1810 if ((is_ab8505(ab8500) || is_ab9540(ab8500)) && 1811 ab8500->chip_id >= AB8500_CUT2P0) 1812 ret = sysfs_create_group(&ab8500->dev->kobj, 1813 &ab8505_attr_group); 1814 1815 if (ret) 1816 dev_err(ab8500->dev, "error creating sysfs entries\n"); 1817 1818 return ret; 1819} 1820 1821static int ab8500_remove(struct platform_device *pdev) 1822{ 1823 struct ab8500 *ab8500 = platform_get_drvdata(pdev); 1824 1825 if (((is_ab8505(ab8500) || is_ab9540(ab8500)) && 1826 ab8500->chip_id >= AB8500_CUT2P0) || is_ab8540(ab8500)) 1827 sysfs_remove_group(&ab8500->dev->kobj, &ab9540_attr_group); 1828 else 1829 sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group); 1830 1831 if ((is_ab8505(ab8500) || is_ab9540(ab8500)) && 1832 ab8500->chip_id >= AB8500_CUT2P0) 1833 sysfs_remove_group(&ab8500->dev->kobj, &ab8505_attr_group); 1834 1835 mfd_remove_devices(ab8500->dev); 1836 1837 return 0; 1838} 1839 1840static const struct platform_device_id ab8500_id[] = { 1841 { "ab8500-core", AB8500_VERSION_AB8500 }, 1842 { "ab8505-i2c", AB8500_VERSION_AB8505 }, 1843 { "ab9540-i2c", AB8500_VERSION_AB9540 }, 1844 { "ab8540-i2c", AB8500_VERSION_AB8540 }, 1845 { } 1846}; 1847 1848static struct platform_driver ab8500_core_driver = { 1849 .driver = { 1850 .name = "ab8500-core", 1851 .owner = THIS_MODULE, 1852 }, 1853 .probe = ab8500_probe, 1854 .remove = ab8500_remove, 1855 .id_table = ab8500_id, 1856}; 1857 1858static int __init ab8500_core_init(void) 1859{ 1860 return platform_driver_register(&ab8500_core_driver); 1861} 1862 1863static void __exit ab8500_core_exit(void) 1864{ 1865 platform_driver_unregister(&ab8500_core_driver); 1866} 1867core_initcall(ab8500_core_init); 1868module_exit(ab8500_core_exit); 1869 1870MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent"); 1871MODULE_DESCRIPTION("AB8500 MFD core"); 1872MODULE_LICENSE("GPL v2"); 1873