1/******************************************************************************* 2 3 Intel(R) 82576 Virtual Function Linux driver 4 Copyright(c) 2009 - 2012 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 19 The full GNU General Public License is included in this distribution in 20 the file called "COPYING". 21 22 Contact Information: 23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 25 26*******************************************************************************/ 27 28#ifndef _E1000_VF_H_ 29#define _E1000_VF_H_ 30 31#include <linux/pci.h> 32#include <linux/delay.h> 33#include <linux/interrupt.h> 34#include <linux/if_ether.h> 35 36#include "regs.h" 37#include "defines.h" 38 39struct e1000_hw; 40 41#define E1000_DEV_ID_82576_VF 0x10CA 42#define E1000_DEV_ID_I350_VF 0x1520 43#define E1000_REVISION_0 0 44#define E1000_REVISION_1 1 45#define E1000_REVISION_2 2 46#define E1000_REVISION_3 3 47#define E1000_REVISION_4 4 48 49#define E1000_FUNC_0 0 50#define E1000_FUNC_1 1 51 52/* 53 * Receive Address Register Count 54 * Number of high/low register pairs in the RAR. The RAR (Receive Address 55 * Registers) holds the directed and multicast addresses that we monitor. 56 * These entries are also used for MAC-based filtering. 57 */ 58#define E1000_RAR_ENTRIES_VF 1 59 60/* Receive Descriptor - Advanced */ 61union e1000_adv_rx_desc { 62 struct { 63 u64 pkt_addr; /* Packet buffer address */ 64 u64 hdr_addr; /* Header buffer address */ 65 } read; 66 struct { 67 struct { 68 union { 69 u32 data; 70 struct { 71 u16 pkt_info; /* RSS/Packet type */ 72 u16 hdr_info; /* Split Header, 73 * hdr buffer length */ 74 } hs_rss; 75 } lo_dword; 76 union { 77 u32 rss; /* RSS Hash */ 78 struct { 79 u16 ip_id; /* IP id */ 80 u16 csum; /* Packet Checksum */ 81 } csum_ip; 82 } hi_dword; 83 } lower; 84 struct { 85 u32 status_error; /* ext status/error */ 86 u16 length; /* Packet length */ 87 u16 vlan; /* VLAN tag */ 88 } upper; 89 } wb; /* writeback */ 90}; 91 92#define E1000_RXDADV_HDRBUFLEN_MASK 0x7FE0 93#define E1000_RXDADV_HDRBUFLEN_SHIFT 5 94 95/* Transmit Descriptor - Advanced */ 96union e1000_adv_tx_desc { 97 struct { 98 u64 buffer_addr; /* Address of descriptor's data buf */ 99 u32 cmd_type_len; 100 u32 olinfo_status; 101 } read; 102 struct { 103 u64 rsvd; /* Reserved */ 104 u32 nxtseq_seed; 105 u32 status; 106 } wb; 107}; 108 109/* Adv Transmit Descriptor Config Masks */ 110#define E1000_ADVTXD_DTYP_CTXT 0x00200000 /* Advanced Context Descriptor */ 111#define E1000_ADVTXD_DTYP_DATA 0x00300000 /* Advanced Data Descriptor */ 112#define E1000_ADVTXD_DCMD_EOP 0x01000000 /* End of Packet */ 113#define E1000_ADVTXD_DCMD_IFCS 0x02000000 /* Insert FCS (Ethernet CRC) */ 114#define E1000_ADVTXD_DCMD_RS 0x08000000 /* Report Status */ 115#define E1000_ADVTXD_DCMD_DEXT 0x20000000 /* Descriptor extension (1=Adv) */ 116#define E1000_ADVTXD_DCMD_VLE 0x40000000 /* VLAN pkt enable */ 117#define E1000_ADVTXD_DCMD_TSE 0x80000000 /* TCP Seg enable */ 118#define E1000_ADVTXD_PAYLEN_SHIFT 14 /* Adv desc PAYLEN shift */ 119 120/* Context descriptors */ 121struct e1000_adv_tx_context_desc { 122 u32 vlan_macip_lens; 123 u32 seqnum_seed; 124 u32 type_tucmd_mlhl; 125 u32 mss_l4len_idx; 126}; 127 128#define E1000_ADVTXD_MACLEN_SHIFT 9 /* Adv ctxt desc mac len shift */ 129#define E1000_ADVTXD_TUCMD_IPV4 0x00000400 /* IP Packet Type: 1=IPv4 */ 130#define E1000_ADVTXD_TUCMD_L4T_TCP 0x00000800 /* L4 Packet TYPE of TCP */ 131#define E1000_ADVTXD_L4LEN_SHIFT 8 /* Adv ctxt L4LEN shift */ 132#define E1000_ADVTXD_MSS_SHIFT 16 /* Adv ctxt MSS shift */ 133 134enum e1000_mac_type { 135 e1000_undefined = 0, 136 e1000_vfadapt, 137 e1000_vfadapt_i350, 138 e1000_num_macs /* List is 1-based, so subtract 1 for true count. */ 139}; 140 141struct e1000_vf_stats { 142 u64 base_gprc; 143 u64 base_gptc; 144 u64 base_gorc; 145 u64 base_gotc; 146 u64 base_mprc; 147 u64 base_gotlbc; 148 u64 base_gptlbc; 149 u64 base_gorlbc; 150 u64 base_gprlbc; 151 152 u32 last_gprc; 153 u32 last_gptc; 154 u32 last_gorc; 155 u32 last_gotc; 156 u32 last_mprc; 157 u32 last_gotlbc; 158 u32 last_gptlbc; 159 u32 last_gorlbc; 160 u32 last_gprlbc; 161 162 u64 gprc; 163 u64 gptc; 164 u64 gorc; 165 u64 gotc; 166 u64 mprc; 167 u64 gotlbc; 168 u64 gptlbc; 169 u64 gorlbc; 170 u64 gprlbc; 171}; 172 173#include "mbx.h" 174 175struct e1000_mac_operations { 176 /* Function pointers for the MAC. */ 177 s32 (*init_params)(struct e1000_hw *); 178 s32 (*check_for_link)(struct e1000_hw *); 179 void (*clear_vfta)(struct e1000_hw *); 180 s32 (*get_bus_info)(struct e1000_hw *); 181 s32 (*get_link_up_info)(struct e1000_hw *, u16 *, u16 *); 182 void (*update_mc_addr_list)(struct e1000_hw *, u8 *, u32, u32, u32); 183 s32 (*reset_hw)(struct e1000_hw *); 184 s32 (*init_hw)(struct e1000_hw *); 185 s32 (*setup_link)(struct e1000_hw *); 186 void (*write_vfta)(struct e1000_hw *, u32, u32); 187 void (*mta_set)(struct e1000_hw *, u32); 188 void (*rar_set)(struct e1000_hw *, u8*, u32); 189 s32 (*read_mac_addr)(struct e1000_hw *); 190 s32 (*set_vfta)(struct e1000_hw *, u16, bool); 191}; 192 193struct e1000_mac_info { 194 struct e1000_mac_operations ops; 195 u8 addr[6]; 196 u8 perm_addr[6]; 197 198 enum e1000_mac_type type; 199 200 u16 mta_reg_count; 201 u16 rar_entry_count; 202 203 bool get_link_status; 204}; 205 206struct e1000_mbx_operations { 207 s32 (*init_params)(struct e1000_hw *hw); 208 s32 (*read)(struct e1000_hw *, u32 *, u16); 209 s32 (*write)(struct e1000_hw *, u32 *, u16); 210 s32 (*read_posted)(struct e1000_hw *, u32 *, u16); 211 s32 (*write_posted)(struct e1000_hw *, u32 *, u16); 212 s32 (*check_for_msg)(struct e1000_hw *); 213 s32 (*check_for_ack)(struct e1000_hw *); 214 s32 (*check_for_rst)(struct e1000_hw *); 215}; 216 217struct e1000_mbx_stats { 218 u32 msgs_tx; 219 u32 msgs_rx; 220 221 u32 acks; 222 u32 reqs; 223 u32 rsts; 224}; 225 226struct e1000_mbx_info { 227 struct e1000_mbx_operations ops; 228 struct e1000_mbx_stats stats; 229 u32 timeout; 230 u32 usec_delay; 231 u16 size; 232}; 233 234struct e1000_dev_spec_vf { 235 u32 vf_number; 236 u32 v2p_mailbox; 237}; 238 239struct e1000_hw { 240 void *back; 241 242 u8 __iomem *hw_addr; 243 u8 __iomem *flash_address; 244 unsigned long io_base; 245 246 struct e1000_mac_info mac; 247 struct e1000_mbx_info mbx; 248 249 union { 250 struct e1000_dev_spec_vf vf; 251 } dev_spec; 252 253 u16 device_id; 254 u16 subsystem_vendor_id; 255 u16 subsystem_device_id; 256 u16 vendor_id; 257 258 u8 revision_id; 259}; 260 261/* These functions must be implemented by drivers */ 262void e1000_rlpml_set_vf(struct e1000_hw *, u16); 263void e1000_init_function_pointers_vf(struct e1000_hw *hw); 264 265 266#endif /* _E1000_VF_H_ */ 267