vmxnet3_int.h revision 81e8e5601fba4ea5bc3bfbed0fec074cf65feca5
1d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara/* 2d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * Linux driver for VMware's vmxnet3 ethernet NIC. 3d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * 4d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved. 5d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * 6d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * This program is free software; you can redistribute it and/or modify it 7d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * under the terms of the GNU General Public License as published by the 8d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * Free Software Foundation; version 2 of the License and no later version. 9d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * 10d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * This program is distributed in the hope that it will be useful, but 11d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * WITHOUT ANY WARRANTY; without even the implied warranty of 12d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 13d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * NON INFRINGEMENT. See the GNU General Public License for more 14d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * details. 15d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * 16d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * You should have received a copy of the GNU General Public License 17d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * along with this program; if not, write to the Free Software 18d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 19d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * 20d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * The full GNU General Public License is included in this distribution in 21d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * the file called "COPYING". 22d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * 23d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com> 24d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * 25d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara */ 26d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 27d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#ifndef _VMXNET3_INT_H 28d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#define _VMXNET3_INT_H 29d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 30d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#include <linux/ethtool.h> 31d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#include <linux/delay.h> 32d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#include <linux/netdevice.h> 33d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#include <linux/pci.h> 34d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#include <linux/compiler.h> 35d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#include <linux/slab.h> 36d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#include <linux/spinlock.h> 37d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#include <linux/ioport.h> 38d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#include <linux/highmem.h> 39d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#include <linux/init.h> 40d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#include <linux/timer.h> 41d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#include <linux/skbuff.h> 42d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#include <linux/interrupt.h> 43d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#include <linux/workqueue.h> 44d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#include <linux/uaccess.h> 45d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#include <asm/dma.h> 46d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#include <asm/page.h> 47d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 48d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#include <linux/tcp.h> 49d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#include <linux/udp.h> 50d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#include <linux/ip.h> 51d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#include <linux/ipv6.h> 52d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#include <linux/in.h> 53d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#include <linux/etherdevice.h> 54d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#include <asm/checksum.h> 55d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#include <linux/if_vlan.h> 56d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#include <linux/if_arp.h> 57d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#include <linux/inetdevice.h> 58d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 59d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#include "vmxnet3_defs.h" 60d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 61d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#ifdef DEBUG 62d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara# define VMXNET3_DRIVER_VERSION_REPORT VMXNET3_DRIVER_VERSION_STRING"-NAPI(debug)" 63d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#else 64d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara# define VMXNET3_DRIVER_VERSION_REPORT VMXNET3_DRIVER_VERSION_STRING"-NAPI" 65d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#endif 66d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 67d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 68d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara/* 69d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * Version numbers 70d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara */ 711f4b16128439b225c2986f06d015c848c290d7d9Bhavesh Davda#define VMXNET3_DRIVER_VERSION_STRING "1.0.14.0-k" 72d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 73d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara/* a 32-bit int, each byte encode a verion number in VMXNET3_DRIVER_VERSION */ 741f4b16128439b225c2986f06d015c848c290d7d9Bhavesh Davda#define VMXNET3_DRIVER_VERSION_NUM 0x01000E00 75d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 76d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 77d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara/* 78d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * Capabilities 79d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara */ 80d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 81d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewaraenum { 82d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMNET_CAP_SG = 0x0001, /* Can do scatter-gather transmits. */ 83d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMNET_CAP_IP4_CSUM = 0x0002, /* Can checksum only TCP/UDP over 84d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * IPv4 */ 85d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMNET_CAP_HW_CSUM = 0x0004, /* Can checksum all packets. */ 86d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMNET_CAP_HIGH_DMA = 0x0008, /* Can DMA to high memory. */ 87d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMNET_CAP_TOE = 0x0010, /* Supports TCP/IP offload. */ 88d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMNET_CAP_TSO = 0x0020, /* Supports TCP Segmentation 89d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * offload */ 90d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMNET_CAP_SW_TSO = 0x0040, /* Supports SW TCP Segmentation */ 91d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMNET_CAP_VMXNET_APROM = 0x0080, /* Vmxnet APROM support */ 92d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMNET_CAP_HW_TX_VLAN = 0x0100, /* Can we do VLAN tagging in HW */ 93d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMNET_CAP_HW_RX_VLAN = 0x0200, /* Can we do VLAN untagging in HW */ 94d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMNET_CAP_SW_VLAN = 0x0400, /* VLAN tagging/untagging in SW */ 95d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMNET_CAP_WAKE_PCKT_RCV = 0x0800, /* Can wake on network packet recv? */ 96d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMNET_CAP_ENABLE_INT_INLINE = 0x1000, /* Enable Interrupt Inline */ 97d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMNET_CAP_ENABLE_HEADER_COPY = 0x2000, /* copy header for vmkernel */ 98d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMNET_CAP_TX_CHAIN = 0x4000, /* Guest can use multiple tx entries 99d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * for a pkt */ 100d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMNET_CAP_RX_CHAIN = 0x8000, /* pkt can span multiple rx entries */ 101d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMNET_CAP_LPD = 0x10000, /* large pkt delivery */ 102d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMNET_CAP_BPF = 0x20000, /* BPF Support in VMXNET Virtual HW*/ 103d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMNET_CAP_SG_SPAN_PAGES = 0x40000, /* Scatter-gather can span multiple*/ 104d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara /* pages transmits */ 105d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMNET_CAP_IP6_CSUM = 0x80000, /* Can do IPv6 csum offload. */ 106d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMNET_CAP_TSO6 = 0x100000, /* TSO seg. offload for IPv6 pkts. */ 107d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMNET_CAP_TSO256k = 0x200000, /* Can do TSO seg offload for */ 108d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara /* pkts up to 256kB. */ 109d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMNET_CAP_UPT = 0x400000 /* Support UPT */ 110d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara}; 111d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 112d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara/* 113d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * PCI vendor and device IDs. 114d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara */ 115d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#define PCI_VENDOR_ID_VMWARE 0x15AD 116d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#define PCI_DEVICE_ID_VMWARE_VMXNET3 0x07B0 117d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#define MAX_ETHERNET_CARDS 10 118d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#define MAX_PCI_PASSTHRU_DEVICE 6 119d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 120d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewarastruct vmxnet3_cmd_ring { 121d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara union Vmxnet3_GenericDesc *base; 122d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u32 size; 123d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u32 next2fill; 124d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u32 next2comp; 125d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u8 gen; 126d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara dma_addr_t basePA; 127d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara}; 128d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 129d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewarastatic inline void 130d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewaravmxnet3_cmd_ring_adv_next2fill(struct vmxnet3_cmd_ring *ring) 131d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara{ 132d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara ring->next2fill++; 133d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara if (unlikely(ring->next2fill == ring->size)) { 134d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara ring->next2fill = 0; 135d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMXNET3_FLIP_RING_GEN(ring->gen); 136d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara } 137d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara} 138d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 139d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewarastatic inline void 140d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewaravmxnet3_cmd_ring_adv_next2comp(struct vmxnet3_cmd_ring *ring) 141d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara{ 142d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMXNET3_INC_RING_IDX_ONLY(ring->next2comp, ring->size); 143d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara} 144d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 145d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewarastatic inline int 146d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewaravmxnet3_cmd_ring_desc_avail(struct vmxnet3_cmd_ring *ring) 147d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara{ 148d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara return (ring->next2comp > ring->next2fill ? 0 : ring->size) + 149d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara ring->next2comp - ring->next2fill - 1; 150d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara} 151d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 152d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewarastruct vmxnet3_comp_ring { 153d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara union Vmxnet3_GenericDesc *base; 154d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u32 size; 155d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u32 next2proc; 156d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u8 gen; 157d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u8 intr_idx; 158d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara dma_addr_t basePA; 159d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara}; 160d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 161d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewarastatic inline void 162d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewaravmxnet3_comp_ring_adv_next2proc(struct vmxnet3_comp_ring *ring) 163d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara{ 164d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara ring->next2proc++; 165d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara if (unlikely(ring->next2proc == ring->size)) { 166d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara ring->next2proc = 0; 167d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMXNET3_FLIP_RING_GEN(ring->gen); 168d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara } 169d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara} 170d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 171d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewarastruct vmxnet3_tx_data_ring { 172d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct Vmxnet3_TxDataDesc *base; 173d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u32 size; 174d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara dma_addr_t basePA; 175d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara}; 176d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 177d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewaraenum vmxnet3_buf_map_type { 178d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMXNET3_MAP_INVALID = 0, 179d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMXNET3_MAP_NONE, 180d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMXNET3_MAP_SINGLE, 181d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMXNET3_MAP_PAGE, 182d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara}; 183d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 184d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewarastruct vmxnet3_tx_buf_info { 185d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u32 map_type; 186d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u16 len; 187d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u16 sop_idx; 188d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara dma_addr_t dma_addr; 189d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct sk_buff *skb; 190d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara}; 191d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 192d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewarastruct vmxnet3_tq_driver_stats { 193d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u64 drop_total; /* # of pkts dropped by the driver, the 194d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * counters below track droppings due to 195d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * different reasons 196d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara */ 197d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u64 drop_too_many_frags; 198d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u64 drop_oversized_hdr; 199d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u64 drop_hdr_inspect_err; 200d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u64 drop_tso; 201d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 202d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u64 tx_ring_full; 203d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u64 linearized; /* # of pkts linearized */ 204d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u64 copy_skb_header; /* # of times we have to copy skb header */ 205d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u64 oversized_hdr; 206d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara}; 207d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 208d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewarastruct vmxnet3_tx_ctx { 209d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara bool ipv4; 210d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u16 mss; 211d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u32 eth_ip_hdr_size; /* only valid for pkts requesting tso or csum 212d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * offloading 213d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara */ 214d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u32 l4_hdr_size; /* only valid if mss != 0 */ 215d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u32 copy_size; /* # of bytes copied into the data ring */ 216d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara union Vmxnet3_GenericDesc *sop_txd; 217d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara union Vmxnet3_GenericDesc *eop_txd; 218d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara}; 219d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 220d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewarastruct vmxnet3_tx_queue { 221d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara spinlock_t tx_lock; 222d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct vmxnet3_cmd_ring tx_ring; 223d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct vmxnet3_tx_buf_info *buf_info; 224d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct vmxnet3_tx_data_ring data_ring; 225d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct vmxnet3_comp_ring comp_ring; 226d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct Vmxnet3_TxQueueCtrl *shared; 227d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct vmxnet3_tq_driver_stats stats; 228d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara bool stopped; 229d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara int num_stop; /* # of times the queue is 230d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * stopped */ 231d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara} __attribute__((__aligned__(SMP_CACHE_BYTES))); 232d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 233d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewaraenum vmxnet3_rx_buf_type { 234d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMXNET3_RX_BUF_NONE = 0, 235d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMXNET3_RX_BUF_SKB = 1, 236d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara VMXNET3_RX_BUF_PAGE = 2 237d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara}; 238d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 239d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewarastruct vmxnet3_rx_buf_info { 240d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara enum vmxnet3_rx_buf_type buf_type; 241d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u16 len; 242d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara union { 243d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct sk_buff *skb; 244d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct page *page; 245d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara }; 246d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara dma_addr_t dma_addr; 247d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara}; 248d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 249d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewarastruct vmxnet3_rx_ctx { 250d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct sk_buff *skb; 251d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u32 sop_idx; 252d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara}; 253d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 254d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewarastruct vmxnet3_rq_driver_stats { 255d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u64 drop_total; 256d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u64 drop_err; 257d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u64 drop_fcs; 258d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u64 rx_buf_alloc_failure; 259d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara}; 260d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 261d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewarastruct vmxnet3_rx_queue { 262d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct vmxnet3_cmd_ring rx_ring[2]; 263d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct vmxnet3_comp_ring comp_ring; 264d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct vmxnet3_rx_ctx rx_ctx; 265d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u32 qid; /* rqID in RCD for buffer from 1st ring */ 266d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u32 qid2; /* rqID in RCD for buffer from 2nd ring */ 267d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u32 uncommitted[2]; /* # of buffers allocated since last RXPROD 268d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara * update */ 269d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct vmxnet3_rx_buf_info *buf_info[2]; 270d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct Vmxnet3_RxQueueCtrl *shared; 271d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct vmxnet3_rq_driver_stats stats; 272d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara} __attribute__((__aligned__(SMP_CACHE_BYTES))); 273d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 274d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#define VMXNET3_LINUX_MAX_MSIX_VECT 1 275d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 276d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewarastruct vmxnet3_intr { 277d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara enum vmxnet3_intr_mask_mode mask_mode; 278d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara enum vmxnet3_intr_type type; /* MSI-X, MSI, or INTx? */ 279d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u8 num_intrs; /* # of intr vectors */ 280d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u8 event_intr_idx; /* idx of the intr vector for event */ 281d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u8 mod_levels[VMXNET3_LINUX_MAX_MSIX_VECT]; /* moderation level */ 282d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#ifdef CONFIG_PCI_MSI 283d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct msix_entry msix_entries[VMXNET3_LINUX_MAX_MSIX_VECT]; 284d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#endif 285d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara}; 286d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 287d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#define VMXNET3_STATE_BIT_RESETTING 0 288d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#define VMXNET3_STATE_BIT_QUIESCED 1 289d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewarastruct vmxnet3_adapter { 290d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct vmxnet3_tx_queue tx_queue; 291d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct vmxnet3_rx_queue rx_queue; 292d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct napi_struct napi; 293d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct vlan_group *vlan_grp; 294d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 295d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct vmxnet3_intr intr; 296d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 297d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct Vmxnet3_DriverShared *shared; 298d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct Vmxnet3_PMConf *pm_conf; 299d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct Vmxnet3_TxQueueDesc *tqd_start; /* first tx queue desc */ 300d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct Vmxnet3_RxQueueDesc *rqd_start; /* first rx queue desc */ 301d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct net_device *netdev; 302d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct pci_dev *pdev; 303d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 30481e8e5601fba4ea5bc3bfbed0fec074cf65feca5Harvey Harrison u8 __iomem *hw_addr0; /* for BAR 0 */ 30581e8e5601fba4ea5bc3bfbed0fec074cf65feca5Harvey Harrison u8 __iomem *hw_addr1; /* for BAR 1 */ 306d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 307d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara /* feature control */ 308d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara bool rxcsum; 309d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara bool lro; 310d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara bool jumbo_frame; 311d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 312d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara /* rx buffer related */ 313d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara unsigned skb_buf_size; 314d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara int rx_buf_per_pkt; /* only apply to the 1st ring */ 315d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara dma_addr_t shared_pa; 316d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara dma_addr_t queue_desc_pa; 317d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 318d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara /* Wake-on-LAN */ 319d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u32 wol; 320d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 321d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara /* Link speed */ 322d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u32 link_speed; /* in mbps */ 323d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 324d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u64 tx_timeout_count; 325d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct work_struct work; 326d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 327d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara unsigned long state; /* VMXNET3_STATE_BIT_xxx */ 328d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 329d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara int dev_number; 330d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara}; 331d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 332d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#define VMXNET3_WRITE_BAR0_REG(adapter, reg, val) \ 333115924b6bdc7cc6bf7da5b933b09281e1f4e17a9Shreyas Bhatewara writel(cpu_to_le32(val), (adapter)->hw_addr0 + (reg)) 334d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#define VMXNET3_READ_BAR0_REG(adapter, reg) \ 335115924b6bdc7cc6bf7da5b933b09281e1f4e17a9Shreyas Bhatewara le32_to_cpu(readl((adapter)->hw_addr0 + (reg))) 336d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 337d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#define VMXNET3_WRITE_BAR1_REG(adapter, reg, val) \ 338115924b6bdc7cc6bf7da5b933b09281e1f4e17a9Shreyas Bhatewara writel(cpu_to_le32(val), (adapter)->hw_addr1 + (reg)) 339d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#define VMXNET3_READ_BAR1_REG(adapter, reg) \ 340115924b6bdc7cc6bf7da5b933b09281e1f4e17a9Shreyas Bhatewara le32_to_cpu(readl((adapter)->hw_addr1 + (reg))) 341d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 342d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#define VMXNET3_WAKE_QUEUE_THRESHOLD(tq) (5) 343d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#define VMXNET3_RX_ALLOC_THRESHOLD(rq, ring_idx, adapter) \ 344d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara ((rq)->rx_ring[ring_idx].size >> 3) 345d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 346d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#define VMXNET3_GET_ADDR_LO(dma) ((u32)(dma)) 347d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#define VMXNET3_GET_ADDR_HI(dma) ((u32)(((u64)(dma)) >> 32)) 348d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 349d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara/* must be a multiple of VMXNET3_RING_SIZE_ALIGN */ 350d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#define VMXNET3_DEF_TX_RING_SIZE 512 351d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#define VMXNET3_DEF_RX_RING_SIZE 256 352d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 353d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#define VMXNET3_MAX_ETH_HDR_SIZE 22 354d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#define VMXNET3_MAX_SKB_BUF_SIZE (3*1024) 355d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 356d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewaraint 357d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewaravmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter); 358d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 359d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewaraint 360d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewaravmxnet3_activate_dev(struct vmxnet3_adapter *adapter); 361d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 362d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewaravoid 363d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewaravmxnet3_force_close(struct vmxnet3_adapter *adapter); 364d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 365d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewaravoid 366d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewaravmxnet3_reset_dev(struct vmxnet3_adapter *adapter); 367d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 368d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewaravoid 369d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewaravmxnet3_tq_destroy(struct vmxnet3_tx_queue *tq, 370d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct vmxnet3_adapter *adapter); 371d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 372d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewaravoid 373d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewaravmxnet3_rq_destroy(struct vmxnet3_rx_queue *rq, 374d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara struct vmxnet3_adapter *adapter); 375d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 376d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewaraint 377d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewaravmxnet3_create_queues(struct vmxnet3_adapter *adapter, 378d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara u32 tx_ring_size, u32 rx_ring_size, u32 rx_ring2_size); 379d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 380d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewaraextern void vmxnet3_set_ethtool_ops(struct net_device *netdev); 381d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewaraextern struct net_device_stats *vmxnet3_get_stats(struct net_device *netdev); 382d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara 383d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewaraextern char vmxnet3_driver_name[]; 384d1a890fa37f27d6aca3abc6e25e4148efc3223a6Shreyas Bhatewara#endif 385