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History log of /drivers/clk/at91/clk-main.c
Revision Date Author Comments
4da66b631f6bee2dfdb77b571418f11016a7ba68 01-Jul-2014 Alexandre Belloni <alexandre.belloni@free-electrons.com> clk: at91: main: warn when the main crystal frequency is not set

When the main crystal frequency is not set, the main clock is approximated using
the MAINF value in the CKGR_MCFR register. Warn the user in that case.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris BREZILLON <boris.brezillon@overkiz.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
27cb1c2083373a44130d50d4d2fb64cf7eff2d90 07-May-2014 Boris BREZILLON <boris.brezillon@free-electrons.com> clk: at91: rework main clk implementation

AT91 main clk is a clk multiplexer and not a simple fixed rate clk as
currently implemented.

In some SoCs (sam9x5, sama5, sam9g45 families) this multiplexer can
choose among 2 sources: an internal RC oscillator circuit and an
oscillator using an external crystal.

In other Socs (sam9260, rm9200 families) the multiplexer source is
hardcoded to the external crystal oscillator.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
38d34c3120b5588e2bd561baa4c5cfef1a4917bb 11-Oct-2013 Boris BREZILLON <b.brezillon@overkiz.com> clk: at91: add PMC main clock

This patch adds new at91 main oscillator clock implementation using common
clk framework.

If rate is not provided during clock registration it is calculated using
the slow clock (main clk parent in this case) rate and MCFR register.

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>