| a06586b62db5c63752e2e68daffec4baa275d594 |
|
24-Sep-2014 |
Adrian Hunter <adrian.hunter@intel.com> |
mmc: sdhci-pci: Fix Braswell eMMC timeout clock frequency
Braswell eMMC host controller specifies an incorrect
timeout clock frequncy in the capabilities registers.
The correct value is 1 MHz.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
|
| ff59c520b5fec9733d5402fdfa76fa4435a40bba |
|
24-Sep-2014 |
Adrian Hunter <adrian.hunter@intel.com> |
mmc: sdhci-pci: Add Bay Trail and Braswell SD card detect
Add support for card detect for Bay Trail
and Braswell SD Card host controllers in PCI
mode.
This uses the gpio descriptor API which can find
gpio descriptors, for example, on an ACPI comapnion
device.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
|
| e58e4a0d14a5b8b6ab2aa2942cb2440e45c1f8c9 |
|
24-Sep-2014 |
Adrian Hunter <adrian.hunter@intel.com> |
mmc: sdhci-pci: Set SDHCI_QUIRK2_STOP_WITH_TC for Intel BYT host controllers
Add quirk SDHCI_QUIRK2_STOP_WITH_TC for Intel BYT host controllers.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
|
| b7574bad80f773dcc4c17950181cde9fb6701501 |
|
04-Sep-2014 |
Gao, Yunpeng <yunpeng.gao@intel.com> |
mmc: sdhci-pci: disable preset register for Baytrail and Merrifield
Due to HW issue, SDHCI host controller on Intel
Baytrail/Merrifield platforms can not use preset
register. So, disable preset registers for them by quirks.
Signed-off-by: Yunpeng Gao <yunpeng.gao@intel.com>
Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
|
| f1b55a55e4ee6fe6d791cff994f6e4d990f69c1e |
|
18-Aug-2014 |
Gao, Yunpeng <yunpeng.gao@intel.com> |
mmc: sdhci-pci: enable runtime pm for Intel Merrifield platform
Enable runtime pm support on Intel Merrifield platform.
Signed-off-by: Yunpeng Gao <yunpeng.gao@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
|
| 066173b6436dfc57a96b2d940f4e727fe8131261 |
|
20-Aug-2014 |
Alan Cox <alan@linux.intel.com> |
mmc: sdhci: Add PCI IDs for Intel Braswell
The hardware is the same as used in Baytrail. Add these new PCI IDs to the
driver's list of supported IDs.
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
|
| f3a92b1a3258f8ef9a59bab24b9ea68b60908c44 |
|
12-Aug-2014 |
Peter Griffin <peter.griffin@linaro.org> |
mmc: sdhci-pci: Use SET_RUNTIME_PM_OPS macro to set runtime pm callbacks
This allows us to get rid of the #else condition, as the macro compiles
away to nothing if not enabled.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
|
| 6b91f2d42ad5506f21f83e25ffd56f27981825a7 |
|
15-Jul-2014 |
Chuanxiao.Dong <chuanxiao.dong@intel.com> |
mmc: sdhci-pci: remove PCI PM functions in suspend/resume callback
It is not required (in fact it even is not recommended) that a PCI
driver's suspend() callback save the standard configuration registers
of the device, prepare it for waking up the system, or put it into a
low-power state. All of these operations can very well be taken
care of by the PCI subsystem, without the driver's participation. Thus
remove these PCI functions.
For the device which has wake up capability, use device_init_wakeup to
init the wake up capability so that PCI core will help to enable the wakeup
for it.
Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
|
| f25c33724d1512a72554c0ad4cb70b43ba15374e |
|
08-Jul-2014 |
Maurice Petallo <mauricex.r.petallo@intel.com> |
mmc: sdhci: add DDR50 1.8V mode support for BayTrail eMMC Controller
This is to enable DDR50 bus speed mode with 1.8V signaling capability
for BayTrail ACPI and PCI mode eMMC Controller.
Signed-off-by: Maurice Petallo <mauricex.r.petallo@intel.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
|
| d61b59461b0cd0106f03e566d537b9072029e059 |
|
08-Jul-2014 |
Maurice Petallo <mauricex.r.petallo@intel.com> |
mmc: sdhci: Preset value not supported in Baytrail eMMC
"SDHCI_QUIRK2_PRESET_VALUE_BROKEN" quirk is added to prohibit
preset value enabling for Baytrail eMMC controller.
Signed-off-by: Maurice Petallo <mauricex.r.petallo@intel.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
|
| 43e968cec79b6334cf7cb3e11184cce720541712 |
|
24-Jun-2014 |
Derek Browne <Derek.Browne@intel.com> |
mmc: sdhci-pci: SDIO host controller support for Intel Quark X1000
This patch is to enable SDIO host controller for Intel Quark X1000.
Signed-off-by: Derek Browne <Derek.Browne@intel.com>
Signed-off-by: Alvin (Weike) Chen <alvin.chen@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
|
| 96d7b78cfc2fd6b1539704e2d33239dbaa097cc4 |
|
25-Apr-2014 |
Russell King <rmk+kernel@arm.linux.org.uk> |
mmc: sdhci: convert sdhci_set_uhs_signaling() into a library function
Add sdhci_set_uhs_signaling() and always call the set_uhs_signaling
method. This avoids quirks being added into sdhci_set_uhs_signaling().
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Markus Pargmann <mpa@pengutronix.de>
Tested-by: Stephen Warren <swarren@nvidia.com>
[Ulf Hansson] Resolved conflict
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
|
| 1771059cf5f9c09e37ef6315df8acf120f2642fc |
|
25-Apr-2014 |
Russell King <rmk+kernel@arm.linux.org.uk> |
mmc: sdhci: convert sdhci_set_clock() into a library function
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Markus Pargmann <mpa@pengutronix.de>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
|
| 03231f9b781f24205c0af0398ce3cbef70090939 |
|
25-Apr-2014 |
Russell King <rmk+kernel@arm.linux.org.uk> |
mmc: sdhci: convert reset into a library function
Rather than having platform_reset_enter/platform_reset_exit methods,
turn the core of the reset handling into a library function which
platforms can call at the appropriate moment in their (new) reset
method.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Markus Pargmann <mpa@pengutronix.de>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
|
| 2317f56c055fcad524bf6a873df48a754e7ebc4d |
|
25-Apr-2014 |
Russell King <rmk+kernel@arm.linux.org.uk> |
mmc: sdhci: convert generic bus width setup to library function
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Markus Pargmann <mpa@pengutronix.de>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
|
| 9107ebbf9652c033eb5dd10a6ea34a132db3cde1 |
|
21-Feb-2014 |
Micky Ching <micky_ching@realsil.com.cn> |
mmc: sdhci: add support for realtek rts5250
Add support for realtek rts5250 pci card reader. The card reader has
some problems with DDR50 mode, so add a new quirks2 for broken ddr50.
Signed-off-by: Micky Ching <micky_ching@realsil.com.cn>
Signed-off-by: Chris Ball <chris@printf.net>
|
| 945be38caa287b177b8c17ffaae7754cab6a658f |
|
21-Jan-2014 |
Adrian Hunter <adrian.hunter@intel.com> |
mmc: sdhci-pci: Fix possibility of chip->fixes being null
It is possible for chip->fixes to be null. Check before dereferencing it.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable <stable@vger.kernel.org> # 3.11+
Signed-off-by: Chris Ball <chris@printf.net>
|
| 77a0122e0838663795651aa0beb2325156f98c09 |
|
13-Jan-2014 |
Adrian Hunter <adrian.hunter@intel.com> |
mmc: sdhci-pci: Fix BYT sd card getting stuck in runtime suspend
A host controller for a SD card may need a GPIO for card detect in order
to wake up from runtime suspend when a card is inserted. If that GPIO is
not configured, then the host controller will not wake up. Fix that for
the affected devices by not enabling runtime PM unless the GPIO is
successfully set up.
This affects BYT sd card host controller which had runtime PM enabled from
v3.11. For completeness, the MFD sd card host controller is flagged also.
The original patch before rebasing (see link below) was tested on v3.11.10
and v3.12.4 although the patch applied with some offsets and fuzz. The
original patch is here:
http://marc.info/?l=linux-mmc&m=138676702327057
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable <stable@vger.kernel.org> # 3.11+
Signed-off-by: Chris Ball <chris@printf.net>
|
| 390145f9adcf2730fcee81c8a51fd7c6c08f705f |
|
29-Oct-2013 |
David Cohen <david.a.cohen@linux.intel.com> |
mmc: sdhci-pci: add broken HS200 quirk for Intel Merrifield
Due to unknown hw issue so far, Merrifield is unable to enable HS200
support. This patch adds quirk to avoid SDHCI to initialize with error
below:
[ 53.850132] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W
3.12.0-rc6-00037-g3d7c8d9-dirty #36
[ 53.850150] Hardware name: Intel Corporation Merrifield/SALT BAY,
BIOS 397 2013.09.12:11.51.40
[ 53.850167] 00000000 00000000 ee409e48 c18816d2 00000000 ee409e78
c123e254 c1acc9b0
[ 53.850227] 00000000 00000000 c1b14148 000003de c16c03bf c16c03bf
ee75b480 ed97c54c
[ 53.850282] ee75b480 ee409e88 c123e292 00000009 00000000 ee409ef8
c16c03bf c1207fac
[ 53.850339] Call Trace:
[ 53.850376] [<c18816d2>] dump_stack+0x4b/0x79
[ 53.850408] [<c123e254>] warn_slowpath_common+0x84/0xa0
[ 53.850436] [<c16c03bf>] ? sdhci_send_command+0xb4f/0xc50
[ 53.850462] [<c16c03bf>] ? sdhci_send_command+0xb4f/0xc50
[ 53.850490] [<c123e292>] warn_slowpath_null+0x22/0x30
[ 53.850516] [<c16c03bf>] sdhci_send_command+0xb4f/0xc50
[ 53.850545] [<c1207fac>] ? native_sched_clock+0x2c/0xb0
[ 53.850575] [<c14c1f93>] ? delay_tsc+0x73/0xb0
[ 53.850601] [<c14c1ebe>] ? __const_udelay+0x1e/0x20
[ 53.850626] [<c16bdeb3>] ? sdhci_reset+0x93/0x190
[ 53.850654] [<c16c05b0>] sdhci_finish_data+0xf0/0x2e0
[ 53.850683] [<c16c130f>] sdhci_irq+0x31f/0x930
[ 53.850713] [<c12cb080>] ? __buffer_unlock_commit+0x10/0x20
[ 53.850740] [<c12cbcd7>] ? trace_buffer_unlock_commit+0x37/0x50
[ 53.850773] [<c1288f3c>] handle_irq_event_percpu+0x5c/0x220
[ 53.850800] [<c128bc96>] ? handle_fasteoi_irq+0x16/0xd0
[ 53.850827] [<c128913a>] handle_irq_event+0x3a/0x60
[ 53.850852] [<c128bc80>] ? unmask_irq+0x30/0x30
[ 53.850878] [<c128bcce>] handle_fasteoi_irq+0x4e/0xd0
[ 53.850895] <IRQ> [<c1890b52>] ? do_IRQ+0x42/0xb0
[ 53.850943] [<c1890a31>] ? common_interrupt+0x31/0x38
[ 53.850973] [<c12b00d8>] ? cgroup_mkdir+0x4e8/0x580
[ 53.851001] [<c1208d32>] ? default_idle+0x22/0xf0
[ 53.851029] [<c1209576>] ? arch_cpu_idle+0x26/0x30
[ 53.851054] [<c1288505>] ? cpu_startup_entry+0x65/0x240
[ 53.851082] [<c18793d5>] ? rest_init+0xb5/0xc0
[ 53.851108] [<c1879320>] ? __read_lock_failed+0x18/0x18
[ 53.851138] [<c1bf6a15>] ? start_kernel+0x31b/0x321
[ 53.851164] [<c1bf652f>] ? repair_env_string+0x51/0x51
[ 53.851190] [<c1bf6363>] ? i386_start_kernel+0x139/0x13c
[ 53.851209] ---[ end trace 92777f5fe48d33f2 ]---
[ 53.853449] mmcblk0: error -84 transferring data, sector 11142162, nr
304, cmd response 0x0, card status 0x0
[ 53.853476] mmcblk0: retrying using single block read
[ 55.937863] sdhci: Timeout waiting for Buffer Read Ready interrupt
during tuning procedure, falling back to fixed sampling clock
[ 56.207951] sdhci: Timeout waiting for Buffer Read Ready interrupt
during tuning procedure, falling back to fixed sampling clock
[ 66.228785] mmc0: Timeout waiting for hardware interrupt.
[ 66.230855] ------------[ cut here ]------------
Signed-off-by: David Cohen <david.a.cohen@linux.intel.com>
Reviewed-by: Chuanxiao Dong <chuanxiao.dong@intel.com>
Acked-by: Dong Aisheng <b29396@freescale.com>
Cc: stable <stable@vger.kernel.org> # [3.13]
Signed-off-by: Chris Ball <chris@printf.net>
|
| 01acf6917aed934388609177605d54ad1463b252 |
|
18-Dec-2013 |
Adam Lee <adam.lee@canonical.com> |
mmc: sdhci-pci: add support of O2Micro/BayHubTech SD hosts
Add O2Micro/BayHubTech SD Host DeviceId 8520 support.
Add O2Micro/BayHubTech SD Host DeviceId 8420 & 8421 support.
Add O2Micro/BayHubTech SD Host DeviceId 8620 & 8621 support.
These card readers are used in laptops like Lenovo ThinkPad W540,
Dell Latitude E5440, Dell Latitude E6540.
Signed-off-by: Peter Guo <peter.guo@bayhubtech.com>
Signed-off-by: Adam Lee <adam.lee@canonical.com>
Signed-off-by: Chris Ball <chris@printf.net>
|
| 522624f97ee22684cf1b169b5a490cc3ad87b22c |
|
18-Dec-2013 |
Adam Lee <adam.lee@canonical.com> |
mmc: sdhci-pci: break out definitions to header file
Break out definitions in sdhci-pci.c to sdhci-pci.h, for introducing
module files like sdhci-pci-xxx.c
Signed-off-by: Adam Lee <adam.lee@canonical.com>
Signed-off-by: Chris Ball <chris@printf.net>
|
| d052068a0ba43273eb9cfe32460e9445ef75fdc5 |
|
21-Oct-2013 |
Eric Ernst <eric.ernst@linux.intel.com> |
mmc: sdhci-pci: Add SDIO/MMC device ID support for Intel Clovertrail
This patch adds intel_mid clovertrail SDIO and eMMC device
IDs to the sdhci-pci driver.
Signed-off-by: Eric Ernst <eric.ernst@linux.intel.com>
Signed-off-by: David Cohen <david.a.cohen@linux.intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 8776a165d152d57a3a58895d55204614abe93d7f |
|
01-Oct-2013 |
David Cohen <david.a.cohen@linux.intel.com> |
mmc: sdhci-pci: add Intel Merrifield support
Implement initial SDHCI Intel Merrifield support. This patch is based
on previous one from Yunpeng Gao <yunpeng.gao@intel.com>.
Signed-off-by: David Cohen <david.a.cohen@linux.intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 30d025c0f7234409e8ee1bf22d1729055e640ec6 |
|
19-Jun-2013 |
Adrian Hunter <adrian.hunter@intel.com> |
mmc: sdhci-pci: add another device id
Add another PCI device id for an eMMC host controller.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| c9faff6cbb3d2b37b3aa356ce455848f91685b24 |
|
13-Jun-2013 |
Adrian Hunter <adrian.hunter@intel.com> |
mmc: sdhci-pci: add support for eMMC hardware reset for BYT eMMC.
Add support for eMMC hardware reset for BYT eMMC.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 7396e318b497cd46eb156effa5278126582ddde7 |
|
05-May-2013 |
Adrian Hunter <adrian.hunter@intel.com> |
mmc: sdhci-pci: support runtime PM for BYT SD cards
Add support for runtime PM for BYT SD cards.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 728ef3d1939e23e26067608d8d8da9571be14b1d |
|
26-Apr-2013 |
Adrian Hunter <adrian.hunter@intel.com> |
mmc: sdhci-pci: add more device ids
Add three more PCI device ids.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| a08b17be8b984a7c51cd5a480cd977363df353f9 |
|
15-Apr-2013 |
Adrian Hunter <adrian.hunter@intel.com> |
mmc: core: fix init controller performance regression, updated patch
Add MMC_CAP2_NO_PRESCAN_POWERUP to sdhci-pci.c also, use mmc_power_off()
for MMC_CAP2_NO_PRESCAN_POWERUP.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
[cjb: previously applied v1 of this patch instead of v4]
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| c915568d99f12898aea4e15845cf891a8b5cc575 |
|
13-Mar-2013 |
Lars-Peter Clausen <lars@metafoo.de> |
mmc: sdhci: Constify sdhci_ops structs where possible
Basically all drivers can have sdhci_ops struct const, but almost none do.
This patch constifies all sdhci_ops struct declarations where possible.
The patch was auto-generated with the following coccinelle semantic patch:
// <smpl>
@r1@
identifier ops;
identifier fld;
@@
ops.fld = ...;
@disable optional_qualifier@
identifier ops != r1.ops;
@@
static
+const
struct sdhci_ops ops = { ... };
// </smpl>
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| eed222aca8d077af3600b651176f6fd04d95cce1 |
|
05-Mar-2013 |
Aaron Lu <aaron.lu@intel.com> |
mmc: sdio: bind acpi with sdio function device
ACPI spec 5 defined the _ADR encoding for sdio bus as:
High word - slot number (0 based)
Low word - function number
This patch adds support for binding sdio function device with acpi node,
and if successful, involve acpi into its power management.
Signed-off-by: Aaron Lu <aaron.lu@intel.com>
Reviewed-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 7bc088d38f92f58df97e1cd9a8430331ee5491bb |
|
21-Jan-2013 |
Sascha Hauer <s.hauer@pengutronix.de> |
mmc: sdhci: rename platform_8bit_width to platform_bus_width
The 8bit in the function name is misleading. When set, it will be
used to set the bus width, regardless of whether 8bit or another
bus width is requested, so change the function name to
platform_bus_width.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 1a1f1f0495604d45e67a328fda80c1cb6a8d87d2 |
|
15-Oct-2012 |
Madhvapathi Sriram <Madhvapathi.Sriram@csr.com> |
mmc: sdhci-pci: Enable SDHCI_CAN_DO_HISPD for Ricoh SDHCI controller
The Ricoh SDHCI controllers support Highspeed clocks as evident from
the ricoh_mmc_probe_slot() settings. Hence, SDHCI_CAN_DO_HISPD needs
to be set to enable SDIO client drivers to set/enable high speed clock
settings
Signed-off-by: Madhvapathi Sriram <Madhvapathi.Sriram@csr.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 6e0ee714fdab0568c3487455951dea2673e9557f |
|
19-Nov-2012 |
Bill Pemberton <wfp5p@virginia.edu> |
mmc: remove use of __devexit
CONFIG_HOTPLUG is going away as an option so __devexit is no
longer needed.
Signed-off-by: Bill Pemberton <wfp5p@virginia.edu>
Cc: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Chris Ball <cjb@laptop.org>
Cc: "Michał Mirosław" <mirq-linux@rere.qmqm.pl>
Cc: Jarkko Lavinen <jarkko.lavinen@nokia.com>
Cc: Venkatraman S <svenkatr@ti.com>
Cc: Viresh Kumar <viresh.linux@gmail.com>
Cc: Ian Molton <ian@mnementh.co.uk>
Cc: Bruce Chang <brucechang@via.com.tw>
Cc: Harald Welte <HaraldWelte@viatech.com>
Cc: Pierre Ossman <pierre@ossman.eu>
Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
| 9647f84deeefcba8b9be22e1f1305eda88851635 |
|
19-Nov-2012 |
Bill Pemberton <wfp5p@virginia.edu> |
mmc: remove use of __devinitconst
CONFIG_HOTPLUG is going away as an option so __devinitconst is no
longer needed.
Signed-off-by: Bill Pemberton <wfp5p@virginia.edu>
Cc: Chris Ball <cjb@laptop.org>
Cc: linux-mmc@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
| c3be1efd41a97f93be390240387d356a07b664c7 |
|
19-Nov-2012 |
Bill Pemberton <wfp5p@virginia.edu> |
mmc: remove use of __devinit
CONFIG_HOTPLUG is going away as an option so __devinit is no longer
needed.
Signed-off-by: Bill Pemberton <wfp5p@virginia.edu>
Cc: Chris Ball <cjb@laptop.org>
Cc: Manuel Lauss <manuel.lauss@gmail.com>
Cc: "Michał Mirosław" <mirq-linux@rere.qmqm.pl>
Cc: Jarkko Lavinen <jarkko.lavinen@nokia.com>
Cc: Venkatraman S <svenkatr@ti.com>
Cc: Ian Molton <ian@mnementh.co.uk>
Cc: Bruce Chang <brucechang@via.com.tw>
Cc: Harald Welte <HaraldWelte@viatech.com>
Cc: Pierre Ossman <pierre@ossman.eu>
Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
| 0433c14356702e296f474f77ebd42f0a9d9a5487 |
|
19-Nov-2012 |
Bill Pemberton <wfp5p@virginia.edu> |
mmc: remove use of __devexit_p
CONFIG_HOTPLUG is going away as an option so __devexit_p is no longer
needed.
Signed-off-by: Bill Pemberton <wfp5p@virginia.edu>
Cc: Chris Ball <cjb@laptop.org>
Cc: "Michał Mirosław" <mirq-linux@rere.qmqm.pl>
Cc: Jarkko Lavinen <jarkko.lavinen@nokia.com>
Cc: Venkatraman S <svenkatr@ti.com>
Cc: Ian Molton <ian@mnementh.co.uk>
Cc: Bruce Chang <brucechang@via.com.tw>
Cc: Harald Welte <HaraldWelte@viatech.com>
Cc: Pierre Ossman <pierre@ossman.eu>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
| 90b3e6c53b006d55952183d8ada2ce3ebc0dce06 |
|
18-Oct-2012 |
Adrian Hunter <adrian.hunter@intel.com> |
mmc: sdhci-pci: fix 'Invalid iomem size' error message condition
The SDHCI standard defines a 256 byte register set but a device
that specifies a larger iomem region is not an error. Alter the
message condition accordingly.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 6cfe1093ca8ddfc0e50748d370c268aeabf371aa |
|
05-Oct-2012 |
Andi Kleen <ak@linux.intel.com> |
sections: fix section conflicts in drivers/mmc
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Cc: Chris Ball <cjb@laptop.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
|
| acc696463d1aa8db0c9d20f567789e0cb2ae1de0 |
|
27-Aug-2012 |
Sachin Kamat <sachin.kamat@linaro.org> |
mmc: sdhci-pci: Use module_pci_driver
module_pci_driver makes the code simpler by eliminating
module_init and module_exit calls.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 55fc05b7414274f17795cd0e8a3b1546f3649d5e |
|
04-Jul-2012 |
Daniel Drake <dsd@laptop.org> |
mmc: sdhci-pci: CaFe has broken card detection
At http://dev.laptop.org/ticket/11980 we have determined that the
Marvell CaFe SDHCI controller reports bad card presence during
resume. It reports that no card is present even when it is.
This is a regression -- resume worked back around 2.6.37.
Around 400ms after resuming, a "card inserted" interrupt is
generated, at which point it starts reporting presence.
Work around this hardware oddity by setting the
SDHCI_QUIRK_BROKEN_CARD_DETECTION flag.
Thanks to Chris Ball for helping with diagnosis.
Signed-off-by: Daniel Drake <dsd@laptop.org>
[stable@: please apply to 3.0+]
Cc: <stable@vger.kernel.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 79263f33b0f3abe26d74a66824b457b94bdbef9f |
|
03-Apr-2012 |
Chris Ball <cjb@laptop.org> |
Revert "mmc: sdhci-pci: Add MSI support"
This reverts commit e6039832bed9a9b967796d7021f17f25b625b616.
There are reports of MSI breaking SDHCI on multiple chipsets (JMicron
and O2Micro, at least), so this should be reverted until we come up
with a whitelist or something.
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 84e41d2d56fbacfd888ab1382e94e752da176582 |
|
03-Apr-2012 |
Chris Ball <cjb@laptop.org> |
Revert "mmc: sdhci-pci: add quirks for broken MSI on O2Micro controllers"
This reverts commit c16e981b2fd9455af670a69a84f4c8cf07e12658, because
it's no longer useful once MSI support is reverted.
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 210b7d28598e402548b0164ca2f543e15aab8c6e |
|
29-Mar-2012 |
Manuel Lauss <manuel.lauss@googlemail.com> |
mmc: sdhci-pci: add quirks for broken MSI on O2Micro controllers
MSI on my O2Micro OZ600 SD card reader is broken. This patch adds a quirk
to disable MSI on these controllers.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 296e0b0357e09fdc6f307953da51c0e5da5b84e7 |
|
14-Mar-2012 |
Alexander Stein <alexander.stein@systec-electronic.com> |
mmc: sdhci-pci: allow 8-bit bus width for Intel PCH
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| e6039832bed9a9b967796d7021f17f25b625b616 |
|
13-Mar-2012 |
Alexander Stein <alexander.stein@systec-electronic.com> |
mmc: sdhci-pci: Add MSI support
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| f3c55a7b5d7f2d40c805a62174bb733b55875523 |
|
07-Feb-2012 |
Adrian Hunter <adrian.hunter@intel.com> |
mmc: sdhci-pci: add SDHCI_QUIRK2_HOST_OFF_CARD_ON for Medfield SDIO
SDIO is powered separately from the host controller, so the card can
remain on while the host controller is powered off during suspend.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| da721cf7808f9731454757d704f0aa69ae2f1aae |
|
07-Feb-2012 |
Adrian Hunter <adrian.hunter@intel.com> |
mmc: sdhci-pci: select HC erase size for Medfield eMMC
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 012e4671e445ac1dd04f40c0b974685280bedca3 |
|
30-Jan-2012 |
Adrian Hunter <adrian.hunter@intel.com> |
mmc: sdhci-pci: set Medfield SDIO as non-removable
Set Medfield SDIO as non-removable to avoid un-necessary
card detect activity.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 93933508ce3753b9ef1fefb75531b5b1622de03f |
|
27-Dec-2011 |
Adrian Hunter <adrian.hunter@intel.com> |
mmc: sdhci-pci: enable runtime PM for Medfield SDIO
Runtime PM for SDIO is no longer enabled by default (see
5c7f0e083d2d98ba14ddd10e88f001a0ead4cae4) so it must now
be enabled per platform, in this case Medfield uses it.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| e2a0a5829c4069ee4a0f28c7301187ffaba91a46 |
|
27-Dec-2011 |
Adrian Hunter <adrian.hunter@intel.com> |
mmc: sdhci-pci: remove SDHCI_QUIRK2_OWN_CARD_DETECTION
Even if a driver provides separate card detection, an interrupt
is still needed to abort mmc requests that are in progress.
SDHCI_QUIRK2_OWN_CARD_DETECTION prevents that, so remove it.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| c5e027a4a19d6267e36107fc32b5a4f3cd27976a |
|
27-Dec-2011 |
Adrian Hunter <adrian.hunter@intel.com> |
mmc: sdhci-pci: get gpio numbers from platform data
Retrieve the GPIO numbers for hardware reset and
card detect from platform data.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 52c506f0bc72530fb786838e7ffd4f158a2e5c3a |
|
27-Dec-2011 |
Adrian Hunter <adrian.hunter@intel.com> |
mmc: sdhci-pci: add platform data
Add a means of getting platform data for the SDHCI PCI
devices. The data is stored against the slot not the
device in order to support multi-slot devices.
The data allows platform-specific setup (such as getting
GPIO numbers from firmware or setting up wl12xx for SDIO)
to be done in platform support files instead of the
sdhci-pci driver.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| b678b91f22debd5f8efa04895652989004761d06 |
|
03-Dec-2011 |
Axel Lin <axel.lin@gmail.com> |
mmc: sdhci-pci: simplify error handling
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 29495aa04a30c21565243c5b9c028510446d242c |
|
03-Nov-2011 |
Manuel Lauss <manuel.lauss@googlemail.com> |
mmc: sdhci: remove "state" argument from sdhci_suspend_host
Drop the "state" argument from sdhci_suspend_host. Its only user is the
PCI glue; this allows to move all SDHCI glues to use dev_pm_ops instead.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| c43fd7746698a10aa6435d62ec28f977dd6246cc |
|
17-Oct-2011 |
Adrian Hunter <adrian.hunter@intel.com> |
mmc: sdhci-pci: add flag for devices that can support runtime PM
Only allow runtime PM for devices that specifically indicate
that they support it.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 66fd8ad5100b5003046aa744a4f12fa31bb831f9 |
|
03-Oct-2011 |
Adrian Hunter <adrian.hunter@intel.com> |
mmc: sdhci-pci: add runtime pm support
Ths patch allows runtime PM for sdhci-pci, runtime suspending after
inactivity of 50ms and ensuring runtime resume before SDHC registers
are accessed. During runtime suspend, interrupts are masked.
The host controller state is restored at runtime resume.
For Medfield, the host controller's card detect mechanism is
supplanted by an always-on GPIO which provides for card detect wake-up.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 88b47679746b81534002bcba42da97ab82b5d12a |
|
03-Jul-2011 |
Paul Gortmaker <paul.gortmaker@windriver.com> |
mmc: Add module.h to drivers/mmc users assuming implicit presence.
We are cleaning up the implicit presence of module.h; these guys are
some of the people who just assume it will be there. Call it out
explitly for those that really need it.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| f7c56ef2af5ae7e4c24c3c79427b38d18ba1d294 |
|
22-Sep-2011 |
Adrian Hunter <adrian.hunter@intel.com> |
mmc: block: support no access to boot partitions
Intel Medfield platform blocks access to eMMC boot partitions which
results in switch errors. Since there is no access, mmcboot0/1
devices should not be created. Add a host capability to reflect that.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 0f2016558e4f9a8d2f9b1202064915205f4dd450 |
|
29-Aug-2011 |
Adrian Hunter <adrian.hunter@intel.com> |
mmc: sdhci-pci: add eMMC hardware reset support
Implement eMMC hardware reset for Medfield.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 0d013bcf5c272faea1f8e7a5ef3cb2e98103d5cb |
|
29-Jun-2011 |
Adrian Hunter <adrian.hunter@intel.com> |
mmc: sdhci-pci: allow 8-bit bus width for Intel Medfield eMMCs
Unless MMC_CAP_8_BIT_DATA is set, the bus width defaults to 4.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 68077b0261f00e4eb2d26f066efca1edb89488a8 |
|
29-Jun-2011 |
Major Lee <major_lee@wistron.com> |
mmc: sdhci-pci: add 8-bit bus width support for mrst hc0
And hook platform_8bit_width to support 8-bit bus width.
Signed-off-by: Major Lee <major_lee@wistron.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 82b0e23a295cc58d1290017ee97a40956ad68d94 |
|
21-Apr-2011 |
Takashi Iwai <tiwai@suse.de> |
mmc: sdhci: Fix read-only detection with JMicron 388 chip
On HP laptops with JMicron 388 chip, the write-locked SD card isn't
detected correctly as read-only in many cases. This is because the
PRESENT_STATE register becomes unsable just after plugging, and it
returns the WRITE_PROTECT bit wrongly at the first read.
This patch fixes the read-only detection by adding a new sdhci quirk
indicating to check the register more intensively with a relatively
long delay.
The patch is tested with 2.6.39-rc4 kernel.
Cc: Aries Lee <arieslee@jmicron.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| b177bc9188c04e140e5d8928e88623a92ba751bf |
|
05-Apr-2011 |
Ameya Palande <2ameya@gmail.com> |
mmc: sdhci-pci: Fix checkpatch.pl errors
This patch fixes 21 errors and 6 warnings reported by checkpatch.pl.
Signed-off-by: Ameya Palande <2ameya@gmail.com>
Reviewed-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 9fdcdbb0d84922e7ccda2f717a04ea62629f7e18 |
|
29-Mar-2011 |
Chris Ball <cjb@laptop.org> |
mmc: sdhci-pci: Fix error case in sdhci_pci_probe_slot()
If pci_ioremap_bar() fails during probe, we "goto release;" and free the
host, but then we return 0 -- which tells sdhci_pci_probe() that the probe
succeeded. Since we think the probe succeeded, when we unload sdhci we'll
go to sdhci_pci_remove_slot() and it will try to dereference slot->host,
which is now NULL because we freed it in the error path earlier.
The patch simply sets ret appropriately, so that sdhci_pci_probe() will
detect the failure immediately and bail out.
Signed-off-by: Chris Ball <cjb@laptop.org>
Cc: <stable@kernel.org>
|
| cf5e23e1c27af4291cf90020c295756ba4dcf326 |
|
17-Mar-2011 |
Sergei Shtylyov <sshtylyov@ru.mvista.com> |
mmc: use pci_dev->revision
The SDHCI driver uses PCI_CLASS_REVISION instead of PCI_REVISION_ID, so
it was not converted by commit 44c10138fd4bbc4b6d6bff0873c24902f2a9da65
(PCI: Change all drivers to use pci_device->revision). The newer VIA
driver has similar code too. This patch converts both drivers to use
the 'revision' field of 'struct pci_dev'.
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Acked-by: Harald Welte <HaraldWelte@viatech.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 24c300199b2f9125169c09ca3e950b17c16e2eab |
|
23-Feb-2011 |
Chris Ball <cjb@laptop.org> |
mmc: sdhci-pci: Remove set-but-unused variable.
drivers/mmc/host/sdhci-pci.c: In function ‘sdhci_pci_probe_slot’:
drivers/mmc/host/sdhci-pci.c:913:18: warning: variable ‘addr’ set but
not used [-Wunused-but-set-variable]
Signed-off-by: Chris Ball <cjb@laptop.org>
Acked-by: Wolfram Sang <w.sang@pengutronix.de>
|
| 5fd11c0754fa069b6aba64b65734aa2fb193552d |
|
11-Feb-2011 |
Manoj Iyer <manoj.iyer@canonical.com> |
mmc: sdhci: Add Ricoh e823 PCI ID
Signed-off-by: Manoj Iyer <manoj.iyer@canonical.com>
Cc: <stable@kernel.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| d75c1084db5e4a30603729852046d0a87d4f7688 |
|
16-Dec-2010 |
Takashi Iwai <tiwai@suse.de> |
mmc: sdhci: Enable bus-width test for JMicron controllers
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 8f230f454fe04ba326ffaead3a6b88dcf44eaf4b |
|
08-Dec-2010 |
Takashi Iwai <tiwai@suse.de> |
mmc: Add support for JMicron 388 SD/MMC controller
JMicron 388 SD/MMC combo controller supports the 1.8V low-voltage for
SD, but MMC doesn't work with the low-voltage, resulting in an error
at probing.
This patch adds the support for multiple voltage mask per device type,
so that SD works with 1.8V while MMC forces 3.3V. Here new ocr_avail_*
fields for each device are introduced, so that the actual OCR mask is
switched dynamically.
Also, the restriction of low-voltage in core/sd.c is removed when the
bit is allowed explicitly via ocr_avail_sd mask.
This patch was rewritten from scratch based on Aries' original code.
Signed-off-by: Aries Lee <arieslee@jmicron.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Reviewed-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 26daa1ed40c6b31b4220581431982814c47c608a |
|
18-Nov-2010 |
Jennifer Li <Jennifer.li@o2micro.com> |
mmc: sdhci: Disable ADMA on some O2Micro SD/MMC parts.
This patch disables the broken ADMA on selected O2Micro devices.
Signed-off-by: Jennifer Li <Jennifer.li@o2micro.com>
Reviewed-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 35ac6f081f26e1b6b3482b9c8dfccebe7817c691 |
|
09-Nov-2010 |
Jacob Pan <jacob.jun.pan@linux.intel.com> |
mmc: sdhci: Fix crash on boot with C0 stepping Moorestown platforms
SDHC2 is newly added in C0 stepping of Langwell. Without the Moorestown
specific quirk, the default pci_probe will be called and crash the kernel.
This patch unblocks the crash problem on C0 by using the same probing
function as HC1, which limits the number of slots to one.
Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 5f619704d18b93869d045abc49e09cdba109b04b |
|
04-Nov-2010 |
Daniel Drake <dsd@laptop.org> |
mmc: sdhci: Properly enable SDIO IRQ wakeups
A little more work was needed for SDIO IRQ wakeups to be functional.
Wake-on-WLAN on the SD WiFi adapter in the XO-1.5 laptop is now working.
Signed-off-by: Daniel Drake <dsd@laptop.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| f9ee3eab528d2d21c33584bfb86ed1ebf317cb09 |
|
04-Oct-2010 |
Alan Cox <alan@linux.intel.com> |
mmc: sdhci: Add Moorestown device support
This adds the basic identifiers. Due to the various chip quirks it's not
enough to make MRST support very useful for earlier steppings but that can
follow.
(I'm currently trying to verify which steps actually matter outside Intel
so I can avoid unneeded stuff going upstream)
[Extracted from original development]
Signed-off-by: JiebingLi <jiebing.li@intel.com>
[Folds in fixes]
Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 292290524e54724cab78e7e79a27a3b9a8b11483 |
|
04-Oct-2010 |
Xiaochen Shen <xiaochen.shen@intel.com> |
mmc: sdhci: Intel Medfield support
Basic support for the Intel Medfield devices
Give them their own quirks as we will need to update this later.
Signed-off-by: Xiaochen Shen <xiaochen.shen@intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 225d85fe7ddca2985548d98e410f7baf4a5d6260 |
|
04-Oct-2010 |
Alan Cox <alan@linux.intel.com> |
mmc: sdhci: Allow the probe handler to override slots
Currently we write it to the chip data, but if the probe handler overrides
it we ignore the new value and keep using our cached one. Fix this so that
a probe handler can adjust the slot count.
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
| 568133ebda39f7507759a744fa9cf4d5097bad2f |
|
11-Aug-2010 |
Pablo Castillo <CyberCastle@gmail.com> |
mmc: add ricoh e822 pci id
Signed-off-by: Pablo Castillo <CyberCastle@gmail.com>
Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com>
Tested-by: Gregg Lebovitz <gregg@lebovitz.net>
Cc: Maxim Levitsky <maximlevitsky@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
|
| ccc92c23240cdf952ef7cc39ba563910dcbc9cbe |
|
11-Aug-2010 |
Maxim Levitsky <maximlevitsky@gmail.com> |
mmc: make sdhci work with ricoh mmc controller
The current way of disabling it is not well tested by vendor and has all
kinds of bugs that show up on resume from ram/disk. A very good example
is a dead SDHCI controller.
Old way of disabling is still supported by continuing to use
CONFIG_MMC_RICOH_MMC.
Based on 'http://list.drzeus.cx/pipermail/sdhci-devel/2007-December/002085.html'
Therefore most of the credit for this goes to Andrew de Quincey
Signed-off-by: Maxim Levitsky <maximlevitsky@gmail.com>
Cc: Andrew de Quincey <adq_dvb@lidskialf.net>
Acked-by: Philip Langdale <philipl@overt.org>
Cc: "Rafael J. Wysocki" <rjw@sisk.pl>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
|
| dc0fd7b56141999832a6bccda2f7e9765f0bc087 |
|
26-May-2010 |
Julia Lawall <julia@diku.dk> |
drivers/mmc/host: use ERR_CAST
Use ERR_CAST(x) rather than ERR_PTR(PTR_ERR(x)). The former makes more
clear what is the purpose of the operation, which otherwise looks like a
no-op.
The semantic patch that makes this change is as follows:
(http://coccinelle.lip6.fr/)
// <smpl>
@@
type T;
T x;
identifier f;
@@
T f (...) { <+...
- ERR_PTR(PTR_ERR(x))
+ x
...+> }
@@
expression x;
@@
- ERR_PTR(PTR_ERR(x))
+ ERR_CAST(x)
// </smpl>
Signed-off-by: Julia Lawall <julia@diku.dk>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
|
| 5a0e3ad6af8660be21ca98a971cd00f331318c05 |
|
24-Mar-2010 |
Tejun Heo <tj@kernel.org> |
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
|
| 849382948992cc6482c778b1e854c19368b60c05 |
|
05-Mar-2010 |
Vasily Khoruzhick <anarsoul@gmail.com> |
mmc: enable DMA on Ricoh sdhci reader by default
This card reader doesn't advertise, however DMA works well. Probably
windows SDHCI driver assumes that all readers support DMA and thus we see
that bug.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Maxim Levitsky <maximlevitsky@gmail.com>
Signed-off-by: Maxim Levitsky <maximlevitsky@gmail.com>
Cc: Harald Welte <HaraldWelte@viatech.com>
Cc: Norbert Preining <preining@logic.at>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
|
| 2f4cbb3d834922ffa0309b6a08fa42dac87ef9d2 |
|
05-Mar-2010 |
Nicolas Pitre <nico@fluxnic.net> |
sdio: sdhci support for suspend mode PM features
Tested with an XO v1.5 from OLPC.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
|
| a7a6186c4b96d4ce5c1d13d91b7f862b0adc0e72 |
|
15-Dec-2009 |
Nicolas Pitre <nico@fluxnic.net> |
sdhci: add support for the SysKonnect CardBus2SDIO adapter
This is still in use especially to develop SDIO device drivers on laptop
machines which are lacking SDIO slots. This adapter supports SDIO cards
only due to lack of 136-bit response capability.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
|
| a13abc7b0814da7733c531453a207729b542ecf8 |
|
23-Sep-2009 |
Richard Röjfors <richard.rojfors@mocean-labs.com> |
sdhci: support for ADMA only hosts
Add support for ADMA on SDHCI hosts, not supporting SDMA.
According to the SDHCI specifications a host can support ADMA but not SDMA
Signed-off-by: Richard Röjfors <richard.rojfors@mocean-labs.com>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
|
| c99436fb7505ca2427780d7ae49ebb427bb6f374 |
|
23-Sep-2009 |
Chris Ball <cjb@laptop.org> |
sdhci: add no-card-no-reset quirk for Ricoh R5C822/Sony Z11
Card insertion detection is broken without this quirk on a Sony Vaio
Z11, as discussed on linux-mmc here: http://marc.info/?t=125017355000008
Signed-off-by: Chris Ball <cjb@laptop.org>
Tested-by: Norbert Preining <preining@logic.at>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
|
| 557b06971b1f05cbadec2f376a305ee1954e9b0d |
|
18-Jun-2009 |
Harald Welte <HaraldWelte@viatech.com> |
sdhci: Specific quirk vor VIA SDHCI controller in VX855ES
The SDHCI controller found in the VX855ES requires 10ms
delay between applying power and applying clock.
This issue has been discovered and documented by the OLPC XO1.5 team.
Signed-off-by: Harald Welte <HaraldWelte@viatech.com>
Signed-off-by: Pierre Ossman <pierre@ossman.eu>
|
| c60a32cd129b1c41f98888b03ba2904406bac8f8 |
|
10-Apr-2009 |
Dan Carpenter <error27@gmail.com> |
sdhci-pci: bad error handling in probe function
The goto unmap is too early, we haven't allocated host or done the
request_region().
Found by smatch (http://repo.or.cz/w/smatch.git).
[ Second error path fix by Pierre Ossman ]
Signed-off-by: Dan Carpenter <error27@gmail.com>
Signed-off-by: Pierre Ossman <pierre@ossman.eu>
|
| 32710e8fd537adeb53f98dec92e4a77caac512f5 |
|
08-Apr-2009 |
Pierre Ossman <pierre@ossman.eu> |
New mail address for Pierre Ossman
Signed-off-by: Pierre Ossman <pierre@ossman.eu>
|
| 284901a90a9e0b812ca3f5f852cbbfb60d10249d |
|
07-Apr-2009 |
Yang Hongyang <yanghy@cn.fujitsu.com> |
dma-mapping: replace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32)
Replace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32)
Signed-off-by: Yang Hongyang<yanghy@cn.fujitsu.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
|
| a0874897b1ba106298e4303a25456a473fc40f3d |
|
02-Mar-2009 |
Andres Salomon <dilinger@debian.org> |
sdhci: Add NO_BUSY_IRQ quirk for Marvell CAFE host chip
As described here: http://lkml.org/lkml/2009/2/20/265
The CAFE chip is broken due to commit e809517f6fa5803a5a1cd5602.
Anton added a quirk here: http://lkml.org/lkml/2009/2/20/279 that fixes
CAFE's problem. This adds the quirk for CAFE.
Signed-off-by: Andres Salomon <dilinger@debian.org>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
|
| 86a6a8749d5b8fd5c2b544fe9fd11101e3d0550f |
|
02-Feb-2009 |
Pierre Ossman <drzeus@drzeus.cx> |
Revert "sdhci: force high speed capability on some controllers"
This reverts commit a4b76193774b463b922cab2f92450efb20d29ef0.
It turned out that the controller had problem running at the
higher speed, so go back to trusting the hardware capability
bits.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
|
| 092f82edbe96d0a08e1d10436927e89fa101fe0d |
|
29-Sep-2008 |
Arjan van de Ven <arjan@linux.intel.com> |
pci: use pci_ioremap_bar() in drivers/mmc
Use the new pci_ioremap_bar() function in drivers/mmc.
pci_ioremap_bar() just takes a pci device and a bar number, with the goal
of making it really hard to get wrong, while also having a central place
to stick sanity checks.
Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
|
| a4b76193774b463b922cab2f92450efb20d29ef0 |
|
16-Aug-2008 |
Pierre Ossman <drzeus@drzeus.cx> |
sdhci: force high speed capability on some controllers
Some high speed capable controllers forget to set the high speed
capability bit. Make sure we enable the functionality anyway.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
|
| 8c5eb880585a6fa278aa49553dd53a25e1ac319d |
|
03-Sep-2008 |
David Woodhouse <David.Woodhouse@intel.com> |
Use PCI_DEVICE_ID_88ALP01 for CAFÉ chip, rather than PCI_DEVICE_ID_CAFE.
Probably better to use the official designation.
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Acked-by: Pierre Ossman <drzeus@drzeus.cx>
|
| 4a3cba32cb514168bb2516c045b178e6660421d1 |
|
29-Jul-2008 |
Pierre Ossman <drzeus@drzeus.cx> |
sdhci: handle bug in JMB38x for sizes < 4 bytes
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
|
| 2134a922c6e75c779983cad5d8aae832275f5a0d |
|
28-Jun-2008 |
Pierre Ossman <drzeus@drzeus.cx> |
sdhci: scatter-gather (ADMA) support
Add support for the scatter-gather DMA mode present on newer controllers.
As the mode requires 32-bit alignment, non-aligned chunks are handled by
using a bounce buffer.
Also add some new quirks to handle controllers that have bugs in the
ADMA engine.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
|
| 93fc48c785f6266e67663b3cbbf24579b53fe5cf |
|
28-Jun-2008 |
Pierre Ossman <drzeus@drzeus.cx> |
sdhci-pci: don't penalize newer jmicron chips
The upcoming JMicron chips will have solved all the currently known
bugs, so don't penalize them for older problems.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
|
| 309d9736a903527d8bc41787b07573a054439bf6 |
|
28-May-2008 |
Pierre Ossman <drzeus@drzeus.cx> |
sdhci-pci: unaligned data with ricoh controllers
The Ricoh controllers cannot handle unaligned data blocks.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
|
| 1e72859e3ae16346d4007024b20d2d4ef387dcc3 |
|
16-Apr-2008 |
Pierre Ossman <drzeus@drzeus.cx> |
sdhci: handle hot-remove
Gracefully handle when the device is suddenly removed. Do a test read
and avoid any further access if that read returns -1.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
|
| 4489428ab5a49a6f443d9aa17f1d891417787d7b |
|
04-Apr-2008 |
Pierre Ossman <drzeus@drzeus.cx> |
sdhci: support JMicron secondary interface
JMicron chips sometimes have two interfaces to work around limitations
in Microsoft's sdhci driver. This patch allows us to use either interface.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
|
| 45211e21598441a32e53cf5032b7faeac143df6d |
|
24-Mar-2008 |
Pierre Ossman <drzeus@drzeus.cx> |
sdhci: toggle JMicron PMOS setting
Some of the JMicron chips requires us to manually enable the power
output stages of the chip. Add the necessary hooks and functions to
manage this.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
|
| ee53ab5d73998e502801c024a08de2c39a92c52a |
|
05-Jul-2008 |
Pierre Ossman <drzeus@drzeus.cx> |
sdhci: make workaround for timeout bug more general
Give the quirk for broken timeout handling a better chance of handling
more controllers by simply classifying the system as broken and setting
a fixed value.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
|
| 22606405894a3ca5796eb4454a4b83af611fd201 |
|
23-Mar-2008 |
Pierre Ossman <drzeus@drzeus.cx> |
sdhci: more complex quirks handling
Extend the quirks handling in the PCI driver to be able to have
callbacks and not just flags.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
|
| 3815a0ebab678c20d0d9c66af5ee9e68807b6681 |
|
22-Mar-2008 |
Pierre Ossman <drzeus@drzeus.cx> |
sdhci: remove forced dma quirks
Remove the quirk to force DMA on the Ricoh and TI controllers as it is
no longer needed. The only bug they have is that they use an incorrect
PCI interface value, and that is not respected anymore.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
|
| b8c86fc5d8deaa5a6dc49c2c1ed144e6838bf0f3 |
|
18-Mar-2008 |
Pierre Ossman <drzeus@drzeus.cx> |
sdhci: move pci stuff to separate module
The SDHCI interface is not PCI specific, yet the Linux driver was
intimitely connected to the PCI bus. This patch properly separates
the PCI specific portion from the bus independent code.
This patch is based on work by Ben Dooks but he did not have time
to complete it.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
|